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From: David Christensen <drc@linux.vnet.ibm.com>
To: Thomas Monjalon <thomas@monjalon.net>
Cc: dev@dpdk.org
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Subject: Re: [dpdk-dev] [PATCH 4/4] test: fix memory barrier test failure on
power CPUs
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Message-ID: <20190506182626.GLZQfP8x12F11r7oy74WIPViFSQPe_3yl2-mTj9GzNw@z>
>> -#define ITER_MAX 0x100000000
>> +#define ITER_MAX 0x1000000
>
> This is a revert of a change done in patch 3.
I'll fix and resubmit.
>> @@ -92,12 +92,19 @@ struct lcore_plock_test {
>> other = self ^ 1;
>>
>> l->flag[self] = 1;
>> +#ifdef RTE_ARCH_PPC_64
>> + rte_smp_wmb();
>> +#endif
>
> You should not have such #ifdef in a test case
> supposed to run on all architectures with the same code.
> What can be fixed in EAL?
I'll go ahead and remove the ifdefs since the code for rte_smp_wmb()
resolves to different architecture specific code (compiler memory
barriers in the x86 case).
Dave