From: Bruce Richardson <bruce.richardson@intel.com>
To: dev@dpdk.org
Cc: "Mattias Rönnblom" <mattias.ronnblom@ericsson.com>,
"Bruce Richardson" <bruce.richardson@intel.com>
Subject: [dpdk-dev] [PATCH 2/2] build: add rdrand and rdseed checks to build
Date: Tue, 14 May 2019 14:37:02 +0100 [thread overview]
Message-ID: <20190514133702.2993-2-bruce.richardson@intel.com> (raw)
In-Reply-To: <20190514133702.2993-1-bruce.richardson@intel.com>
The meson build never checked for the presence of rdrand and rdseed
instructions, while make build never checked for rdseed. Ensure builds
always have the appropriate checks - and therefore defines - for these
instructions. For runtime, we also add in rdseed to the list of known
bits returned from cpuid() instruction, so we can confirm its presence at
application init time.
Signed-off-by: Bruce Richardson <bruce.richardson@intel.com>
---
config/x86/meson.build | 5 ++++-
lib/librte_eal/common/arch/x86/rte_cpuflags.c | 1 +
lib/librte_eal/common/include/arch/x86/rte_cpuflags.h | 1 +
mk/rte.cpuflags.mk | 4 ++++
4 files changed, 10 insertions(+), 1 deletion(-)
diff --git a/config/x86/meson.build b/config/x86/meson.build
index a650a1ca8..8b0fa3e6f 100644
--- a/config/x86/meson.build
+++ b/config/x86/meson.build
@@ -29,11 +29,14 @@ foreach f:base_flags
endforeach
optional_flags = ['AES', 'PCLMUL',
- 'AVX', 'AVX2', 'AVX512F']
+ 'AVX', 'AVX2', 'AVX512F',
+ 'RDRND', 'RDSEED']
foreach f:optional_flags
if cc.get_define('__@0@__'.format(f), args: machine_args) == '1'
if f == 'PCLMUL' # special case flags with different defines
f = 'PCLMULQDQ'
+ elif f == 'RDRND'
+ f = 'RDRAND'
endif
dpdk_conf.set('RTE_MACHINE_CPUFLAG_' + f, 1)
compile_time_cpuflags += ['RTE_CPUFLAG_' + f]
diff --git a/lib/librte_eal/common/arch/x86/rte_cpuflags.c b/lib/librte_eal/common/arch/x86/rte_cpuflags.c
index 053612d6f..6492df556 100644
--- a/lib/librte_eal/common/arch/x86/rte_cpuflags.c
+++ b/lib/librte_eal/common/arch/x86/rte_cpuflags.c
@@ -108,6 +108,7 @@ const struct feature_entry rte_cpu_feature_table[] = {
FEAT_DEF(INVPCID, 0x00000007, 0, RTE_REG_EBX, 10)
FEAT_DEF(RTM, 0x00000007, 0, RTE_REG_EBX, 11)
FEAT_DEF(AVX512F, 0x00000007, 0, RTE_REG_EBX, 16)
+ FEAT_DEF(RDSEED, 0x00000007, 0, RTE_REG_EBX, 18)
FEAT_DEF(LAHF_SAHF, 0x80000001, 0, RTE_REG_ECX, 0)
FEAT_DEF(LZCNT, 0x80000001, 0, RTE_REG_ECX, 4)
diff --git a/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h b/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h
index 8315f6b69..25ba47b96 100644
--- a/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h
+++ b/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h
@@ -97,6 +97,7 @@ enum rte_cpu_flag_t {
RTE_CPUFLAG_INVPCID, /**< INVPCID */
RTE_CPUFLAG_RTM, /**< Transactional memory */
RTE_CPUFLAG_AVX512F, /**< AVX512F */
+ RTE_CPUFLAG_RDSEED, /**< RDSEED instruction */
/* (EAX 80000001h) ECX features */
RTE_CPUFLAG_LAHF_SAHF, /**< LAHF_SAHF */
diff --git a/mk/rte.cpuflags.mk b/mk/rte.cpuflags.mk
index 541211c61..fa8753531 100644
--- a/mk/rte.cpuflags.mk
+++ b/mk/rte.cpuflags.mk
@@ -51,6 +51,10 @@ ifneq ($(filter $(AUTO_CPUFLAGS),__RDRND__),)
CPUFLAGS += RDRAND
endif
+ifneq ($(filter $(AUTO_CPUFLAGS),__RDSEED__),)
+CPUFLAGS += RDSEED
+endif
+
ifneq ($(filter $(AUTO_CPUFLAGS),__FSGSBASE__),)
CPUFLAGS += FSGSBASE
endif
--
2.21.0
next prev parent reply other threads:[~2019-05-14 13:37 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-05-14 13:37 [dpdk-dev] [PATCH 1/2] build: shorten code for instruction set detection Bruce Richardson
2019-05-14 13:37 ` Bruce Richardson
2019-05-14 13:37 ` Bruce Richardson [this message]
2019-05-14 13:37 ` [dpdk-dev] [PATCH 2/2] build: add rdrand and rdseed checks to build Bruce Richardson
2019-05-15 16:53 ` Mattias Rönnblom
2019-05-15 16:53 ` Mattias Rönnblom
2019-06-03 22:23 ` Thomas Monjalon
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