From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id 2BB01D18D for ; Tue, 14 May 2019 15:37:18 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 May 2019 06:37:17 -0700 X-ExtLoop1: 1 Received: from silpixa00399126.ir.intel.com (HELO silpixa00399126.ger.corp.intel.com) ([10.237.223.2]) by orsmga001.jf.intel.com with ESMTP; 14 May 2019 06:37:16 -0700 From: Bruce Richardson To: dev@dpdk.org Cc: =?UTF-8?q?Mattias=20R=C3=B6nnblom?= , Bruce Richardson Date: Tue, 14 May 2019 14:37:02 +0100 Message-Id: <20190514133702.2993-2-bruce.richardson@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190514133702.2993-1-bruce.richardson@intel.com> References: <20190514133702.2993-1-bruce.richardson@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH 2/2] build: add rdrand and rdseed checks to build X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 14 May 2019 13:37:18 -0000 The meson build never checked for the presence of rdrand and rdseed instructions, while make build never checked for rdseed. Ensure builds always have the appropriate checks - and therefore defines - for these instructions. For runtime, we also add in rdseed to the list of known bits returned from cpuid() instruction, so we can confirm its presence at application init time. Signed-off-by: Bruce Richardson --- config/x86/meson.build | 5 ++++- lib/librte_eal/common/arch/x86/rte_cpuflags.c | 1 + lib/librte_eal/common/include/arch/x86/rte_cpuflags.h | 1 + mk/rte.cpuflags.mk | 4 ++++ 4 files changed, 10 insertions(+), 1 deletion(-) diff --git a/config/x86/meson.build b/config/x86/meson.build index a650a1ca8..8b0fa3e6f 100644 --- a/config/x86/meson.build +++ b/config/x86/meson.build @@ -29,11 +29,14 @@ foreach f:base_flags endforeach optional_flags = ['AES', 'PCLMUL', - 'AVX', 'AVX2', 'AVX512F'] + 'AVX', 'AVX2', 'AVX512F', + 'RDRND', 'RDSEED'] foreach f:optional_flags if cc.get_define('__@0@__'.format(f), args: machine_args) == '1' if f == 'PCLMUL' # special case flags with different defines f = 'PCLMULQDQ' + elif f == 'RDRND' + f = 'RDRAND' endif dpdk_conf.set('RTE_MACHINE_CPUFLAG_' + f, 1) compile_time_cpuflags += ['RTE_CPUFLAG_' + f] diff --git a/lib/librte_eal/common/arch/x86/rte_cpuflags.c b/lib/librte_eal/common/arch/x86/rte_cpuflags.c index 053612d6f..6492df556 100644 --- a/lib/librte_eal/common/arch/x86/rte_cpuflags.c +++ b/lib/librte_eal/common/arch/x86/rte_cpuflags.c @@ -108,6 +108,7 @@ const struct feature_entry rte_cpu_feature_table[] = { FEAT_DEF(INVPCID, 0x00000007, 0, RTE_REG_EBX, 10) FEAT_DEF(RTM, 0x00000007, 0, RTE_REG_EBX, 11) FEAT_DEF(AVX512F, 0x00000007, 0, RTE_REG_EBX, 16) + FEAT_DEF(RDSEED, 0x00000007, 0, RTE_REG_EBX, 18) FEAT_DEF(LAHF_SAHF, 0x80000001, 0, RTE_REG_ECX, 0) FEAT_DEF(LZCNT, 0x80000001, 0, RTE_REG_ECX, 4) diff --git a/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h b/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h index 8315f6b69..25ba47b96 100644 --- a/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h +++ b/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h @@ -97,6 +97,7 @@ enum rte_cpu_flag_t { RTE_CPUFLAG_INVPCID, /**< INVPCID */ RTE_CPUFLAG_RTM, /**< Transactional memory */ RTE_CPUFLAG_AVX512F, /**< AVX512F */ + RTE_CPUFLAG_RDSEED, /**< RDSEED instruction */ /* (EAX 80000001h) ECX features */ RTE_CPUFLAG_LAHF_SAHF, /**< LAHF_SAHF */ diff --git a/mk/rte.cpuflags.mk b/mk/rte.cpuflags.mk index 541211c61..fa8753531 100644 --- a/mk/rte.cpuflags.mk +++ b/mk/rte.cpuflags.mk @@ -51,6 +51,10 @@ ifneq ($(filter $(AUTO_CPUFLAGS),__RDRND__),) CPUFLAGS += RDRAND endif +ifneq ($(filter $(AUTO_CPUFLAGS),__RDSEED__),) +CPUFLAGS += RDSEED +endif + ifneq ($(filter $(AUTO_CPUFLAGS),__FSGSBASE__),) CPUFLAGS += FSGSBASE endif -- 2.21.0 From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id E2808A00E6 for ; Tue, 14 May 2019 15:37:19 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id B09FC1B111; Tue, 14 May 2019 15:37:19 +0200 (CEST) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id 2BB01D18D for ; Tue, 14 May 2019 15:37:18 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga001.jf.intel.com ([10.7.209.18]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 14 May 2019 06:37:17 -0700 X-ExtLoop1: 1 Received: from silpixa00399126.ir.intel.com (HELO silpixa00399126.ger.corp.intel.com) ([10.237.223.2]) by orsmga001.jf.intel.com with ESMTP; 14 May 2019 06:37:16 -0700 From: Bruce Richardson To: dev@dpdk.org Cc: =?UTF-8?q?Mattias=20R=C3=B6nnblom?= , Bruce Richardson Date: Tue, 14 May 2019 14:37:02 +0100 Message-Id: <20190514133702.2993-2-bruce.richardson@intel.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190514133702.2993-1-bruce.richardson@intel.com> References: <20190514133702.2993-1-bruce.richardson@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH 2/2] build: add rdrand and rdseed checks to build X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Content-Type: text/plain; charset="UTF-8" Message-ID: <20190514133702.vdPEQkfKMC0mTVhl6lPqiBkJfBW3O0_VNSzMdNdfwo4@z> The meson build never checked for the presence of rdrand and rdseed instructions, while make build never checked for rdseed. Ensure builds always have the appropriate checks - and therefore defines - for these instructions. For runtime, we also add in rdseed to the list of known bits returned from cpuid() instruction, so we can confirm its presence at application init time. Signed-off-by: Bruce Richardson --- config/x86/meson.build | 5 ++++- lib/librte_eal/common/arch/x86/rte_cpuflags.c | 1 + lib/librte_eal/common/include/arch/x86/rte_cpuflags.h | 1 + mk/rte.cpuflags.mk | 4 ++++ 4 files changed, 10 insertions(+), 1 deletion(-) diff --git a/config/x86/meson.build b/config/x86/meson.build index a650a1ca8..8b0fa3e6f 100644 --- a/config/x86/meson.build +++ b/config/x86/meson.build @@ -29,11 +29,14 @@ foreach f:base_flags endforeach optional_flags = ['AES', 'PCLMUL', - 'AVX', 'AVX2', 'AVX512F'] + 'AVX', 'AVX2', 'AVX512F', + 'RDRND', 'RDSEED'] foreach f:optional_flags if cc.get_define('__@0@__'.format(f), args: machine_args) == '1' if f == 'PCLMUL' # special case flags with different defines f = 'PCLMULQDQ' + elif f == 'RDRND' + f = 'RDRAND' endif dpdk_conf.set('RTE_MACHINE_CPUFLAG_' + f, 1) compile_time_cpuflags += ['RTE_CPUFLAG_' + f] diff --git a/lib/librte_eal/common/arch/x86/rte_cpuflags.c b/lib/librte_eal/common/arch/x86/rte_cpuflags.c index 053612d6f..6492df556 100644 --- a/lib/librte_eal/common/arch/x86/rte_cpuflags.c +++ b/lib/librte_eal/common/arch/x86/rte_cpuflags.c @@ -108,6 +108,7 @@ const struct feature_entry rte_cpu_feature_table[] = { FEAT_DEF(INVPCID, 0x00000007, 0, RTE_REG_EBX, 10) FEAT_DEF(RTM, 0x00000007, 0, RTE_REG_EBX, 11) FEAT_DEF(AVX512F, 0x00000007, 0, RTE_REG_EBX, 16) + FEAT_DEF(RDSEED, 0x00000007, 0, RTE_REG_EBX, 18) FEAT_DEF(LAHF_SAHF, 0x80000001, 0, RTE_REG_ECX, 0) FEAT_DEF(LZCNT, 0x80000001, 0, RTE_REG_ECX, 4) diff --git a/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h b/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h index 8315f6b69..25ba47b96 100644 --- a/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h +++ b/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h @@ -97,6 +97,7 @@ enum rte_cpu_flag_t { RTE_CPUFLAG_INVPCID, /**< INVPCID */ RTE_CPUFLAG_RTM, /**< Transactional memory */ RTE_CPUFLAG_AVX512F, /**< AVX512F */ + RTE_CPUFLAG_RDSEED, /**< RDSEED instruction */ /* (EAX 80000001h) ECX features */ RTE_CPUFLAG_LAHF_SAHF, /**< LAHF_SAHF */ diff --git a/mk/rte.cpuflags.mk b/mk/rte.cpuflags.mk index 541211c61..fa8753531 100644 --- a/mk/rte.cpuflags.mk +++ b/mk/rte.cpuflags.mk @@ -51,6 +51,10 @@ ifneq ($(filter $(AUTO_CPUFLAGS),__RDRND__),) CPUFLAGS += RDRAND endif +ifneq ($(filter $(AUTO_CPUFLAGS),__RDSEED__),) +CPUFLAGS += RDSEED +endif + ifneq ($(filter $(AUTO_CPUFLAGS),__FSGSBASE__),) CPUFLAGS += FSGSBASE endif -- 2.21.0