From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id 214D8A00E6 for ; Fri, 17 May 2019 00:04:00 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id E89C05A6A; Fri, 17 May 2019 00:03:57 +0200 (CEST) Received: from mail-wr1-f68.google.com (mail-wr1-f68.google.com [209.85.221.68]) by dpdk.org (Postfix) with ESMTP id 5179B5A6A; Fri, 17 May 2019 00:03:56 +0200 (CEST) Received: by mail-wr1-f68.google.com with SMTP id e15so4991732wrs.4; Thu, 16 May 2019 15:03:56 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=gmail.com; s=20161025; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=3y5tlq2M1q2UYO9LHYYgvpLEkBFz43Wtfo78Oo+P8t4=; b=KaCgXS9pTwxBCdeaOYQctwctBXoEoLKF5EfumvOLOZSTKhOmZFZuf5hWM+0TbcOVjl 1nzIZhDvJKgrxARSdmt8dq0MEV1Nt7PFmvQ5M1Ok1CwrSS4z77ftWsXI2fR8TogQjOui 5exgedI6ef5/vhsleh65nhQxIBv0+ysc3OmaA4sDJG9d6K8uv+zscajOX2kFhuYyGtAe aPzX+7LvDR0TzyRYnMdaPsBr4RSA1KTvXGnrKlb2wlBvfGNfLUJSR/vglEu8AefDuHGi YFtwExbbpsyiy9ii+YbbbMGG4CXu7AvP701K0J4jMPtQNnT6U3P1G6MrYD1HxHL+Nyj6 XTjg== X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=3y5tlq2M1q2UYO9LHYYgvpLEkBFz43Wtfo78Oo+P8t4=; b=hf1QppUoz20vPEGpDQdrR/ixqpLsSfhyfnUNMXxmR+CiI1kafuf1iKUQvSmHX3mTWd t8652O4BB0tkNnusyr7cINPSLxM/zK4/JgeYil/yB/pba1v3Q46VQzAi+heIZlc0wOP7 DvdFQf7H97NUR6X6yOQdL1t01d8fqjqN35lIXiATWqZ53mCSYme0AwHdrCZbcpzcHamG j+nU6FWyzwiWaaZzyj0JZDHRZSKlIdDdHt2Uguk4S45ogRlpmT49ebQjjl0p4ur4FA6V TYOwYifjHXq296E2LGADy2tOPBwVG3um4DsZYCjOKkP1EqLjRCus4HKLtMjQpLTSxMGj yEKg== X-Gm-Message-State: APjAAAXEQhf28GaNV3dJjA9HAeFdvAPwxaz2lnxZQu4Bx/D1yCxL4m1D OjRBT5LgAfUgsOmqFXXdMFZgilMEADY= X-Google-Smtp-Source: APXvYqzCHs3X9ZXbrbE5Xm17YrEnV3I5ffG16B4DFqaSCPoeLQjNrmcSjItkkY9gxasz4bECkvJ55Q== X-Received: by 2002:a5d:4109:: with SMTP id l9mr11133536wrp.204.1558044235822; Thu, 16 May 2019 15:03:55 -0700 (PDT) Received: from schoudah-dev.eng.vyatta.net (host81-147-150-50.range81-147.btcentralplus.com. [81.147.150.50]) by smtp.gmail.com with ESMTPSA id y17sm6097763wrp.70.2019.05.16.15.03.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Thu, 16 May 2019 15:03:55 -0700 (PDT) From: Shweta Choudaha To: dev@dpdk.org Cc: wenzhuo.lu@intel.com, shweta.choudaha@att.com, stable@dpdk.org Date: Thu, 16 May 2019 23:03:31 +0100 Message-Id: <20190516220331.91984-2-shweta.choudaha@gmail.com> X-Mailer: git-send-email 2.11.0 In-Reply-To: <20190516220331.91984-1-shweta.choudaha@gmail.com> References: <20190516214535.90650-2-shweta.choudaha@gmail.com> <20190516220331.91984-1-shweta.choudaha@gmail.com> Subject: [dpdk-dev] [PATCH v2 1/1] net/e1000: set/clear GO_LINKD bit only if PHY reset is not blocked X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Shweta Choudaha When PHY reset is blocked as is the case when BMC is connected via NC-SI do not set GO_LINKD bit in PHY power management register in dev_stop as this will disconnect the PHY. Also, in dev_close clear the GO_LINKD bit only if PHY reset is not blocked Fixes: 3af34dec0b41 ("igb: force phy power up/down") CC: stable@dpdk.org Signed-off-by: Shweta Choudaha --- drivers/net/e1000/igb_ethdev.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c index d3a8f5bf4..4d4065d05 100644 --- a/drivers/net/e1000/igb_ethdev.c +++ b/drivers/net/e1000/igb_ethdev.c @@ -1515,8 +1515,9 @@ eth_igb_stop(struct rte_eth_dev *dev) igb_pf_reset_hw(hw); E1000_WRITE_REG(hw, E1000_WUC, 0); - /* Set bit for Go Link disconnect */ - if (hw->mac.type >= e1000_82580) { + /* Set bit for Go Link disconnect if PHY reset is not blocked */ + if (hw->mac.type >= e1000_82580 && + (e1000_check_reset_block(hw) != E1000_BLK_PHY_RESET)) { uint32_t phpm_reg; phpm_reg = E1000_READ_REG(hw, E1000_82580_PHY_POWER_MGMT); @@ -1590,8 +1591,9 @@ eth_igb_close(struct rte_eth_dev *dev) igb_release_manageability(hw); igb_hw_control_release(hw); - /* Clear bit for Go Link disconnect */ - if (hw->mac.type >= e1000_82580) { + /* Clear bit for Go Link disconnect if PHY reset is not blocked */ + if (hw->mac.type >= e1000_82580 && + (e1000_check_reset_block(hw) != E1000_BLK_PHY_RESET)) { uint32_t phpm_reg; phpm_reg = E1000_READ_REG(hw, E1000_82580_PHY_POWER_MGMT); -- 2.11.0