From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id D5381A05D3 for ; Thu, 23 May 2019 10:16:09 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id B92591B949; Thu, 23 May 2019 10:16:09 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 76020493D for ; Thu, 23 May 2019 10:16:08 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x4N89euj019037; Thu, 23 May 2019 01:16:07 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0818; bh=JYDhz2UKFEH8oF6chFr7y9Sa0uejul/AhTH8sKDDYG4=; b=uPyt1Nxu0oI3mP4tbZrbP00q4P70Sl7mYVhjmxOhsAj/8AJt8+e+seCQyAttZzipT3Lt in9qGArQ4lQyejT/GoLriKhO1cInRv8F8hOAf6+ePpATRFPDonAPTnQbJHTvvtxiAU+p lLzxQjUVEa/mVeDJW6yMwXre/0WznNHy3eLZQ6ISq37VISYygvLZhRlnkRQbiJb3RW4c RH1NV2zJA5Ko/uUNGoM833I2y/Cugqb/oeP0lvJ0lUG5wc6AzPEDndvigA7diol50HHq h4iGjGvL6ZBLxKaGoyIzAdUzI6hGvl2cjIsUbinU3Npx3iQIkAdyph88cIeHZm6RbWdc Vw== Received: from sc-exch01.marvell.com ([199.233.58.181]) by mx0b-0016f401.pphosted.com with ESMTP id 2smnwk0s7y-3 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Thu, 23 May 2019 01:16:07 -0700 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Thu, 23 May 2019 01:15:06 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Thu, 23 May 2019 01:15:06 -0700 Received: from jerin-lab.marvell.com (unknown [10.28.34.14]) by maili.marvell.com (Postfix) with ESMTP id D08C73F7040; Thu, 23 May 2019 01:15:04 -0700 (PDT) From: To: CC: , Jerin Jacob , Nithin Dabilpuram , Pavan Nikhilesh Date: Thu, 23 May 2019 13:43:14 +0530 Message-ID: <20190523081339.56348-3-jerinj@marvell.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190523081339.56348-1-jerinj@marvell.com> References: <20190523081339.56348-1-jerinj@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-05-23_08:, , signatures=0 Subject: [dpdk-dev] [PATCH v1 02/27] common/octeontx2: add IO handling APIs X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Jerin Jacob Various octeontx2 drivers use IO handling API, added octeontx2 specific IO handling routines in the common code. Since some of those implementations are based on arm64 instructions added the stub to compile the code on non arm64 ISA. The non arm64 ISA stub is possible due to the fact that it is an integrated controller i.e runs only on Marvell HW. Signed-off-by: Jerin Jacob Signed-off-by: Nithin Dabilpuram Signed-off-by: Pavan Nikhilesh --- drivers/common/octeontx2/otx2_common.h | 12 +++ drivers/common/octeontx2/otx2_io_arm64.h | 95 ++++++++++++++++++++++ drivers/common/octeontx2/otx2_io_generic.h | 63 ++++++++++++++ 3 files changed, 170 insertions(+) create mode 100644 drivers/common/octeontx2/otx2_io_arm64.h create mode 100644 drivers/common/octeontx2/otx2_io_generic.h diff --git a/drivers/common/octeontx2/otx2_common.h b/drivers/common/octeontx2/otx2_common.h index b4e008b14..b0c19266b 100644 --- a/drivers/common/octeontx2/otx2_common.h +++ b/drivers/common/octeontx2/otx2_common.h @@ -6,6 +6,8 @@ #define _OTX2_COMMON_H_ #include +#include +#include #include "hw/otx2_rvu.h" #include "hw/otx2_nix.h" @@ -31,4 +33,14 @@ #define __hot __attribute__((hot)) #endif +/* IO Access */ +#define otx2_read64(addr) rte_read64_relaxed((void *)(addr)) +#define otx2_write64(val, addr) rte_write64_relaxed((val), (void *)(addr)) + +#if defined(RTE_ARCH_ARM64) +#include "otx2_io_arm64.h" +#else +#include "otx2_io_generic.h" +#endif + #endif /* _OTX2_COMMON_H_ */ diff --git a/drivers/common/octeontx2/otx2_io_arm64.h b/drivers/common/octeontx2/otx2_io_arm64.h new file mode 100644 index 000000000..468243c04 --- /dev/null +++ b/drivers/common/octeontx2/otx2_io_arm64.h @@ -0,0 +1,95 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2019 Marvell International Ltd. + */ + +#ifndef _OTX2_IO_ARM64_H_ +#define _OTX2_IO_ARM64_H_ + +#define otx2_load_pair(val0, val1, addr) ({ \ + asm volatile( \ + "ldp %x[x0], %x[x1], [%x[p1]]" \ + :[x0]"=r"(val0), [x1]"=r"(val1) \ + :[p1]"r"(addr) \ + ); }) + +#define otx2_store_pair(val0, val1, addr) ({ \ + asm volatile( \ + "stp %x[x0], %x[x1], [%x[p1]]" \ + ::[x0]"r"(val0), [x1]"r"(val1), [p1]"r"(addr) \ + ); }) + +#define otx2_prefetch_store_keep(ptr) ({\ + asm volatile("prfm pstl1keep, [%x0]\n" : : "r" (ptr)); }) + +static __rte_always_inline uint64_t +otx2_atomic64_add_nosync(int64_t incr, int64_t *ptr) +{ + uint64_t result; + + /* Atomic add with no ordering */ + asm volatile ( + ".cpu generic+lse\n" + "ldadd %x[i], %x[r], [%[b]]" + : [r] "=r" (result), "+m" (*ptr) + : [i] "r" (incr), [b] "r" (ptr) + : "memory"); + return result; +} + +static __rte_always_inline uint64_t +otx2_atomic64_add_sync(int64_t incr, int64_t *ptr) +{ + uint64_t result; + + /* Atomic add with ordering */ + asm volatile ( + ".cpu generic+lse\n" + "ldadda %x[i], %x[r], [%[b]]" + : [r] "=r" (result), "+m" (*ptr) + : [i] "r" (incr), [b] "r" (ptr) + : "memory"); + return result; +} + +static __rte_always_inline uint64_t +otx2_lmt_submit(rte_iova_t io_address) +{ + uint64_t result; + + asm volatile ( + ".cpu generic+lse\n" + "ldeor xzr,%x[rf],[%[rs]]" : + [rf] "=r"(result): [rs] "r"(io_address)); + return result; +} + +static __rte_always_inline void +otx2_lmt_mov(void *out, const void *in, const uint32_t lmtext) +{ + volatile const __uint128_t *src128 = (const __uint128_t *)in; + volatile __uint128_t *dst128 = (__uint128_t *)out; + dst128[0] = src128[0]; + dst128[1] = src128[1]; + /* lmtext receives following value: + * 1: NIX_SUBDC_EXT needed i.e. tx vlan case + * 2: NIX_SUBDC_EXT + NIX_SUBDC_MEM i.e. tstamp case + */ + if (lmtext) { + dst128[2] = src128[2]; + if (lmtext > 1) + dst128[3] = src128[3]; + } +} + +static __rte_always_inline void +otx2_lmt_mov_seg(void *out, const void *in, const uint16_t segdw) +{ + volatile const __uint128_t *src128 = (const __uint128_t *)in; + volatile __uint128_t *dst128 = (__uint128_t *)out; + uint8_t i; + + for (i = 0; i < segdw; i++) + dst128[i] = src128[i]; +} + +#endif /* _OTX2_IO_ARM64_H_ */ diff --git a/drivers/common/octeontx2/otx2_io_generic.h b/drivers/common/octeontx2/otx2_io_generic.h new file mode 100644 index 000000000..b1d754008 --- /dev/null +++ b/drivers/common/octeontx2/otx2_io_generic.h @@ -0,0 +1,63 @@ +/* SPDX-License-Identifier: BSD-3-Clause + * Copyright(C) 2019 Marvell International Ltd. + */ + +#ifndef _OTX2_IO_GENERIC_H_ +#define _OTX2_IO_GENERIC_H_ + +#define otx2_load_pair(val0, val1, addr) \ +do { \ + val0 = rte_read64_relaxed((void *)(addr)); \ + val1 = rte_read64_relaxed((uint8_t *)(addr) + 8); \ +} while (0) + +#define otx2_store_pair(val0, val1, addr) \ +do { \ + rte_write64_relaxed(val0, (void *)(addr)); \ + rte_write64_relaxed(val1, (((uint8_t *)(addr)) + 8)); \ +} while (0) + +#define otx2_prefetch_store_keep(ptr) do {} while (0) + +static inline uint64_t +otx2_atomic64_add_nosync(int64_t incr, int64_t *ptr) +{ + RTE_SET_USED(ptr); + RTE_SET_USED(incr); + + return 0; +} + +static inline uint64_t +otx2_atomic64_add_sync(int64_t incr, int64_t *ptr) +{ + RTE_SET_USED(ptr); + RTE_SET_USED(incr); + + return 0; +} + +static inline int64_t +otx2_lmt_submit(uint64_t io_address) +{ + RTE_SET_USED(io_address); + + return 0; +} + +static __rte_always_inline void +otx2_lmt_mov(void *out, const void *in, const uint32_t lmtext) +{ + RTE_SET_USED(out); + RTE_SET_USED(in); + RTE_SET_USED(lmtext); +} + +static __rte_always_inline void +otx2_lmt_mov_seg(void *out, const void *in, const uint16_t segdw) +{ + RTE_SET_USED(out); + RTE_SET_USED(in); + RTE_SET_USED(segdw); +} +#endif /* _OTX2_IO_GENERIC_H_ */ -- 2.21.0