From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id E1A74A046B for ; Sat, 1 Jun 2019 20:21:14 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 72A281B995; Sat, 1 Jun 2019 20:20:38 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id DFB0A1B96B for ; Sat, 1 Jun 2019 20:20:36 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x51IKOkf002871 for ; Sat, 1 Jun 2019 11:20:36 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0818; bh=UZEfG35S/g7NS6KwElIfxjc7uD72MoEb4PVxVvabya4=; b=HfIevaZSod2iWcrbDJdkPFy11/vnQUioQ6QrQrYzu+xc17Yf+1BVE5KzCvXYzD+a2OWz ZLRIgi316FJWY3VcYFprAv7ufosQNo9UJrw0/fEocC+cM84+yKlHtCy02oSa6YmMot9I QKElSAsJa+3Au1NM8mY4grXYP/R9i/KMulX5XuLe+k6qHXYUteJLPpofEZBGY5JDHjum 61tesAvmGKyHVnRnfenTI4AE02DT/9TM8O95RithqwRnCj5T94u1KIOoH5cIpNFpZcLz KIdrjh9U2xoWVdyQGK2mYI9hbbWnxw3qekX7tgbi08+z9UI5bSLN53eE7CeCV1swZoyQ ig== Received: from sc-exch02.marvell.com ([199.233.58.182]) by mx0a-0016f401.pphosted.com with ESMTP id 2supqksdem-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Sat, 01 Jun 2019 11:20:36 -0700 Received: from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH02.marvell.com (10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Sat, 1 Jun 2019 11:20:35 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Sat, 1 Jun 2019 11:20:35 -0700 Received: from jerin-lab.marvell.com (jerin-lab.marvell.com [10.28.34.14]) by maili.marvell.com (Postfix) with ESMTP id 787993F703F; Sat, 1 Jun 2019 11:20:34 -0700 (PDT) From: To: CC: , Vamsi Attunuru Date: Sat, 1 Jun 2019 23:50:27 +0530 Message-ID: <20190601182030.8282-7-jerinj@marvell.com> X-Mailer: git-send-email 2.21.0 In-Reply-To: <20190601182030.8282-1-jerinj@marvell.com> References: <20190601182030.8282-1-jerinj@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-01_13:, , signatures=0 Subject: [dpdk-dev] [PATCH v1 6/9] raw/octeontx2_dma: add dequeue and device control operations X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Satha Rao Add dequeue, device start, stop, close and reset operations. Signed-off-by: Satha Rao Signed-off-by: Vamsi Attunuru --- drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c | 64 +++++++++++++++++++++ 1 file changed, 64 insertions(+) diff --git a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c index bfc95657b..f8f0c4af6 100644 --- a/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c +++ b/drivers/raw/octeontx2_dma/otx2_dpi_rawdev.c @@ -234,6 +234,65 @@ otx2_dpi_rawdev_enqueue_bufs(struct rte_rawdev *dev, return c; } +/* Check for command completion, returns number of commands completed */ +static int +otx2_dpi_rawdev_dequeue_bufs(struct rte_rawdev *dev __rte_unused, + struct rte_rawdev_buf **buffers, + unsigned int count, rte_rawdev_obj_t context) +{ + struct dpi_dma_queue_ctx_s *ctx = (struct dpi_dma_queue_ctx_s *)context; + unsigned int i = 0, headp; + + /* No completion ring to poll */ + if (ctx->c_ring == NULL) + return 0; + + headp = ctx->c_ring->head; + for (i = 0; i < count && (headp != ctx->c_ring->tail); i++) { + struct dpi_dma_req_compl_s *comp_ptr = + ctx->c_ring->compl_data[headp]; + + if (comp_ptr->cdata) + break; + + /* Request Completed */ + buffers[i] = (void *)comp_ptr; + headp = (headp + 1) % ctx->c_ring->max_cnt; + } + ctx->c_ring->head = headp; + + return i; +} + +static int +otx2_dpi_rawdev_start(struct rte_rawdev *dev) +{ + dev->started = DPI_QUEUE_START; + + return DPI_DMA_QUEUE_SUCCESS; +} + +static void +otx2_dpi_rawdev_stop(struct rte_rawdev *dev) +{ + dev->started = DPI_QUEUE_STOP; +} + +static int +otx2_dpi_rawdev_close(struct rte_rawdev *dev) +{ + dma_engine_enb_dis(dev->dev_private, false); + dma_queue_finish(dev->dev_private); + + return DPI_DMA_QUEUE_SUCCESS; +} + +static int +otx2_dpi_rawdev_reset(struct rte_rawdev *dev) +{ + return dev ? DPI_QUEUE_STOP : DPI_QUEUE_START; +} + static int otx2_dpi_rawdev_configure(const struct rte_rawdev *dev, rte_rawdev_obj_t config) { @@ -273,7 +332,12 @@ otx2_dpi_rawdev_configure(const struct rte_rawdev *dev, rte_rawdev_obj_t config) static const struct rte_rawdev_ops dpi_rawdev_ops = { .dev_configure = otx2_dpi_rawdev_configure, + .dev_start = otx2_dpi_rawdev_start, + .dev_stop = otx2_dpi_rawdev_stop, + .dev_close = otx2_dpi_rawdev_close, + .dev_reset = otx2_dpi_rawdev_reset, .enqueue_bufs = otx2_dpi_rawdev_enqueue_bufs, + .dequeue_bufs = otx2_dpi_rawdev_dequeue_bufs, }; static int -- 2.21.0