From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by dpdk.space (Postfix) with ESMTP id 78D84A0471 for ; Wed, 19 Jun 2019 17:42:51 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id EA53D1C524; Wed, 19 Jun 2019 17:21:10 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id A74A21C48B for ; Wed, 19 Jun 2019 17:20:43 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Jun 2019 08:20:43 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.63,392,1557212400"; d="scan'208";a="165050329" Received: from lrong-srv-03.sh.intel.com ([10.67.119.177]) by orsmga006.jf.intel.com with ESMTP; 19 Jun 2019 08:20:43 -0700 From: Leyi Rong To: qi.z.zhang@intel.com Cc: dev@dpdk.org, Leyi Rong Date: Wed, 19 Jun 2019 23:18:01 +0800 Message-Id: <20190619151846.113820-25-leyi.rong@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190619151846.113820-1-leyi.rong@intel.com> References: <20190611155221.2703-1-leyi.rong@intel.com> <20190619151846.113820-1-leyi.rong@intel.com> Subject: [dpdk-dev] [PATCH v3 24/69] net/ice/base: add hweight32 support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add API support for hweight32. Signed-off-by: Qi Zhang Signed-off-by: Leyi Rong --- drivers/net/ice/base/ice_osdep.h | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/drivers/net/ice/base/ice_osdep.h b/drivers/net/ice/base/ice_osdep.h index d2d9238c7..ede893fc9 100644 --- a/drivers/net/ice/base/ice_osdep.h +++ b/drivers/net/ice/base/ice_osdep.h @@ -267,6 +267,20 @@ ice_hweight8(u32 num) return bits; } +static inline u8 +ice_hweight32(u32 num) +{ + u8 bits = 0; + u32 i; + + for (i = 0; i < 32; i++) { + bits += (u8)(num & 0x1); + num >>= 1; + } + + return bits; +} + #define DIV_ROUND_UP(n, d) (((n) + (d) - 1) / (d)) #define DELAY(x) rte_delay_us(x) #define ice_usec_delay(x) rte_delay_us(x) -- 2.17.1