From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 35EB7A046B for ; Fri, 28 Jun 2019 09:58:11 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 9E4211BB92; Fri, 28 Jun 2019 09:53:03 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 6DF551B99D for ; Fri, 28 Jun 2019 09:52:01 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.27/8.16.0.27) with SMTP id x5S7ngqv000482; Fri, 28 Jun 2019 00:52:00 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0818; bh=MQfk2ViDi6Re6ZXmDumiSVPycArEBVvvfgvKWyiFDYM=; b=mf+91O+1KFdS4QFl0SyyzxA90z4UVv2wJPPx34ZQt5AfiE/h3xMim4GtRPQ/Caq5MV17 FBpcHiB8c47iB8l6//vf0yVpJudqXW9NfpuGtGixHOFWBWYHBEB7Y/Xo9uXuPBgTy0nH XMw+JiC5hhYbndC8tcjbDrYzQnuTvQ/w94rOYqOyof7Nh2R41HDQ2dYo3ZNAMVm1/6IX opW8gZdsdXl6L3leQZsBOjoKz5ydIIQBDJuudw2iHU3ccH/NL+ZecV0uYCV9+nVv6GMC bPdyFx5rS5GstyYSUeNgEA8I+WCIVh/AzQN7uDGF0j8X8lZ6KPXVlWP9DMpyQDddx9yn AA== Received: from sc-exch02.marvell.com ([199.233.58.182]) by mx0a-0016f401.pphosted.com with ESMTP id 2tdd778auv-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Fri, 28 Jun 2019 00:52:00 -0700 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH02.marvell.com (10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Fri, 28 Jun 2019 00:51:59 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Fri, 28 Jun 2019 00:51:59 -0700 Received: from BG-LT7430.marvell.com (bg-lt7430.marvell.com [10.28.10.255]) by maili.marvell.com (Postfix) with ESMTP id CD0423F7040; Fri, 28 Jun 2019 00:51:57 -0700 (PDT) From: To: , Thomas Monjalon , John McNamara , Marko Kovacevic CC: , Pavan Nikhilesh Date: Fri, 28 Jun 2019 13:20:23 +0530 Message-ID: <20190628075024.404-45-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190628075024.404-1-pbhagavatula@marvell.com> References: <20190628075024.404-1-pbhagavatula@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:, , definitions=2019-06-28_02:, , signatures=0 Subject: [dpdk-dev] [PATCH v2 44/44] doc: update Marvell OCTEON TX2 eventdev documentation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Pavan Nikhilesh Update Marvell OCTEON TX2 eventdev with event timer adapter i.e. TIM capabilities. Claim Maintainership of OCTEON TX2 eventdev. Cc: John McNamara Cc: Thomas Monjalon Signed-off-by: Pavan Nikhilesh Signed-off-by: Jerin Jacob --- MAINTAINERS | 6 ++++ doc/guides/eventdevs/octeontx2.rst | 54 ++++++++++++++++++++++++++++++ 2 files changed, 60 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 0c3b48920..dfd1f77d6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1058,6 +1058,12 @@ M: Peter Mccarthy F: drivers/event/opdl/ F: doc/guides/eventdevs/opdl.rst +Marvell OCTEON TX2 +M: Pavan Nikhilesh +M: Jerin Jacob +F: drivers/event/octeontx2/ +F: doc/guides/eventdevs/octeontx2.rst + Rawdev Drivers -------------- diff --git a/doc/guides/eventdevs/octeontx2.rst b/doc/guides/eventdevs/octeontx2.rst index 928251aa6..b88d9cf7a 100644 --- a/doc/guides/eventdevs/octeontx2.rst +++ b/doc/guides/eventdevs/octeontx2.rst @@ -28,6 +28,10 @@ Features of the OCTEON TX2 SSO PMD are: - Open system with configurable amount of outstanding events limited only by DRAM - HW accelerated dequeue timeout support to enable power management +- HW managed event timers support through TIM, with high precision and + time granularity of 2.5us. +- Up to 256 TIM rings aka event timer adapters. +- Up to 8 rings traversed in parallel. Prerequisites and Compilation procedure --------------------------------------- @@ -90,6 +94,54 @@ Runtime Config Options --dev "0002:0e:00.0,selftest=1" +- ``TIM disable NPA`` + + By default chunks are allocated from NPA then TIM can automatically free + them when traversing the list of chunks. The ``tim_disable_npa`` devargs + parameter disables NPA and uses software mempool to manage chunks + For example:: + + --dev "0002:0e:00.0,tim_disable_npa=1" + +- ``TIM modify chunk slots`` + + The ``tim_chnk_slots`` devargs can be used to modify number of chunk slots. + Chunks are used to store event timers, a chunk can be visualised as an array + where the last element points to the next chunk and rest of them are used to + store events. TIM traverses the list of chunks and enqueues the event timers + to SSO. The default value is 255 and the max value is 4095. + For example:: + + --dev "0002:0e:00.0,tim_chnk_slots=1023" + +- ``TIM enable arm/cancel statistics`` + + The ``tim_stats_ena`` devargs can be used to enable arm and cancel stats of + event timer adapter. + For example:: + + --dev "0002:0e:00.0,tim_stats_ena=1" + +- ``TIM limit max rings reserved`` + + The ``tim_rings_lmt`` devargs can be used to limit the max number of TIM + rings i.e. event timer adapter reserved on probe. Since, TIM rings are HW + resources we can avoid starving other applications by not grabbing all the + rings. + For example:: + + --dev "0002:0e:00.0,tim_rings_lmt=5" + +- ``TIM ring control internal parameters`` + + When using multiple TIM rings the ``tim_ring_ctl`` devargs can be used to + control each TIM rings internal parameters uniquely. The following dict + format is expected [ring-chnk_slots-disable_npa-stats_ena]. 0 represents + default values. + For Example:: + + --dev "0002:0e:00.0,tim_ring_ctl=[2-1023-1-0]" + Debugging Options ~~~~~~~~~~~~~~~~~ @@ -102,3 +154,5 @@ Debugging Options +===+============+=======================================================+ | 1 | SSO | --log-level='pmd\.event\.octeontx2,8' | +---+------------+-------------------------------------------------------+ + | 2 | TIM | --log-level='pmd\.event\.octeontx2\.timer,8' | + +---+------------+-------------------------------------------------------+ -- 2.22.0