From: <pbhagavatula@marvell.com>
To: <jerinj@marvell.com>
Cc: <dev@dpdk.org>, Pavan Nikhilesh <pbhagavatula@marvell.com>
Subject: [dpdk-dev] [PATCH v2 06/44] event/octeontx2: allocate event inflight buffers
Date: Fri, 28 Jun 2019 13:19:45 +0530 [thread overview]
Message-ID: <20190628075024.404-7-pbhagavatula@marvell.com> (raw)
In-Reply-To: <20190628075024.404-1-pbhagavatula@marvell.com>
From: Pavan Nikhilesh <pbhagavatula@marvell.com>
Allocate buffers in DRAM that hold inflight events.
Signed-off-by: Pavan Nikhilesh <pbhagavatula@marvell.com>
---
drivers/event/octeontx2/Makefile | 2 +-
drivers/event/octeontx2/otx2_evdev.c | 116 ++++++++++++++++++++++++++-
drivers/event/octeontx2/otx2_evdev.h | 8 ++
3 files changed, 124 insertions(+), 2 deletions(-)
diff --git a/drivers/event/octeontx2/Makefile b/drivers/event/octeontx2/Makefile
index 36f0b2b12..b3c3beccb 100644
--- a/drivers/event/octeontx2/Makefile
+++ b/drivers/event/octeontx2/Makefile
@@ -33,7 +33,7 @@ LIBABIVER := 1
SRCS-$(CONFIG_RTE_LIBRTE_PMD_OCTEONTX2_EVENTDEV) += otx2_evdev.c
LDLIBS += -lrte_eal -lrte_bus_pci -lrte_pci
-LDLIBS += -lrte_eventdev
+LDLIBS += -lrte_mempool -lrte_eventdev -lrte_mbuf
LDLIBS += -lrte_common_octeontx2 -lrte_mempool_octeontx2
include $(RTE_SDK)/mk/rte.lib.mk
diff --git a/drivers/event/octeontx2/otx2_evdev.c b/drivers/event/octeontx2/otx2_evdev.c
index 2290598d0..fc4dbda0a 100644
--- a/drivers/event/octeontx2/otx2_evdev.c
+++ b/drivers/event/octeontx2/otx2_evdev.c
@@ -8,6 +8,7 @@
#include <rte_common.h>
#include <rte_eal.h>
#include <rte_eventdev_pmd_pci.h>
+#include <rte_mbuf_pool_ops.h>
#include <rte_pci.h>
#include "otx2_evdev.h"
@@ -203,6 +204,107 @@ sso_configure_queues(const struct rte_eventdev *event_dev)
return rc;
}
+static int
+sso_xaq_allocate(struct otx2_sso_evdev *dev)
+{
+ const struct rte_memzone *mz;
+ struct npa_aura_s *aura;
+ static int reconfig_cnt;
+ char pool_name[RTE_MEMZONE_NAMESIZE];
+ uint32_t xaq_cnt;
+ int rc;
+
+ if (dev->xaq_pool)
+ rte_mempool_free(dev->xaq_pool);
+
+ /*
+ * Allocate memory for Add work backpressure.
+ */
+ mz = rte_memzone_lookup(OTX2_SSO_FC_NAME);
+ if (mz == NULL)
+ mz = rte_memzone_reserve_aligned(OTX2_SSO_FC_NAME,
+ OTX2_ALIGN +
+ sizeof(struct npa_aura_s),
+ rte_socket_id(),
+ RTE_MEMZONE_IOVA_CONTIG,
+ OTX2_ALIGN);
+ if (mz == NULL) {
+ otx2_err("Failed to allocate mem for fcmem");
+ return -ENOMEM;
+ }
+
+ dev->fc_iova = mz->iova;
+ dev->fc_mem = mz->addr;
+
+ aura = (struct npa_aura_s *)((uintptr_t)dev->fc_mem + OTX2_ALIGN);
+ memset(aura, 0, sizeof(struct npa_aura_s));
+
+ aura->fc_ena = 1;
+ aura->fc_addr = dev->fc_iova;
+ aura->fc_hyst_bits = 0; /* Store count on all updates */
+
+ /* Taken from HRM 14.3.3(4) */
+ xaq_cnt = dev->nb_event_queues * OTX2_SSO_XAQ_CACHE_CNT;
+ xaq_cnt += (dev->iue / dev->xae_waes) +
+ (OTX2_SSO_XAQ_SLACK * dev->nb_event_queues);
+
+ otx2_sso_dbg("Configuring %d xaq buffers", xaq_cnt);
+ /* Setup XAQ based on number of nb queues. */
+ snprintf(pool_name, 30, "otx2_xaq_buf_pool_%d", reconfig_cnt);
+ dev->xaq_pool = (void *)rte_mempool_create_empty(pool_name,
+ xaq_cnt, dev->xaq_buf_size, 0, 0,
+ rte_socket_id(), 0);
+
+ if (dev->xaq_pool == NULL) {
+ otx2_err("Unable to create empty mempool.");
+ rte_memzone_free(mz);
+ return -ENOMEM;
+ }
+
+ rc = rte_mempool_set_ops_byname(dev->xaq_pool,
+ rte_mbuf_platform_mempool_ops(), aura);
+ if (rc != 0) {
+ otx2_err("Unable to set xaqpool ops.");
+ goto alloc_fail;
+ }
+
+ rc = rte_mempool_populate_default(dev->xaq_pool);
+ if (rc < 0) {
+ otx2_err("Unable to set populate xaqpool.");
+ goto alloc_fail;
+ }
+ reconfig_cnt++;
+ /* When SW does addwork (enqueue) check if there is space in XAQ by
+ * comparing fc_addr above against the xaq_lmt calculated below.
+ * There should be a minimum headroom (OTX2_SSO_XAQ_SLACK / 2) for SSO
+ * to request XAQ to cache them even before enqueue is called.
+ */
+ dev->xaq_lmt = xaq_cnt - (OTX2_SSO_XAQ_SLACK / 2 *
+ dev->nb_event_queues);
+ dev->nb_xaq_cfg = xaq_cnt;
+
+ return 0;
+alloc_fail:
+ rte_mempool_free(dev->xaq_pool);
+ rte_memzone_free(mz);
+ return rc;
+}
+
+static int
+sso_ggrp_alloc_xaq(struct otx2_sso_evdev *dev)
+{
+ struct otx2_mbox *mbox = dev->mbox;
+ struct sso_hw_setconfig *req;
+
+ otx2_sso_dbg("Configuring XAQ for GGRPs");
+ req = otx2_mbox_alloc_msg_sso_hw_setconfig(mbox);
+ req->npa_pf_func = otx2_npa_pf_func_get();
+ req->npa_aura_id = npa_lf_aura_handle_to_aura(dev->xaq_pool->pool_id);
+ req->hwgrps = dev->nb_event_queues;
+
+ return otx2_mbox_process(mbox);
+}
+
static void
sso_lf_teardown(struct otx2_sso_evdev *dev,
enum otx2_sso_lf_type lf_type)
@@ -288,11 +390,23 @@ otx2_sso_configure(const struct rte_eventdev *event_dev)
goto teardown_hws;
}
+ if (sso_xaq_allocate(dev) < 0) {
+ rc = -ENOMEM;
+ goto teardown_hwggrp;
+ }
+
+ rc = sso_ggrp_alloc_xaq(dev);
+ if (rc < 0) {
+ otx2_err("Failed to alloc xaq to ggrp %d", rc);
+ goto teardown_hwggrp;
+ }
+
dev->configured = 1;
rte_mb();
return 0;
-
+teardown_hwggrp:
+ sso_lf_teardown(dev, SSO_LF_GGRP);
teardown_hws:
sso_lf_teardown(dev, SSO_LF_GWS);
dev->nb_event_queues = 0;
diff --git a/drivers/event/octeontx2/otx2_evdev.h b/drivers/event/octeontx2/otx2_evdev.h
index b46402771..375640bca 100644
--- a/drivers/event/octeontx2/otx2_evdev.h
+++ b/drivers/event/octeontx2/otx2_evdev.h
@@ -17,6 +17,9 @@
#define OTX2_SSO_MAX_VHGRP RTE_EVENT_MAX_QUEUES_PER_DEV
#define OTX2_SSO_MAX_VHWS (UINT8_MAX)
+#define OTX2_SSO_FC_NAME "otx2_evdev_xaq_fc"
+#define OTX2_SSO_XAQ_SLACK (8)
+#define OTX2_SSO_XAQ_CACHE_CNT (0x7)
/* SSO LF register offsets (BAR2) */
#define SSO_LF_GGRP_OP_ADD_WORK0 (0x0ull)
@@ -54,6 +57,11 @@ struct otx2_sso_evdev {
uint32_t min_dequeue_timeout_ns;
uint32_t max_dequeue_timeout_ns;
int32_t max_num_events;
+ uint64_t *fc_mem;
+ uint64_t xaq_lmt;
+ uint64_t nb_xaq_cfg;
+ rte_iova_t fc_iova;
+ struct rte_mempool *xaq_pool;
/* HW const */
uint32_t xae_waes;
uint32_t xaq_buf_size;
--
2.22.0
next prev parent reply other threads:[~2019-06-28 7:51 UTC|newest]
Thread overview: 48+ messages / expand[flat|nested] mbox.gz Atom feed top
2019-06-28 7:49 [dpdk-dev] [PATCH v2 00/44] OCTEONTX2 event device driver pbhagavatula
2019-06-28 7:49 ` [dpdk-dev] [PATCH v2 01/44] event/octeontx2: add build infra and device probe pbhagavatula
2019-06-28 8:55 ` Thomas Monjalon
2019-06-28 9:01 ` Pavan Nikhilesh Bhagavatula
2019-06-28 7:49 ` [dpdk-dev] [PATCH v2 02/44] event/octeontx2: add init and fini for octeontx2 SSO object pbhagavatula
2019-06-28 7:49 ` [dpdk-dev] [PATCH v2 03/44] event/octeontx2: add device capabilities function pbhagavatula
2019-06-28 7:49 ` [dpdk-dev] [PATCH v2 04/44] event/octeontx2: add device configure function pbhagavatula
2019-06-28 7:49 ` [dpdk-dev] [PATCH v2 05/44] event/octeontx2: add event queue config functions pbhagavatula
2019-06-28 7:49 ` pbhagavatula [this message]
2019-06-28 7:49 ` [dpdk-dev] [PATCH v2 07/44] event/octeontx2: add devargs for inflight buffer count pbhagavatula
2019-06-28 7:49 ` [dpdk-dev] [PATCH v2 08/44] event/octeontx2: add event port config functions pbhagavatula
2019-06-28 7:49 ` [dpdk-dev] [PATCH v2 09/44] event/octeontx2: support linking queues to ports pbhagavatula
2019-06-28 7:49 ` [dpdk-dev] [PATCH v2 10/44] event/octeontx2: support dequeue timeout tick conversion pbhagavatula
2019-06-28 7:49 ` [dpdk-dev] [PATCH v2 11/44] event/octeontx2: add SSO GWS and GGRP IRQ handlers pbhagavatula
2019-06-28 7:49 ` [dpdk-dev] [PATCH v2 12/44] event/octeontx2: add register dump functions pbhagavatula
2019-06-28 7:49 ` [dpdk-dev] [PATCH v2 13/44] event/octeontx2: add xstats support pbhagavatula
2019-06-28 7:49 ` [dpdk-dev] [PATCH v2 14/44] event/octeontx2: add SSO HW device operations pbhagavatula
2019-06-28 7:49 ` [dpdk-dev] [PATCH v2 15/44] event/octeontx2: add worker enqueue functions pbhagavatula
2019-06-28 7:49 ` [dpdk-dev] [PATCH v2 16/44] event/octeontx2: add worker dequeue functions pbhagavatula
2019-06-28 7:49 ` [dpdk-dev] [PATCH v2 17/44] event/octeontx2: add octeontx2 SSO dual workslot mode pbhagavatula
2019-06-28 7:49 ` [dpdk-dev] [PATCH v2 18/44] event/octeontx2: add SSO dual GWS HW device operations pbhagavatula
2019-06-28 7:49 ` [dpdk-dev] [PATCH v2 19/44] event/octeontx2: add worker dual GWS enqueue functions pbhagavatula
2019-06-28 7:49 ` [dpdk-dev] [PATCH v2 20/44] event/octeontx2: add worker dual GWS dequeue functions pbhagavatula
2019-06-28 7:50 ` [dpdk-dev] [PATCH v2 21/44] event/octeontx2: add devargs to force legacy mode pbhagavatula
2019-06-28 7:50 ` [dpdk-dev] [PATCH v2 22/44] event/octeontx2: add device start function pbhagavatula
2019-06-28 7:50 ` [dpdk-dev] [PATCH v2 23/44] event/octeontx2: add devargs to control SSO GGRP QoS pbhagavatula
2019-06-28 7:50 ` [dpdk-dev] [PATCH v2 24/44] event/octeontx2: add device stop and close functions pbhagavatula
2019-06-28 7:50 ` [dpdk-dev] [PATCH v2 25/44] event/octeontx2: add SSO selftest pbhagavatula
2019-06-28 7:50 ` [dpdk-dev] [PATCH v2 26/44] doc: add Marvell OCTEON TX2 event device documentation pbhagavatula
2019-06-28 7:50 ` [dpdk-dev] [PATCH v2 27/44] event/octeontx2: add event timer support pbhagavatula
2019-06-28 7:50 ` [dpdk-dev] [PATCH v2 28/44] event/octeontx2: add timer adapter capabilities pbhagavatula
2019-06-28 7:50 ` [dpdk-dev] [PATCH v2 29/44] event/octeontx2: create and free timer adapter pbhagavatula
2019-06-28 7:50 ` [dpdk-dev] [PATCH v2 30/44] event/octeontx2: allow TIM to optimize config pbhagavatula
2019-06-28 7:50 ` [dpdk-dev] [PATCH v2 31/44] event/octeontx2: add devargs to disable NPA pbhagavatula
2019-06-28 7:50 ` [dpdk-dev] [PATCH v2 32/44] event/octeontx2: add devargs to modify chunk slots pbhagavatula
2019-06-28 7:50 ` [dpdk-dev] [PATCH v2 33/44] event/octeontx2: add TIM IRQ handlers pbhagavatula
2019-06-28 7:50 ` [dpdk-dev] [PATCH v2 34/44] event/octeontx2: allow adapters to resize inflight buffers pbhagavatula
2019-06-28 7:50 ` [dpdk-dev] [PATCH v2 35/44] event/octeontx2: add timer adapter info get function pbhagavatula
2019-06-28 7:50 ` [dpdk-dev] [PATCH v2 36/44] event/octeontx2: add TIM bucket operations pbhagavatula
2019-06-28 7:50 ` [dpdk-dev] [PATCH v2 37/44] event/octeontx2: add event timer arm routine pbhagavatula
2019-06-28 7:50 ` [dpdk-dev] [PATCH v2 38/44] event/octeontx2: add event timer arm timeout burst pbhagavatula
2019-06-28 7:50 ` [dpdk-dev] [PATCH v2 39/44] event/octeontx2: add event timer cancel function pbhagavatula
2019-06-28 7:50 ` [dpdk-dev] [PATCH v2 40/44] event/octeontx2: add event timer stats get and reset pbhagavatula
2019-06-28 7:50 ` [dpdk-dev] [PATCH v2 41/44] event/octeontx2: add even timer adapter start and stop pbhagavatula
2019-06-28 7:50 ` [dpdk-dev] [PATCH v2 42/44] event/octeontx2: add devargs to limit timer adapters pbhagavatula
2019-06-28 7:50 ` [dpdk-dev] [PATCH v2 43/44] event/octeontx2: add devargs to control adapter parameters pbhagavatula
2019-06-28 7:50 ` [dpdk-dev] [PATCH v2 44/44] doc: update Marvell OCTEON TX2 eventdev documentation pbhagavatula
2019-06-28 9:00 ` Thomas Monjalon
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20190628075024.404-7-pbhagavatula@marvell.com \
--to=pbhagavatula@marvell.com \
--cc=dev@dpdk.org \
--cc=jerinj@marvell.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).