From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 03392A0471 for ; Thu, 18 Jul 2019 08:22:45 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 3E28A1B53; Thu, 18 Jul 2019 08:22:45 +0200 (CEST) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by dpdk.org (Postfix) with ESMTP id 0FE58152A for ; Thu, 18 Jul 2019 08:22:44 +0200 (CEST) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 47C1428; Wed, 17 Jul 2019 23:22:43 -0700 (PDT) Received: from net-arm-c2400-02.shanghai.arm.com (net-arm-c2400-02.shanghai.arm.com [10.169.40.42]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 2F52C3F59C; Wed, 17 Jul 2019 23:24:42 -0700 (PDT) From: Ruifeng Wang To: vladimir.medvedkin@intel.com, bruce.richardson@intel.com Cc: dev@dpdk.org, honnappa.nagarahalli@arm.com, gavin.hu@arm.com, nd@arm.com, Ruifeng Wang Date: Thu, 18 Jul 2019 14:22:26 +0800 Message-Id: <20190718062230.16027-1-ruifeng.wang@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20190605055451.30473-1-ruifeng.wang@arm.com> References: <20190605055451.30473-1-ruifeng.wang@arm.com> Subject: [dpdk-dev] [PATCH v6 0/4] LPM4 memory ordering changes X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" LPM4 uses DIR24-8 method of routing info data organization. Routing rule with prefix longer than 24 bits will be stored in a tbl24 entry together with an associated tbl8 group. When a tbl8 group is getting attached to a tbl24 entry, lookup might fail even though the entry is configured in the table. For ex: consider a LPM table configured with 10.10.10.1/24. When a new entry 10.10.10.32/28 is being added, a new tbl8 group is allocated and tbl24 entry is changed to point to the tbl8 group. If the tbl24 entry is written without the tbl8 group entries updated, a lookup on 10.10.10.9 will return failure. Correct memory orderings are required to ensure that the store to tbl24 does not happen before the stores to tbl8 group entries complete. When memory orderings are imposed, API performance could drop. However, a patch to de-inline unnecessary functions is added, and this helps to keep API performance. On Arm A72 platform, the whole patch series in general have no notable performance impact. On x86 E5-2640 platform, the whole patch series showed 2.6% performance improvement on add, and no impact on lookup or delete. v6: Merge multiple relaxed atomic store patches into one. v5: Fix typo in commit message. Remove all other inlines. Change to use atomic_store in tbl8_alloc / tbl8_free. Merge multiple sigle field updates into one atomic store. v4: Change alignment attribute parameter. Use atomic store to avoid partial update. v3: Use __rte_noinline to force no inline. v2: Fix clang building issue by supplying alignment attribute. Ruifeng Wang (4): lib/lpm: not inline unnecessary functions lib/lpm: memory orderings to avoid race conditions for v1604 lib/lpm: memory orderings to avoid race conditions for v20 lib/lpm: use atomic store to avoid partial update lib/librte_lpm/rte_lpm.c | 248 ++++++++++++++++++++++++++++----------- lib/librte_lpm/rte_lpm.h | 8 +- 2 files changed, 183 insertions(+), 73 deletions(-) -- 2.17.1