From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id E4C97A046B for ; Thu, 25 Jul 2019 18:46:10 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id C91EC1C395; Thu, 25 Jul 2019 18:46:09 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by dpdk.org (Postfix) with ESMTP id BEC241C377; Thu, 25 Jul 2019 18:46:07 +0200 (CEST) X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from orsmga007.jf.intel.com ([10.7.209.58]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Jul 2019 09:46:06 -0700 X-IronPort-AV: E=Sophos;i="5.64,307,1559545200"; d="scan'208";a="160961940" Received: from bricha3-mobl.ger.corp.intel.com ([10.237.221.51]) by orsmga007-auth.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 25 Jul 2019 09:46:03 -0700 Date: Thu, 25 Jul 2019 17:46:00 +0100 From: Bruce Richardson To: hgovindh Cc: Remy Horton , Marko Kovacevic , Ori Kam , Pablo de Lara , Radu Nicolau , Akhil Goyal , Tomasz Kantecki , dev@dpdk.org, maciej.czekaj@caviumnetworks.com, stable@dpdk.org Message-ID: <20190725164600.GA1621@bricha3-MOBL.ger.corp.intel.com> References: <20190724164354.18811-1-hariprasad.govindharajan@intel.com> <20190725162903.106262-1-hariprasad.govindharajan@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190725162903.106262-1-hariprasad.govindharajan@intel.com> User-Agent: Mutt/1.11.4 (2019-03-13) Subject: Re: [dpdk-dev] [PATCH v2] examples/l3fwd: fix unaligned memory access X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Thu, Jul 25, 2019 at 05:29:03PM +0100, hgovindh wrote: > Fix unaligned memory access when reading IPv6 header which > leads to segmentation fault by changing aligned memory read > to unaligned memory read. > > Bugzilla ID: 279 > Fixes: 64d3955de1de ("examples/l3fwd: fix ARM build") > Cc: maciej.czekaj@caviumnetworks.com > Cc: stable@dpdk.org > Signed-off-by: hgovindh > --- > V2: Added functions which will do unaligned load based on the > underlying architecture > --- > --- > examples/l3fwd/l3fwd_em.c | 26 ++++++++++++++++++++++++-- > 1 file changed, 24 insertions(+), 2 deletions(-) > > diff --git a/examples/l3fwd/l3fwd_em.c b/examples/l3fwd/l3fwd_em.c > index fa8f82be6..f2641586b 100644 > --- a/examples/l3fwd/l3fwd_em.c > +++ b/examples/l3fwd/l3fwd_em.c > @@ -244,6 +244,29 @@ em_mask_key(void *key, xmm_t mask) > #error No vector engine (SSE, NEON, ALTIVEC) available, check your toolchain > #endif > > +#if defined(RTE_MACHINE_CPUFLAG_SSE2) > +static inline xmm_t > +em_load_key(void *key) > +{ > + return _mm_loadu_si128((__m128i *)(key)); > +} > +#elif defined(RTE_MACHINE_CPUFLAG_NEON) > +static inline xmm_t > +em_load_key(void *key) > +{ > + return vld1q_s32((int32_t *)key); > +} > +#elif defined(RTE_MACHINE_CPUFLAG_ALTIVEC) > +static inline xmm_t > +em_load_key(void *key) > +{ > + return vec_ld(0, (xmm_t *)(key)); > +} Two minor nits: Since you are passing in a void *, no typecasts should be needed in any of these functions. Also, is it neater if you just have the ifdefs in the middle of the function, rather than duplicating the function prototype each time? Third option is to make the load a single-line macro rather than 5-lines of a function. /Bruce