* [dpdk-dev] [PATCH 1/4] common/qat: add QAT RAM bank definitions
@ 2019-08-26 7:33 Adam Dybkowski
0 siblings, 0 replies; 3+ messages in thread
From: Adam Dybkowski @ 2019-08-26 7:33 UTC (permalink / raw)
To: dev, fiona.trahe, akhil.goyal, arturx.trybula; +Cc: Adam Dybkowski
This patch adds QAT RAM bank definitions and related macros.
Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
---
drivers/common/qat/qat_adf/icp_qat_fw_comp.h | 73 ++++++++++++++++++++
1 file changed, 73 insertions(+)
diff --git a/drivers/common/qat/qat_adf/icp_qat_fw_comp.h b/drivers/common/qat/qat_adf/icp_qat_fw_comp.h
index 813817720..c89a2c2fd 100644
--- a/drivers/common/qat/qat_adf/icp_qat_fw_comp.h
+++ b/drivers/common/qat/qat_adf/icp_qat_fw_comp.h
@@ -479,4 +479,77 @@ struct icp_qat_fw_comp_resp {
/**< Common response params (checksums and byte counts) */
};
+/* RAM Bank definitions */
+#define QAT_FW_COMP_BANK_FLAG_MASK 0x1
+
+#define QAT_FW_COMP_BANK_I_BITPOS 8
+#define QAT_FW_COMP_BANK_H_BITPOS 7
+#define QAT_FW_COMP_BANK_G_BITPOS 6
+#define QAT_FW_COMP_BANK_F_BITPOS 5
+#define QAT_FW_COMP_BANK_E_BITPOS 4
+#define QAT_FW_COMP_BANK_D_BITPOS 3
+#define QAT_FW_COMP_BANK_C_BITPOS 2
+#define QAT_FW_COMP_BANK_B_BITPOS 1
+#define QAT_FW_COMP_BANK_A_BITPOS 0
+
+/**
+ *****************************************************************************
+ * @ingroup icp_qat_fw_comp
+ * Definition of the ram bank enabled values
+ * @description
+ * Enumeration used to define whether a ram bank is enabled or not
+ *
+ *****************************************************************************/
+enum icp_qat_fw_comp_bank_enabled {
+ ICP_QAT_FW_COMP_BANK_DISABLED = 0, /*!< BANK DISABLED */
+ ICP_QAT_FW_COMP_BANK_ENABLED = 1, /*!< BANK ENABLED */
+ ICP_QAT_FW_COMP_BANK_DELIMITER = 2 /**< Delimiter type */
+};
+
+/**
+ ******************************************************************************
+ * @ingroup icp_qat_fw_comp
+ *
+ * @description
+ * Build the ram bank flags in the compression content descriptor
+ * which specify which banks are used to save history
+ *
+ * @param bank_i_enable
+ * @param bank_h_enable
+ * @param bank_g_enable
+ * @param bank_f_enable
+ * @param bank_e_enable
+ * @param bank_d_enable
+ * @param bank_c_enable
+ * @param bank_b_enable
+ * @param bank_a_enable
+ *****************************************************************************/
+#define ICP_QAT_FW_COMP_RAM_FLAGS_BUILD(bank_i_enable, \
+ bank_h_enable, \
+ bank_g_enable, \
+ bank_f_enable, \
+ bank_e_enable, \
+ bank_d_enable, \
+ bank_c_enable, \
+ bank_b_enable, \
+ bank_a_enable) \
+ ((((bank_i_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \
+ << QAT_FW_COMP_BANK_I_BITPOS) | \
+ (((bank_h_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \
+ << QAT_FW_COMP_BANK_H_BITPOS) | \
+ (((bank_g_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \
+ << QAT_FW_COMP_BANK_G_BITPOS) | \
+ (((bank_f_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \
+ << QAT_FW_COMP_BANK_F_BITPOS) | \
+ (((bank_e_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \
+ << QAT_FW_COMP_BANK_E_BITPOS) | \
+ (((bank_d_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \
+ << QAT_FW_COMP_BANK_D_BITPOS) | \
+ (((bank_c_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \
+ << QAT_FW_COMP_BANK_C_BITPOS) | \
+ (((bank_b_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \
+ << QAT_FW_COMP_BANK_B_BITPOS) | \
+ (((bank_a_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \
+ << QAT_FW_COMP_BANK_A_BITPOS))
+
#endif
--
2.17.1
^ permalink raw reply [flat|nested] 3+ messages in thread
* [dpdk-dev] [PATCH 1/4] common/qat: add QAT RAM bank definitions
@ 2019-08-26 7:44 Adam Dybkowski
0 siblings, 0 replies; 3+ messages in thread
From: Adam Dybkowski @ 2019-08-26 7:44 UTC (permalink / raw)
To: dev, fiona.trahe, akhil.goyal, arturx.trybula; +Cc: Adam Dybkowski
This patch adds QAT RAM bank definitions and related macros.
Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
---
drivers/common/qat/qat_adf/icp_qat_fw_comp.h | 73 ++++++++++++++++++++
1 file changed, 73 insertions(+)
diff --git a/drivers/common/qat/qat_adf/icp_qat_fw_comp.h b/drivers/common/qat/qat_adf/icp_qat_fw_comp.h
index 813817720..c89a2c2fd 100644
--- a/drivers/common/qat/qat_adf/icp_qat_fw_comp.h
+++ b/drivers/common/qat/qat_adf/icp_qat_fw_comp.h
@@ -479,4 +479,77 @@ struct icp_qat_fw_comp_resp {
/**< Common response params (checksums and byte counts) */
};
+/* RAM Bank definitions */
+#define QAT_FW_COMP_BANK_FLAG_MASK 0x1
+
+#define QAT_FW_COMP_BANK_I_BITPOS 8
+#define QAT_FW_COMP_BANK_H_BITPOS 7
+#define QAT_FW_COMP_BANK_G_BITPOS 6
+#define QAT_FW_COMP_BANK_F_BITPOS 5
+#define QAT_FW_COMP_BANK_E_BITPOS 4
+#define QAT_FW_COMP_BANK_D_BITPOS 3
+#define QAT_FW_COMP_BANK_C_BITPOS 2
+#define QAT_FW_COMP_BANK_B_BITPOS 1
+#define QAT_FW_COMP_BANK_A_BITPOS 0
+
+/**
+ *****************************************************************************
+ * @ingroup icp_qat_fw_comp
+ * Definition of the ram bank enabled values
+ * @description
+ * Enumeration used to define whether a ram bank is enabled or not
+ *
+ *****************************************************************************/
+enum icp_qat_fw_comp_bank_enabled {
+ ICP_QAT_FW_COMP_BANK_DISABLED = 0, /*!< BANK DISABLED */
+ ICP_QAT_FW_COMP_BANK_ENABLED = 1, /*!< BANK ENABLED */
+ ICP_QAT_FW_COMP_BANK_DELIMITER = 2 /**< Delimiter type */
+};
+
+/**
+ ******************************************************************************
+ * @ingroup icp_qat_fw_comp
+ *
+ * @description
+ * Build the ram bank flags in the compression content descriptor
+ * which specify which banks are used to save history
+ *
+ * @param bank_i_enable
+ * @param bank_h_enable
+ * @param bank_g_enable
+ * @param bank_f_enable
+ * @param bank_e_enable
+ * @param bank_d_enable
+ * @param bank_c_enable
+ * @param bank_b_enable
+ * @param bank_a_enable
+ *****************************************************************************/
+#define ICP_QAT_FW_COMP_RAM_FLAGS_BUILD(bank_i_enable, \
+ bank_h_enable, \
+ bank_g_enable, \
+ bank_f_enable, \
+ bank_e_enable, \
+ bank_d_enable, \
+ bank_c_enable, \
+ bank_b_enable, \
+ bank_a_enable) \
+ ((((bank_i_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \
+ << QAT_FW_COMP_BANK_I_BITPOS) | \
+ (((bank_h_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \
+ << QAT_FW_COMP_BANK_H_BITPOS) | \
+ (((bank_g_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \
+ << QAT_FW_COMP_BANK_G_BITPOS) | \
+ (((bank_f_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \
+ << QAT_FW_COMP_BANK_F_BITPOS) | \
+ (((bank_e_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \
+ << QAT_FW_COMP_BANK_E_BITPOS) | \
+ (((bank_d_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \
+ << QAT_FW_COMP_BANK_D_BITPOS) | \
+ (((bank_c_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \
+ << QAT_FW_COMP_BANK_C_BITPOS) | \
+ (((bank_b_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \
+ << QAT_FW_COMP_BANK_B_BITPOS) | \
+ (((bank_a_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \
+ << QAT_FW_COMP_BANK_A_BITPOS))
+
#endif
--
2.17.1
^ permalink raw reply [flat|nested] 3+ messages in thread
* [dpdk-dev] [PATCH 1/4] common/qat: add QAT RAM bank definitions
@ 2019-08-26 7:13 Adam Dybkowski
0 siblings, 0 replies; 3+ messages in thread
From: Adam Dybkowski @ 2019-08-26 7:13 UTC (permalink / raw)
To: dev, fiona.trahe, akhil.goyal, arturx.trybula; +Cc: Adam Dybkowski
This patch adds QAT RAM bank definitions and related macros.
Signed-off-by: Adam Dybkowski <adamx.dybkowski@intel.com>
---
drivers/common/qat/qat_adf/icp_qat_fw_comp.h | 73 ++++++++++++++++++++
1 file changed, 73 insertions(+)
diff --git a/drivers/common/qat/qat_adf/icp_qat_fw_comp.h b/drivers/common/qat/qat_adf/icp_qat_fw_comp.h
index 813817720..c89a2c2fd 100644
--- a/drivers/common/qat/qat_adf/icp_qat_fw_comp.h
+++ b/drivers/common/qat/qat_adf/icp_qat_fw_comp.h
@@ -479,4 +479,77 @@ struct icp_qat_fw_comp_resp {
/**< Common response params (checksums and byte counts) */
};
+/* RAM Bank definitions */
+#define QAT_FW_COMP_BANK_FLAG_MASK 0x1
+
+#define QAT_FW_COMP_BANK_I_BITPOS 8
+#define QAT_FW_COMP_BANK_H_BITPOS 7
+#define QAT_FW_COMP_BANK_G_BITPOS 6
+#define QAT_FW_COMP_BANK_F_BITPOS 5
+#define QAT_FW_COMP_BANK_E_BITPOS 4
+#define QAT_FW_COMP_BANK_D_BITPOS 3
+#define QAT_FW_COMP_BANK_C_BITPOS 2
+#define QAT_FW_COMP_BANK_B_BITPOS 1
+#define QAT_FW_COMP_BANK_A_BITPOS 0
+
+/**
+ *****************************************************************************
+ * @ingroup icp_qat_fw_comp
+ * Definition of the ram bank enabled values
+ * @description
+ * Enumeration used to define whether a ram bank is enabled or not
+ *
+ *****************************************************************************/
+enum icp_qat_fw_comp_bank_enabled {
+ ICP_QAT_FW_COMP_BANK_DISABLED = 0, /*!< BANK DISABLED */
+ ICP_QAT_FW_COMP_BANK_ENABLED = 1, /*!< BANK ENABLED */
+ ICP_QAT_FW_COMP_BANK_DELIMITER = 2 /**< Delimiter type */
+};
+
+/**
+ ******************************************************************************
+ * @ingroup icp_qat_fw_comp
+ *
+ * @description
+ * Build the ram bank flags in the compression content descriptor
+ * which specify which banks are used to save history
+ *
+ * @param bank_i_enable
+ * @param bank_h_enable
+ * @param bank_g_enable
+ * @param bank_f_enable
+ * @param bank_e_enable
+ * @param bank_d_enable
+ * @param bank_c_enable
+ * @param bank_b_enable
+ * @param bank_a_enable
+ *****************************************************************************/
+#define ICP_QAT_FW_COMP_RAM_FLAGS_BUILD(bank_i_enable, \
+ bank_h_enable, \
+ bank_g_enable, \
+ bank_f_enable, \
+ bank_e_enable, \
+ bank_d_enable, \
+ bank_c_enable, \
+ bank_b_enable, \
+ bank_a_enable) \
+ ((((bank_i_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \
+ << QAT_FW_COMP_BANK_I_BITPOS) | \
+ (((bank_h_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \
+ << QAT_FW_COMP_BANK_H_BITPOS) | \
+ (((bank_g_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \
+ << QAT_FW_COMP_BANK_G_BITPOS) | \
+ (((bank_f_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \
+ << QAT_FW_COMP_BANK_F_BITPOS) | \
+ (((bank_e_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \
+ << QAT_FW_COMP_BANK_E_BITPOS) | \
+ (((bank_d_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \
+ << QAT_FW_COMP_BANK_D_BITPOS) | \
+ (((bank_c_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \
+ << QAT_FW_COMP_BANK_C_BITPOS) | \
+ (((bank_b_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \
+ << QAT_FW_COMP_BANK_B_BITPOS) | \
+ (((bank_a_enable)&QAT_FW_COMP_BANK_FLAG_MASK) \
+ << QAT_FW_COMP_BANK_A_BITPOS))
+
#endif
--
2.17.1
^ permalink raw reply [flat|nested] 3+ messages in thread
end of thread, other threads:[~2019-09-02 14:30 UTC | newest]
Thread overview: 3+ messages (download: mbox.gz / follow: Atom feed)
-- links below jump to the message on this page --
2019-08-26 7:33 [dpdk-dev] [PATCH 1/4] common/qat: add QAT RAM bank definitions Adam Dybkowski
-- strict thread matches above, loose matches on Subject: below --
2019-08-26 7:44 Adam Dybkowski
2019-08-26 7:13 Adam Dybkowski
This is a public inbox, see mirroring instructions
for how to clone and mirror all data and code used for this inbox;
as well as URLs for NNTP newsgroup(s).