[dpdk-dev] [PATCH v1 00/30] Enhancements and fixes in NXP dpaax drivers and fsl-mc bus

[dpdk-dev] [PATCH v1 00/30] Enhancements and fixes in NXP dpaax drivers and fsl-mc bus

[Sachin Saxena]

This patch set adds following enhancements:
	1. IEEE1588 support in net/dpaa2
	2. Interrupt support in net/dpaa
	3. Support multi vfio group in fsl-mc bus
	4. Taildrop support on frame count basis
	5. Soft parser driver in net/dpaa2
	6. Enhanced debug information

Hemant Agrawal (14):
  bus/dpaa: fix DPAA SEC blacklist case
  net/dpaa: improve the Rx offload debug message
  net/dpaa: reduce debug messages
  net/dpaa2: improve the Rx offload debug message
  common/dpaax: reduce debug mesages
  mempool/dpaa: reduce debug messages
  net/dpaa2: realign Rx offload support types
  net/dpaa2: enable Rx offload for timestamp
  net/dpaa2: support L2 payload based RSS distribution
  net/dpaa2: add taildrop support on frame count basis
  net/dpaa2: add cgr counters in xtra stats
  net/dpaa2: add support for config max Rx length in HW
  net/dpaa2: support dpdmux classification on eth type
  bus/fslmc: support multi vfio group

Nipun Gupta (6):
  bus/dpaa: remove un-necessary thread affinity
  bus/dpaa: decouple fq portal alloc and init
  net/dpaa: support Rx interrupt handler
  net/dpaa: support for Rx interrupt enable and disable
  net/dpaa: add SG support in Tx for non DPAA buffer
  net/dpaa2: add optional non-prefetch Rx mode

Priyanka Jain (4):
  net/dpaa2: add Tx confirmation mode support
  net/dpaa2: add timestamp support
  net/dpaa2: add dprtc sub-module
  net/dpaa2: add ptp driver

Sachin Saxena (1):
  net/dpaa2: use LFQIDs in Tx instead of qdid

Shreyansh Jain (3):
  bus/fslmc: update PA-VA dpaax library only in PA mode
  bus/fslmc: check for Dma map in primary process only
  net/dpaa2: support separate MC portal per process

Sunil Kumar Kori (2):
  net/dpaa2: add support for soft parser in MC
  net/dpaa2: add soft parser driver

 config/defconfig_arm64-dpaa2-linuxapp-gcc    |   3 +
 doc/guides/cryptodevs/dpaa_sec.rst           |   6 +-
 doc/guides/nics/dpaa2.rst                    |   4 +
 drivers/bus/dpaa/base/qbman/qman.c           |  80 ++-
 drivers/bus/dpaa/base/qbman/qman_driver.c    | 104 ++--
 drivers/bus/dpaa/base/qbman/qman_priv.h      |  15 +-
 drivers/bus/dpaa/dpaa_bus.c                  |  32 +-
 drivers/bus/dpaa/include/fsl_qman.h          |  21 +-
 drivers/bus/dpaa/include/fsl_usd.h           |   7 +-
 drivers/bus/dpaa/rte_bus_dpaa_version.map    |  10 +
 drivers/bus/dpaa/rte_dpaa_bus.h              |   1 +
 drivers/bus/fslmc/fslmc_bus.c                |  32 +-
 drivers/bus/fslmc/fslmc_vfio.c               | 162 ++++--
 drivers/bus/fslmc/fslmc_vfio.h               |   3 +
 drivers/bus/fslmc/portal/dpaa2_hw_pvt.h      |   7 +-
 drivers/bus/fslmc/rte_fslmc.h                |   1 +
 drivers/common/dpaax/dpaax_iova_table.c      |  15 +-
 drivers/crypto/dpaa_sec/dpaa_sec.c           |   3 +-
 drivers/mempool/dpaa/dpaa_mempool.c          |   4 +-
 drivers/net/dpaa/dpaa_ethdev.c               | 110 +++-
 drivers/net/dpaa/dpaa_rxtx.c                 | 192 +++----
 drivers/net/dpaa2/Makefile                   |   3 +
 drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h |  24 +-
 drivers/net/dpaa2/dpaa2_ethdev.c             | 456 ++++++++++++----
 drivers/net/dpaa2/dpaa2_ethdev.h             |  49 +-
 drivers/net/dpaa2/dpaa2_mux.c                |  84 ++-
 drivers/net/dpaa2/dpaa2_ptp.c                | 181 +++++++
 drivers/net/dpaa2/dpaa2_rxtx.c               | 284 +++++++++-
 drivers/net/dpaa2/dpaa2_sparser.c            | 269 ++++++++++
 drivers/net/dpaa2/dpaa2_sparser.h            | 206 ++++++++
 drivers/net/dpaa2/mc/dpni.c                  | 117 +++++
 drivers/net/dpaa2/mc/dprtc.c                 | 523 +++++++++++++++++++
 drivers/net/dpaa2/mc/fsl_dpni.h              | 133 +++++
 drivers/net/dpaa2/mc/fsl_dpni_cmd.h          |  43 +-
 drivers/net/dpaa2/mc/fsl_dprtc.h             | 109 ++++
 drivers/net/dpaa2/mc/fsl_dprtc_cmd.h         |  91 ++++
 drivers/net/dpaa2/meson.build                |   6 +
 37 files changed, 2971 insertions(+), 419 deletions(-)
 create mode 100644 drivers/net/dpaa2/dpaa2_ptp.c
 create mode 100644 drivers/net/dpaa2/dpaa2_sparser.c
 create mode 100644 drivers/net/dpaa2/dpaa2_sparser.h
 create mode 100644 drivers/net/dpaa2/mc/dprtc.c
 create mode 100644 drivers/net/dpaa2/mc/fsl_dprtc.h
 create mode 100644 drivers/net/dpaa2/mc/fsl_dprtc_cmd.h

-- 
2.17.1

[dpdk-dev] [PATCH v1 01/30] bus/dpaa: fix DPAA SEC blacklist case

[Sachin Saxena]

From: Hemant Agrawal <hemant.agrawal@nxp.com>

The black list of dpaa_sec devices fails.
EAL: failed to parse device "dpaa:dpaa_sec-1"

This patch address following issues:
- bus usages dpaa-sec while the driver usage dpaa_sec
- bus usages numbers from 0 to MAX_SEC - while driver
probe usages sec number form max-fman_device +1

Fixes: 6e0752205bb2 ("bus/dpaa: support device blacklisting")
Cc: stable@dpdk.org

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Reviewed-by: Sachin Saxena <sachin.saxena@nxp.com>
---
 doc/guides/cryptodevs/dpaa_sec.rst | 6 +++---
 drivers/bus/dpaa/dpaa_bus.c        | 6 +++---
 drivers/crypto/dpaa_sec/dpaa_sec.c | 3 +--
 3 files changed, 7 insertions(+), 8 deletions(-)

diff --git a/doc/guides/cryptodevs/dpaa_sec.rst b/doc/guides/cryptodevs/dpaa_sec.rst
index 0a2600634..3a3e30aaf 100644
--- a/doc/guides/cryptodevs/dpaa_sec.rst
+++ b/doc/guides/cryptodevs/dpaa_sec.rst
@@ -85,11 +85,11 @@ For blacklisting a DPAA device, following commands can be used.
 
  .. code-block:: console
 
-    <dpdk app> <EAL args> -b "dpaa_bus:dpaa-secX" -- ...
-    e.g. "dpaa_bus:dpaa-sec0"
+    <dpdk app> <EAL args> -b "dpaa:dpaa_sec-X" -- ...
+    e.g. "dpaa:dpaa_sec-1"
 
     or to disable all 4 SEC devices
-    -b "dpaa_sec:dpaa-sec0"  -b "dpaa_sec:dpaa-sec1" -b "dpaa_sec:dpaa-sec2" -b "dpaa_sec:dpaa-sec3"
+    -b "dpaa:dpaa_sec-1"  -b "dpaa:dpaa_sec-2" -b "dpaa:dpaa_sec-3" -b "dpaa:dpaa_sec-4"
 
 Limitations
 -----------
diff --git a/drivers/bus/dpaa/dpaa_bus.c b/drivers/bus/dpaa/dpaa_bus.c
index 07cc5c667..f7d1a5b63 100644
--- a/drivers/bus/dpaa/dpaa_bus.c
+++ b/drivers/bus/dpaa/dpaa_bus.c
@@ -218,7 +218,7 @@ dpaa_create_device_list(void)
 		 * allocated for dev->name/
 		 */
 		memset(dev->name, 0, RTE_ETH_NAME_MAX_LEN);
-		sprintf(dev->name, "dpaa-sec%d", i);
+		sprintf(dev->name, "dpaa_sec-%d", i+1);
 		DPAA_BUS_LOG(INFO, "%s cryptodev added", dev->name);
 		dev->device.name = dev->name;
 		dev->device.devargs = dpaa_devargs_lookup(dev);
@@ -397,7 +397,7 @@ rte_dpaa_bus_parse(const char *name, void *out_name)
 	 * without separator. Both need to be handled.
 	 * It is also possible that "name=fm1-mac3" is passed along.
 	 */
-	DPAA_BUS_DEBUG("Parse device name (%s)\n", name);
+	DPAA_BUS_DEBUG("Parse device name (%s)", name);
 
 	/* Check for dpaa_bus:fm1-mac3 style */
 	dup_name = strdup(name);
@@ -428,7 +428,7 @@ rte_dpaa_bus_parse(const char *name, void *out_name)
 	for (i = 0; i < RTE_LIBRTE_DPAA_MAX_CRYPTODEV; i++) {
 		char sec_name[16];
 
-		snprintf(sec_name, 16, "dpaa-sec%d", i);
+		snprintf(sec_name, 16, "dpaa_sec-%d", i+1);
 		if (strcmp(sec_name, sep) == 0) {
 			if (out_name)
 				strcpy(out_name, sep);
diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c b/drivers/crypto/dpaa_sec/dpaa_sec.c
index 122c80a07..1754862be 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.c
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
@@ -2678,8 +2678,7 @@ cryptodev_dpaa_sec_probe(struct rte_dpaa_driver *dpaa_drv __rte_unused,
 
 	int retval;
 
-	snprintf(cryptodev_name, sizeof(cryptodev_name), "dpaa_sec-%d",
-			dpaa_dev->id.dev_id);
+	snprintf(cryptodev_name, sizeof(cryptodev_name), "%s", dpaa_dev->name);
 
 	cryptodev = rte_cryptodev_pmd_allocate(cryptodev_name, rte_socket_id());
 	if (cryptodev == NULL)
-- 
2.17.1

[dpdk-dev] [PATCH v1 02/30] net/dpaa: improve the Rx offload debug message

[Sachin Saxena]

From: Hemant Agrawal <hemant.agrawal@nxp.com>

This patch also align few RX offload support to right category.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Reviewed-by: Sachin Saxena <sachin.saxena@nxp.com>
---
 drivers/net/dpaa/dpaa_ethdev.c | 28 ++++++++++++++--------------
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
index 7154fb9b4..7f5a8ac3b 100644
--- a/drivers/net/dpaa/dpaa_ethdev.c
+++ b/drivers/net/dpaa/dpaa_ethdev.c
@@ -59,7 +59,9 @@ static uint64_t dev_rx_offloads_nodis =
 		DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
 
 /* Supported Tx offloads */
-static uint64_t dev_tx_offloads_sup;
+static uint64_t dev_tx_offloads_sup =
+		DEV_TX_OFFLOAD_MT_LOCKFREE |
+		DEV_TX_OFFLOAD_MBUF_FAST_FREE;
 
 /* Tx offloads which cannot be disabled */
 static uint64_t dev_tx_offloads_nodis =
@@ -68,9 +70,7 @@ static uint64_t dev_tx_offloads_nodis =
 		DEV_TX_OFFLOAD_TCP_CKSUM |
 		DEV_TX_OFFLOAD_SCTP_CKSUM |
 		DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
-		DEV_TX_OFFLOAD_MULTI_SEGS |
-		DEV_TX_OFFLOAD_MT_LOCKFREE |
-		DEV_TX_OFFLOAD_MBUF_FAST_FREE;
+		DEV_TX_OFFLOAD_MULTI_SEGS;
 
 /* Keep track of whether QMAN and BMAN have been globally initialized */
 static int is_global_init;
@@ -196,20 +196,20 @@ dpaa_eth_dev_configure(struct rte_eth_dev *dev)
 
 	PMD_INIT_FUNC_TRACE();
 
-	/* Rx offloads validation */
+	/* Rx offloads which are enabled by default */
 	if (dev_rx_offloads_nodis & ~rx_offloads) {
-		DPAA_PMD_WARN(
-		"Rx offloads non configurable - requested 0x%" PRIx64
-		" ignored 0x%" PRIx64,
-			rx_offloads, dev_rx_offloads_nodis);
+		DPAA_PMD_INFO(
+		"Some of rx offloads enabled by default - requested 0x%" PRIx64
+		" fixed are 0x%" PRIx64,
+		rx_offloads, dev_rx_offloads_nodis);
 	}
 
-	/* Tx offloads validation */
+	/* Tx offloads which are enabled by default */
 	if (dev_tx_offloads_nodis & ~tx_offloads) {
-		DPAA_PMD_WARN(
-		"Tx offloads non configurable - requested 0x%" PRIx64
-		" ignored 0x%" PRIx64,
-			tx_offloads, dev_tx_offloads_nodis);
+		DPAA_PMD_INFO(
+		"Some of tx offloads enabled by default - requested 0x%" PRIx64
+		" fixed are 0x%" PRIx64,
+		tx_offloads, dev_tx_offloads_nodis);
 	}
 
 	if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
-- 
2.17.1

[dpdk-dev] [PATCH v1 03/30] bus/dpaa: remove un-necessary thread affinity

[Sachin Saxena]

From: Nipun Gupta <nipun.gupta@nxp.com>

Thread affinity is already taken care by DPDK. Remove them from bus.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
---
 drivers/bus/dpaa/base/qbman/qman_driver.c | 56 ++---------------------
 drivers/bus/dpaa/dpaa_bus.c               | 13 ------
 2 files changed, 3 insertions(+), 66 deletions(-)

diff --git a/drivers/bus/dpaa/base/qbman/qman_driver.c b/drivers/bus/dpaa/base/qbman/qman_driver.c
index ba153396d..5c773669a 100644
--- a/drivers/bus/dpaa/base/qbman/qman_driver.c
+++ b/drivers/bus/dpaa/base/qbman/qman_driver.c
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2008-2016 Freescale Semiconductor Inc.
- * Copyright 2017 NXP
+ * Copyright 2017,2019 NXP
  *
  */
 
@@ -32,31 +32,9 @@ static __thread struct dpaa_ioctl_portal_map map = {
 
 static int fsl_qman_portal_init(uint32_t index, int is_shared)
 {
-	cpu_set_t cpuset;
 	struct qman_portal *portal;
-	int loop, ret;
 	struct dpaa_ioctl_irq_map irq_map;
-
-	/* Verify the thread's cpu-affinity */
-	ret = pthread_getaffinity_np(pthread_self(), sizeof(cpu_set_t),
-				     &cpuset);
-	if (ret) {
-		error(0, ret, "pthread_getaffinity_np()");
-		return ret;
-	}
-	qpcfg.cpu = -1;
-	for (loop = 0; loop < CPU_SETSIZE; loop++)
-		if (CPU_ISSET(loop, &cpuset)) {
-			if (qpcfg.cpu != -1) {
-				pr_err("Thread is not affine to 1 cpu\n");
-				return -EINVAL;
-			}
-			qpcfg.cpu = loop;
-		}
-	if (qpcfg.cpu == -1) {
-		pr_err("Bug in getaffinity handling!\n");
-		return -EINVAL;
-	}
+	int ret;
 
 	/* Allocate and map a qman portal */
 	map.index = index;
@@ -145,14 +123,11 @@ void qman_thread_irq(void)
 
 struct qman_portal *fsl_qman_portal_create(void)
 {
-	cpu_set_t cpuset;
 	struct qman_portal *res;
-
 	struct qm_portal_config *q_pcfg;
-	int loop, ret;
 	struct dpaa_ioctl_irq_map irq_map;
 	struct dpaa_ioctl_portal_map q_map = {0};
-	int q_fd;
+	int q_fd, ret;
 
 	q_pcfg = kzalloc((sizeof(struct qm_portal_config)), 0);
 	if (!q_pcfg) {
@@ -160,31 +135,6 @@ struct qman_portal *fsl_qman_portal_create(void)
 		return NULL;
 	}
 
-	/* Verify the thread's cpu-affinity */
-	ret = pthread_getaffinity_np(pthread_self(), sizeof(cpu_set_t),
-				     &cpuset);
-	if (ret) {
-		error(0, ret, "pthread_getaffinity_np()");
-		kfree(q_pcfg);
-		return NULL;
-	}
-
-	q_pcfg->cpu = -1;
-	for (loop = 0; loop < CPU_SETSIZE; loop++)
-		if (CPU_ISSET(loop, &cpuset)) {
-			if (q_pcfg->cpu != -1) {
-				pr_err("Thread is not affine to 1 cpu\n");
-				kfree(q_pcfg);
-				return NULL;
-			}
-			q_pcfg->cpu = loop;
-		}
-	if (q_pcfg->cpu == -1) {
-		pr_err("Bug in getaffinity handling!\n");
-		kfree(q_pcfg);
-		return NULL;
-	}
-
 	/* Allocate and map a qman portal */
 	q_map.type = dpaa_portal_qman;
 	q_map.index = QBMAN_ANY_PORTAL_IDX;
diff --git a/drivers/bus/dpaa/dpaa_bus.c b/drivers/bus/dpaa/dpaa_bus.c
index f7d1a5b63..b0e68c4a4 100644
--- a/drivers/bus/dpaa/dpaa_bus.c
+++ b/drivers/bus/dpaa/dpaa_bus.c
@@ -250,11 +250,9 @@ dpaa_clean_device_list(void)
 
 int rte_dpaa_portal_init(void *arg)
 {
-	pthread_t id;
 	unsigned int cpu, lcore = rte_lcore_id();
 	int ret;
 	struct dpaa_portal *dpaa_io_portal;
-	rte_cpuset_t cpuset;
 
 	BUS_INIT_FUNC_TRACE();
 
@@ -266,17 +264,6 @@ int rte_dpaa_portal_init(void *arg)
 
 	cpu = rte_lcore_to_cpu_id(lcore);
 
-	/* Set CPU affinity for this thread.*/
-	id = pthread_self();
-	cpuset = rte_lcore_cpuset(lcore);
-	ret = pthread_setaffinity_np(id, sizeof(cpu_set_t),
-				     &cpuset);
-	if (ret) {
-		DPAA_BUS_LOG(ERR, "pthread_setaffinity_np failed on core :%u"
-			     " (lcore=%u) with ret: %d", cpu, lcore, ret);
-		return ret;
-	}
-
 	/* Initialise bman thread portals */
 	ret = bman_thread_init();
 	if (ret) {
-- 
2.17.1

[dpdk-dev] [PATCH v1 04/30] bus/dpaa: decouple fq portal alloc and init

[Sachin Saxena]

From: Nipun Gupta <nipun.gupta@nxp.com>

The decoupling of FQ portal allocation is required as a
pre-requisite to support Rx interrupts as we need to have
event FD's at portal allocation i.e. before the
initialization of the Frame Queues.
This change will help us get the event fd once the portals
have been allocated for static FQ's.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
---
 drivers/bus/dpaa/base/qbman/qman.c        | 35 ++++++++---------
 drivers/bus/dpaa/base/qbman/qman_driver.c | 46 ++++++++++++++++-------
 drivers/bus/dpaa/base/qbman/qman_priv.h   | 13 +++++--
 drivers/bus/dpaa/dpaa_bus.c               | 13 +++----
 drivers/bus/dpaa/include/fsl_qman.h       |  3 +-
 drivers/bus/dpaa/include/fsl_usd.h        |  6 ++-
 drivers/bus/dpaa/rte_bus_dpaa_version.map |  7 ++++
 drivers/net/dpaa/dpaa_ethdev.c            | 10 +++++
 drivers/net/dpaa/dpaa_rxtx.c              |  3 +-
 9 files changed, 90 insertions(+), 46 deletions(-)

diff --git a/drivers/bus/dpaa/base/qbman/qman.c b/drivers/bus/dpaa/base/qbman/qman.c
index c6f7d7bb3..79017f7f2 100644
--- a/drivers/bus/dpaa/base/qbman/qman.c
+++ b/drivers/bus/dpaa/base/qbman/qman.c
@@ -498,11 +498,10 @@ static inline void qm_mr_pvb_update(struct qm_portal *portal)
 	dcbit_ro(res);
 }
 
-static inline
-struct qman_portal *qman_create_portal(
-			struct qman_portal *portal,
-			      const struct qm_portal_config *c,
-			      const struct qman_cgrs *cgrs)
+struct qman_portal *
+qman_init_portal(struct qman_portal *portal,
+		   const struct qm_portal_config *c,
+		   const struct qman_cgrs *cgrs)
 {
 	struct qm_portal *p;
 	char buf[16];
@@ -511,6 +510,9 @@ struct qman_portal *qman_create_portal(
 
 	p = &portal->p;
 
+	if (!c)
+		c = portal->config;
+
 	if (dpaa_svr_family == SVR_LS1043A_FAMILY)
 		portal->use_eqcr_ci_stashing = 3;
 	else
@@ -632,21 +634,23 @@ struct qman_portal *qman_create_portal(
 static struct qman_portal global_portals[MAX_GLOBAL_PORTALS];
 static rte_atomic16_t global_portals_used[MAX_GLOBAL_PORTALS];
 
-static struct qman_portal *
-qman_alloc_global_portal(void)
+struct qman_portal *
+qman_alloc_global_portal(struct qm_portal_config *q_pcfg)
 {
 	unsigned int i;
 
 	for (i = 0; i < MAX_GLOBAL_PORTALS; i++) {
-		if (rte_atomic16_test_and_set(&global_portals_used[i]))
+		if (rte_atomic16_test_and_set(&global_portals_used[i])) {
+			global_portals[i].config = q_pcfg;
 			return &global_portals[i];
+		}
 	}
 	pr_err("No portal available (%x)\n", MAX_GLOBAL_PORTALS);
 
 	return NULL;
 }
 
-static int
+int
 qman_free_global_portal(struct qman_portal *portal)
 {
 	unsigned int i;
@@ -661,22 +665,15 @@ qman_free_global_portal(struct qman_portal *portal)
 }
 
 struct qman_portal *qman_create_affine_portal(const struct qm_portal_config *c,
-					      const struct qman_cgrs *cgrs,
-					      int alloc)
+					      const struct qman_cgrs *cgrs)
 {
 	struct qman_portal *res;
-	struct qman_portal *portal;
-
-	if (alloc)
-		portal = qman_alloc_global_portal();
-	else
-		portal = get_affine_portal();
+	struct qman_portal *portal = get_affine_portal();
 
 	/* A criteria for calling this function (from qman_driver.c) is that
 	 * we're already affine to the cpu and won't schedule onto another cpu.
 	 */
-
-	res = qman_create_portal(portal, c, cgrs);
+	res = qman_init_portal(portal, c, cgrs);
 	if (res) {
 		spin_lock(&affine_mask_lock);
 		CPU_SET(c->cpu, &affine_mask);
diff --git a/drivers/bus/dpaa/base/qbman/qman_driver.c b/drivers/bus/dpaa/base/qbman/qman_driver.c
index 5c773669a..06ed814e1 100644
--- a/drivers/bus/dpaa/base/qbman/qman_driver.c
+++ b/drivers/bus/dpaa/base/qbman/qman_driver.c
@@ -62,7 +62,7 @@ static int fsl_qman_portal_init(uint32_t index, int is_shared)
 	qpcfg.node = NULL;
 	qpcfg.irq = qmfd;
 
-	portal = qman_create_affine_portal(&qpcfg, NULL, 0);
+	portal = qman_create_affine_portal(&qpcfg, NULL);
 	if (!portal) {
 		pr_err("Qman portal initialisation failed (%d)\n",
 		       qpcfg.cpu);
@@ -121,13 +121,13 @@ void qman_thread_irq(void)
 	out_be32(qpcfg.addr_virt[DPAA_PORTAL_CI] + 0x36C0, 0);
 }
 
-struct qman_portal *fsl_qman_portal_create(void)
+struct qman_portal *fsl_qman_fq_portal_create(void)
 {
-	struct qman_portal *res;
+	struct qman_portal *portal = NULL;
 	struct qm_portal_config *q_pcfg;
 	struct dpaa_ioctl_irq_map irq_map;
 	struct dpaa_ioctl_portal_map q_map = {0};
-	int q_fd, ret;
+	int q_fd = 0, ret;
 
 	q_pcfg = kzalloc((sizeof(struct qm_portal_config)), 0);
 	if (!q_pcfg) {
@@ -155,38 +155,58 @@ struct qman_portal *fsl_qman_portal_create(void)
 	q_fd = open(QMAN_PORTAL_IRQ_PATH, O_RDONLY);
 	if (q_fd == -1) {
 		pr_err("QMan irq init failed\n");
-		goto err1;
+		goto err;
 	}
 
 	q_pcfg->irq = q_fd;
 
-	res = qman_create_affine_portal(q_pcfg, NULL, true);
-	if (!res) {
+	portal = qman_alloc_global_portal(q_pcfg);
+	if (!portal) {
 		pr_err("Qman portal initialisation failed (%d)\n",
 		       q_pcfg->cpu);
-		goto err2;
+		goto err;
 	}
 
 	irq_map.type = dpaa_portal_qman;
 	irq_map.portal_cinh = q_map.addr.cinh;
 	process_portal_irq_map(q_fd, &irq_map);
 
-	return res;
-err2:
-	close(q_fd);
-err1:
+	return portal;
+err:
+	if (portal)
+		qman_free_global_portal(portal);
+	if (q_fd)
+		close(q_fd);
 	process_portal_unmap(&q_map.addr);
 	kfree(q_pcfg);
 	return NULL;
 }
 
-int fsl_qman_portal_destroy(struct qman_portal *qp)
+int fsl_qman_fq_portal_init(struct qman_portal *qp)
+{
+	struct qman_portal *res;
+
+	res = qman_init_portal(qp, NULL, NULL);
+	if (!res) {
+		pr_err("Qman portal initialisation failed\n");
+		return -1;
+	}
+
+	return 0;
+}
+
+int fsl_qman_fq_portal_destroy(struct qman_portal *qp)
 {
 	const struct qm_portal_config *cfg;
 	struct dpaa_portal_map addr;
 	int ret;
 
 	cfg = qman_destroy_affine_portal(qp);
+
+	ret = qman_free_global_portal(qp);
+	if (ret)
+		pr_err("qman_free_global_portal() (%d)\n", ret);
+
 	kfree(qp);
 
 	process_portal_irq_unmap(cfg->irq);
diff --git a/drivers/bus/dpaa/base/qbman/qman_priv.h b/drivers/bus/dpaa/base/qbman/qman_priv.h
index 02f6301f0..97d5521a8 100644
--- a/drivers/bus/dpaa/base/qbman/qman_priv.h
+++ b/drivers/bus/dpaa/base/qbman/qman_priv.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2008-2016 Freescale Semiconductor Inc.
- * Copyright 2017 NXP
+ * Copyright 2017,2019 NXP
  *
  */
 
@@ -145,11 +145,18 @@ int qm_get_wpm(int *wpm);
 
 struct qman_portal *qman_create_affine_portal(
 			const struct qm_portal_config *config,
-			const struct qman_cgrs *cgrs,
-			int alloc);
+			const struct qman_cgrs *cgrs);
 const struct qm_portal_config *
 qman_destroy_affine_portal(struct qman_portal *q);
 
+struct qman_portal *
+qman_init_portal(struct qman_portal *portal,
+		   const struct qm_portal_config *c,
+		   const struct qman_cgrs *cgrs);
+
+struct qman_portal *qman_alloc_global_portal(struct qm_portal_config *q_pcfg);
+int qman_free_global_portal(struct qman_portal *portal);
+
 struct qm_portal_config *qm_get_unused_portal(void);
 struct qm_portal_config *qm_get_unused_portal_idx(uint32_t idx);
 
diff --git a/drivers/bus/dpaa/dpaa_bus.c b/drivers/bus/dpaa/dpaa_bus.c
index b0e68c4a4..1d8a294b1 100644
--- a/drivers/bus/dpaa/dpaa_bus.c
+++ b/drivers/bus/dpaa/dpaa_bus.c
@@ -321,7 +321,6 @@ rte_dpaa_portal_fq_init(void *arg, struct qman_fq *fq)
 {
 	/* Affine above created portal with channel*/
 	u32 sdqcr;
-	struct qman_portal *qp;
 	int ret;
 
 	if (unlikely(!RTE_PER_LCORE(dpaa_io))) {
@@ -333,21 +332,21 @@ rte_dpaa_portal_fq_init(void *arg, struct qman_fq *fq)
 	}
 
 	/* Initialise qman specific portals */
-	qp = fsl_qman_portal_create();
-	if (!qp) {
-		DPAA_BUS_LOG(ERR, "Unable to alloc fq portal");
+	ret = fsl_qman_fq_portal_init(fq->qp);
+	if (ret) {
+		DPAA_BUS_LOG(ERR, "Unable to init fq portal");
 		return -1;
 	}
-	fq->qp = qp;
+
 	sdqcr = QM_SDQCR_CHANNELS_POOL_CONV(fq->ch_id);
-	qman_static_dequeue_add(sdqcr, qp);
+	qman_static_dequeue_add(sdqcr, fq->qp);
 
 	return 0;
 }
 
 int rte_dpaa_portal_fq_close(struct qman_fq *fq)
 {
-	return fsl_qman_portal_destroy(fq->qp);
+	return fsl_qman_fq_portal_destroy(fq->qp);
 }
 
 void
diff --git a/drivers/bus/dpaa/include/fsl_qman.h b/drivers/bus/dpaa/include/fsl_qman.h
index e5cccbbea..5f13a5544 100644
--- a/drivers/bus/dpaa/include/fsl_qman.h
+++ b/drivers/bus/dpaa/include/fsl_qman.h
@@ -1217,7 +1217,8 @@ struct qman_fq {
 	u32 fqid_le;
 	u16 ch_id;
 	u8 cgr_groupid;
-	u8 is_static;
+	u8 is_static:4;
+	u8 qp_initialized:4;
 
 	/* DPDK Interface */
 	void *dpaa_intf;
diff --git a/drivers/bus/dpaa/include/fsl_usd.h b/drivers/bus/dpaa/include/fsl_usd.h
index ec1ab7cee..ea7be38af 100644
--- a/drivers/bus/dpaa/include/fsl_usd.h
+++ b/drivers/bus/dpaa/include/fsl_usd.h
@@ -2,6 +2,7 @@
  *
  * Copyright 2010-2011 Freescale Semiconductor, Inc.
  * All rights reserved.
+ * Copyright 2019 NXP
  *
  */
 
@@ -74,8 +75,9 @@ int qman_global_init(void);
 int bman_global_init(void);
 
 /* Direct portal create and destroy */
-struct qman_portal *fsl_qman_portal_create(void);
-int fsl_qman_portal_destroy(struct qman_portal *qp);
+struct qman_portal *fsl_qman_fq_portal_create(void);
+int fsl_qman_fq_portal_destroy(struct qman_portal *qp);
+int fsl_qman_fq_portal_init(struct qman_portal *qp);
 
 #ifdef __cplusplus
 }
diff --git a/drivers/bus/dpaa/rte_bus_dpaa_version.map b/drivers/bus/dpaa/rte_bus_dpaa_version.map
index c88deaf7f..f779469f9 100644
--- a/drivers/bus/dpaa/rte_bus_dpaa_version.map
+++ b/drivers/bus/dpaa/rte_bus_dpaa_version.map
@@ -123,3 +123,10 @@ DPDK_19.05 {
 
 	local: *;
 } DPDK_18.11;
+
+DPDK_19.11 {
+	global:
+	fsl_qman_fq_portal_create;
+
+	local: *;
+} DPDK_19.05;
diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
index 7f5a8ac3b..4e2c9471e 100644
--- a/drivers/net/dpaa/dpaa_ethdev.c
+++ b/drivers/net/dpaa/dpaa_ethdev.c
@@ -629,6 +629,8 @@ int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 		dev->data->dev_conf.rxmode.max_rx_pkt_len);
 	/* checking if push mode only, no error check for now */
 	if (dpaa_push_mode_max_queue > dpaa_push_queue_idx) {
+		struct qman_portal *qp;
+
 		dpaa_push_queue_idx++;
 		opts.we_mask = QM_INITFQ_WE_FQCTRL | QM_INITFQ_WE_CONTEXTA;
 		opts.fqd.fq_ctrl = QM_FQCTRL_AVOIDBLOCK |
@@ -672,6 +674,14 @@ int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 		}
 
 		rxq->is_static = true;
+
+		/* Allocate qman specific portals */
+		qp = fsl_qman_fq_portal_create();
+		if (!qp) {
+			DPAA_PMD_ERR("Unable to alloc fq portal");
+			return -1;
+		}
+		rxq->qp = qp;
 	}
 	rxq->bp_array = rte_dpaa_bpid_info;
 	dev->data->rx_queues[queue_idx] = rxq;
diff --git a/drivers/net/dpaa/dpaa_rxtx.c b/drivers/net/dpaa/dpaa_rxtx.c
index 30b183607..220c3477d 100644
--- a/drivers/net/dpaa/dpaa_rxtx.c
+++ b/drivers/net/dpaa/dpaa_rxtx.c
@@ -517,12 +517,13 @@ dpaa_eth_queue_portal_rx(struct qman_fq *fq,
 {
 	int ret;
 
-	if (unlikely(fq->qp == NULL)) {
+	if (unlikely(!fq->qp_initialized)) {
 		ret = rte_dpaa_portal_fq_init((void *)0, fq);
 		if (ret) {
 			DPAA_PMD_ERR("Failure in affining portal %d", ret);
 			return 0;
 		}
+		fq->qp_initialized = 1;
 	}
 
 	return qman_portal_poll_rx(nb_bufs, (void **)bufs, fq->qp);
-- 
2.17.1

[dpdk-dev] [PATCH v1 05/30] net/dpaa: support Rx interrupt handler

[Sachin Saxena]

From: Nipun Gupta <nipun.gupta@nxp.com>

This patch adds interrupt handler support for
the ethernet devices which are configured with
a dedicated portal for packet Rx
(i.e. for FQ's in push mode).

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
---
 drivers/bus/dpaa/base/qbman/qman_driver.c |  3 ++-
 drivers/bus/dpaa/include/fsl_qman.h       | 18 +++++++++++++-
 drivers/bus/dpaa/include/fsl_usd.h        |  2 +-
 drivers/bus/dpaa/rte_dpaa_bus.h           |  1 +
 drivers/net/dpaa/dpaa_ethdev.c            | 29 +++++++++++++++++++++--
 5 files changed, 48 insertions(+), 5 deletions(-)

diff --git a/drivers/bus/dpaa/base/qbman/qman_driver.c b/drivers/bus/dpaa/base/qbman/qman_driver.c
index 06ed814e1..acd003143 100644
--- a/drivers/bus/dpaa/base/qbman/qman_driver.c
+++ b/drivers/bus/dpaa/base/qbman/qman_driver.c
@@ -121,7 +121,7 @@ void qman_thread_irq(void)
 	out_be32(qpcfg.addr_virt[DPAA_PORTAL_CI] + 0x36C0, 0);
 }
 
-struct qman_portal *fsl_qman_fq_portal_create(void)
+struct qman_portal *fsl_qman_fq_portal_create(int *fd)
 {
 	struct qman_portal *portal = NULL;
 	struct qm_portal_config *q_pcfg;
@@ -171,6 +171,7 @@ struct qman_portal *fsl_qman_fq_portal_create(void)
 	irq_map.portal_cinh = q_map.addr.cinh;
 	process_portal_irq_map(q_fd, &irq_map);
 
+	*fd = q_fd;
 	return portal;
 err:
 	if (portal)
diff --git a/drivers/bus/dpaa/include/fsl_qman.h b/drivers/bus/dpaa/include/fsl_qman.h
index 5f13a5544..064b65aed 100644
--- a/drivers/bus/dpaa/include/fsl_qman.h
+++ b/drivers/bus/dpaa/include/fsl_qman.h
@@ -1215,6 +1215,9 @@ struct qman_fq {
 	struct qman_fq_cb cb;
 
 	u32 fqid_le;
+	u32 fqid;
+
+	int q_fd;
 	u16 ch_id;
 	u8 cgr_groupid;
 	u8 is_static:4;
@@ -1231,7 +1234,6 @@ struct qman_fq {
 	volatile unsigned long flags;
 
 	enum qman_fq_state state;
-	u32 fqid;
 	spinlock_t fqlock;
 
 	struct rb_node node;
@@ -1333,6 +1335,13 @@ u32 qman_portal_dequeue(struct rte_event ev[], unsigned int poll_limit,
  */
 int qman_irqsource_add(u32 bits);
 
+/**
+ * qman_fq_portal_irqsource_add - samilar to qman_irqsource_add, but it
+ * takes portal (fq specific) as input rather than using the thread affined
+ * portal.
+ */
+int qman_fq_portal_irqsource_add(struct qman_portal *p, u32 bits);
+
 /**
  * qman_irqsource_remove - remove processing sources from being interrupt-driven
  * @bits: bitmask of QM_PIRQ_**I processing sources
@@ -1343,6 +1352,13 @@ int qman_irqsource_add(u32 bits);
  */
 int qman_irqsource_remove(u32 bits);
 
+/**
+ * qman_fq_portal_irqsource_remove - similar to qman_irqsource_remove, but it
+ * takes portal (fq specific) as input rather than using the thread affined
+ * portal.
+ */
+int qman_fq_portal_irqsource_remove(struct qman_portal *p, u32 bits);
+
 /**
  * qman_affine_channel - return the channel ID of an portal
  * @cpu: the cpu whose affine portal is the subject of the query
diff --git a/drivers/bus/dpaa/include/fsl_usd.h b/drivers/bus/dpaa/include/fsl_usd.h
index ea7be38af..a407e2b22 100644
--- a/drivers/bus/dpaa/include/fsl_usd.h
+++ b/drivers/bus/dpaa/include/fsl_usd.h
@@ -75,7 +75,7 @@ int qman_global_init(void);
 int bman_global_init(void);
 
 /* Direct portal create and destroy */
-struct qman_portal *fsl_qman_fq_portal_create(void);
+struct qman_portal *fsl_qman_fq_portal_create(int *fd);
 int fsl_qman_fq_portal_destroy(struct qman_portal *qp);
 int fsl_qman_fq_portal_init(struct qman_portal *qp);
 
diff --git a/drivers/bus/dpaa/rte_dpaa_bus.h b/drivers/bus/dpaa/rte_dpaa_bus.h
index 554a56f2e..9601aebdd 100644
--- a/drivers/bus/dpaa/rte_dpaa_bus.h
+++ b/drivers/bus/dpaa/rte_dpaa_bus.h
@@ -75,6 +75,7 @@ struct rte_dpaa_device {
 	};
 	struct rte_dpaa_driver *driver;
 	struct dpaa_device_id id;
+	struct rte_intr_handle intr_handle;
 	enum rte_dpaa_type device_type; /**< Ethernet or crypto type device */
 	char name[RTE_ETH_NAME_MAX_LEN];
 };
diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
index 4e2c9471e..1934f85ae 100644
--- a/drivers/net/dpaa/dpaa_ethdev.c
+++ b/drivers/net/dpaa/dpaa_ethdev.c
@@ -628,8 +628,10 @@ int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 		fman_if_get_sg_enable(dpaa_intf->fif),
 		dev->data->dev_conf.rxmode.max_rx_pkt_len);
 	/* checking if push mode only, no error check for now */
-	if (dpaa_push_mode_max_queue > dpaa_push_queue_idx) {
+	if (!rxq->is_static &&
+	    dpaa_push_mode_max_queue > dpaa_push_queue_idx) {
 		struct qman_portal *qp;
+		int q_fd;
 
 		dpaa_push_queue_idx++;
 		opts.we_mask = QM_INITFQ_WE_FQCTRL | QM_INITFQ_WE_CONTEXTA;
@@ -676,12 +678,35 @@ int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 		rxq->is_static = true;
 
 		/* Allocate qman specific portals */
-		qp = fsl_qman_fq_portal_create();
+		qp = fsl_qman_fq_portal_create(&q_fd);
 		if (!qp) {
 			DPAA_PMD_ERR("Unable to alloc fq portal");
 			return -1;
 		}
 		rxq->qp = qp;
+
+		/* Set up the device interrupt handler */
+		if (!dev->intr_handle) {
+			struct rte_dpaa_device *dpaa_dev;
+			struct rte_device *rdev = dev->device;
+
+			dpaa_dev = container_of(rdev, struct rte_dpaa_device,
+						device);
+			dev->intr_handle = &dpaa_dev->intr_handle;
+			dev->intr_handle->intr_vec = rte_zmalloc(NULL,
+					dpaa_push_mode_max_queue, 0);
+			if (!dev->intr_handle->intr_vec) {
+				DPAA_PMD_ERR("intr_vec alloc failed");
+				return -ENOMEM;
+			}
+			dev->intr_handle->nb_efd = dpaa_push_mode_max_queue;
+			dev->intr_handle->max_intr = dpaa_push_mode_max_queue;
+		}
+
+		dev->intr_handle->type = RTE_INTR_HANDLE_EXT;
+		dev->intr_handle->intr_vec[queue_idx] = queue_idx + 1;
+		dev->intr_handle->efds[queue_idx] = q_fd;
+		rxq->q_fd = q_fd;
 	}
 	rxq->bp_array = rte_dpaa_bpid_info;
 	dev->data->rx_queues[queue_idx] = rxq;
-- 
2.17.1

[dpdk-dev] [PATCH v1 06/30] net/dpaa: support for Rx interrupt enable and disable

[Sachin Saxena]

From: Nipun Gupta <nipun.gupta@nxp.com>

This patch adds support for dpaa eth driver
interrupt enable and disable callback functions.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
---
 drivers/bus/dpaa/base/qbman/qman.c        | 45 +++++++++++++++++++++++
 drivers/bus/dpaa/base/qbman/qman_driver.c |  5 +++
 drivers/bus/dpaa/base/qbman/qman_priv.h   |  2 +
 drivers/bus/dpaa/include/fsl_usd.h        |  1 +
 drivers/bus/dpaa/rte_bus_dpaa_version.map |  3 ++
 drivers/net/dpaa/dpaa_ethdev.c            | 39 +++++++++++++++++++-
 6 files changed, 94 insertions(+), 1 deletion(-)

diff --git a/drivers/bus/dpaa/base/qbman/qman.c b/drivers/bus/dpaa/base/qbman/qman.c
index 79017f7f2..96208bc40 100644
--- a/drivers/bus/dpaa/base/qbman/qman.c
+++ b/drivers/bus/dpaa/base/qbman/qman.c
@@ -664,6 +664,12 @@ qman_free_global_portal(struct qman_portal *portal)
 	return -1;
 }
 
+void
+qman_portal_uninhibit_isr(struct qman_portal *portal)
+{
+	qm_isr_uninhibit(&portal->p);
+}
+
 struct qman_portal *qman_create_affine_portal(const struct qm_portal_config *c,
 					      const struct qman_cgrs *cgrs)
 {
@@ -1053,6 +1059,20 @@ int qman_irqsource_add(u32 bits)
 	dpaa_set_bits(bits, &p->irq_sources);
 	qm_isr_enable_write(&p->p, p->irq_sources);
 
+	return 0;
+}
+
+int qman_fq_portal_irqsource_add(struct qman_portal *p, u32 bits)
+{
+	bits = bits & QM_PIRQ_VISIBLE;
+
+	/* Clear any previously remaining interrupt conditions in
+	 * QCSP_ISR. This prevents raising a false interrupt when
+	 * interrupt conditions are enabled in QCSP_IER.
+	 */
+	qm_isr_status_clear(&p->p, bits);
+	dpaa_set_bits(bits, &p->irq_sources);
+	qm_isr_enable_write(&p->p, p->irq_sources);
 
 	return 0;
 }
@@ -1083,6 +1103,31 @@ int qman_irqsource_remove(u32 bits)
 	return 0;
 }
 
+int qman_fq_portal_irqsource_remove(struct qman_portal *p, u32 bits)
+{
+	u32 ier;
+
+	/* Our interrupt handler only processes+clears status register bits that
+	 * are in p->irq_sources. As we're trimming that mask, if one of them
+	 * were to assert in the status register just before we remove it from
+	 * the enable register, there would be an interrupt-storm when we
+	 * release the IRQ lock. So we wait for the enable register update to
+	 * take effect in h/w (by reading it back) and then clear all other bits
+	 * in the status register. Ie. we clear them from ISR once it's certain
+	 * IER won't allow them to reassert.
+	 */
+
+	bits &= QM_PIRQ_VISIBLE;
+	dpaa_clear_bits(bits, &p->irq_sources);
+	qm_isr_enable_write(&p->p, p->irq_sources);
+	ier = qm_isr_enable_read(&p->p);
+	/* Using "~ier" (rather than "bits" or "~p->irq_sources") creates a
+	 * data-dependency, ie. to protect against re-ordering.
+	 */
+	qm_isr_status_clear(&p->p, ~ier);
+	return 0;
+}
+
 u16 qman_affine_channel(int cpu)
 {
 	if (cpu < 0) {
diff --git a/drivers/bus/dpaa/base/qbman/qman_driver.c b/drivers/bus/dpaa/base/qbman/qman_driver.c
index acd003143..69244ef70 100644
--- a/drivers/bus/dpaa/base/qbman/qman_driver.c
+++ b/drivers/bus/dpaa/base/qbman/qman_driver.c
@@ -121,6 +121,11 @@ void qman_thread_irq(void)
 	out_be32(qpcfg.addr_virt[DPAA_PORTAL_CI] + 0x36C0, 0);
 }
 
+void qman_fq_portal_thread_irq(struct qman_portal *qp)
+{
+	qman_portal_uninhibit_isr(qp);
+}
+
 struct qman_portal *fsl_qman_fq_portal_create(int *fd)
 {
 	struct qman_portal *portal = NULL;
diff --git a/drivers/bus/dpaa/base/qbman/qman_priv.h b/drivers/bus/dpaa/base/qbman/qman_priv.h
index 97d5521a8..8254729e6 100644
--- a/drivers/bus/dpaa/base/qbman/qman_priv.h
+++ b/drivers/bus/dpaa/base/qbman/qman_priv.h
@@ -157,6 +157,8 @@ qman_init_portal(struct qman_portal *portal,
 struct qman_portal *qman_alloc_global_portal(struct qm_portal_config *q_pcfg);
 int qman_free_global_portal(struct qman_portal *portal);
 
+void qman_portal_uninhibit_isr(struct qman_portal *portal);
+
 struct qm_portal_config *qm_get_unused_portal(void);
 struct qm_portal_config *qm_get_unused_portal_idx(uint32_t idx);
 
diff --git a/drivers/bus/dpaa/include/fsl_usd.h b/drivers/bus/dpaa/include/fsl_usd.h
index a407e2b22..3c26d6ccb 100644
--- a/drivers/bus/dpaa/include/fsl_usd.h
+++ b/drivers/bus/dpaa/include/fsl_usd.h
@@ -67,6 +67,7 @@ int bman_thread_fd(void);
  */
 void qman_thread_irq(void);
 void bman_thread_irq(void);
+void qman_fq_portal_thread_irq(struct qman_portal *qp);
 
 void qman_clear_irq(void);
 
diff --git a/drivers/bus/dpaa/rte_bus_dpaa_version.map b/drivers/bus/dpaa/rte_bus_dpaa_version.map
index f779469f9..962b952d3 100644
--- a/drivers/bus/dpaa/rte_bus_dpaa_version.map
+++ b/drivers/bus/dpaa/rte_bus_dpaa_version.map
@@ -127,6 +127,9 @@ DPDK_19.05 {
 DPDK_19.11 {
 	global:
 	fsl_qman_fq_portal_create;
+	qman_fq_portal_irqsource_add;
+	qman_fq_portal_irqsource_remove;
+	qman_fq_portal_thread_irq;
 
 	local: *;
 } DPDK_19.05;
diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
index 1934f85ae..42ab3d05f 100644
--- a/drivers/net/dpaa/dpaa_ethdev.c
+++ b/drivers/net/dpaa/dpaa_ethdev.c
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  *
  *   Copyright 2016 Freescale Semiconductor, Inc. All rights reserved.
- *   Copyright 2017 NXP
+ *   Copyright 2017-2019 NXP
  *
  */
 /* System headers */
@@ -1013,6 +1013,40 @@ dpaa_dev_set_mac_addr(struct rte_eth_dev *dev,
 	return ret;
 }
 
+static int dpaa_dev_queue_intr_enable(struct rte_eth_dev *dev,
+				      uint16_t queue_id)
+{
+	struct dpaa_if *dpaa_intf = dev->data->dev_private;
+	struct qman_fq *rxq = &dpaa_intf->rx_queues[queue_id];
+
+	if (!rxq->is_static)
+		return -EINVAL;
+
+	return qman_fq_portal_irqsource_add(rxq->qp, QM_PIRQ_DQRI);
+}
+
+static int dpaa_dev_queue_intr_disable(struct rte_eth_dev *dev,
+				       uint16_t queue_id)
+{
+	struct dpaa_if *dpaa_intf = dev->data->dev_private;
+	struct qman_fq *rxq = &dpaa_intf->rx_queues[queue_id];
+	uint32_t temp;
+	ssize_t temp1;
+
+	if (!rxq->is_static)
+		return -EINVAL;
+
+	qman_fq_portal_irqsource_remove(rxq->qp, ~0);
+
+	temp1 = read(rxq->q_fd, &temp, sizeof(temp));
+	if (temp1 != sizeof(temp))
+		DPAA_EVENTDEV_ERR("irq read error");
+
+	qman_fq_portal_thread_irq(rxq->qp);
+
+	return 0;
+}
+
 static struct eth_dev_ops dpaa_devops = {
 	.dev_configure		  = dpaa_eth_dev_configure,
 	.dev_start		  = dpaa_eth_dev_start,
@@ -1050,6 +1084,9 @@ static struct eth_dev_ops dpaa_devops = {
 	.mac_addr_set		  = dpaa_dev_set_mac_addr,
 
 	.fw_version_get		  = dpaa_fw_version_get,
+
+	.rx_queue_intr_enable	  = dpaa_dev_queue_intr_enable,
+	.rx_queue_intr_disable	  = dpaa_dev_queue_intr_disable,
 };
 
 static bool
-- 
2.17.1

[dpdk-dev] [PATCH v1 07/30] net/dpaa: add SG support in Tx for non DPAA buffer

[Sachin Saxena]

From: Nipun Gupta <nipun.gupta@nxp.com>

This patch adds support for Scatter Gather
in the transmit side, for the cases where the
buffer are received which are not from DPAA
buffer pool.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
---
 drivers/net/dpaa/dpaa_rxtx.c | 189 +++++++++++++++++++----------------
 1 file changed, 101 insertions(+), 88 deletions(-)

diff --git a/drivers/net/dpaa/dpaa_rxtx.c b/drivers/net/dpaa/dpaa_rxtx.c
index 220c3477d..2de1a1a7e 100644
--- a/drivers/net/dpaa/dpaa_rxtx.c
+++ b/drivers/net/dpaa/dpaa_rxtx.c
@@ -642,53 +642,6 @@ uint16_t dpaa_eth_queue_rx(void *q,
 	return num_rx;
 }
 
-static void *dpaa_get_pktbuf(struct dpaa_bp_info *bp_info)
-{
-	int ret;
-	size_t buf = 0;
-	struct bm_buffer bufs;
-
-	ret = bman_acquire(bp_info->bp, &bufs, 1, 0);
-	if (ret <= 0) {
-		DPAA_PMD_WARN("Failed to allocate buffers %d", ret);
-		return (void *)buf;
-	}
-
-	DPAA_DP_LOG(DEBUG, "got buffer 0x%" PRIx64 " from pool %d",
-		    (uint64_t)bufs.addr, bufs.bpid);
-
-	buf = (size_t)DPAA_MEMPOOL_PTOV(bp_info, bufs.addr)
-				- bp_info->meta_data_size;
-	if (!buf)
-		goto out;
-
-out:
-	return (void *)buf;
-}
-
-static struct rte_mbuf *dpaa_get_dmable_mbuf(struct rte_mbuf *mbuf,
-					     struct dpaa_if *dpaa_intf)
-{
-	struct rte_mbuf *dpaa_mbuf;
-
-	/* allocate pktbuffer on bpid for dpaa port */
-	dpaa_mbuf = dpaa_get_pktbuf(dpaa_intf->bp_info);
-	if (!dpaa_mbuf)
-		return NULL;
-
-	memcpy((uint8_t *)(dpaa_mbuf->buf_addr) + RTE_PKTMBUF_HEADROOM, (void *)
-		((uint8_t *)(mbuf->buf_addr) + mbuf->data_off), mbuf->pkt_len);
-
-	/* Copy only the required fields */
-	dpaa_mbuf->data_off = RTE_PKTMBUF_HEADROOM;
-	dpaa_mbuf->pkt_len = mbuf->pkt_len;
-	dpaa_mbuf->ol_flags = mbuf->ol_flags;
-	dpaa_mbuf->packet_type = mbuf->packet_type;
-	dpaa_mbuf->tx_offload = mbuf->tx_offload;
-	rte_pktmbuf_free(mbuf);
-	return dpaa_mbuf;
-}
-
 int
 dpaa_eth_mbuf_to_sg_fd(struct rte_mbuf *mbuf,
 		struct qm_fd *fd,
@@ -862,26 +815,84 @@ tx_on_dpaa_pool(struct rte_mbuf *mbuf,
 }
 
 /* Handle all mbufs on an external pool (non-dpaa) */
-static inline uint16_t
-tx_on_external_pool(struct qman_fq *txq, struct rte_mbuf *mbuf,
-		    struct qm_fd *fd_arr)
+static inline struct rte_mbuf *
+reallocate_mbuf(struct qman_fq *txq, struct rte_mbuf *mbuf)
 {
 	struct dpaa_if *dpaa_intf = txq->dpaa_intf;
-	struct rte_mbuf *dmable_mbuf;
+	struct dpaa_bp_info *bp_info = dpaa_intf->bp_info;
+	struct rte_mbuf *new_mbufs[DPAA_SGT_MAX_ENTRIES + 1] = {0};
+	struct rte_mbuf *temp_mbuf;
+	int num_new_segs, mbuf_greater, ret, extra_seg = 0, i = 0;
+	uint64_t mbufs_size, bytes_to_copy, offset1 = 0, offset2 = 0;
+	char *data;
+
+	DPAA_DP_LOG(DEBUG, "Reallocating transmit buffer");
+
+	mbufs_size = bp_info->size -
+		bp_info->meta_data_size - RTE_PKTMBUF_HEADROOM;
+	extra_seg = !!(mbuf->pkt_len % mbufs_size);
+	num_new_segs = (mbuf->pkt_len / mbufs_size) + extra_seg;
+
+	ret = rte_pktmbuf_alloc_bulk(bp_info->mp, new_mbufs, num_new_segs);
+	if (ret != 0) {
+		DPAA_DP_LOG(DEBUG, "Allocation for new buffers failed");
+		return NULL;
+	}
 
-	DPAA_DP_LOG(DEBUG, "Non-BMAN offloaded buffer."
-		    "Allocating an offloaded buffer");
-	dmable_mbuf = dpaa_get_dmable_mbuf(mbuf, dpaa_intf);
-	if (!dmable_mbuf) {
-		DPAA_DP_LOG(DEBUG, "no dpaa buffers.");
-		return 1;
+	temp_mbuf = mbuf;
+
+	while (temp_mbuf) {
+		/* If mbuf data is less than new mbuf remaining memory */
+		if ((temp_mbuf->data_len - offset1) < (mbufs_size - offset2)) {
+			bytes_to_copy = temp_mbuf->data_len - offset1;
+			mbuf_greater = -1;
+		/* If mbuf data is greater than new mbuf remaining memory */
+		} else if ((temp_mbuf->data_len - offset1) >
+			   (mbufs_size - offset2)) {
+			bytes_to_copy = mbufs_size - offset2;
+			mbuf_greater = 1;
+		/* if mbuf data is equal to new mbuf remaining memory */
+		} else {
+			bytes_to_copy = temp_mbuf->data_len - offset1;
+			mbuf_greater = 0;
+		}
+
+		/* Copy the data */
+		data = rte_pktmbuf_append(new_mbufs[0], bytes_to_copy);
+
+		rte_memcpy((uint8_t *)data, rte_pktmbuf_mtod_offset(mbuf,
+			   void *, offset1), bytes_to_copy);
+
+		/* Set new offsets and the temp buffers */
+		if (mbuf_greater == -1) {
+			offset1 = 0;
+			offset2 += bytes_to_copy;
+			temp_mbuf = temp_mbuf->next;
+		} else if (mbuf_greater == 1) {
+			offset2 = 0;
+			offset1 += bytes_to_copy;
+			new_mbufs[i]->next = new_mbufs[i + 1];
+			new_mbufs[0]->nb_segs++;
+			i++;
+		} else {
+			offset1 = 0;
+			offset2 = 0;
+			temp_mbuf = temp_mbuf->next;
+			new_mbufs[i]->next = new_mbufs[i + 1];
+			if (new_mbufs[i + 1])
+				new_mbufs[0]->nb_segs++;
+			i++;
+		}
 	}
 
-	DPAA_MBUF_TO_CONTIG_FD(dmable_mbuf, fd_arr, dpaa_intf->bp_info->bpid);
-	if (mbuf->ol_flags & DPAA_TX_CKSUM_OFFLOAD_MASK)
-		dpaa_unsegmented_checksum(mbuf, fd_arr);
+	/* Copy other required fields */
+	new_mbufs[0]->ol_flags = mbuf->ol_flags;
+	new_mbufs[0]->packet_type = mbuf->packet_type;
+	new_mbufs[0]->tx_offload = mbuf->tx_offload;
 
-	return 0;
+	rte_pktmbuf_free(mbuf);
+
+	return new_mbufs[0];
 }
 
 uint16_t
@@ -893,7 +904,7 @@ dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs)
 	struct qm_fd fd_arr[DPAA_TX_BURST_SIZE];
 	uint32_t frames_to_send, loop, sent = 0;
 	uint16_t state;
-	int ret;
+	int ret, realloc_mbuf = 0;
 	uint32_t seqn, index, flags[DPAA_TX_BURST_SIZE] = {0};
 
 	if (unlikely(!RTE_PER_LCORE(dpaa_io))) {
@@ -911,6 +922,13 @@ dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs)
 				DPAA_TX_BURST_SIZE : nb_bufs;
 		for (loop = 0; loop < frames_to_send; loop++) {
 			mbuf = *(bufs++);
+			/* In case the data offset is not multiple of 16,
+			 * FMAN can stall because of an errata. So reallocate
+			 * the buffer in such case.
+			 */
+			if (dpaa_svr_family == SVR_LS1043A_FAMILY &&
+					(mbuf->data_off & 0xFF) != 0x0)
+				realloc_mbuf = 1;
 			seqn = mbuf->seqn;
 			if (seqn != DPAA_INVALID_MBUF_SEQN) {
 				index = seqn - 1;
@@ -930,6 +948,7 @@ dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs)
 				if (likely(mp->ops_index ==
 						bp_info->dpaa_ops_index &&
 					mbuf->nb_segs == 1 &&
+					realloc_mbuf == 0 &&
 					rte_mbuf_refcnt_read(mbuf) == 1)) {
 					DPAA_MBUF_TO_CONTIG_FD(mbuf,
 						&fd_arr[loop], bp_info->bpid);
@@ -945,32 +964,12 @@ dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs)
 			}
 
 			bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp);
-			if (likely(mp->ops_index == bp_info->dpaa_ops_index)) {
-				state = tx_on_dpaa_pool(mbuf, bp_info,
-							&fd_arr[loop]);
-				if (unlikely(state)) {
-					/* Set frames_to_send & nb_bufs so
-					 * that packets are transmitted till
-					 * previous frame.
-					 */
-					frames_to_send = loop;
-					nb_bufs = loop;
-					goto send_pkts;
-				}
-			} else {
-				/* TODO not supporting sg for external bufs*/
-				if (unlikely(mbuf->nb_segs > 1)) {
-					/* Set frames_to_send & nb_bufs so
-					 * that packets are transmitted till
-					 * previous frame.
-					 */
-					frames_to_send = loop;
-					nb_bufs = loop;
-					goto send_pkts;
-				}
-				state = tx_on_external_pool(q, mbuf,
-							    &fd_arr[loop]);
-				if (unlikely(state)) {
+			if (unlikely(mp->ops_index != bp_info->dpaa_ops_index ||
+				     realloc_mbuf == 1)) {
+				struct rte_mbuf *temp_mbuf;
+
+				temp_mbuf = reallocate_mbuf(q, mbuf);
+				if (!temp_mbuf) {
 					/* Set frames_to_send & nb_bufs so
 					 * that packets are transmitted till
 					 * previous frame.
@@ -979,6 +978,20 @@ dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs)
 					nb_bufs = loop;
 					goto send_pkts;
 				}
+				mbuf = temp_mbuf;
+				realloc_mbuf = 0;
+			}
+
+			state = tx_on_dpaa_pool(mbuf, bp_info,
+						&fd_arr[loop]);
+			if (unlikely(state)) {
+				/* Set frames_to_send & nb_bufs so
+				 * that packets are transmitted till
+				 * previous frame.
+				 */
+				frames_to_send = loop;
+				nb_bufs = loop;
+				goto send_pkts;
 			}
 		}
 
-- 
2.17.1

[dpdk-dev] [PATCH v1 08/30] net/dpaa: reduce debug messages

[Sachin Saxena]

From: Hemant Agrawal <hemant.agrawal@nxp.com>

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Reviewed-by: Sachin Saxena <sachin.saxena@nxp.com>
---
 drivers/net/dpaa/dpaa_ethdev.c | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
index 42ab3d05f..dc2e584b1 100644
--- a/drivers/net/dpaa/dpaa_ethdev.c
+++ b/drivers/net/dpaa/dpaa_ethdev.c
@@ -335,7 +335,7 @@ static void dpaa_eth_dev_info(struct rte_eth_dev *dev,
 {
 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
 
-	PMD_INIT_FUNC_TRACE();
+	DPAA_PMD_DEBUG(": %s", dpaa_intf->name);
 
 	dev_info->max_rx_queues = dpaa_intf->nb_rx_queues;
 	dev_info->max_tx_queues = dpaa_intf->nb_tx_queues;
@@ -1172,8 +1172,6 @@ static int dpaa_rx_queue_init(struct qman_fq *fq, struct qman_cgr *cgr_rx,
 		}
 	};
 
-	PMD_INIT_FUNC_TRACE();
-
 	if (fqid) {
 		ret = qman_reserve_fqid(fqid);
 		if (ret) {
@@ -1225,8 +1223,6 @@ static int dpaa_tx_queue_init(struct qman_fq *fq,
 	struct qm_mcc_initfq opts = {0};
 	int ret;
 
-	PMD_INIT_FUNC_TRACE();
-
 	ret = qman_create_fq(0, QMAN_FQ_FLAG_DYNAMIC_FQID |
 			     QMAN_FQ_FLAG_TO_DCPORTAL, fq);
 	if (ret) {
-- 
2.17.1

[dpdk-dev] [PATCH v1 09/30] net/dpaa2: improve the Rx offload debug message

[Sachin Saxena]

From: Hemant Agrawal <hemant.agrawal@nxp.com>

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/net/dpaa2/dpaa2_ethdev.c | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index dd6a78f9f..bbebb66fe 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -395,20 +395,20 @@ dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
 
 	PMD_INIT_FUNC_TRACE();
 
-	/* Rx offloads validation */
+	/* Rx offloads which are enabled by default */
 	if (dev_rx_offloads_nodis & ~rx_offloads) {
-		DPAA2_PMD_WARN(
-		"Rx offloads non configurable - requested 0x%" PRIx64
-		" ignored 0x%" PRIx64,
-			rx_offloads, dev_rx_offloads_nodis);
+		DPAA2_PMD_INFO(
+		"Some of rx offloads enabled by default - requested 0x%" PRIx64
+		" fixed are 0x%" PRIx64,
+		rx_offloads, dev_rx_offloads_nodis);
 	}
 
-	/* Tx offloads validation */
+	/* Tx offloads which are enabled by default */
 	if (dev_tx_offloads_nodis & ~tx_offloads) {
-		DPAA2_PMD_WARN(
-		"Tx offloads non configurable - requested 0x%" PRIx64
-		" ignored 0x%" PRIx64,
-			tx_offloads, dev_tx_offloads_nodis);
+		DPAA2_PMD_INFO(
+		"Some of tx offloads enabled by default - requested 0x%" PRIx64
+		" fixed are 0x%" PRIx64,
+		tx_offloads, dev_tx_offloads_nodis);
 	}
 
 	if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
-- 
2.17.1

[dpdk-dev] [PATCH v1 10/30] common/dpaax: reduce debug mesages

[Sachin Saxena]

From: Hemant Agrawal <hemant.agrawal@nxp.com>

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Reviewed-by: Sachin Saxena <sachin.saxena@nxp.com>
---
 drivers/common/dpaax/dpaax_iova_table.c | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/drivers/common/dpaax/dpaax_iova_table.c b/drivers/common/dpaax/dpaax_iova_table.c
index ae0af0919..43c9c72e6 100644
--- a/drivers/common/dpaax/dpaax_iova_table.c
+++ b/drivers/common/dpaax/dpaax_iova_table.c
@@ -140,7 +140,8 @@ read_memory_node(unsigned int *count)
 
 	DPAAX_DEBUG("Device-tree memory node data:");
 	do {
-		DPAAX_DEBUG("\n    %08" PRIx64 " %08zu", nodes[j].addr, nodes[j].len);
+		DPAAX_DEBUG("    %08" PRIx64 " %08zu",
+			    nodes[j].addr, nodes[j].len);
 	} while (--j);
 
 cleanup:
@@ -241,7 +242,7 @@ dpaax_iova_table_populate(void)
 	/* Release memory associated with nodes array - not required now */
 	free(nodes);
 
-	DPAAX_DEBUG("Adding mem-event handler\n");
+	DPAAX_DEBUG("Adding mem-event handler");
 	ret = dpaax_handle_memevents();
 	if (ret) {
 		DPAAX_ERR("Unable to add mem-event handler");
@@ -306,10 +307,11 @@ dpaax_iova_table_update(phys_addr_t paddr, void *vaddr, size_t length)
 			 * case.
 			 */
 			entry[i].pages[e_offset] = align_vaddr;
+#ifdef RTE_COMMON_DPAAX_DEBUG
 			DPAAX_DEBUG("Added: vaddr=%zu for Phy:%"PRIu64" at %zu"
 				    " remaining len %zu", align_vaddr,
 				    align_paddr, e_offset, req_length);
-
+#endif
 			/* Incoming request can be larger than the
 			 * DPAAX_MEM_SPLIT size - in which case, multiple
 			 * entries in entry->pages[] are filled up.
@@ -336,10 +338,11 @@ dpaax_iova_table_update(phys_addr_t paddr, void *vaddr, size_t length)
 			    vaddr, paddr);
 		return -1;
 	}
-
+#ifdef RTE_COMMON_DPAAX_DEBUG
 	DPAAX_DEBUG("Add: Found slot at (%"PRIu64")[(%zu)] for vaddr:(%p),"
 		    " phy(%"PRIu64"), len(%zu)", entry[i].start, e_offset,
 		    vaddr, paddr, length);
+#endif
 	return 0;
 }
 
@@ -404,13 +407,13 @@ dpaax_memevent_cb(enum rte_mem_event type, const void *addr, size_t len,
 		phys_addr = rte_mem_virt2phy(ms->addr);
 		virt_addr = ms->addr;
 		map_len = ms->len;
-
+#ifdef RTE_COMMON_DPAAX_DEBUG
 		DPAAX_DEBUG("Request for %s, va=%p, virt_addr=%p,"
 			    "iova=%"PRIu64", map_len=%zu",
 			    type == RTE_MEM_EVENT_ALLOC ?
 			    "alloc" : "dealloc",
 			    va, virt_addr, phys_addr, map_len);
-
+#endif
 		if (type == RTE_MEM_EVENT_ALLOC)
 			ret = dpaax_iova_table_update(phys_addr, virt_addr,
 						      map_len);
-- 
2.17.1

[dpdk-dev] [PATCH v1 11/30] mempool/dpaa: reduce debug messages

[Sachin Saxena]

From: Hemant Agrawal <hemant.agrawal@nxp.com>

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Reviewed-by: Sachin Saxena <sachin.saxena@nxp.com>
---
 drivers/mempool/dpaa/dpaa_mempool.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/mempool/dpaa/dpaa_mempool.c b/drivers/mempool/dpaa/dpaa_mempool.c
index c371d3a6b..a25697f05 100644
--- a/drivers/mempool/dpaa/dpaa_mempool.c
+++ b/drivers/mempool/dpaa/dpaa_mempool.c
@@ -298,8 +298,6 @@ dpaa_populate(struct rte_mempool *mp, unsigned int max_objs,
 	struct dpaa_bp_info *bp_info;
 	unsigned int total_elt_sz;
 
-	MEMPOOL_INIT_FUNC_TRACE();
-
 	if (!mp || !mp->pool_data) {
 		DPAA_MEMPOOL_ERR("Invalid mempool provided\n");
 		return 0;
@@ -311,7 +309,7 @@ dpaa_populate(struct rte_mempool *mp, unsigned int max_objs,
 	bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp);
 	total_elt_sz = mp->header_size + mp->elt_size + mp->trailer_size;
 
-	DPAA_MEMPOOL_DEBUG("Req size %" PRIx64 " vs Available %u\n",
+	DPAA_MEMPOOL_DPDEBUG("Req size %" PRIx64 " vs Available %u\n",
 			   (uint64_t)len, total_elt_sz * mp->size);
 
 	/* Detect pool area has sufficient space for elements in this memzone */
-- 
2.17.1

[dpdk-dev] [PATCH v1 12/30] net/dpaa2: realign Rx offload support types

[Sachin Saxena]

From: Hemant Agrawal <hemant.agrawal@nxp.com>

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/net/dpaa2/dpaa2_ethdev.c | 19 ++++++++++---------
 1 file changed, 10 insertions(+), 9 deletions(-)

diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index bbebb66fe..130fb5297 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -32,11 +32,11 @@
 
 /* Supported Rx offloads */
 static uint64_t dev_rx_offloads_sup =
-		DEV_RX_OFFLOAD_VLAN_STRIP |
-		DEV_RX_OFFLOAD_IPV4_CKSUM |
-		DEV_RX_OFFLOAD_UDP_CKSUM |
-		DEV_RX_OFFLOAD_TCP_CKSUM |
+		DEV_RX_OFFLOAD_CHECKSUM |
+		DEV_RX_OFFLOAD_SCTP_CKSUM |
 		DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
+		DEV_RX_OFFLOAD_OUTER_UDP_CKSUM |
+		DEV_RX_OFFLOAD_VLAN_STRIP |
 		DEV_RX_OFFLOAD_VLAN_FILTER |
 		DEV_RX_OFFLOAD_JUMBO_FRAME;
 
@@ -51,13 +51,13 @@ static uint64_t dev_tx_offloads_sup =
 		DEV_TX_OFFLOAD_UDP_CKSUM |
 		DEV_TX_OFFLOAD_TCP_CKSUM |
 		DEV_TX_OFFLOAD_SCTP_CKSUM |
-		DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM;
+		DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
+		DEV_TX_OFFLOAD_MT_LOCKFREE |
+		DEV_TX_OFFLOAD_MBUF_FAST_FREE;
 
 /* Tx offloads which cannot be disabled */
 static uint64_t dev_tx_offloads_nodis =
-		DEV_TX_OFFLOAD_MULTI_SEGS |
-		DEV_TX_OFFLOAD_MT_LOCKFREE |
-		DEV_TX_OFFLOAD_MBUF_FAST_FREE;
+		DEV_TX_OFFLOAD_MULTI_SEGS;
 
 /* enable timestamp in mbuf */
 enum pmd_dpaa2_ts dpaa2_enable_ts;
@@ -439,7 +439,8 @@ dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
 		rx_l3_csum_offload = true;
 
 	if ((rx_offloads & DEV_RX_OFFLOAD_UDP_CKSUM) ||
-		(rx_offloads & DEV_RX_OFFLOAD_TCP_CKSUM))
+		(rx_offloads & DEV_RX_OFFLOAD_TCP_CKSUM) ||
+		(rx_offloads & DEV_RX_OFFLOAD_SCTP_CKSUM))
 		rx_l4_csum_offload = true;
 
 	ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
-- 
2.17.1

[dpdk-dev] [PATCH v1 13/30] net/dpaa2: enable Rx offload for timestamp

[Sachin Saxena]

From: Hemant Agrawal <hemant.agrawal@nxp.com>

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/net/dpaa2/dpaa2_ethdev.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 130fb5297..4689cf9a4 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -38,7 +38,8 @@ static uint64_t dev_rx_offloads_sup =
 		DEV_RX_OFFLOAD_OUTER_UDP_CKSUM |
 		DEV_RX_OFFLOAD_VLAN_STRIP |
 		DEV_RX_OFFLOAD_VLAN_FILTER |
-		DEV_RX_OFFLOAD_JUMBO_FRAME;
+		DEV_RX_OFFLOAD_JUMBO_FRAME |
+		DEV_RX_OFFLOAD_TIMESTAMP;
 
 /* Rx offloads which cannot be disabled */
 static uint64_t dev_rx_offloads_nodis =
@@ -457,6 +458,9 @@ dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
 		return ret;
 	}
 
+	if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
+		dpaa2_enable_ts = true;
+
 	if (tx_offloads & DEV_TX_OFFLOAD_IPV4_CKSUM)
 		tx_l3_csum_offload = true;
 
-- 
2.17.1

[dpdk-dev] [PATCH v1 14/30] net/dpaa2: support L2 payload based RSS distribution

[Sachin Saxena]

From: Hemant Agrawal <hemant.agrawal@nxp.com>

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/net/dpaa2/dpaa2_ethdev.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index 33b1506aa..69ab577f5 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -54,6 +54,7 @@
 #define DPAA2_RX_TAILDROP_OFF	0x04
 
 #define DPAA2_RSS_OFFLOAD_ALL ( \
+	ETH_RSS_L2_PAYLOAD | \
 	ETH_RSS_IP | \
 	ETH_RSS_UDP | \
 	ETH_RSS_TCP | \
-- 
2.17.1

[dpdk-dev] [PATCH v1 15/30] net/dpaa2: add optional non-prefetch Rx mode

[Sachin Saxena]

From: Nipun Gupta <nipun.gupta@nxp.com>

When we need particular number of packets from the rx routine,
which would change in every call, we cannot prefetch the packets
and provide previous results to the user.

User can select the mode by using devargs for non pretech mode.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
---
 doc/guides/nics/dpaa2.rst        |   4 ++
 drivers/net/dpaa2/dpaa2_ethdev.c |  11 +++-
 drivers/net/dpaa2/dpaa2_ethdev.h |   2 +
 drivers/net/dpaa2/dpaa2_rxtx.c   | 105 +++++++++++++++++++++++++++++++
 4 files changed, 121 insertions(+), 1 deletion(-)

diff --git a/doc/guides/nics/dpaa2.rst b/doc/guides/nics/dpaa2.rst
index a698e5ab6..99e4c8d72 100644
--- a/doc/guides/nics/dpaa2.rst
+++ b/doc/guides/nics/dpaa2.rst
@@ -504,6 +504,10 @@ for details.
   driver level. Any packet received will be reflected back by the
   driver on same port. e.g. ``fslmc:dpni.1,drv_loopback=1``
 
+* Use dev arg option ``drv_no_prefetch=1`` to disable prefetching
+  of the packet pull command which is issued  in the previous cycle.
+  e.g. ``fslmc:dpni.1,drv_no_prefetch=1``
+
 Enabling logs
 -------------
 
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 4689cf9a4..f25cdfb3d 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -29,6 +29,7 @@
 #include <fsl_qbman_debug.h>
 
 #define DRIVER_LOOPBACK_MODE "drv_loopback"
+#define DRIVER_NO_PREFETCH_MODE "drv_no_prefetch"
 
 /* Supported Rx offloads */
 static uint64_t dev_rx_offloads_sup =
@@ -750,6 +751,7 @@ dpaa2_supported_ptypes_get(struct rte_eth_dev *dev)
 	};
 
 	if (dev->rx_pkt_burst == dpaa2_dev_prefetch_rx ||
+		dev->rx_pkt_burst == dpaa2_dev_rx ||
 		dev->rx_pkt_burst == dpaa2_dev_loopback_rx)
 		return ptypes;
 	return NULL;
@@ -2118,6 +2120,9 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
 		eth_dev->dev_ops = &dpaa2_ethdev_ops;
 		if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE))
 			eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx;
+		else if (dpaa2_get_devargs(dev->devargs,
+					DRIVER_NO_PREFETCH_MODE))
+			eth_dev->rx_pkt_burst = dpaa2_dev_rx;
 		else
 			eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
 		eth_dev->tx_pkt_burst = dpaa2_dev_tx;
@@ -2236,6 +2241,9 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
 	if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE)) {
 		eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx;
 		DPAA2_PMD_INFO("Loopback mode");
+	} else if (dpaa2_get_devargs(dev->devargs, DRIVER_NO_PREFETCH_MODE)) {
+		eth_dev->rx_pkt_burst = dpaa2_dev_rx;
+		DPAA2_PMD_INFO("No Prefetch mode");
 	} else {
 		eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
 	}
@@ -2395,7 +2403,8 @@ static struct rte_dpaa2_driver rte_dpaa2_pmd = {
 
 RTE_PMD_REGISTER_DPAA2(net_dpaa2, rte_dpaa2_pmd);
 RTE_PMD_REGISTER_PARAM_STRING(net_dpaa2,
-		DRIVER_LOOPBACK_MODE "=<int>");
+		DRIVER_LOOPBACK_MODE "=<int> "
+		DRIVER_NO_PREFETCH_MODE "=<int>");
 RTE_INIT(dpaa2_pmd_init_log)
 {
 	dpaa2_logtype_pmd = rte_log_register("pmd.net.dpaa2");
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index 69ab577f5..a991ccc1d 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -149,6 +149,8 @@ int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev,
 int dpaa2_eth_eventq_detach(const struct rte_eth_dev *dev,
 		int eth_rx_queue_id);
 
+uint16_t dpaa2_dev_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts);
+
 uint16_t dpaa2_dev_loopback_rx(void *queue, struct rte_mbuf **bufs,
 				uint16_t nb_pkts);
 
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index 6ca5071e0..19838180f 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -727,6 +727,111 @@ dpaa2_dev_process_ordered_event(struct qbman_swp *swp,
 	qbman_swp_dqrr_consume(swp, dq);
 }
 
+uint16_t
+dpaa2_dev_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
+{
+	/* Function receive frames for a given device and VQ */
+	struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)queue;
+	struct qbman_result *dq_storage;
+	uint32_t fqid = dpaa2_q->fqid;
+	int ret, num_rx = 0, next_pull = nb_pkts, num_pulled;
+	uint8_t pending, status;
+	struct qbman_swp *swp;
+	const struct qbman_fd *fd, *next_fd;
+	struct qbman_pull_desc pulldesc;
+	struct rte_eth_dev_data *eth_data = dpaa2_q->eth_data;
+
+	if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
+		ret = dpaa2_affine_qbman_swp();
+		if (ret) {
+			DPAA2_PMD_ERR("Failure in affining portal\n");
+			return 0;
+		}
+	}
+	swp = DPAA2_PER_LCORE_PORTAL;
+
+	do {
+		dq_storage = dpaa2_q->q_storage->dq_storage[0];
+		qbman_pull_desc_clear(&pulldesc);
+		qbman_pull_desc_set_fq(&pulldesc, fqid);
+		qbman_pull_desc_set_storage(&pulldesc, dq_storage,
+				(size_t)(DPAA2_VADDR_TO_IOVA(dq_storage)), 1);
+
+		if (next_pull > dpaa2_dqrr_size) {
+			qbman_pull_desc_set_numframes(&pulldesc,
+				dpaa2_dqrr_size);
+			next_pull -= dpaa2_dqrr_size;
+		} else {
+			qbman_pull_desc_set_numframes(&pulldesc, next_pull);
+			next_pull = 0;
+		}
+
+		while (1) {
+			if (qbman_swp_pull(swp, &pulldesc)) {
+				DPAA2_PMD_DP_DEBUG(
+					"VDQ command is not issued.QBMAN is busy\n");
+				/* Portal was busy, try again */
+				continue;
+			}
+			break;
+		}
+
+		rte_prefetch0((void *)((size_t)(dq_storage + 1)));
+		/* Check if the previous issued command is completed. */
+		while (!qbman_check_command_complete(dq_storage))
+			;
+
+		num_pulled = 0;
+		pending = 1;
+		do {
+			/* Loop until the dq_storage is updated with
+			 * new token by QBMAN
+			 */
+			while (!qbman_check_new_result(dq_storage))
+				;
+			rte_prefetch0((void *)((size_t)(dq_storage + 2)));
+			/* Check whether Last Pull command is Expired and
+			 * setting Condition for Loop termination
+			 */
+			if (qbman_result_DQ_is_pull_complete(dq_storage)) {
+				pending = 0;
+				/* Check for valid frame. */
+				status = qbman_result_DQ_flags(dq_storage);
+				if (unlikely((status &
+					QBMAN_DQ_STAT_VALIDFRAME) == 0))
+					continue;
+			}
+			fd = qbman_result_DQ_fd(dq_storage);
+
+			next_fd = qbman_result_DQ_fd(dq_storage + 1);
+			/* Prefetch Annotation address for the parse results */
+			rte_prefetch0(
+				(void *)(size_t)(DPAA2_GET_FD_ADDR(next_fd)
+					+ DPAA2_FD_PTA_SIZE + 16));
+
+			if (unlikely(DPAA2_FD_GET_FORMAT(fd) == qbman_fd_sg))
+				bufs[num_rx] = eth_sg_fd_to_mbuf(fd);
+			else
+				bufs[num_rx] = eth_fd_to_mbuf(fd);
+			bufs[num_rx]->port = eth_data->port_id;
+
+		if (eth_data->dev_conf.rxmode.offloads &
+				DEV_RX_OFFLOAD_VLAN_STRIP) {
+			rte_vlan_strip(bufs[num_rx]);
+		}
+
+			dq_storage++;
+			num_rx++;
+			num_pulled++;
+		} while (pending);
+	/* Last VDQ provided all packets and more packets are requested */
+	} while (next_pull && num_pulled == dpaa2_dqrr_size);
+
+	dpaa2_q->rx_pkts += num_rx;
+
+	return num_rx;
+}
+
 /*
  * Callback to handle sending packets through WRIOP based interface
  */
-- 
2.17.1

[dpdk-dev] [PATCH v1 16/30] net/dpaa2: add taildrop support on frame count basis

[Sachin Saxena]

From: Hemant Agrawal <hemant.agrawal@nxp.com>

The existing taildrop was based on queue data size.
This patch replaces it with frame count bases using
CGR methods of DPAA2 device.
The number of CGRs are limited. So,
- use per queue CGR based tail drop for as many as CGR
available.
- Remaining queues shall use the legacy byte based tail drop

Number of CGRs can be controlled by dpl file during dpni_create.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/bus/fslmc/portal/dpaa2_hw_pvt.h |   5 +-
 drivers/net/dpaa2/dpaa2_ethdev.c        | 112 +++++++++++++++++++++---
 drivers/net/dpaa2/dpaa2_ethdev.h        |   6 +-
 3 files changed, 106 insertions(+), 17 deletions(-)

diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index 4bb6b26c7..7f7e2fd78 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -145,10 +145,10 @@ struct dpaa2_queue {
 		struct rte_eth_dev_data *eth_data;
 		struct rte_cryptodev_data *crypto_data;
 	};
-	int32_t eventfd;	/*!< Event Fd of this queue */
 	uint32_t fqid;		/*!< Unique ID of this queue */
-	uint8_t tc_index;	/*!< traffic class identifier */
 	uint16_t flow_id;	/*!< To be used by DPAA2 frmework */
+	uint8_t tc_index;	/*!< traffic class identifier */
+	uint8_t cgid;		/*! < Congestion Group id for this queue */
 	uint64_t rx_pkts;
 	uint64_t tx_pkts;
 	uint64_t err_pkts;
@@ -157,6 +157,7 @@ struct dpaa2_queue {
 		struct qbman_result *cscn;
 	};
 	struct rte_event ev;
+	int32_t eventfd;	/*!< Event Fd of this queue */
 	dpaa2_queue_cb_dqrr_t *cb;
 	dpaa2_queue_cb_eqresp_free_t *cb_eqresp_free;
 	struct dpaa2_bp_info *bp_array;
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index f25cdfb3d..b30f37ecb 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -514,7 +514,7 @@ dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
 static int
 dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
 			 uint16_t rx_queue_id,
-			 uint16_t nb_rx_desc __rte_unused,
+			 uint16_t nb_rx_desc,
 			 unsigned int socket_id __rte_unused,
 			 const struct rte_eth_rxconf *rx_conf __rte_unused,
 			 struct rte_mempool *mb_pool)
@@ -526,7 +526,7 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
 	uint8_t options = 0;
 	uint8_t flow_id;
 	uint32_t bpid;
-	int ret;
+	int i, ret;
 
 	PMD_INIT_FUNC_TRACE();
 
@@ -545,12 +545,28 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
 	dpaa2_q->bp_array = rte_dpaa2_bpid_info;
 
 	/*Get the flow id from given VQ id*/
-	flow_id = rx_queue_id % priv->nb_rx_queues;
+	flow_id = dpaa2_q->flow_id;
 	memset(&cfg, 0, sizeof(struct dpni_queue));
 
 	options = options | DPNI_QUEUE_OPT_USER_CTX;
 	cfg.user_context = (size_t)(dpaa2_q);
 
+	/* check if a private cgr available. */
+	for (i = 0; i < priv->max_cgs; i++) {
+		if (!priv->cgid_in_use[i]) {
+			priv->cgid_in_use[i] = 1;
+			break;
+		}
+	}
+
+	if (i < priv->max_cgs) {
+		options |= DPNI_QUEUE_OPT_SET_CGID;
+		cfg.cgid = i;
+		dpaa2_q->cgid = cfg.cgid;
+	} else {
+		dpaa2_q->cgid = 0xff;
+	}
+
 	/*if ls2088 or rev2 device, enable the stashing */
 
 	if ((dpaa2_svr_family & 0xffff0000) != SVR_LS2080A) {
@@ -579,15 +595,56 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
 		struct dpni_taildrop taildrop;
 
 		taildrop.enable = 1;
-		/*enabling per rx queue congestion control */
-		taildrop.threshold = CONG_THRESHOLD_RX_Q;
-		taildrop.units = DPNI_CONGESTION_UNIT_BYTES;
-		taildrop.oal = CONG_RX_OAL;
-		DPAA2_PMD_DEBUG("Enabling Early Drop on queue = %d",
-				rx_queue_id);
-		ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
+
+		/* Private CGR will use tail drop length as nb_rx_desc.
+		 * for rest cases we can use standard byte based tail drop.
+		 * There is no HW restriction, but number of CGRs are limited,
+		 * hence this restriction is placed.
+		 */
+		if (dpaa2_q->cgid != 0xff) {
+			/*enabling per rx queue congestion control */
+			taildrop.threshold = nb_rx_desc;
+			taildrop.units = DPNI_CONGESTION_UNIT_FRAMES;
+			taildrop.oal = 0;
+			DPAA2_PMD_DEBUG("Enabling CG Tail Drop on queue = %d",
+					rx_queue_id);
+			ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
+						DPNI_CP_CONGESTION_GROUP,
+						DPNI_QUEUE_RX,
+						dpaa2_q->tc_index,
+						flow_id, &taildrop);
+		} else {
+			/*enabling per rx queue congestion control */
+			taildrop.threshold = CONG_THRESHOLD_RX_BYTES_Q;
+			taildrop.units = DPNI_CONGESTION_UNIT_BYTES;
+			taildrop.oal = CONG_RX_OAL;
+			DPAA2_PMD_DEBUG("Enabling Byte based Drop on queue= %d",
+					rx_queue_id);
+			ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
+						DPNI_CP_QUEUE, DPNI_QUEUE_RX,
+						dpaa2_q->tc_index, flow_id,
+						&taildrop);
+		}
+		if (ret) {
+			DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)",
+				      ret);
+			return -1;
+		}
+	} else { /* Disable tail Drop */
+		struct dpni_taildrop taildrop = {};
+		DPAA2_PMD_INFO("Tail drop is disabled on queue");
+
+		taildrop.enable = 0;
+		if (dpaa2_q->cgid != 0xff) {
+			ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
+					DPNI_CP_CONGESTION_GROUP, DPNI_QUEUE_RX,
+					dpaa2_q->tc_index,
+					flow_id, &taildrop);
+		} else {
+			ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 					DPNI_CP_QUEUE, DPNI_QUEUE_RX,
 					dpaa2_q->tc_index, flow_id, &taildrop);
+		}
 		if (ret) {
 			DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)",
 				      ret);
@@ -655,7 +712,7 @@ dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
 	dpaa2_q->tc_index = tc_id;
 
 	if (!(priv->flags & DPAA2_TX_CGR_OFF)) {
-		struct dpni_congestion_notification_cfg cong_notif_cfg;
+		struct dpni_congestion_notification_cfg cong_notif_cfg = {};
 
 		cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES;
 		cong_notif_cfg.threshold_entry = CONG_ENTER_TX_THRESHOLD;
@@ -693,7 +750,28 @@ dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
 static void
 dpaa2_dev_rx_queue_release(void *q __rte_unused)
 {
+	struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)q;
+	struct dpaa2_dev_priv *priv = dpaa2_q->eth_data->dev_private;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	uint8_t options = 0;
+	int ret;
+	struct dpni_queue cfg = {};
+
 	PMD_INIT_FUNC_TRACE();
+	if (dpaa2_q->cgid != 0xff) {
+		options = DPNI_QUEUE_OPT_CLEAR_CGID;
+		cfg.cgid = dpaa2_q->cgid;
+
+		ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token,
+				     DPNI_QUEUE_RX,
+				     dpaa2_q->tc_index, dpaa2_q->flow_id,
+				     options, &cfg);
+		if (ret)
+			DPAA2_PMD_ERR("Unable to clear CGR from q=%u err=%d",
+					dpaa2_q->fqid, ret);
+		priv->cgid_in_use[dpaa2_q->cgid] = 0;
+		dpaa2_q->cgid = 0xff;
+	}
 }
 
 static void
@@ -2166,6 +2244,14 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
 	}
 
 	priv->num_rx_tc = attr.num_rx_tcs;
+	/* only if the custom CG is enabled */
+	if (attr.options & DPNI_OPT_CUSTOM_CG)
+		priv->max_cgs = attr.num_cgs;
+	else
+		priv->max_cgs = 0;
+
+	for (i = 0; i < priv->max_cgs; i++)
+		priv->cgid_in_use[i] = 0;
 
 	for (i = 0; i < attr.num_rx_tcs; i++)
 		priv->nb_rx_queues += attr.num_queues;
@@ -2173,9 +2259,9 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
 	/* Using number of TX queues as number of TX TCs */
 	priv->nb_tx_queues = attr.num_tx_tcs;
 
-	DPAA2_PMD_DEBUG("RX-TC= %d, nb_rx_queues= %d, nb_tx_queues=%d",
+	DPAA2_PMD_DEBUG("RX-TC= %d, rx_queues= %d, tx_queues=%d, max_cgs=%d",
 			priv->num_rx_tc, priv->nb_rx_queues,
-			priv->nb_tx_queues);
+			priv->nb_tx_queues, priv->max_cgs);
 
 	priv->hw = dpni_dev;
 	priv->hw_id = hw_id;
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index a991ccc1d..2f14a3525 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -37,9 +37,9 @@
 #define CONG_RETRY_COUNT 18000
 
 /* RX queue tail drop threshold
- * currently considering 32 KB packets
+ * currently considering 64 KB packets
  */
-#define CONG_THRESHOLD_RX_Q  (64 * 1024)
+#define CONG_THRESHOLD_RX_BYTES_Q  (64 * 1024)
 #define CONG_RX_OAL	128
 
 /* Size of the input SMMU mapped memory required by MC */
@@ -115,6 +115,8 @@ struct dpaa2_dev_priv {
 	uint8_t flags; /*dpaa2 config flags */
 	uint8_t en_ordered;
 	uint8_t en_loose_ordered;
+	uint8_t max_cgs;
+	uint8_t cgid_in_use[MAX_RX_QUEUES];
 
 	struct pattern_s {
 		uint8_t item_count;
-- 
2.17.1

[dpdk-dev] [PATCH v1 17/30] net/dpaa2: add cgr counters in xtra stats

[Sachin Saxena]

From: Hemant Agrawal <hemant.agrawal@nxp.com>

Add congestion frame drop and byte drop count in xtra stats.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/net/dpaa2/dpaa2_ethdev.c | 24 ++++++++++++++++++++++--
 1 file changed, 22 insertions(+), 2 deletions(-)

diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index b30f37ecb..259180e4f 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -84,6 +84,8 @@ static const struct rte_dpaa2_xstats_name_off dpaa2_xstats_strings[] = {
 	{"ingress_nobuffer_discards", 2, 2},
 	{"egress_discarded_frames", 2, 3},
 	{"egress_confirmed_frames", 2, 4},
+	{"cgr_reject_frames", 4, 0},
+	{"cgr_reject_bytes", 4, 1},
 };
 
 static const enum rte_filter_op dpaa2_supported_filter_ops[] = {
@@ -1370,7 +1372,7 @@ dpaa2_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
 	int32_t  retcode;
-	union dpni_statistics value[3] = {};
+	union dpni_statistics value[5] = {};
 	unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings);
 
 	if (n < num)
@@ -1397,6 +1399,18 @@ dpaa2_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
 	if (retcode)
 		goto err;
 
+	for (i = 0; i < priv->max_cgs; i++) {
+		if (!priv->cgid_in_use[i]) {
+			/* Get Counters from page_4*/
+			retcode = dpni_get_statistics(dpni, CMD_PRI_LOW,
+						      priv->token,
+						      4, 0, &value[4]);
+			if (retcode)
+				goto err;
+			break;
+		}
+	}
+
 	for (i = 0; i < num; i++) {
 		xstats[i].id = i;
 		xstats[i].value = value[dpaa2_xstats_strings[i].page_id].
@@ -1438,7 +1452,7 @@ dpaa2_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
 		struct dpaa2_dev_priv *priv = dev->data->dev_private;
 		struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
 		int32_t  retcode;
-		union dpni_statistics value[3] = {};
+		union dpni_statistics value[5] = {};
 
 		if (n < stat_cnt)
 			return stat_cnt;
@@ -1464,6 +1478,12 @@ dpaa2_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
 		if (retcode)
 			return 0;
 
+		/* Get Counters from page_4*/
+		retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
+					      4, 0, &value[4]);
+		if (retcode)
+			return 0;
+
 		for (i = 0; i < stat_cnt; i++) {
 			values[i] = value[dpaa2_xstats_strings[i].page_id].
 				raw.counter[dpaa2_xstats_strings[i].stats_id];
-- 
2.17.1

[dpdk-dev] [PATCH v1 18/30] net/dpaa2: add support for config max Rx length in HW

[Sachin Saxena]

From: Hemant Agrawal <hemant.agrawal@nxp.com>

The MC expects the length to be configured without CRC

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/net/dpaa2/dpaa2_ethdev.c | 17 +++++++++++++++--
 1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 259180e4f..925637409 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -418,12 +418,17 @@ dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
 	if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
 		if (eth_conf->rxmode.max_rx_pkt_len <= DPAA2_MAX_RX_PKT_LEN) {
 			ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW,
-				priv->token, eth_conf->rxmode.max_rx_pkt_len);
+				priv->token, eth_conf->rxmode.max_rx_pkt_len
+				- RTE_ETHER_CRC_LEN);
 			if (ret) {
 				DPAA2_PMD_ERR(
 					"Unable to set mtu. check config");
 				return ret;
 			}
+			dev->data->mtu =
+				dev->data->dev_conf.rxmode.max_rx_pkt_len -
+				RTE_ETHER_HDR_LEN - RTE_ETHER_CRC_LEN -
+				VLAN_TAG_SIZE;
 		} else {
 			return -1;
 		}
@@ -1200,7 +1205,7 @@ dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
 	 * Maximum Ethernet header length
 	 */
 	ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token,
-					frame_size);
+					frame_size - RTE_ETHER_CRC_LEN);
 	if (ret) {
 		DPAA2_PMD_ERR("Setting the max frame length failed");
 		return -1;
@@ -2375,6 +2380,14 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
 		}
 	}
 
+	ret = dpni_set_max_frame_length(dpni_dev, CMD_PRI_LOW, priv->token,
+					RTE_ETHER_MAX_LEN - RTE_ETHER_CRC_LEN
+					+ VLAN_TAG_SIZE);
+	if (ret) {
+		DPAA2_PMD_ERR("Unable to set mtu. check config");
+		goto init_err;
+	}
+
 	RTE_LOG(INFO, PMD, "%s: netdev created\n", eth_dev->data->name);
 	return 0;
 init_err:
-- 
2.17.1

[dpdk-dev] [PATCH v1 19/30] net/dpaa2: use LFQIDs in Tx instead of qdid

[Sachin Saxena]

Signed-off-by: Sachin Saxena <sachin.saxena@nxp.com>
---
 drivers/net/dpaa2/dpaa2_ethdev.c | 10 ++++++++++
 drivers/net/dpaa2/dpaa2_rxtx.c   | 12 +++++-------
 2 files changed, 15 insertions(+), 7 deletions(-)

diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 925637409..8814de271 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -677,6 +677,7 @@ dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
 	struct dpni_queue tx_conf_cfg;
 	struct dpni_queue tx_flow_cfg;
 	uint8_t options = 0, flow_id;
+	struct dpni_queue_id qid;
 	uint32_t tc_id;
 	int ret;
 
@@ -718,6 +719,15 @@ dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
 	}
 	dpaa2_q->tc_index = tc_id;
 
+	ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
+			     DPNI_QUEUE_TX, dpaa2_q->tc_index,
+			     dpaa2_q->flow_id, &tx_flow_cfg, &qid);
+	if (ret) {
+		DPAA2_PMD_ERR("Error in getting LFQID err=%d", ret);
+		return -1;
+	}
+	dpaa2_q->fqid = qid.fqid;
+
 	if (!(priv->flags & DPAA2_TX_CGR_OFF)) {
 		struct dpni_congestion_notification_cfg cong_notif_cfg = {};
 
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index 19838180f..2209b78a4 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -869,8 +869,8 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
 	/*Prepare enqueue descriptor*/
 	qbman_eq_desc_clear(&eqdesc);
 	qbman_eq_desc_set_no_orp(&eqdesc, DPAA2_EQ_RESP_ERR_FQ);
-	qbman_eq_desc_set_qd(&eqdesc, priv->qdid,
-			     dpaa2_q->flow_id, dpaa2_q->tc_index);
+	qbman_eq_desc_set_fq(&eqdesc, dpaa2_q->fqid);
+
 	/*Clear the unused FD fields before sending*/
 	while (nb_pkts) {
 		/*Check if the queue is congested*/
@@ -1021,8 +1021,7 @@ dpaa2_set_enqueue_descriptor(struct dpaa2_queue *dpaa2_q,
 	uint16_t orpid, seqnum;
 	uint8_t dq_idx;
 
-	qbman_eq_desc_set_qd(eqdesc, priv->qdid, dpaa2_q->flow_id,
-			     dpaa2_q->tc_index);
+	qbman_eq_desc_set_fq(eqdesc, dpaa2_q->fqid);
 
 	if (m->seqn & DPAA2_ENQUEUE_FLAG_ORP) {
 		orpid = (m->seqn & DPAA2_EQCR_OPRID_MASK) >>
@@ -1128,9 +1127,8 @@ dpaa2_dev_tx_ordered(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
 			} else {
 				qbman_eq_desc_set_no_orp(&eqdesc[loop],
 							 DPAA2_EQ_RESP_ERR_FQ);
-				qbman_eq_desc_set_qd(&eqdesc[loop], priv->qdid,
-						     dpaa2_q->flow_id,
-						     dpaa2_q->tc_index);
+				qbman_eq_desc_set_fq(&eqdesc[loop],
+						     dpaa2_q->fqid);
 			}
 
 			if (likely(RTE_MBUF_DIRECT(*bufs))) {
-- 
2.17.1

[dpdk-dev] [PATCH v1 20/30] net/dpaa2: support dpdmux classification on eth type

[Sachin Saxena]

From: Hemant Agrawal <hemant.agrawal@nxp.com>

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/net/dpaa2/dpaa2_mux.c | 84 +++++++++++++++++++++++------------
 1 file changed, 55 insertions(+), 29 deletions(-)

diff --git a/drivers/net/dpaa2/dpaa2_mux.c b/drivers/net/dpaa2/dpaa2_mux.c
index e487c6b54..1910cc418 100644
--- a/drivers/net/dpaa2/dpaa2_mux.c
+++ b/drivers/net/dpaa2/dpaa2_mux.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright 2018 NXP
+ * Copyright 2018-2019 NXP
  */
 
 #include <sys/queue.h>
@@ -60,19 +60,13 @@ rte_pmd_dpaa2_mux_flow_create(uint32_t dpdmux_id,
 {
 	struct dpaa2_dpdmux_dev *dpdmux_dev;
 	struct dpkg_profile_cfg kg_cfg;
-	const struct rte_flow_item_ipv4 *spec;
 	const struct rte_flow_action_vf *vf_conf;
 	struct dpdmux_cls_action dpdmux_action;
 	struct rte_flow *flow = NULL;
 	void *key_iova, *mask_iova, *key_cfg_iova = NULL;
+	uint8_t key_size = 0;
 	int ret;
 
-	if (pattern[0]->type != RTE_FLOW_ITEM_TYPE_IPV4) {
-		DPAA2_PMD_ERR("Not supported pattern type: %d",
-			      pattern[0]->type);
-		return NULL;
-	}
-
 	/* Find the DPDMUX from dpdmux_id in our list */
 	dpdmux_dev = get_dpdmux_from_id(dpdmux_id);
 	if (!dpdmux_dev) {
@@ -86,16 +80,63 @@ rte_pmd_dpaa2_mux_flow_create(uint32_t dpdmux_id,
 		DPAA2_PMD_ERR("Unable to allocate flow-dist parameters");
 		return NULL;
 	}
+	flow = rte_zmalloc(NULL, sizeof(struct rte_flow) +
+			   (2 * DIST_PARAM_IOVA_SIZE), RTE_CACHE_LINE_SIZE);
+	if (!flow) {
+		DPAA2_PMD_ERR(
+			"Memory allocation failure for rule configration\n");
+		goto creation_error;
+	}
+	key_iova = (void *)((size_t)flow + sizeof(struct rte_flow));
+	mask_iova = (void *)((size_t)key_iova + DIST_PARAM_IOVA_SIZE);
 
 	/* Currently taking only IP protocol as an extract type.
 	 * This can be exended to other fields using pattern->type.
 	 */
 	memset(&kg_cfg, 0, sizeof(struct dpkg_profile_cfg));
-	kg_cfg.extracts[0].extract.from_hdr.prot = NET_PROT_IP;
-	kg_cfg.extracts[0].extract.from_hdr.field = NH_FLD_IP_PROTO;
-	kg_cfg.extracts[0].type = DPKG_EXTRACT_FROM_HDR;
-	kg_cfg.extracts[0].extract.from_hdr.type = DPKG_FULL_FIELD;
-	kg_cfg.num_extracts = 1;
+
+	switch (pattern[0]->type) {
+	case RTE_FLOW_ITEM_TYPE_IPV4:
+	{
+		const struct rte_flow_item_ipv4 *spec;
+		kg_cfg.extracts[0].extract.from_hdr.prot = NET_PROT_IP;
+		kg_cfg.extracts[0].extract.from_hdr.field = NH_FLD_IP_PROTO;
+		kg_cfg.extracts[0].type = DPKG_EXTRACT_FROM_HDR;
+		kg_cfg.extracts[0].extract.from_hdr.type = DPKG_FULL_FIELD;
+		kg_cfg.num_extracts = 1;
+
+		spec = (const struct rte_flow_item_ipv4 *)pattern[0]->spec;
+		memcpy(key_iova, (const void *)(&spec->hdr.next_proto_id),
+			sizeof(uint8_t));
+		memcpy(mask_iova, pattern[0]->mask, sizeof(uint8_t));
+		key_size = sizeof(uint8_t);
+	}
+	break;
+
+	case RTE_FLOW_ITEM_TYPE_ETH:
+	{
+		const struct rte_flow_item_eth *spec;
+		uint16_t eth_type;
+		kg_cfg.extracts[0].extract.from_hdr.prot = NET_PROT_ETH;
+		kg_cfg.extracts[0].extract.from_hdr.field = NH_FLD_ETH_TYPE;
+		kg_cfg.extracts[0].type = DPKG_EXTRACT_FROM_HDR;
+		kg_cfg.extracts[0].extract.from_hdr.type = DPKG_FULL_FIELD;
+		kg_cfg.num_extracts = 1;
+
+		spec = (const struct rte_flow_item_eth *)pattern[0]->spec;
+		eth_type = rte_constant_bswap16(spec->type);
+		memcpy((void *)key_iova, (const void *)&eth_type,
+							sizeof(rte_be16_t));
+		memcpy(mask_iova, pattern[0]->mask, sizeof(uint16_t));
+		key_size = sizeof(uint16_t);
+	}
+	break;
+
+	default:
+		DPAA2_PMD_ERR("Not supported pattern type: %d",
+				pattern[0]->type);
+		goto creation_error;
+	}
 
 	ret = dpkg_prepare_key_cfg(&kg_cfg, key_cfg_iova);
 	if (ret) {
@@ -114,24 +155,9 @@ rte_pmd_dpaa2_mux_flow_create(uint32_t dpdmux_id,
 	/* As now our key extract parameters are set, let us configure
 	 * the rule.
 	 */
-	flow = rte_zmalloc(NULL, sizeof(struct rte_flow) +
-			   (2 * DIST_PARAM_IOVA_SIZE), RTE_CACHE_LINE_SIZE);
-	if (!flow) {
-		DPAA2_PMD_ERR(
-			"Memory allocation failure for rule configration\n");
-		goto creation_error;
-	}
-	key_iova = (void *)((size_t)flow + sizeof(struct rte_flow));
-	mask_iova = (void *)((size_t)key_iova + DIST_PARAM_IOVA_SIZE);
-
-	spec = (const struct rte_flow_item_ipv4 *)pattern[0]->spec;
-	memcpy(key_iova, (const void *)&spec->hdr.next_proto_id,
-	       sizeof(uint8_t));
-	memcpy(mask_iova, pattern[0]->mask, sizeof(uint8_t));
-
 	flow->rule.key_iova = (uint64_t)(DPAA2_VADDR_TO_IOVA(key_iova));
 	flow->rule.mask_iova = (uint64_t)(DPAA2_VADDR_TO_IOVA(mask_iova));
-	flow->rule.key_size = sizeof(uint8_t);
+	flow->rule.key_size = key_size;
 
 	vf_conf = (const struct rte_flow_action_vf *)(actions[0]->conf);
 	if (vf_conf->id == 0 || vf_conf->id > dpdmux_dev->num_ifs) {
-- 
2.17.1

[dpdk-dev] [PATCH v1 21/30] net/dpaa2: add Tx confirmation mode support

[Sachin Saxena]

From: Priyanka Jain <priyanka.jain@nxp.com>

TX confirmation mode provides dedicated confirmation
queues for transmitted packets. These queues are used
by software to get the status and release
transmitted packets buffers.

By default TX confirmation mode is kept disabled.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
---
 drivers/bus/fslmc/portal/dpaa2_hw_pvt.h      |   2 +
 drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h |  22 ++++
 drivers/net/dpaa2/dpaa2_ethdev.c             | 101 ++++++++++++++++--
 drivers/net/dpaa2/dpaa2_ethdev.h             |   4 +-
 drivers/net/dpaa2/dpaa2_rxtx.c               | 106 ++++++++++++++++++-
 5 files changed, 227 insertions(+), 8 deletions(-)

diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index 7f7e2fd78..5087f68c6 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -161,6 +161,8 @@ struct dpaa2_queue {
 	dpaa2_queue_cb_dqrr_t *cb;
 	dpaa2_queue_cb_eqresp_free_t *cb_eqresp_free;
 	struct dpaa2_bp_info *bp_array;
+	/*to store tx_conf_queue corresponding to tx_queue*/
+	struct dpaa2_queue *tx_conf_queue;
 };
 
 struct swp_active_dqs {
diff --git a/drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h b/drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h
index adb730b71..0d6324183 100644
--- a/drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h
+++ b/drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h
@@ -253,6 +253,28 @@ struct dpaa2_annot_hdr {
 #define PARSE_ERROR_CODE(var)		((uint64_t)(var) & 0xFF00000000000000)
 #define SOFT_PARSING_CONTEXT(var)	((uint64_t)(var) & 0x00FFFFFFFFFFFFFF)
 
+/*FAEAD offset in anmotation area*/
+#define DPAA2_FD_HW_ANNOT_FAEAD_OFFSET	0x58
+
+struct dpaa2_faead {
+	uint32_t fqid;
+	uint32_t ctrl;
+};
+
+/*FAEAD bits */
+/*A2 OMB contains valid data*/
+#define DPAA2_ANNOT_FAEAD_A2V		0x20000000
+/*egress confirmation FQID in FAEAD contains valid data*/
+#define DPAA2_ANNOT_FAEAD_A4V		0x08000000
+/*UPD is valid*/
+#define DPAA2_ANNOT_FAEAD_UPDV		0x00001000
+/*EBDD is valid*/
+#define DPAA2_ANNOT_FAEAD_EBDDV		0x00002000
+/*EBDD (External Buffer Deallocation Disable) */
+#define DPAA2_ANNOT_FAEAD_EBDD		0x00000020
+/*UPD (Update prepended data)*/
+#define DPAA2_ANNOT_FAEAD_UPD		0x00000010
+
 /* Debug frame, otherwise supposed to be discarded */
 #define DPAA2_ETH_FAS_DISC	      0x80000000
 /* MACSEC frame */
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 8814de271..5c4d22e7c 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -290,7 +290,10 @@ dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
 	PMD_INIT_FUNC_TRACE();
 
 	num_rxqueue_per_tc = (priv->nb_rx_queues / priv->num_rx_tc);
-	tot_queues = priv->nb_rx_queues + priv->nb_tx_queues;
+	if (priv->tx_conf_en)
+		tot_queues = priv->nb_rx_queues + 2 * priv->nb_tx_queues;
+	else
+		tot_queues = priv->nb_rx_queues + priv->nb_tx_queues;
 	mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues,
 			  RTE_CACHE_LINE_SIZE);
 	if (!mc_q) {
@@ -325,6 +328,28 @@ dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
 			goto fail_tx;
 	}
 
+	if (priv->tx_conf_en) {
+		/*Setup tx confirmation queues*/
+		for (i = 0; i < priv->nb_tx_queues; i++) {
+			mc_q->eth_data = dev->data;
+			mc_q->tc_index = i;
+			mc_q->flow_id = 0;
+			priv->tx_conf_vq[i] = mc_q++;
+			dpaa2_q = (struct dpaa2_queue *)priv->tx_conf_vq[i];
+			dpaa2_q->q_storage =
+				rte_malloc("dq_storage",
+					sizeof(struct queue_storage_info_t),
+					RTE_CACHE_LINE_SIZE);
+			if (!dpaa2_q->q_storage)
+				goto fail_tx_conf;
+
+			memset(dpaa2_q->q_storage, 0,
+			       sizeof(struct queue_storage_info_t));
+			if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
+				goto fail_tx_conf;
+		}
+	}
+
 	vq_id = 0;
 	for (dist_idx = 0; dist_idx < priv->nb_rx_queues; dist_idx++) {
 		mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id];
@@ -334,6 +359,14 @@ dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
 	}
 
 	return 0;
+fail_tx_conf:
+	i -= 1;
+	while (i >= 0) {
+		dpaa2_q = (struct dpaa2_queue *)priv->tx_conf_vq[i];
+		rte_free(dpaa2_q->q_storage);
+		priv->tx_conf_vq[i--] = NULL;
+	}
+	i = priv->nb_tx_queues;
 fail_tx:
 	i -= 1;
 	while (i >= 0) {
@@ -377,6 +410,14 @@ dpaa2_free_rx_tx_queues(struct rte_eth_dev *dev)
 			dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
 			rte_free(dpaa2_q->cscn);
 		}
+		if (priv->tx_conf_en) {
+			/* cleanup tx conf queue storage */
+			for (i = 0; i < priv->nb_tx_queues; i++) {
+				dpaa2_q = (struct dpaa2_queue *)
+						priv->tx_conf_vq[i];
+				rte_free(dpaa2_q->q_storage);
+			}
+		}
 		/*free memory for all queues (RX+TX) */
 		rte_free(priv->rx_vq[0]);
 		priv->rx_vq[0] = NULL;
@@ -673,6 +714,8 @@ dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
 	struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)
 		priv->tx_vq[tx_queue_id];
+	struct dpaa2_queue *dpaa2_tx_conf_q = (struct dpaa2_queue *)
+		priv->tx_conf_vq[tx_queue_id];
 	struct fsl_mc_io *dpni = priv->hw;
 	struct dpni_queue tx_conf_cfg;
 	struct dpni_queue tx_flow_cfg;
@@ -708,9 +751,14 @@ dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
 
 	if (tx_queue_id == 0) {
 		/*Set tx-conf and error configuration*/
-		ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
-						    priv->token,
-						    DPNI_CONF_DISABLE);
+		if (priv->tx_conf_en)
+			ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
+							    priv->token,
+							    DPNI_CONF_AFFINE);
+		else
+			ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
+							    priv->token,
+							    DPNI_CONF_DISABLE);
 		if (ret) {
 			DPAA2_PMD_ERR("Error in set tx conf mode settings: "
 				      "err=%d", ret);
@@ -761,6 +809,31 @@ dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
 	}
 	dpaa2_q->cb_eqresp_free = dpaa2_dev_free_eqresp_buf;
 	dev->data->tx_queues[tx_queue_id] = dpaa2_q;
+
+	if (priv->tx_conf_en) {
+		dpaa2_q->tx_conf_queue = dpaa2_tx_conf_q;
+		options = options | DPNI_QUEUE_OPT_USER_CTX;
+		tx_conf_cfg.user_context = (size_t)(dpaa2_q);
+		ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token,
+			     DPNI_QUEUE_TX_CONFIRM, dpaa2_tx_conf_q->tc_index,
+			     dpaa2_tx_conf_q->flow_id, options, &tx_conf_cfg);
+		if (ret) {
+			DPAA2_PMD_ERR("Error in setting the tx conf flow: "
+			      "tc_index=%d, flow=%d err=%d",
+			      dpaa2_tx_conf_q->tc_index,
+			      dpaa2_tx_conf_q->flow_id, ret);
+			return -1;
+		}
+
+		ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
+			     DPNI_QUEUE_TX_CONFIRM, dpaa2_tx_conf_q->tc_index,
+			     dpaa2_tx_conf_q->flow_id, &tx_conf_cfg, &qid);
+		if (ret) {
+			DPAA2_PMD_ERR("Error in getting LFQID err=%d", ret);
+			return -1;
+		}
+		dpaa2_tx_conf_q->fqid = qid.fqid;
+	}
 	return 0;
 }
 
@@ -2336,7 +2409,13 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
 
 	/* ... tx buffer layout ... */
 	memset(&layout, 0, sizeof(struct dpni_buffer_layout));
-	layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
+	if (priv->tx_conf_en) {
+		layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
+				 DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
+		layout.pass_timestamp = true;
+	} else {
+		layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
+	}
 	layout.pass_frame_status = 1;
 	ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
 				     DPNI_QUEUE_TX, &layout);
@@ -2347,7 +2426,13 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
 
 	/* ... tx-conf and error buffer layout ... */
 	memset(&layout, 0, sizeof(struct dpni_buffer_layout));
-	layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
+	if (priv->tx_conf_en) {
+		layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
+				 DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
+		layout.pass_timestamp = true;
+	} else {
+		layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
+	}
 	layout.pass_frame_status = 1;
 	ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
 				     DPNI_QUEUE_TX_CONFIRM, &layout);
@@ -2459,6 +2544,7 @@ rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
 		struct rte_dpaa2_device *dpaa2_dev)
 {
 	struct rte_eth_dev *eth_dev;
+	struct dpaa2_dev_priv *priv;
 	int diag;
 
 	if ((DPAA2_MBUF_HW_ANNOTATION + DPAA2_FD_PTA_SIZE) >
@@ -2506,6 +2592,9 @@ rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
 		return 0;
 	}
 
+	priv = eth_dev->data->dev_private;
+	priv->tx_conf_en = 0;
+
 	rte_eth_dev_release_port(eth_dev);
 	return diag;
 }
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index 2f14a3525..04a8ef8da 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -107,8 +107,9 @@ struct dpaa2_dev_priv {
 	uint32_t options;
 	void *rx_vq[MAX_RX_QUEUES];
 	void *tx_vq[MAX_TX_QUEUES];
-
 	struct dpaa2_bp_list *bp_list; /**<Attached buffer pool list */
+	void *tx_conf_vq[MAX_TX_QUEUES];
+	uint8_t tx_conf_en;
 	uint8_t max_mac_filters;
 	uint8_t max_vlan_filters;
 	uint8_t num_rx_tc;
@@ -179,5 +180,6 @@ uint16_t dpaa2_dev_tx_ordered(void *queue, struct rte_mbuf **bufs,
 uint16_t dummy_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts);
 void dpaa2_dev_free_eqresp_buf(uint16_t eqresp_ci);
 void dpaa2_flow_clean(struct rte_eth_dev *dev);
+uint16_t dpaa2_dev_tx_conf(void *queue)  __attribute__((unused));
 
 #endif /* _DPAA2_ETHDEV_H */
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index 2209b78a4..1c14b7354 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  *
  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
- *   Copyright 2016-2018 NXP
+ *   Copyright 2016-2019 NXP
  *
  */
 
@@ -832,6 +832,110 @@ dpaa2_dev_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
 	return num_rx;
 }
 
+uint16_t dpaa2_dev_tx_conf(void *queue)
+{
+	/* Function receive frames for a given device and VQ */
+	struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)queue;
+	struct qbman_result *dq_storage;
+	uint32_t fqid = dpaa2_q->fqid;
+	int ret, num_tx_conf = 0, num_pulled;
+	uint8_t pending, status;
+	struct qbman_swp *swp;
+	const struct qbman_fd *fd, *next_fd;
+	struct qbman_pull_desc pulldesc;
+	struct qbman_release_desc releasedesc;
+	uint32_t bpid;
+	uint64_t buf;
+
+	if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
+		ret = dpaa2_affine_qbman_swp();
+		if (ret) {
+			DPAA2_PMD_ERR("Failure in affining portal\n");
+			return 0;
+		}
+	}
+	swp = DPAA2_PER_LCORE_PORTAL;
+
+	do {
+		dq_storage = dpaa2_q->q_storage->dq_storage[0];
+		qbman_pull_desc_clear(&pulldesc);
+		qbman_pull_desc_set_fq(&pulldesc, fqid);
+		qbman_pull_desc_set_storage(&pulldesc, dq_storage,
+				(size_t)(DPAA2_VADDR_TO_IOVA(dq_storage)), 1);
+
+		qbman_pull_desc_set_numframes(&pulldesc, dpaa2_dqrr_size);
+
+		while (1) {
+			if (qbman_swp_pull(swp, &pulldesc)) {
+				DPAA2_PMD_DP_DEBUG("VDQ command is not issued."
+						   "QBMAN is busy\n");
+				/* Portal was busy, try again */
+				continue;
+			}
+			break;
+		}
+
+		rte_prefetch0((void *)((size_t)(dq_storage + 1)));
+		/* Check if the previous issued command is completed. */
+		while (!qbman_check_command_complete(dq_storage))
+			;
+
+		num_pulled = 0;
+		pending = 1;
+		do {
+			/* Loop until the dq_storage is updated with
+			 * new token by QBMAN
+			 */
+			while (!qbman_check_new_result(dq_storage))
+				;
+			rte_prefetch0((void *)((size_t)(dq_storage + 2)));
+			/* Check whether Last Pull command is Expired and
+			 * setting Condition for Loop termination
+			 */
+			if (qbman_result_DQ_is_pull_complete(dq_storage)) {
+				pending = 0;
+				/* Check for valid frame. */
+				status = qbman_result_DQ_flags(dq_storage);
+				if (unlikely((status &
+					QBMAN_DQ_STAT_VALIDFRAME) == 0))
+					continue;
+			}
+			fd = qbman_result_DQ_fd(dq_storage);
+
+			next_fd = qbman_result_DQ_fd(dq_storage + 1);
+			/* Prefetch Annotation address for the parse results */
+			rte_prefetch0((void *)(size_t)
+				(DPAA2_GET_FD_ADDR(next_fd) +
+				 DPAA2_FD_PTA_SIZE + 16));
+
+			bpid = DPAA2_GET_FD_BPID(fd);
+
+			/* Create a release descriptor required for releasing
+			 * buffers into QBMAN
+			 */
+			qbman_release_desc_clear(&releasedesc);
+			qbman_release_desc_set_bpid(&releasedesc, bpid);
+
+			buf = DPAA2_GET_FD_ADDR(fd);
+			/* feed them to bman */
+			do {
+				ret = qbman_swp_release(swp, &releasedesc,
+							&buf, 1);
+			} while (ret == -EBUSY);
+
+			dq_storage++;
+			num_tx_conf++;
+			num_pulled++;
+		} while (pending);
+
+	/* Last VDQ provided all packets and more packets are requested */
+	} while (num_pulled == dpaa2_dqrr_size);
+
+	dpaa2_q->rx_pkts += num_tx_conf;
+
+	return num_tx_conf;
+}
+
 /*
  * Callback to handle sending packets through WRIOP based interface
  */
-- 
2.17.1

[dpdk-dev] [PATCH v1 22/30] net/dpaa2: add timestamp support

[Sachin Saxena]

From: Priyanka Jain <priyanka.jain@nxp.com>

IEEE1588 driver needs timestamp of packets.
For DPAA2, the timestamp of TX packets is
stored in annotation area of corresponding
TX confirmation packet.

This patch enables timestamp fields in
annotation area and TX confirmation mode if
CONFIG_RTE_LIBRTE_IEEE1588 is set in
config/defconfig_arm64-dpaa2-linuxapp-gc

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
---
 config/defconfig_arm64-dpaa2-linuxapp-gcc |  3 ++
 drivers/net/dpaa2/dpaa2_ethdev.c          |  5 ++
 drivers/net/dpaa2/dpaa2_rxtx.c            | 61 +++++++++++++++++++++++
 3 files changed, 69 insertions(+)

diff --git a/config/defconfig_arm64-dpaa2-linuxapp-gcc b/config/defconfig_arm64-dpaa2-linuxapp-gcc
index 8b545f5f7..b2543266a 100644
--- a/config/defconfig_arm64-dpaa2-linuxapp-gcc
+++ b/config/defconfig_arm64-dpaa2-linuxapp-gcc
@@ -15,6 +15,9 @@ CONFIG_RTE_CACHE_LINE_SIZE=64
 
 CONFIG_RTE_PKTMBUF_HEADROOM=128
 
+# Enable IEEE1588, Keep it disable by default
+CONFIG_RTE_LIBRTE_IEEE1588=n
+
 # Doesn't support NUMA
 CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
 CONFIG_RTE_LIBRTE_VHOST_NUMA=n
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 5c4d22e7c..afad96b15 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -2377,6 +2377,11 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
 	priv->max_mac_filters = attr.mac_filter_entries;
 	priv->max_vlan_filters = attr.vlan_filter_entries;
 	priv->flags = 0;
+#if defined(RTE_LIBRTE_IEEE1588)
+	priv->tx_conf_en = 1;
+#else
+	priv->tx_conf_en = 0;
+#endif
 
 	/* Allocate memory for hardware structure for queues */
 	ret = dpaa2_alloc_rx_tx_queues(eth_dev);
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index 1c14b7354..7cea109d5 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -29,6 +29,8 @@ static inline uint32_t __attribute__((hot))
 dpaa2_dev_rx_parse_slow(struct rte_mbuf *mbuf,
 			struct dpaa2_annot_hdr *annotation);
 
+static void enable_tx_tstamp(struct qbman_fd *fd) __attribute__((unused));
+
 #define DPAA2_MBUF_TO_CONTIG_FD(_mbuf, _fd, _bpid)  do { \
 	DPAA2_SET_FD_ADDR(_fd, DPAA2_MBUF_VADDR_TO_IOVA(_mbuf)); \
 	DPAA2_SET_FD_LEN(_fd, _mbuf->data_len); \
@@ -131,6 +133,11 @@ dpaa2_dev_rx_parse_slow(struct rte_mbuf *mbuf,
 			"(4)=0x%" PRIx64 "\t",
 			annotation->word3, annotation->word4);
 
+#if defined(RTE_LIBRTE_IEEE1588)
+	if (BIT_ISSET_AT_POS(annotation->word1, DPAA2_ETH_FAS_PTP))
+		mbuf->ol_flags |= PKT_RX_IEEE1588_PTP;
+#endif
+
 	if (BIT_ISSET_AT_POS(annotation->word3, L2_VLAN_1_PRESENT)) {
 		vlan_tci = rte_pktmbuf_mtod_offset(mbuf, uint16_t *,
 			(VLAN_TCI_OFFSET_1(annotation->word5) >> 16));
@@ -511,6 +518,9 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
 	struct qbman_pull_desc pulldesc;
 	struct queue_storage_info_t *q_storage = dpaa2_q->q_storage;
 	struct rte_eth_dev_data *eth_data = dpaa2_q->eth_data;
+#if defined(RTE_LIBRTE_IEEE1588)
+	struct dpaa2_dev_priv *priv = eth_data->dev_private;
+#endif
 
 	if (unlikely(!DPAA2_PER_LCORE_ETHRX_DPIO)) {
 		ret = dpaa2_affine_qbman_ethrx_swp();
@@ -615,6 +625,9 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
 		else
 			bufs[num_rx] = eth_fd_to_mbuf(fd);
 		bufs[num_rx]->port = eth_data->port_id;
+#if defined(RTE_LIBRTE_IEEE1588)
+		priv->rx_timestamp = bufs[num_rx]->timestamp;
+#endif
 
 		if (eth_data->dev_conf.rxmode.offloads &
 				DEV_RX_OFFLOAD_VLAN_STRIP)
@@ -846,6 +859,11 @@ uint16_t dpaa2_dev_tx_conf(void *queue)
 	struct qbman_release_desc releasedesc;
 	uint32_t bpid;
 	uint64_t buf;
+#if defined(RTE_LIBRTE_IEEE1588)
+	struct rte_eth_dev_data *eth_data = dpaa2_q->eth_data;
+	struct dpaa2_dev_priv *priv = eth_data->dev_private;
+	struct dpaa2_annot_hdr *annotation;
+#endif
 
 	if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
 		ret = dpaa2_affine_qbman_swp();
@@ -926,6 +944,12 @@ uint16_t dpaa2_dev_tx_conf(void *queue)
 			dq_storage++;
 			num_tx_conf++;
 			num_pulled++;
+#if defined(RTE_LIBRTE_IEEE1588)
+			annotation = (struct dpaa2_annot_hdr *)((size_t)
+				DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd)) +
+				DPAA2_FD_PTA_SIZE);
+			priv->tx_timestamp = annotation->word2;
+#endif
 		} while (pending);
 
 	/* Last VDQ provided all packets and more packets are requested */
@@ -936,6 +960,28 @@ uint16_t dpaa2_dev_tx_conf(void *queue)
 	return num_tx_conf;
 }
 
+/* Configure the egress frame annotation for timestamp update */
+static void enable_tx_tstamp(struct qbman_fd *fd)
+{
+	struct dpaa2_faead *fd_faead;
+
+	/* Set frame annotation status field as valid */
+	(fd)->simple.frc |= DPAA2_FD_FRC_FASV;
+
+	/* Set frame annotation egress action descriptor as valid */
+	(fd)->simple.frc |= DPAA2_FD_FRC_FAEADV;
+
+	/* Set Annotation Length as 128B */
+	(fd)->simple.ctrl |= DPAA2_FD_CTRL_ASAL;
+
+	/* enable update of confirmation frame annotation */
+	fd_faead = (struct dpaa2_faead *)((size_t)
+			DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd)) +
+			DPAA2_FD_PTA_SIZE + DPAA2_FD_HW_ANNOT_FAEAD_OFFSET);
+	fd_faead->ctrl = DPAA2_ANNOT_FAEAD_A2V | DPAA2_ANNOT_FAEAD_UPDV |
+				DPAA2_ANNOT_FAEAD_UPD;
+}
+
 /*
  * Callback to handle sending packets through WRIOP based interface
  */
@@ -970,6 +1016,15 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
 	DPAA2_PMD_DP_DEBUG("===> eth_data =%p, fqid =%d\n",
 			eth_data, dpaa2_q->fqid);
 
+#ifdef RTE_LIBRTE_IEEE1588
+	/* IEEE1588 driver need pointer to tx confirmation queue
+	 * corresponding to last packet transmitted for reading
+	 * the timestamp
+	 */
+	priv->next_tx_conf_queue = dpaa2_q->tx_conf_queue;
+	dpaa2_dev_tx_conf(dpaa2_q->tx_conf_queue);
+#endif
+
 	/*Prepare enqueue descriptor*/
 	qbman_eq_desc_clear(&eqdesc);
 	qbman_eq_desc_set_no_orp(&eqdesc, DPAA2_EQ_RESP_ERR_FQ);
@@ -1020,6 +1075,9 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
 					DPAA2_MBUF_TO_CONTIG_FD((*bufs),
 					&fd_arr[loop], mempool_to_bpid(mp));
 					bufs++;
+#ifdef RTE_LIBRTE_IEEE1588
+					enable_tx_tstamp(&fd_arr[loop]);
+#endif
 					continue;
 				}
 			} else {
@@ -1068,6 +1126,9 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
 						       &fd_arr[loop], bpid);
 				}
 			}
+#ifdef RTE_LIBRTE_IEEE1588
+			enable_tx_tstamp(&fd_arr[loop]);
+#endif
 			bufs++;
 		}
 		loop = 0;
-- 
2.17.1

[dpdk-dev] [PATCH v1 23/30] net/dpaa2: add dprtc sub-module

[Sachin Saxena]

From: Priyanka Jain <priyanka.jain@nxp.com>

This patch add support for dprtc
(Data Path Real Time Clock) sub-module
based on MC 10.16.0 flib.

It provides interface for PTP stack software
to access physical IEEE 1588 Real Time Clock.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
---
 drivers/net/dpaa2/Makefile           |   1 +
 drivers/net/dpaa2/mc/dprtc.c         | 523 +++++++++++++++++++++++++++
 drivers/net/dpaa2/mc/fsl_dprtc.h     | 109 ++++++
 drivers/net/dpaa2/mc/fsl_dprtc_cmd.h |  91 +++++
 drivers/net/dpaa2/meson.build        |   4 +
 5 files changed, 728 insertions(+)
 create mode 100644 drivers/net/dpaa2/mc/dprtc.c
 create mode 100644 drivers/net/dpaa2/mc/fsl_dprtc.h
 create mode 100644 drivers/net/dpaa2/mc/fsl_dprtc_cmd.h

diff --git a/drivers/net/dpaa2/Makefile b/drivers/net/dpaa2/Makefile
index c7262ffd5..9b52fa1e5 100644
--- a/drivers/net/dpaa2/Makefile
+++ b/drivers/net/dpaa2/Makefile
@@ -37,6 +37,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2_mux.c
 SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += mc/dpni.c
 SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += mc/dpkg.c
 SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += mc/dpdmux.c
+SRCS-$(CONFIG_RTE_LIBRTE_IEEE1588)  += mc/dprtc.c
 
 LDLIBS += -lrte_bus_fslmc
 LDLIBS += -lrte_mempool_dpaa2
diff --git a/drivers/net/dpaa2/mc/dprtc.c b/drivers/net/dpaa2/mc/dprtc.c
new file mode 100644
index 000000000..42ac89150
--- /dev/null
+++ b/drivers/net/dpaa2/mc/dprtc.c
@@ -0,0 +1,523 @@
+/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
+ * Copyright 2019 NXP
+ */
+#include <fsl_mc_sys.h>
+#include <fsl_mc_cmd.h>
+#include <fsl_dprtc.h>
+#include <fsl_dprtc_cmd.h>
+
+/** @addtogroup dprtc
+ * @{
+ */
+
+/**
+ * dprtc_open() - Open a control session for the specified object.
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @dprtc_id:	DPRTC unique ID
+ * @token:	Returned token; use in subsequent API calls
+ *
+ * This function can be used to open a control session for an
+ * already created object; an object may have been declared in
+ * the DPL or by calling the dprtc_create function.
+ * This function returns a unique authentication token,
+ * associated with the specific object ID and the specific MC
+ * portal; this token must be used in all subsequent commands for
+ * this specific object
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dprtc_open(struct fsl_mc_io *mc_io,
+	       uint32_t cmd_flags,
+	       int dprtc_id,
+	       uint16_t *token)
+{
+	struct dprtc_cmd_open *cmd_params;
+	struct mc_command cmd = { 0 };
+	int err;
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_OPEN,
+					  cmd_flags,
+					  0);
+	cmd_params = (struct dprtc_cmd_open *)cmd.params;
+	cmd_params->dprtc_id = cpu_to_le32(dprtc_id);
+
+	/* send command to mc*/
+	err = mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	/* retrieve response parameters */
+	*token = mc_cmd_hdr_read_token(&cmd);
+
+	return err;
+}
+
+/**
+ * dprtc_close() - Close the control session of the object
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPRTC object
+ *
+ * After this function is called, no further operations are
+ * allowed on the object without opening a new control session.
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dprtc_close(struct fsl_mc_io *mc_io,
+		uint32_t cmd_flags,
+		uint16_t token)
+{
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_CLOSE, cmd_flags,
+					  token);
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dprtc_create() - Create the DPRTC object.
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @dprc_token:	Parent container token; '0' for default container
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @cfg:	Configuration structure
+ * @obj_id:	Returned object id
+ *
+ * Create the DPRTC object, allocate required resources and
+ * perform required initialization.
+ *
+ * The function accepts an authentication token of a parent
+ * container that this object should be assigned to. The token
+ * can be '0' so the object will be assigned to the default container.
+ * The newly created object can be opened with the returned
+ * object id and using the container's associated tokens and MC portals.
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dprtc_create(struct fsl_mc_io *mc_io,
+		 uint16_t dprc_token,
+		 uint32_t cmd_flags,
+		 const struct dprtc_cfg *cfg,
+		 uint32_t *obj_id)
+{
+	struct mc_command cmd = { 0 };
+	int err;
+
+	(void)(cfg); /* unused */
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_CREATE,
+					  cmd_flags,
+					  dprc_token);
+
+	/* send command to mc*/
+	err = mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	/* retrieve response parameters */
+	*obj_id = mc_cmd_read_object_id(&cmd);
+
+	return 0;
+}
+
+/**
+ * dprtc_destroy() - Destroy the DPRTC object and release all its resources.
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @dprc_token: Parent container token; '0' for default container
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @object_id:	The object id; it must be a valid id within the container that
+ * created this object;
+ *
+ * The function accepts the authentication token of the parent container that
+ * created the object (not the one that currently owns the object). The object
+ * is searched within parent using the provided 'object_id'.
+ * All tokens to the object must be closed before calling destroy.
+ *
+ * Return:	'0' on Success; error code otherwise.
+ */
+int dprtc_destroy(struct fsl_mc_io *mc_io,
+		  uint16_t dprc_token,
+		  uint32_t cmd_flags,
+		  uint32_t object_id)
+{
+	struct dprtc_cmd_destroy *cmd_params;
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_DESTROY,
+					  cmd_flags,
+					  dprc_token);
+	cmd_params = (struct dprtc_cmd_destroy *)cmd.params;
+	cmd_params->object_id = cpu_to_le32(object_id);
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dprtc_enable() - Enable the DPRTC.
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPRTC object
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dprtc_enable(struct fsl_mc_io *mc_io,
+		 uint32_t cmd_flags,
+		 uint16_t token)
+{
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_ENABLE, cmd_flags,
+					  token);
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dprtc_disable() - Disable the DPRTC.
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPRTC object
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dprtc_disable(struct fsl_mc_io *mc_io,
+		  uint32_t cmd_flags,
+		  uint16_t token)
+{
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_DISABLE,
+					  cmd_flags,
+					  token);
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dprtc_is_enabled() - Check if the DPRTC is enabled.
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPRTC object
+ * @en:		Returns '1' if object is enabled; '0' otherwise
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dprtc_is_enabled(struct fsl_mc_io *mc_io,
+		     uint32_t cmd_flags,
+		     uint16_t token,
+		     int *en)
+{
+	struct dprtc_rsp_is_enabled *rsp_params;
+	struct mc_command cmd = { 0 };
+	int err;
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_IS_ENABLED, cmd_flags,
+					  token);
+
+	/* send command to mc*/
+	err = mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	/* retrieve response parameters */
+	rsp_params = (struct dprtc_rsp_is_enabled *)cmd.params;
+	*en = dprtc_get_field(rsp_params->en, ENABLE);
+
+	return 0;
+}
+
+/**
+ * dprtc_reset() - Reset the DPRTC, returns the object to initial state.
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPRTC object
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dprtc_reset(struct fsl_mc_io *mc_io,
+		uint32_t cmd_flags,
+		uint16_t token)
+{
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_RESET,
+					  cmd_flags,
+					  token);
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dprtc_get_attributes - Retrieve DPRTC attributes.
+ *
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPRTC object
+ * @attr:	Returned object's attributes
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dprtc_get_attributes(struct fsl_mc_io *mc_io,
+			 uint32_t cmd_flags,
+			 uint16_t token,
+			 struct dprtc_attr *attr)
+{
+	struct dprtc_rsp_get_attributes *rsp_params;
+	struct mc_command cmd = { 0 };
+	int err;
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_ATTR,
+					  cmd_flags,
+					  token);
+
+	/* send command to mc*/
+	err = mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	/* retrieve response parameters */
+	rsp_params = (struct dprtc_rsp_get_attributes *)cmd.params;
+	attr->id = le32_to_cpu(rsp_params->id);
+	attr->paddr = le32_to_cpu(rsp_params->paddr);
+	attr->little_endian =
+		dprtc_get_field(rsp_params->little_endian, ENDIANNESS);
+	return 0;
+}
+
+/**
+ * dprtc_set_clock_offset() - Sets the clock's offset
+ * (usually relative to another clock).
+ *
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPRTC object
+ * @offset:	New clock offset (in nanoseconds).
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dprtc_set_clock_offset(struct fsl_mc_io *mc_io,
+			   uint32_t cmd_flags,
+			   uint16_t token,
+			   int64_t offset)
+{
+	struct dprtc_cmd_set_clock_offset *cmd_params;
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_CLOCK_OFFSET,
+					  cmd_flags,
+					  token);
+	cmd_params = (struct dprtc_cmd_set_clock_offset *)cmd.params;
+	cmd_params->offset = cpu_to_le64(offset);
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dprtc_set_freq_compensation() - Sets a new frequency compensation value.
+ *
+ * @mc_io:		Pointer to MC portal's I/O object
+ * @cmd_flags:		Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:		Token of DPRTC object
+ * @freq_compensation:	The new frequency compensation value to set.
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dprtc_set_freq_compensation(struct fsl_mc_io *mc_io,
+				uint32_t cmd_flags,
+				uint16_t token,
+				uint32_t freq_compensation)
+{
+	struct dprtc_get_freq_compensation *cmd_params;
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_FREQ_COMPENSATION,
+					  cmd_flags,
+					  token);
+	cmd_params = (struct dprtc_get_freq_compensation *)cmd.params;
+	cmd_params->freq_compensation = cpu_to_le32(freq_compensation);
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dprtc_get_freq_compensation() - Retrieves the frequency compensation value
+ *
+ * @mc_io:		Pointer to MC portal's I/O object
+ * @cmd_flags:		Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:		Token of DPRTC object
+ * @freq_compensation:	Frequency compensation value
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dprtc_get_freq_compensation(struct fsl_mc_io *mc_io,
+				uint32_t cmd_flags,
+				uint16_t token,
+				uint32_t *freq_compensation)
+{
+	struct dprtc_get_freq_compensation *rsp_params;
+	struct mc_command cmd = { 0 };
+	int err;
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_FREQ_COMPENSATION,
+					  cmd_flags,
+					  token);
+
+	/* send command to mc*/
+	err = mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	/* retrieve response parameters */
+	rsp_params = (struct dprtc_get_freq_compensation *)cmd.params;
+	*freq_compensation = le32_to_cpu(rsp_params->freq_compensation);
+
+	return 0;
+}
+
+/**
+ * dprtc_get_time() - Returns the current RTC time.
+ *
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPRTC object
+ * @time:	Current RTC time.
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dprtc_get_time(struct fsl_mc_io *mc_io,
+		   uint32_t cmd_flags,
+		   uint16_t token,
+		   uint64_t *time)
+{
+	struct dprtc_time *rsp_params;
+	struct mc_command cmd = { 0 };
+	int err;
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_TIME,
+					  cmd_flags,
+					  token);
+
+	/* send command to mc*/
+	err = mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	/* retrieve response parameters */
+	rsp_params = (struct dprtc_time *)cmd.params;
+	*time = le64_to_cpu(rsp_params->time);
+
+	return 0;
+}
+
+/**
+ * dprtc_set_time() - Updates current RTC time.
+ *
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPRTC object
+ * @time:	New RTC time.
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dprtc_set_time(struct fsl_mc_io *mc_io,
+		   uint32_t cmd_flags,
+		   uint16_t token,
+		   uint64_t time)
+{
+	struct dprtc_time *cmd_params;
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_TIME,
+					  cmd_flags,
+					  token);
+	cmd_params = (struct dprtc_time *)cmd.params;
+	cmd_params->time = cpu_to_le64(time);
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dprtc_set_alarm() - Defines and sets alarm.
+ *
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPRTC object
+ * @time:	In nanoseconds, the time when the alarm
+ *			should go off - must be a multiple of
+ *			1 microsecond
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dprtc_set_alarm(struct fsl_mc_io *mc_io,
+		    uint32_t cmd_flags,
+		    uint16_t token, uint64_t time)
+{
+	struct dprtc_time *cmd_params;
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_ALARM,
+					  cmd_flags,
+					  token);
+	cmd_params = (struct dprtc_time *)cmd.params;
+	cmd_params->time = cpu_to_le64(time);
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dprtc_get_api_version() - Get Data Path Real Time Counter API version
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @major_ver:	Major version of data path real time counter API
+ * @minor_ver:	Minor version of data path real time counter API
+ *
+ * Return:  '0' on Success; Error code otherwise.
+ */
+int dprtc_get_api_version(struct fsl_mc_io *mc_io,
+			  uint32_t cmd_flags,
+			  uint16_t *major_ver,
+			  uint16_t *minor_ver)
+{
+	struct dprtc_rsp_get_api_version *rsp_params;
+	struct mc_command cmd = { 0 };
+	int err;
+
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_API_VERSION,
+					cmd_flags,
+					0);
+
+	err = mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	rsp_params = (struct dprtc_rsp_get_api_version *)cmd.params;
+	*major_ver = le16_to_cpu(rsp_params->major);
+	*minor_ver = le16_to_cpu(rsp_params->minor);
+
+	return 0;
+}
diff --git a/drivers/net/dpaa2/mc/fsl_dprtc.h b/drivers/net/dpaa2/mc/fsl_dprtc.h
new file mode 100644
index 000000000..49edb5a05
--- /dev/null
+++ b/drivers/net/dpaa2/mc/fsl_dprtc.h
@@ -0,0 +1,109 @@
+/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
+ * Copyright 2019 NXP
+ */
+#ifndef __FSL_DPRTC_H
+#define __FSL_DPRTC_H
+
+/** @addtogroup dprtc Data Path Real Time Counter API
+ * Contains initialization APIs and runtime control APIs for RTC
+ * @{
+ */
+
+struct fsl_mc_io;
+
+int dprtc_open(struct fsl_mc_io *mc_io,
+	       uint32_t cmd_flags,
+	       int dprtc_id,
+	       uint16_t *token);
+
+int dprtc_close(struct fsl_mc_io *mc_io,
+		uint32_t cmd_flags,
+		uint16_t token);
+
+/**
+ * struct dprtc_cfg - Structure representing DPRTC configuration
+ * @options:	place holder
+ */
+struct dprtc_cfg {
+	uint32_t options;
+};
+
+int dprtc_create(struct fsl_mc_io *mc_io,
+		 uint16_t dprc_token,
+		 uint32_t cmd_flags,
+		 const struct dprtc_cfg *cfg,
+		 uint32_t *obj_id);
+
+int dprtc_destroy(struct fsl_mc_io *mc_io,
+		  uint16_t dprc_token,
+		  uint32_t cmd_flags,
+		  uint32_t object_id);
+
+int dprtc_enable(struct fsl_mc_io *mc_io,
+		 uint32_t cmd_flags,
+		 uint16_t token);
+
+int dprtc_disable(struct fsl_mc_io *mc_io,
+		  uint32_t cmd_flags,
+		  uint16_t token);
+
+int dprtc_is_enabled(struct fsl_mc_io *mc_io,
+		     uint32_t cmd_flags,
+		     uint16_t token,
+		     int *en);
+
+int dprtc_reset(struct fsl_mc_io *mc_io,
+		uint32_t cmd_flags,
+		uint16_t token);
+
+int dprtc_set_clock_offset(struct fsl_mc_io *mc_io,
+			   uint32_t cmd_flags,
+			   uint16_t token,
+			   int64_t offset);
+
+int dprtc_set_freq_compensation(struct fsl_mc_io *mc_io,
+		  uint32_t cmd_flags,
+		  uint16_t token,
+		  uint32_t freq_compensation);
+
+int dprtc_get_freq_compensation(struct fsl_mc_io *mc_io,
+		  uint32_t cmd_flags,
+		  uint16_t token,
+		  uint32_t *freq_compensation);
+
+int dprtc_get_time(struct fsl_mc_io *mc_io,
+		   uint32_t cmd_flags,
+		   uint16_t token,
+		   uint64_t *time);
+
+int dprtc_set_time(struct fsl_mc_io *mc_io,
+		   uint32_t cmd_flags,
+		   uint16_t token,
+		   uint64_t time);
+
+int dprtc_set_alarm(struct fsl_mc_io *mc_io,
+		    uint32_t cmd_flags,
+		    uint16_t token,
+		    uint64_t time);
+
+/**
+ * struct dprtc_attr - Structure representing DPRTC attributes
+ * @id:		DPRTC object ID
+ */
+struct dprtc_attr {
+	int id;
+	int paddr;
+	int little_endian;
+};
+
+int dprtc_get_attributes(struct fsl_mc_io *mc_io,
+			 uint32_t cmd_flags,
+			 uint16_t token,
+			 struct dprtc_attr *attr);
+
+int dprtc_get_api_version(struct fsl_mc_io *mc_io,
+			  uint32_t cmd_flags,
+			  uint16_t *major_ver,
+			  uint16_t *minor_ver);
+
+#endif /* __FSL_DPRTC_H */
diff --git a/drivers/net/dpaa2/mc/fsl_dprtc_cmd.h b/drivers/net/dpaa2/mc/fsl_dprtc_cmd.h
new file mode 100644
index 000000000..eca12ff5e
--- /dev/null
+++ b/drivers/net/dpaa2/mc/fsl_dprtc_cmd.h
@@ -0,0 +1,91 @@
+/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
+ * Copyright 2019 NXP
+ */
+#include <fsl_mc_sys.h>
+#ifndef _FSL_DPRTC_CMD_H
+#define _FSL_DPRTC_CMD_H
+
+/* DPRTC Version */
+#define DPRTC_VER_MAJOR			2
+#define DPRTC_VER_MINOR			1
+
+/* Command versioning */
+#define DPRTC_CMD_BASE_VERSION		1
+#define DPRTC_CMD_ID_OFFSET		4
+
+#define DPRTC_CMD(id)	(((id) << DPRTC_CMD_ID_OFFSET) | DPRTC_CMD_BASE_VERSION)
+
+/* Command IDs */
+#define DPRTC_CMDID_CLOSE			DPRTC_CMD(0x800)
+#define DPRTC_CMDID_OPEN			DPRTC_CMD(0x810)
+#define DPRTC_CMDID_CREATE			DPRTC_CMD(0x910)
+#define DPRTC_CMDID_DESTROY			DPRTC_CMD(0x990)
+#define DPRTC_CMDID_GET_API_VERSION		DPRTC_CMD(0xa10)
+
+#define DPRTC_CMDID_ENABLE			DPRTC_CMD(0x002)
+#define DPRTC_CMDID_DISABLE			DPRTC_CMD(0x003)
+#define DPRTC_CMDID_GET_ATTR			DPRTC_CMD(0x004)
+#define DPRTC_CMDID_RESET			DPRTC_CMD(0x005)
+#define DPRTC_CMDID_IS_ENABLED			DPRTC_CMD(0x006)
+
+#define DPRTC_CMDID_SET_CLOCK_OFFSET		DPRTC_CMD(0x1d0)
+#define DPRTC_CMDID_SET_FREQ_COMPENSATION	DPRTC_CMD(0x1d1)
+#define DPRTC_CMDID_GET_FREQ_COMPENSATION	DPRTC_CMD(0x1d2)
+#define DPRTC_CMDID_GET_TIME			DPRTC_CMD(0x1d3)
+#define DPRTC_CMDID_SET_TIME			DPRTC_CMD(0x1d4)
+#define DPRTC_CMDID_SET_ALARM			DPRTC_CMD(0x1d5)
+#define DPRTC_CMDID_SET_PERIODIC_PULSE		DPRTC_CMD(0x1d6)
+#define DPRTC_CMDID_CLEAR_PERIODIC_PULSE	DPRTC_CMD(0x1d7)
+#define DPRTC_CMDID_SET_EXT_TRIGGER		DPRTC_CMD(0x1d8)
+#define DPRTC_CMDID_CLEAR_EXT_TRIGGER		DPRTC_CMD(0x1d9)
+#define DPRTC_CMDID_GET_EXT_TRIGGER_TIMESTAMP	DPRTC_CMD(0x1dA)
+
+/* Macros for accessing command fields smaller than 1byte */
+#define DPRTC_MASK(field)        \
+	GENMASK(DPRTC_##field##_SHIFT + DPRTC_##field##_SIZE - 1, \
+		DPRTC_##field##_SHIFT)
+#define dprtc_get_field(var, field)      \
+	(((var) & DPRTC_MASK(field)) >> DPRTC_##field##_SHIFT)
+
+#pragma pack(push, 1)
+struct dprtc_cmd_open {
+	uint32_t dprtc_id;
+};
+
+struct dprtc_cmd_destroy {
+	uint32_t object_id;
+};
+
+#define DPRTC_ENABLE_SHIFT	0
+#define DPRTC_ENABLE_SIZE	1
+#define DPRTC_ENDIANNESS_SHIFT 0
+#define DPRTC_ENDIANNESS_SIZE  1
+
+struct dprtc_rsp_is_enabled {
+	uint8_t en;
+};
+
+struct dprtc_rsp_get_attributes {
+	uint32_t paddr;
+	uint32_t id;
+	uint8_t little_endian;
+};
+
+struct dprtc_cmd_set_clock_offset {
+	uint64_t offset;
+};
+
+struct dprtc_get_freq_compensation {
+	uint32_t freq_compensation;
+};
+
+struct dprtc_time {
+	uint64_t time;
+};
+
+struct dprtc_rsp_get_api_version {
+	uint16_t major;
+	uint16_t minor;
+};
+#pragma pack(pop)
+#endif /* _FSL_DPRTC_CMD_H */
diff --git a/drivers/net/dpaa2/meson.build b/drivers/net/dpaa2/meson.build
index 7e74c656a..1184ce6b9 100644
--- a/drivers/net/dpaa2/meson.build
+++ b/drivers/net/dpaa2/meson.build
@@ -18,6 +18,10 @@ sources = files('base/dpaa2_hw_dpni.c',
 		'mc/dpdmux.c',
 		'mc/dpni.c')
 
+if dpdk_conf.has('RTE_LIBRTE_IEEE1588')
+	sources += files('mc/dprtc.c')
+endif
+
 includes += include_directories('base', 'mc')
 
 # depends on fslmc bus which uses experimental API
-- 
2.17.1

[dpdk-dev] [PATCH v1 24/30] net/dpaa2: add ptp driver

[Sachin Saxena]

From: Priyanka Jain <priyanka.jain@nxp.com>

This patch adds the support for PTP driver for
DPAA2 devices.

To enable set
CONFIG_RTE_LIBRTE_IEEE1588=y in
config/defconfig_arm64-dpaa2-linuxapp-gc

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
---
 config/defconfig_arm64-dpaa2-linuxapp-gcc    |   2 +-
 drivers/bus/fslmc/fslmc_bus.c                |   2 +
 drivers/bus/fslmc/fslmc_vfio.c               |   2 +
 drivers/bus/fslmc/rte_fslmc.h                |   1 +
 drivers/net/dpaa2/Makefile                   |   1 +
 drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h |   2 +-
 drivers/net/dpaa2/dpaa2_ethdev.c             |   9 +
 drivers/net/dpaa2/dpaa2_ethdev.h             |  27 ++-
 drivers/net/dpaa2/dpaa2_ptp.c                | 181 +++++++++++++++++++
 drivers/net/dpaa2/meson.build                |   1 +
 10 files changed, 225 insertions(+), 3 deletions(-)
 create mode 100644 drivers/net/dpaa2/dpaa2_ptp.c

diff --git a/config/defconfig_arm64-dpaa2-linuxapp-gcc b/config/defconfig_arm64-dpaa2-linuxapp-gcc
index b2543266a..5c7eddd5e 100644
--- a/config/defconfig_arm64-dpaa2-linuxapp-gcc
+++ b/config/defconfig_arm64-dpaa2-linuxapp-gcc
@@ -16,7 +16,7 @@ CONFIG_RTE_CACHE_LINE_SIZE=64
 CONFIG_RTE_PKTMBUF_HEADROOM=128
 
 # Enable IEEE1588, Keep it disable by default
-CONFIG_RTE_LIBRTE_IEEE1588=n
+CONFIG_RTE_LIBRTE_IEEE1588=y
 
 # Doesn't support NUMA
 CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
diff --git a/drivers/bus/fslmc/fslmc_bus.c b/drivers/bus/fslmc/fslmc_bus.c
index a2f482516..9b2dd51c4 100644
--- a/drivers/bus/fslmc/fslmc_bus.c
+++ b/drivers/bus/fslmc/fslmc_bus.c
@@ -191,6 +191,8 @@ scan_one_fslmc_device(char *dev_name)
 		dev->dev_type = DPAA2_QDMA;
 	else if (!strncmp("dpdmux", t_ptr, 6))
 		dev->dev_type = DPAA2_MUX;
+	else if (!strncmp("dprtc", t_ptr, 5))
+		dev->dev_type = DPAA2_DPRTC;
 	else
 		dev->dev_type = DPAA2_UNKNOWN;
 
diff --git a/drivers/bus/fslmc/fslmc_vfio.c b/drivers/bus/fslmc/fslmc_vfio.c
index 9658fd84d..60c51d80e 100644
--- a/drivers/bus/fslmc/fslmc_vfio.c
+++ b/drivers/bus/fslmc/fslmc_vfio.c
@@ -612,6 +612,7 @@ fslmc_process_iodevices(struct rte_dpaa2_device *dev)
 	case DPAA2_IO:
 	case DPAA2_CI:
 	case DPAA2_BPOOL:
+	case DPAA2_DPRTC:
 	case DPAA2_MUX:
 		TAILQ_FOREACH(object, &dpaa2_obj_list, next) {
 			if (dev->dev_type == object->dev_type)
@@ -768,6 +769,7 @@ fslmc_vfio_process_group(void)
 		case DPAA2_CON:
 		case DPAA2_CI:
 		case DPAA2_BPOOL:
+		case DPAA2_DPRTC:
 		case DPAA2_MUX:
 			/* IN case of secondary processes, all control objects
 			 * like dpbp, dpcon, dpci are not initialized/required
diff --git a/drivers/bus/fslmc/rte_fslmc.h b/drivers/bus/fslmc/rte_fslmc.h
index 5cfb24505..31dfd1377 100644
--- a/drivers/bus/fslmc/rte_fslmc.h
+++ b/drivers/bus/fslmc/rte_fslmc.h
@@ -67,6 +67,7 @@ enum rte_dpaa2_dev_type {
 	DPAA2_MPORTAL,  /**< DPMCP type device */
 	DPAA2_QDMA,     /**< DPDMAI type device */
 	DPAA2_MUX,	/**< DPDMUX type device */
+	DPAA2_DPRTC,	/**< DPRTC type device */
 	/* Unknown device placeholder */
 	DPAA2_UNKNOWN,
 	DPAA2_DEVTYPE_MAX,
diff --git a/drivers/net/dpaa2/Makefile b/drivers/net/dpaa2/Makefile
index 9b52fa1e5..0cc539dc5 100644
--- a/drivers/net/dpaa2/Makefile
+++ b/drivers/net/dpaa2/Makefile
@@ -38,6 +38,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += mc/dpni.c
 SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += mc/dpkg.c
 SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += mc/dpdmux.c
 SRCS-$(CONFIG_RTE_LIBRTE_IEEE1588)  += mc/dprtc.c
+SRCS-$(CONFIG_RTE_LIBRTE_IEEE1588)  += dpaa2_ptp.c
 
 LDLIBS += -lrte_bus_fslmc
 LDLIBS += -lrte_mempool_dpaa2
diff --git a/drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h b/drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h
index 0d6324183..699e4c089 100644
--- a/drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h
+++ b/drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h
@@ -279,7 +279,7 @@ struct dpaa2_faead {
 #define DPAA2_ETH_FAS_DISC	      0x80000000
 /* MACSEC frame */
 #define DPAA2_ETH_FAS_MS		0x40000000
-#define DPAA2_ETH_FAS_PTP	       0x08000000
+#define DPAA2_ETH_FAS_PTP	       BIT_POS(59)
 /* Ethernet multicast frame */
 #define DPAA2_ETH_FAS_MC		0x04000000
 /* Ethernet broadcast frame */
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index afad96b15..3381b1894 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -2177,6 +2177,15 @@ static struct eth_dev_ops dpaa2_ethdev_ops = {
 	.rss_hash_update      = dpaa2_dev_rss_hash_update,
 	.rss_hash_conf_get    = dpaa2_dev_rss_hash_conf_get,
 	.filter_ctrl          = dpaa2_dev_flow_ctrl,
+#if defined(RTE_LIBRTE_IEEE1588)
+	.timesync_enable      = dpaa2_timesync_enable,
+	.timesync_disable     = dpaa2_timesync_disable,
+	.timesync_read_time   = dpaa2_timesync_read_time,
+	.timesync_write_time  = dpaa2_timesync_write_time,
+	.timesync_adjust_time = dpaa2_timesync_adjust_time,
+	.timesync_read_rx_timestamp = dpaa2_timesync_read_rx_timestamp,
+	.timesync_read_tx_timestamp = dpaa2_timesync_read_tx_timestamp,
+#endif
 };
 
 /* Populate the mac address from physically available (u-boot/firmware) and/or
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index 04a8ef8da..b51c35f89 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  *
  *   Copyright (c) 2015-2016 Freescale Semiconductor, Inc. All rights reserved.
- *   Copyright 2016 NXP
+ *   Copyright 2016-2019 NXP
  *
  */
 
@@ -130,6 +130,17 @@ struct dpaa2_dev_priv {
 		uint64_t qos_extract_param;
 		uint64_t fs_extract_param[MAX_TCS];
 	} extract;
+
+#if defined(RTE_LIBRTE_IEEE1588)
+	/*stores timestamp of last received packet on dev*/
+	uint64_t rx_timestamp;
+	/*stores timestamp of last received tx confirmation packet on dev*/
+	uint64_t tx_timestamp;
+	/* stores pointer to next tx_conf queue that should be processed,
+	 * it corresponds to last packet transmitted
+	 */
+	struct dpaa2_queue *next_tx_conf_queue;
+#endif
 	LIST_HEAD(, rte_flow) flows; /**< Configured flow rule handles. */
 };
 
@@ -182,4 +193,18 @@ void dpaa2_dev_free_eqresp_buf(uint16_t eqresp_ci);
 void dpaa2_flow_clean(struct rte_eth_dev *dev);
 uint16_t dpaa2_dev_tx_conf(void *queue)  __attribute__((unused));
 
+#if defined(RTE_LIBRTE_IEEE1588)
+int dpaa2_timesync_enable(struct rte_eth_dev *dev);
+int dpaa2_timesync_disable(struct rte_eth_dev *dev);
+int dpaa2_timesync_read_time(struct rte_eth_dev *dev,
+					struct timespec *timestamp);
+int dpaa2_timesync_write_time(struct rte_eth_dev *dev,
+					const struct timespec *timestamp);
+int dpaa2_timesync_adjust_time(struct rte_eth_dev *dev, int64_t delta);
+int dpaa2_timesync_read_rx_timestamp(struct rte_eth_dev *dev,
+						struct timespec *timestamp,
+						uint32_t flags __rte_unused);
+int dpaa2_timesync_read_tx_timestamp(struct rte_eth_dev *dev,
+					  struct timespec *timestamp);
+#endif
 #endif /* _DPAA2_ETHDEV_H */
diff --git a/drivers/net/dpaa2/dpaa2_ptp.c b/drivers/net/dpaa2/dpaa2_ptp.c
new file mode 100644
index 000000000..316912fe3
--- /dev/null
+++ b/drivers/net/dpaa2/dpaa2_ptp.c
@@ -0,0 +1,181 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2019 NXP
+ */
+
+#include <sys/queue.h>
+#include <stdio.h>
+#include <errno.h>
+#include <stdint.h>
+#include <string.h>
+#include <unistd.h>
+#include <stdarg.h>
+
+#include <rte_ethdev.h>
+#include <rte_log.h>
+#include <rte_eth_ctrl.h>
+#include <rte_malloc.h>
+#include <rte_time.h>
+
+#include <rte_fslmc.h>
+#include <fsl_dprtc.h>
+#include <fsl_dpkg.h>
+
+#include <dpaa2_ethdev.h>
+#include <dpaa2_pmd_logs.h>
+
+struct dpaa2_dprtc_dev {
+	struct fsl_mc_io dprtc;  /** handle to DPRTC portal object */
+	uint16_t token;
+	uint32_t dprtc_id; /*HW ID for DPRTC object */
+};
+static struct dpaa2_dprtc_dev *dprtc_dev;
+
+int dpaa2_timesync_enable(struct rte_eth_dev *dev __rte_unused)
+{
+	return 0;
+}
+
+int dpaa2_timesync_disable(struct rte_eth_dev *dev __rte_unused)
+{
+	return 0;
+}
+
+int dpaa2_timesync_read_time(struct rte_eth_dev *dev,
+					struct timespec *timestamp)
+{
+	uint64_t ns;
+	int ret = 0;
+
+	RTE_SET_USED(dev);
+
+	ret = dprtc_get_time(&dprtc_dev->dprtc, CMD_PRI_LOW,
+			     dprtc_dev->token, &ns);
+	if (ret) {
+		DPAA2_PMD_ERR("dprtc_get_time failed ret: %d", ret);
+		return ret;
+	}
+
+	*timestamp = rte_ns_to_timespec(ns);
+
+	return 0;
+}
+
+int dpaa2_timesync_write_time(struct rte_eth_dev *dev,
+					const struct timespec *ts)
+{
+	uint64_t ns;
+	int ret = 0;
+
+	RTE_SET_USED(dev);
+
+	ns = rte_timespec_to_ns(ts);
+
+	ret = dprtc_set_time(&dprtc_dev->dprtc, CMD_PRI_LOW,
+			     dprtc_dev->token, ns);
+	if (ret) {
+		DPAA2_PMD_ERR("dprtc_set_time failed ret: %d", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+int dpaa2_timesync_adjust_time(struct rte_eth_dev *dev, int64_t delta)
+{
+	uint64_t ns;
+	int ret = 0;
+
+	RTE_SET_USED(dev);
+
+	ret = dprtc_get_time(&dprtc_dev->dprtc, CMD_PRI_LOW,
+			     dprtc_dev->token, &ns);
+	if (ret) {
+		DPAA2_PMD_ERR("dprtc_get_time failed ret: %d", ret);
+		return ret;
+	}
+
+	ns += delta;
+
+	ret = dprtc_set_time(&dprtc_dev->dprtc, CMD_PRI_LOW,
+			     dprtc_dev->token, ns);
+	if (ret) {
+		DPAA2_PMD_ERR("dprtc_set_time failed ret: %d", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+int dpaa2_timesync_read_tx_timestamp(struct rte_eth_dev *dev,
+						struct timespec *timestamp)
+{
+	struct dpaa2_dev_priv *priv = dev->data->dev_private;
+
+	if (priv->next_tx_conf_queue)
+		dpaa2_dev_tx_conf(priv->next_tx_conf_queue);
+	else
+		return -1;
+	*timestamp = rte_ns_to_timespec(priv->tx_timestamp);
+
+	return 0;
+}
+
+int dpaa2_timesync_read_rx_timestamp(struct rte_eth_dev *dev,
+						struct timespec *timestamp,
+						uint32_t flags __rte_unused)
+{
+	struct dpaa2_dev_priv *priv = dev->data->dev_private;
+	*timestamp = rte_ns_to_timespec(priv->rx_timestamp);
+	return 0;
+}
+
+static int
+dpaa2_create_dprtc_device(int vdev_fd __rte_unused,
+			   struct vfio_device_info *obj_info __rte_unused,
+			   int dprtc_id)
+{
+	struct dprtc_attr attr;
+	int ret;
+
+	PMD_INIT_FUNC_TRACE();
+
+	/* Allocate DPAA2 dprtc handle */
+	dprtc_dev = rte_malloc(NULL, sizeof(struct dpaa2_dprtc_dev), 0);
+	if (!dprtc_dev) {
+		DPAA2_PMD_ERR("Memory allocation failed for DPRTC Device");
+		return -1;
+	}
+
+	/* Open the dprtc object */
+	dprtc_dev->dprtc.regs = rte_mcp_ptr_list[MC_PORTAL_INDEX];
+	ret = dprtc_open(&dprtc_dev->dprtc, CMD_PRI_LOW, dprtc_id,
+			  &dprtc_dev->token);
+	if (ret) {
+		DPAA2_PMD_ERR("Unable to open dprtc object: err(%d)", ret);
+		goto init_err;
+	}
+
+	ret = dprtc_get_attributes(&dprtc_dev->dprtc, CMD_PRI_LOW,
+				    dprtc_dev->token, &attr);
+	if (ret) {
+		DPAA2_PMD_ERR("Unable to get dprtc attr: err(%d)", ret);
+		goto init_err;
+	}
+
+	dprtc_dev->dprtc_id = dprtc_id;
+
+	return 0;
+
+init_err:
+	if (dprtc_dev)
+		rte_free(dprtc_dev);
+
+	return -1;
+}
+
+static struct rte_dpaa2_object rte_dpaa2_dprtc_obj = {
+	.dev_type = DPAA2_DPRTC,
+	.create = dpaa2_create_dprtc_device,
+};
+
+RTE_PMD_REGISTER_DPAA2_OBJECT(dprtc, rte_dpaa2_dprtc_obj);
diff --git a/drivers/net/dpaa2/meson.build b/drivers/net/dpaa2/meson.build
index 1184ce6b9..fc311e9f7 100644
--- a/drivers/net/dpaa2/meson.build
+++ b/drivers/net/dpaa2/meson.build
@@ -20,6 +20,7 @@ sources = files('base/dpaa2_hw_dpni.c',
 
 if dpdk_conf.has('RTE_LIBRTE_IEEE1588')
 	sources += files('mc/dprtc.c')
+	sources += files('dpaa2_ptp.c')
 endif
 
 includes += include_directories('base', 'mc')
-- 
2.17.1

[dpdk-dev] [PATCH v1 25/30] bus/fslmc: update PA-VA dpaax library only in PA mode

[Sachin Saxena]

From: Shreyansh Jain <shreyansh.jain@nxp.com>

The address translation support for PA->VA is required only in
case of PA mode operation of DPDK. This was causing warning to
be reported on running any DPAA2 application in VA mode:

    Add: Incorrect entry for PA->VA Table(xxxxxxxxxx)
    Add: Lowest address: xxxxxxxxxxxx

This was caused by call to update the DPAAX table when VA mode
was enabled, in which case the VA==IOVA address.

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Reviewed-by: Sachin Saxena <sachin.saxena@nxp.com>
---
 drivers/bus/fslmc/fslmc_bus.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/bus/fslmc/fslmc_bus.c b/drivers/bus/fslmc/fslmc_bus.c
index 9b2dd51c4..aa90d686f 100644
--- a/drivers/bus/fslmc/fslmc_bus.c
+++ b/drivers/bus/fslmc/fslmc_bus.c
@@ -421,8 +421,11 @@ rte_fslmc_probe(void)
 	 *
 	 * Error is ignored as relevant logs are handled within dpaax and
 	 * handling for unavailable dpaax table too is transparent to caller.
+	 *
+	 * And, the IOVA table is only applicable in case of PA mode.
 	 */
-	dpaax_iova_table_populate();
+	if (rte_eal_iova_mode() == RTE_IOVA_PA)
+		dpaax_iova_table_populate();
 
 	TAILQ_FOREACH(dev, &rte_fslmc_bus.device_list, next) {
 		TAILQ_FOREACH(drv, &rte_fslmc_bus.driver_list, next) {
@@ -519,7 +522,8 @@ rte_fslmc_driver_unregister(struct rte_dpaa2_driver *driver)
 	/* Cleanup the PA->VA Translation table; From whereever this function
 	 * is called from.
 	 */
-	dpaax_iova_table_depopulate();
+	if (rte_eal_iova_mode() == RTE_IOVA_PA)
+		dpaax_iova_table_depopulate();
 
 	TAILQ_REMOVE(&fslmc_bus->driver_list, driver, next);
 	/* Update Bus references */
-- 
2.17.1

[dpdk-dev] [PATCH v1 26/30] bus/fslmc: check for Dma map in primary process only

[Sachin Saxena]

From: Shreyansh Jain <shreyansh.jain@nxp.com>

DMA mapping is a property of primary process - SMMU population done
once by primary doesn't need to be populated again in secondary

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Reviewed-by: Sachin Saxena <sachin.saxena@nxp.com>
---
 drivers/bus/fslmc/fslmc_bus.c | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/drivers/bus/fslmc/fslmc_bus.c b/drivers/bus/fslmc/fslmc_bus.c
index aa90d686f..9226d5b62 100644
--- a/drivers/bus/fslmc/fslmc_bus.c
+++ b/drivers/bus/fslmc/fslmc_bus.c
@@ -395,12 +395,15 @@ rte_fslmc_probe(void)
 	/* Map existing segments as well as, in case of hotpluggable memory,
 	 * install callback handler.
 	 */
-	ret = rte_fslmc_vfio_dmamap();
-	if (ret) {
-		DPAA2_BUS_ERR("Unable to DMA map existing VAs: (%d)", ret);
-		/* Not continuing ahead */
-		DPAA2_BUS_ERR("FSLMC VFIO Mapping failed");
-		return 0;
+	if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
+		ret = rte_fslmc_vfio_dmamap();
+		if (ret) {
+			DPAA2_BUS_ERR("Unable to DMA map existing VAs: (%d)",
+				      ret);
+			/* Not continuing ahead */
+			DPAA2_BUS_ERR("FSLMC VFIO Mapping failed");
+			return 0;
+		}
 	}
 
 	ret = fslmc_vfio_process_group();
-- 
2.17.1

[dpdk-dev] [PATCH v1 27/30] bus/fslmc: support multi vfio group

[Sachin Saxena]

From: Hemant Agrawal <hemant.agrawal@nxp.com>

DPAA2 support VFIO device passthrough in VM.
However in this case, each device is associated with different vfio group.

This code required different container id for each group.
On using the same container fd the second time,
ioctl calls are returning error.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/bus/fslmc/fslmc_bus.c  |   7 +-
 drivers/bus/fslmc/fslmc_vfio.c | 160 ++++++++++++++++++++++++++-------
 drivers/bus/fslmc/fslmc_vfio.h |   3 +
 3 files changed, 133 insertions(+), 37 deletions(-)

diff --git a/drivers/bus/fslmc/fslmc_bus.c b/drivers/bus/fslmc/fslmc_bus.c
index 9226d5b62..eff15f25d 100644
--- a/drivers/bus/fslmc/fslmc_bus.c
+++ b/drivers/bus/fslmc/fslmc_bus.c
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  *
- *   Copyright 2016,2018 NXP
+ *   Copyright 2016,2018-2019 NXP
  *
  */
 
@@ -325,8 +325,7 @@ rte_fslmc_scan(void)
 		goto scan_fail;
 
 	/* Scan devices on the group */
-	snprintf(fslmc_dirpath, sizeof(fslmc_dirpath), "%s/%d/devices",
-			VFIO_IOMMU_GROUP_PATH, groupid);
+	sprintf(fslmc_dirpath, "%s/%s", SYSFS_FSL_MC_DEVICES, fslmc_container);
 	dir = opendir(fslmc_dirpath);
 	if (!dir) {
 		DPAA2_BUS_ERR("Unable to open VFIO group directory");
@@ -334,7 +333,7 @@ rte_fslmc_scan(void)
 	}
 
 	while ((entry = readdir(dir)) != NULL) {
-		if (entry->d_name[0] == '.' || entry->d_type != DT_LNK)
+		if (entry->d_name[0] == '.' || entry->d_type != DT_DIR)
 			continue;
 
 		ret = scan_one_fslmc_device(entry->d_name);
diff --git a/drivers/bus/fslmc/fslmc_vfio.c b/drivers/bus/fslmc/fslmc_vfio.c
index 60c51d80e..970969d2b 100644
--- a/drivers/bus/fslmc/fslmc_vfio.c
+++ b/drivers/bus/fslmc/fslmc_vfio.c
@@ -40,16 +40,13 @@
 #include "portal/dpaa2_hw_pvt.h"
 #include "portal/dpaa2_hw_dpio.h"
 
-/** Pathname of FSL-MC devices directory. */
-#define SYSFS_FSL_MC_DEVICES "/sys/bus/fsl-mc/devices"
-
 #define FSLMC_CONTAINER_MAX_LEN 8 /**< Of the format dprc.XX */
 
 /* Number of VFIO containers & groups with in */
 static struct fslmc_vfio_group vfio_group;
 static struct fslmc_vfio_container vfio_container;
 static int container_device_fd;
-static char *fslmc_container;
+char *fslmc_container;
 static int fslmc_iommu_type;
 static uint32_t *msi_intr_vaddr;
 void *(*rte_mcp_ptr_list);
@@ -435,28 +432,136 @@ int rte_fslmc_vfio_dmamap(void)
 	return 0;
 }
 
-static int64_t vfio_map_mcp_obj(struct fslmc_vfio_group *group, char *mcp_obj)
+static int
+fslmc_vfio_setup_device(const char *sysfs_base, const char *dev_addr,
+		int *vfio_dev_fd, struct vfio_device_info *device_info)
+{
+	struct vfio_group_status group_status = {
+			.argsz = sizeof(group_status)
+	};
+	int vfio_group_fd, vfio_container_fd, iommu_group_no, ret;
+
+	/* get group number */
+	ret = rte_vfio_get_group_num(sysfs_base, dev_addr, &iommu_group_no);
+	if (ret < 0)
+		return -1;
+
+	/* get the actual group fd */
+	vfio_group_fd = rte_vfio_get_group_fd(iommu_group_no);
+	if (vfio_group_fd < 0)
+		return -1;
+
+	/* if group_fd == 0, that means the device isn't managed by VFIO */
+	if (vfio_group_fd == 0) {
+		RTE_LOG(WARNING, EAL, " %s not managed by VFIO driver, skipping\n",
+				dev_addr);
+		return 1;
+	}
+
+	/* Opens main vfio file descriptor which represents the "container" */
+	vfio_container_fd = rte_vfio_get_container_fd();
+	if (vfio_container_fd < 0) {
+		DPAA2_BUS_ERR("Failed to open VFIO container");
+		return -errno;
+	}
+
+	/* check if the group is viable */
+	ret = ioctl(vfio_group_fd, VFIO_GROUP_GET_STATUS, &group_status);
+	if (ret) {
+		DPAA2_BUS_ERR("  %s cannot get group status, "
+				"error %i (%s)\n", dev_addr,
+				errno, strerror(errno));
+		close(vfio_group_fd);
+		rte_vfio_clear_group(vfio_group_fd);
+		return -1;
+	} else if (!(group_status.flags & VFIO_GROUP_FLAGS_VIABLE)) {
+		DPAA2_BUS_ERR("  %s VFIO group is not viable!\n", dev_addr);
+		close(vfio_group_fd);
+		rte_vfio_clear_group(vfio_group_fd);
+		return -1;
+	}
+	/* At this point, we know that this group is viable (meaning,
+	 * all devices are either bound to VFIO or not bound to anything)
+	 */
+
+	/* check if group does not have a container yet */
+	if (!(group_status.flags & VFIO_GROUP_FLAGS_CONTAINER_SET)) {
+
+		/* add group to a container */
+		ret = ioctl(vfio_group_fd, VFIO_GROUP_SET_CONTAINER,
+				&vfio_container_fd);
+		if (ret) {
+			DPAA2_BUS_ERR("  %s cannot add VFIO group to container, "
+					"error %i (%s)\n", dev_addr,
+					errno, strerror(errno));
+			close(vfio_group_fd);
+			close(vfio_container_fd);
+			rte_vfio_clear_group(vfio_group_fd);
+			return -1;
+		}
+
+		/*
+		 * set an IOMMU type for container
+		 *
+		 */
+		if (ioctl(vfio_container_fd, VFIO_CHECK_EXTENSION,
+			  fslmc_iommu_type)) {
+			ret = ioctl(vfio_container_fd, VFIO_SET_IOMMU,
+				    fslmc_iommu_type);
+			if (ret) {
+				DPAA2_BUS_ERR("Failed to setup VFIO iommu");
+				close(vfio_group_fd);
+				close(vfio_container_fd);
+				return -errno;
+			}
+		} else {
+			DPAA2_BUS_ERR("No supported IOMMU available");
+			close(vfio_group_fd);
+			close(vfio_container_fd);
+			return -EINVAL;
+		}
+	}
+
+	/* get a file descriptor for the device */
+	*vfio_dev_fd = ioctl(vfio_group_fd, VFIO_GROUP_GET_DEVICE_FD, dev_addr);
+	if (*vfio_dev_fd < 0) {
+		/* if we cannot get a device fd, this implies a problem with
+		 * the VFIO group or the container not having IOMMU configured.
+		 */
+
+		DPAA2_BUS_WARN("Getting a vfio_dev_fd for %s failed", dev_addr);
+		close(vfio_group_fd);
+		close(vfio_container_fd);
+		rte_vfio_clear_group(vfio_group_fd);
+		return -1;
+	}
+
+	/* test and setup the device */
+	ret = ioctl(*vfio_dev_fd, VFIO_DEVICE_GET_INFO, device_info);
+	if (ret) {
+		DPAA2_BUS_ERR("  %s cannot get device info, error %i (%s)",
+				dev_addr, errno, strerror(errno));
+		close(*vfio_dev_fd);
+		close(vfio_group_fd);
+		close(vfio_container_fd);
+		rte_vfio_clear_group(vfio_group_fd);
+		return -1;
+	}
+
+	return 0;
+}
+
+static intptr_t vfio_map_mcp_obj(const char *mcp_obj)
 {
 	intptr_t v_addr = (intptr_t)MAP_FAILED;
 	int32_t ret, mc_fd;
+	struct vfio_group_status status = { .argsz = sizeof(status) };
 
 	struct vfio_device_info d_info = { .argsz = sizeof(d_info) };
 	struct vfio_region_info reg_info = { .argsz = sizeof(reg_info) };
 
-	/* getting the mcp object's fd*/
-	mc_fd = ioctl(group->fd, VFIO_GROUP_GET_DEVICE_FD, mcp_obj);
-	if (mc_fd < 0) {
-		DPAA2_BUS_ERR("Error in VFIO get dev %s fd from group %d",
-			      mcp_obj, group->fd);
-		return v_addr;
-	}
-
-	/* getting device info*/
-	ret = ioctl(mc_fd, VFIO_DEVICE_GET_INFO, &d_info);
-	if (ret < 0) {
-		DPAA2_BUS_ERR("Error in VFIO getting DEVICE_INFO");
-		goto MC_FAILURE;
-	}
+	fslmc_vfio_setup_device(SYSFS_FSL_MC_DEVICES, mcp_obj,
+			&mc_fd, &d_info);
 
 	/* getting device region info*/
 	ret = ioctl(mc_fd, VFIO_DEVICE_GET_REGION_INFO, &reg_info);
@@ -589,19 +694,8 @@ fslmc_process_iodevices(struct rte_dpaa2_device *dev)
 	struct vfio_device_info device_info = { .argsz = sizeof(device_info) };
 	struct rte_dpaa2_object *object = NULL;
 
-	dev_fd = ioctl(vfio_group.fd, VFIO_GROUP_GET_DEVICE_FD,
-		       dev->device.name);
-	if (dev_fd <= 0) {
-		DPAA2_BUS_ERR("Unable to obtain device FD for device:%s",
-			      dev->device.name);
-		return -1;
-	}
-
-	if (ioctl(dev_fd, VFIO_DEVICE_GET_INFO, &device_info)) {
-		DPAA2_BUS_ERR("Unable to obtain information for device:%s",
-			      dev->device.name);
-		return -1;
-	}
+	fslmc_vfio_setup_device(SYSFS_FSL_MC_DEVICES, dev->device.name,
+			&dev_fd, &device_info);
 
 	switch (dev->dev_type) {
 	case DPAA2_ETH:
@@ -654,7 +748,7 @@ fslmc_process_mcp(struct rte_dpaa2_device *dev)
 		goto cleanup;
 	}
 
-	v_addr = vfio_map_mcp_obj(&vfio_group, dev_name);
+	v_addr = vfio_map_mcp_obj(dev->device.name);
 	if (v_addr == (intptr_t)MAP_FAILED) {
 		DPAA2_BUS_ERR("Error mapping region (errno = %d)", errno);
 		ret = -1;
diff --git a/drivers/bus/fslmc/fslmc_vfio.h b/drivers/bus/fslmc/fslmc_vfio.h
index e877255ea..c98812129 100644
--- a/drivers/bus/fslmc/fslmc_vfio.h
+++ b/drivers/bus/fslmc/fslmc_vfio.h
@@ -10,6 +10,8 @@
 
 #include <rte_vfio.h>
 
+/* Pathname of FSL-MC devices directory. */
+#define SYSFS_FSL_MC_DEVICES	"/sys/bus/fsl-mc/devices"
 #define DPAA2_MC_DPNI_DEVID	7
 #define DPAA2_MC_DPSECI_DEVID	3
 #define DPAA2_MC_DPCON_DEVID	5
@@ -38,6 +40,7 @@ typedef struct fslmc_vfio_container {
 	struct fslmc_vfio_group *group;
 } fslmc_vfio_container;
 
+extern char *fslmc_container;
 int rte_dpaa2_intr_enable(struct rte_intr_handle *intr_handle, int index);
 int rte_dpaa2_intr_disable(struct rte_intr_handle *intr_handle, int index);
 
-- 
2.17.1

[dpdk-dev] [PATCH v1 28/30] net/dpaa2: support separate MC portal per process

[Sachin Saxena]

From: Shreyansh Jain <shreyansh.jain@nxp.com>

Earlier, there was a single MCP handle which was available across
complete DPAA2 driver as well as part of the dev_private which was
shared by the secondary process.

For secondary, that is not valid and it would require to open its
own handle for the MC. This is eventually used as part of the DPNI
configuration.

By using the process_private member of the rte_eth_dev, it is
possible to keep separate handles per process. Without worry of
overwriting when secondary process accesses the dev_private.

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Reviewed-by: Sachin Saxena <sachin.saxena@nxp.com>
---
 drivers/net/dpaa2/dpaa2_ethdev.c | 108 ++++++++++++++++---------------
 drivers/net/dpaa2/dpaa2_ethdev.h |   3 +
 2 files changed, 59 insertions(+), 52 deletions(-)

diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 3381b1894..fe84f3ac6 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -117,7 +117,7 @@ dpaa2_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
 {
 	int ret;
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = priv->hw;
+	struct fsl_mc_io *dpni = dev->process_private;
 
 	PMD_INIT_FUNC_TRACE();
 
@@ -144,7 +144,7 @@ static int
 dpaa2_vlan_offload_set(struct rte_eth_dev *dev, int mask)
 {
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = priv->hw;
+	struct fsl_mc_io *dpni = dev->process_private;
 	int ret;
 
 	PMD_INIT_FUNC_TRACE();
@@ -182,7 +182,7 @@ dpaa2_vlan_tpid_set(struct rte_eth_dev *dev,
 		      uint16_t tpid)
 {
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = priv->hw;
+	struct fsl_mc_io *dpni = dev->process_private;
 	int ret = -ENOTSUP;
 
 	PMD_INIT_FUNC_TRACE();
@@ -220,8 +220,7 @@ dpaa2_fw_version_get(struct rte_eth_dev *dev,
 		     size_t fw_size)
 {
 	int ret;
-	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = priv->hw;
+	struct fsl_mc_io *dpni = dev->process_private;
 	struct mc_soc_version mc_plat_info = {0};
 	struct mc_version mc_ver_info = {0};
 
@@ -428,7 +427,7 @@ static int
 dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
 {
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = priv->hw;
+	struct fsl_mc_io *dpni = dev->process_private;
 	struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
 	uint64_t rx_offloads = eth_conf->rxmode.offloads;
 	uint64_t tx_offloads = eth_conf->txmode.offloads;
@@ -568,7 +567,7 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
 			 struct rte_mempool *mb_pool)
 {
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 	struct dpaa2_queue *dpaa2_q;
 	struct dpni_queue cfg;
 	uint8_t options = 0;
@@ -716,7 +715,7 @@ dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
 		priv->tx_vq[tx_queue_id];
 	struct dpaa2_queue *dpaa2_tx_conf_q = (struct dpaa2_queue *)
 		priv->tx_conf_vq[tx_queue_id];
-	struct fsl_mc_io *dpni = priv->hw;
+	struct fsl_mc_io *dpni = dev->process_private;
 	struct dpni_queue tx_conf_cfg;
 	struct dpni_queue tx_flow_cfg;
 	uint8_t options = 0, flow_id;
@@ -842,7 +841,8 @@ dpaa2_dev_rx_queue_release(void *q __rte_unused)
 {
 	struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)q;
 	struct dpaa2_dev_priv *priv = dpaa2_q->eth_data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni =
+		(struct fsl_mc_io *)priv->eth_dev->process_private;
 	uint8_t options = 0;
 	int ret;
 	struct dpni_queue cfg = {};
@@ -939,7 +939,7 @@ dpaa2_interrupt_handler(void *param)
 {
 	struct rte_eth_dev *dev = param;
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 	int ret;
 	int irq_index = DPNI_IRQ_INDEX;
 	unsigned int status = 0, clear = 0;
@@ -978,7 +978,7 @@ dpaa2_eth_setup_irqs(struct rte_eth_dev *dev, int enable)
 {
 	int err = 0;
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 	int irq_index = DPNI_IRQ_INDEX;
 	unsigned int mask = DPNI_IRQ_EVENT_LINK_CHANGED;
 
@@ -1008,7 +1008,7 @@ dpaa2_dev_start(struct rte_eth_dev *dev)
 	struct rte_dpaa2_device *dpaa2_dev;
 	struct rte_eth_dev_data *data = dev->data;
 	struct dpaa2_dev_priv *priv = data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 	struct dpni_queue cfg;
 	struct dpni_error_cfg	err_cfg;
 	uint16_t qdid;
@@ -1101,7 +1101,7 @@ static void
 dpaa2_dev_stop(struct rte_eth_dev *dev)
 {
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 	int ret;
 	struct rte_eth_link link;
 	struct rte_intr_handle *intr_handle = dev->intr_handle;
@@ -1141,7 +1141,7 @@ static void
 dpaa2_dev_close(struct rte_eth_dev *dev)
 {
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 	int ret;
 	struct rte_eth_link link;
 
@@ -1166,7 +1166,7 @@ dpaa2_dev_promiscuous_enable(
 {
 	int ret;
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 
 	PMD_INIT_FUNC_TRACE();
 
@@ -1190,7 +1190,7 @@ dpaa2_dev_promiscuous_disable(
 {
 	int ret;
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 
 	PMD_INIT_FUNC_TRACE();
 
@@ -1218,7 +1218,7 @@ dpaa2_dev_allmulticast_enable(
 {
 	int ret;
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 
 	PMD_INIT_FUNC_TRACE();
 
@@ -1237,7 +1237,7 @@ dpaa2_dev_allmulticast_disable(struct rte_eth_dev *dev)
 {
 	int ret;
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 
 	PMD_INIT_FUNC_TRACE();
 
@@ -1260,7 +1260,7 @@ dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
 {
 	int ret;
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 	uint32_t frame_size = mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN
 				+ VLAN_TAG_SIZE;
 
@@ -1305,7 +1305,7 @@ dpaa2_dev_add_mac_addr(struct rte_eth_dev *dev,
 {
 	int ret;
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 
 	PMD_INIT_FUNC_TRACE();
 
@@ -1328,7 +1328,7 @@ dpaa2_dev_remove_mac_addr(struct rte_eth_dev *dev,
 {
 	int ret;
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 	struct rte_eth_dev_data *data = dev->data;
 	struct rte_ether_addr *macaddr;
 
@@ -1354,7 +1354,7 @@ dpaa2_dev_set_mac_addr(struct rte_eth_dev *dev,
 {
 	int ret;
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 
 	PMD_INIT_FUNC_TRACE();
 
@@ -1378,7 +1378,7 @@ int dpaa2_dev_stats_get(struct rte_eth_dev *dev,
 			 struct rte_eth_stats *stats)
 {
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 	int32_t  retcode;
 	uint8_t page0 = 0, page1 = 1, page2 = 2;
 	union dpni_statistics value;
@@ -1458,7 +1458,7 @@ dpaa2_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
 		     unsigned int n)
 {
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 	int32_t  retcode;
 	union dpni_statistics value[5] = {};
 	unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings);
@@ -1538,7 +1538,8 @@ dpaa2_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
 
 	if (!ids) {
 		struct dpaa2_dev_priv *priv = dev->data->dev_private;
-		struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+		struct fsl_mc_io *dpni =
+			(struct fsl_mc_io *)dev->process_private;
 		int32_t  retcode;
 		union dpni_statistics value[5] = {};
 
@@ -1620,7 +1621,7 @@ static void
 dpaa2_dev_stats_reset(struct rte_eth_dev *dev)
 {
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 	int32_t  retcode;
 	int i;
 	struct dpaa2_queue *dpaa2_q;
@@ -1663,7 +1664,7 @@ dpaa2_dev_link_update(struct rte_eth_dev *dev,
 {
 	int ret;
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 	struct rte_eth_link link;
 	struct dpni_link_state state = {0};
 
@@ -1711,7 +1712,7 @@ dpaa2_dev_set_link_up(struct rte_eth_dev *dev)
 	struct dpni_link_state state = {0};
 
 	priv = dev->data->dev_private;
-	dpni = (struct fsl_mc_io *)priv->hw;
+	dpni = (struct fsl_mc_io *)dev->process_private;
 
 	if (dpni == NULL) {
 		DPAA2_PMD_ERR("dpni is NULL");
@@ -1767,7 +1768,7 @@ dpaa2_dev_set_link_down(struct rte_eth_dev *dev)
 	PMD_INIT_FUNC_TRACE();
 
 	priv = dev->data->dev_private;
-	dpni = (struct fsl_mc_io *)priv->hw;
+	dpni = (struct fsl_mc_io *)dev->process_private;
 
 	if (dpni == NULL) {
 		DPAA2_PMD_ERR("Device has not yet been configured");
@@ -1821,7 +1822,7 @@ dpaa2_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
 	PMD_INIT_FUNC_TRACE();
 
 	priv = dev->data->dev_private;
-	dpni = (struct fsl_mc_io *)priv->hw;
+	dpni = (struct fsl_mc_io *)dev->process_private;
 
 	if (dpni == NULL || fc_conf == NULL) {
 		DPAA2_PMD_ERR("device not configured");
@@ -1877,7 +1878,7 @@ dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
 	PMD_INIT_FUNC_TRACE();
 
 	priv = dev->data->dev_private;
-	dpni = (struct fsl_mc_io *)priv->hw;
+	dpni = (struct fsl_mc_io *)dev->process_private;
 
 	if (dpni == NULL) {
 		DPAA2_PMD_ERR("dpni is NULL");
@@ -1997,7 +1998,7 @@ int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev,
 		const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
 {
 	struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 	struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
 	uint8_t flow_id = dpaa2_ethq->flow_id;
 	struct dpni_queue cfg;
@@ -2078,7 +2079,7 @@ int dpaa2_eth_eventq_detach(const struct rte_eth_dev *dev,
 		int eth_rx_queue_id)
 {
 	struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 	struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
 	uint8_t flow_id = dpaa2_ethq->flow_id;
 	struct dpni_queue cfg;
@@ -2307,6 +2308,14 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
 
 	PMD_INIT_FUNC_TRACE();
 
+	dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0);
+	if (!dpni_dev) {
+		DPAA2_PMD_ERR("Memory allocation failed for dpni device");
+		return -1;
+	}
+	dpni_dev->regs = rte_mcp_ptr_list[0];
+	eth_dev->process_private = (void *)dpni_dev;
+
 	/* For secondary processes, the primary has done all the work */
 	if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
 		/* In case of secondary, only burst and ops API need to be
@@ -2327,14 +2336,6 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
 	dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
 
 	hw_id = dpaa2_dev->object_id;
-
-	dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0);
-	if (!dpni_dev) {
-		DPAA2_PMD_ERR("Memory allocation failed for dpni device");
-		return -1;
-	}
-
-	dpni_dev->regs = rte_mcp_ptr_list[0];
 	ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token);
 	if (ret) {
 		DPAA2_PMD_ERR(
@@ -2508,7 +2509,7 @@ static int
 dpaa2_dev_uninit(struct rte_eth_dev *eth_dev)
 {
 	struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_dev->process_private;
 	int i, ret;
 
 	PMD_INIT_FUNC_TRACE();
@@ -2535,6 +2536,7 @@ dpaa2_dev_uninit(struct rte_eth_dev *eth_dev)
 
 	/* Free the allocated memory for ethernet private data and dpni*/
 	priv->hw = NULL;
+	eth_dev->process_private = NULL;
 	rte_free(dpni);
 
 	for (i = 0; i < MAX_TCS; i++) {
@@ -2558,7 +2560,7 @@ rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
 		struct rte_dpaa2_device *dpaa2_dev)
 {
 	struct rte_eth_dev *eth_dev;
-	struct dpaa2_dev_priv *priv;
+	struct dpaa2_dev_priv *dev_priv;
 	int diag;
 
 	if ((DPAA2_MBUF_HW_ANNOTATION + DPAA2_FD_PTA_SIZE) >
@@ -2575,20 +2577,25 @@ rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
 		eth_dev = rte_eth_dev_allocate(dpaa2_dev->device.name);
 		if (!eth_dev)
 			return -ENODEV;
-		eth_dev->data->dev_private = rte_zmalloc(
-						"ethdev private structure",
-						sizeof(struct dpaa2_dev_priv),
-						RTE_CACHE_LINE_SIZE);
-		if (eth_dev->data->dev_private == NULL) {
+		dev_priv = rte_zmalloc("ethdev private structure",
+				       sizeof(struct dpaa2_dev_priv),
+				       RTE_CACHE_LINE_SIZE);
+		if (dev_priv == NULL) {
 			DPAA2_PMD_CRIT(
 				"Unable to allocate memory for private data");
 			rte_eth_dev_release_port(eth_dev);
 			return -ENOMEM;
 		}
+		eth_dev->data->dev_private = (void *)dev_priv;
+		/* Store a pointer to eth_dev in dev_private */
+		dev_priv->eth_dev = eth_dev;
+		dev_priv->tx_conf_en = 0;
 	} else {
 		eth_dev = rte_eth_dev_attach_secondary(dpaa2_dev->device.name);
-		if (!eth_dev)
+		if (!eth_dev) {
+			DPAA2_PMD_DEBUG("returning enodev");
 			return -ENODEV;
+		}
 	}
 
 	eth_dev->device = &dpaa2_dev->device;
@@ -2606,9 +2613,6 @@ rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
 		return 0;
 	}
 
-	priv = eth_dev->data->dev_private;
-	priv->tx_conf_en = 0;
-
 	rte_eth_dev_release_port(eth_dev);
 	return diag;
 }
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index b51c35f89..bcb8360be 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -141,6 +141,9 @@ struct dpaa2_dev_priv {
 	 */
 	struct dpaa2_queue *next_tx_conf_queue;
 #endif
+
+	struct rte_eth_dev *eth_dev; /**< Pointer back to holding ethdev */
+
 	LIST_HEAD(, rte_flow) flows; /**< Configured flow rule handles. */
 };
 
-- 
2.17.1

[dpdk-dev] [PATCH v1 29/30] net/dpaa2: add support for soft parser in MC

[Sachin Saxena]

From: Sunil Kumar Kori <sunil.kori@nxp.com>

Signed-off-by: Sunil Kumar Kori <sunil.kori@nxp.com>
Reviewed-by: Sachin Saxena <sachin.saxena@nxp.com>
---
 drivers/net/dpaa2/mc/dpni.c         | 117 ++++++++++++++++++++++++
 drivers/net/dpaa2/mc/fsl_dpni.h     | 133 ++++++++++++++++++++++++++++
 drivers/net/dpaa2/mc/fsl_dpni_cmd.h |  43 ++++++++-
 3 files changed, 292 insertions(+), 1 deletion(-)

diff --git a/drivers/net/dpaa2/mc/dpni.c b/drivers/net/dpaa2/mc/dpni.c
index 362cd476f..b37f9976f 100644
--- a/drivers/net/dpaa2/mc/dpni.c
+++ b/drivers/net/dpaa2/mc/dpni.c
@@ -2484,3 +2484,120 @@ int dpni_get_custom_tpid(struct fsl_mc_io *mc_io, uint32_t cmd_flags,
 
 	return err;
 }
+
+int dpni_load_sw_sequence(struct fsl_mc_io *mc_io,
+	      uint32_t cmd_flags,
+	      uint16_t token,
+		  struct dpni_load_ss_cfg *cfg)
+{
+	struct dpni_load_sw_sequence *cmd_params;
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPNI_CMDID_LOAD_SW_SEQUENCE,
+					  cmd_flags,
+					  token);
+	cmd_params = (struct dpni_load_sw_sequence *)cmd.params;
+	cmd_params->dest = cfg->dest;
+	cmd_params->ss_offset = cpu_to_le16(cfg->ss_offset);
+	cmd_params->ss_size = cpu_to_le16(cfg->ss_size);
+	cmd_params->ss_iova = cpu_to_le64(cfg->ss_iova);
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+int dpni_enable_sw_sequence(struct fsl_mc_io *mc_io,
+	      uint32_t cmd_flags,
+	      uint16_t token,
+		  struct dpni_enable_ss_cfg *cfg)
+{
+	struct dpni_enable_sw_sequence *cmd_params;
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPNI_CMDID_ENABLE_SW_SEQUENCE,
+					  cmd_flags,
+					  token);
+	cmd_params = (struct dpni_enable_sw_sequence *)cmd.params;
+	cmd_params->dest = cfg->dest;
+	cmd_params->set_start = cfg->set_start;
+	cmd_params->hxs = cpu_to_le16(cfg->hxs);
+	cmd_params->ss_offset = cpu_to_le16(cfg->ss_offset);
+	cmd_params->param_offset = cfg->param_offset;
+	cmd_params->param_size = cfg->param_size;
+	cmd_params->param_iova = cpu_to_le64(cfg->param_iova);
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dpni_get_sw_sequence_layout() - Get the soft sequence layout
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPNI object
+ * @src:	Source of the layout (WRIOP Rx or Tx)
+ * @ss_layout_iova:  I/O virtual address of 264 bytes DMA-able memory
+ *
+ * warning: After calling this function, call dpni_extract_sw_sequence_layout()
+ *		to get the layout.
+ *
+ * Return:	'0' on Success; error code otherwise.
+ */
+int dpni_get_sw_sequence_layout(struct fsl_mc_io *mc_io,
+	      uint32_t cmd_flags,
+	      uint16_t token,
+		  enum dpni_soft_sequence_dest src,
+		  uint64_t ss_layout_iova)
+{
+	struct dpni_get_sw_sequence_layout *cmd_params;
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_SW_SEQUENCE_LAYOUT,
+					  cmd_flags,
+					  token);
+
+	cmd_params = (struct dpni_get_sw_sequence_layout *)cmd.params;
+	cmd_params->src = src;
+	cmd_params->layout_iova = cpu_to_le64(ss_layout_iova);
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dpni_extract_sw_sequence_layout() - extract the software sequence layout
+ * @layout:		software sequence layout
+ * @sw_sequence_layout_buf:	Zeroed 264 bytes of memory before mapping it
+ *				to DMA
+ *
+ * This function has to be called after dpni_get_sw_sequence_layout
+ *
+ */
+void dpni_extract_sw_sequence_layout(struct dpni_sw_sequence_layout *layout,
+			     const uint8_t *sw_sequence_layout_buf)
+{
+	const struct dpni_sw_sequence_layout_entry *ext_params;
+	int i;
+	uint16_t ss_size, ss_offset;
+
+	ext_params = (const struct dpni_sw_sequence_layout_entry *)
+						sw_sequence_layout_buf;
+
+	for (i = 0; i < DPNI_SW_SEQUENCE_LAYOUT_SIZE; i++) {
+		ss_offset = le16_to_cpu(ext_params[i].ss_offset);
+		ss_size = le16_to_cpu(ext_params[i].ss_size);
+
+		if (ss_offset == 0 && ss_size == 0) {
+			layout->num_ss = i;
+			return;
+		}
+
+		layout->ss[i].ss_offset = ss_offset;
+		layout->ss[i].ss_size = ss_size;
+		layout->ss[i].param_offset = ext_params[i].param_offset;
+		layout->ss[i].param_size = ext_params[i].param_size;
+	}
+}
diff --git a/drivers/net/dpaa2/mc/fsl_dpni.h b/drivers/net/dpaa2/mc/fsl_dpni.h
index 8b1cfbac7..97fde316e 100644
--- a/drivers/net/dpaa2/mc/fsl_dpni.h
+++ b/drivers/net/dpaa2/mc/fsl_dpni.h
@@ -96,6 +96,12 @@ struct fsl_mc_io;
  */
 #define DPNI_OPT_CUSTOM_CG				0x000200
 
+
+/**
+ * Software sequence maximum layout size
+ */
+#define DPNI_SW_SEQUENCE_LAYOUT_SIZE 33
+
 int dpni_open(struct fsl_mc_io *mc_io,
 	      uint32_t cmd_flags,
 	      int dpni_id,
@@ -1424,4 +1430,131 @@ struct dpni_custom_tpid_cfg {
 int dpni_get_custom_tpid(struct fsl_mc_io *mc_io, uint32_t cmd_flags,
 		uint16_t token, struct dpni_custom_tpid_cfg *tpid);
 
+/**
+ * enum dpni_soft_sequence_dest - Enumeration of WRIOP software sequence
+ *				destinations
+ * @DPNI_SS_INGRESS: Ingress parser
+ * @DPNI_SS_EGRESS: Egress parser
+ */
+enum dpni_soft_sequence_dest {
+	DPNI_SS_INGRESS = 0,
+	DPNI_SS_EGRESS = 1,
+};
+
+/**
+ * struct dpni_load_ss_cfg - Structure for Software Sequence load configuration
+ * @dest:	Destination of the Software Sequence: ingress or egress parser
+ * @ss_size: Size of the Software Sequence
+ * @ss_offset:	The offset where to load the Software Sequence (0x20-0x7FD)
+ * @ss_iova: I/O virtual address of the Software Sequence
+ */
+struct dpni_load_ss_cfg {
+	enum dpni_soft_sequence_dest dest;
+	uint16_t ss_size;
+	uint16_t ss_offset;
+	uint64_t ss_iova;
+};
+
+/**
+ * struct dpni_enable_ss_cfg - Structure for software sequence enable
+ *				configuration
+ * @dest:	Destination of the Software Sequence: ingress or egress parser
+ * @hxs: HXS to attach the software sequence to
+ * @set_start: If the Software Sequence or HDR it is attached to is set as
+ *		parser start
+ *		If hxs=DUMMY_LAST_HXS the ss_offset is set directly as parser
+ *			start else the hdr index code is set as parser start
+ * @ss_offset: The offset of the Software Sequence to enable or set as parse
+ *		start
+ * @param_size: Size of the software sequence parameters
+ * @param_offset: Offset in the parameter zone for the software sequence
+ *			parameters
+ * @param_iova: I/O virtual address of the parameters
+ */
+struct dpni_enable_ss_cfg {
+	enum dpni_soft_sequence_dest dest;
+	uint16_t hxs;
+	uint8_t set_start;
+	uint16_t ss_offset;
+	uint8_t param_size;
+	uint8_t param_offset;
+	uint64_t param_iova;
+};
+
+/**
+ * dpni_load_sw_sequence() - Loads a software sequence in parser memory.
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPNI object
+ * @cfg:	Software sequence load configuration
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dpni_load_sw_sequence(struct fsl_mc_io *mc_io,
+	      uint32_t cmd_flags,
+	      uint16_t token,
+		  struct dpni_load_ss_cfg *cfg);
+
+/**
+ * dpni_eanble_sw_sequence() - Enables a software sequence in the parser
+ *				profile
+ * corresponding to the ingress or egress of the DPNI.
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPNI object
+ * @cfg:	Software sequence enable configuration
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dpni_enable_sw_sequence(struct fsl_mc_io *mc_io,
+			    uint32_t cmd_flags,
+			    uint16_t token,
+			    struct dpni_enable_ss_cfg *cfg);
+
+/**
+ * struct dpni_sw_sequence_layout - Structure for software sequence enable
+ *				configuration
+ * @num_ss:	Number of software sequences returned
+ * @ss: Array of software sequence entries. The number of valid entries
+ *			must match 'num_ss' value
+ */
+struct dpni_sw_sequence_layout {
+	uint8_t num_ss;
+	struct {
+		uint16_t ss_offset;
+		uint16_t ss_size;
+		uint8_t param_offset;
+		uint8_t param_size;
+	} ss[DPNI_SW_SEQUENCE_LAYOUT_SIZE];
+};
+
+/**
+ * dpni_get_sw_sequence_layout() - Get the soft sequence layout
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPNI object
+ * @src:	Source of the layout (WRIOP Rx or Tx)
+ * @ss_layout_iova:  I/O virtual address of 264 bytes DMA-able memory
+ *
+ * warning: After calling this function, call dpni_extract_sw_sequence_layout()
+ *		to get the layout
+ *
+ * Return:	'0' on Success; error code otherwise.
+ */
+int dpni_get_sw_sequence_layout(struct fsl_mc_io *mc_io,
+				uint32_t cmd_flags,
+				uint16_t token,
+				enum dpni_soft_sequence_dest src,
+				uint64_t ss_layout_iova);
+
+/**
+ * dpni_extract_sw_sequence_layout() - extract the software sequence layout
+ * @layout:		software sequence layout
+ * @sw_sequence_layout_buf:	Zeroed 264 bytes of memory before mapping it
+ *				to DMA
+ *
+ * This function has to be called after dpni_get_sw_sequence_layout
+ *
+ */
+void dpni_extract_sw_sequence_layout(struct dpni_sw_sequence_layout *layout,
+				     const uint8_t *sw_sequence_layout_buf);
+
 #endif /* __FSL_DPNI_H */
diff --git a/drivers/net/dpaa2/mc/fsl_dpni_cmd.h b/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
index 5effbb300..dfaccd91c 100644
--- a/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
+++ b/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016-2017 NXP
+ * Copyright 2016-2019 NXP
  *
  */
 #ifndef _FSL_DPNI_CMD_H
@@ -97,6 +97,9 @@
 #define DPNI_CMDID_SET_OFFLOAD			DPNI_CMD(0x26C)
 #define DPNI_CMDID_SET_TX_CONFIRMATION_MODE	DPNI_CMD(0x266)
 #define DPNI_CMDID_GET_TX_CONFIRMATION_MODE	DPNI_CMD(0x26D)
+#define DPNI_CMDID_LOAD_SW_SEQUENCE		DPNI_CMD(0x270)
+#define DPNI_CMDID_ENABLE_SW_SEQUENCE		DPNI_CMD(0x271)
+#define DPNI_CMDID_GET_SW_SEQUENCE_LAYOUT	DPNI_CMD(0x272)
 #define DPNI_CMDID_SET_OPR			DPNI_CMD(0x26e)
 #define DPNI_CMDID_GET_OPR			DPNI_CMD(0x26f)
 #define DPNI_CMDID_SET_RX_FS_DIST		DPNI_CMD(0x273)
@@ -798,5 +801,43 @@ struct dpni_cmd_set_rx_hash_dist {
 	uint64_t	key_cfg_iova;
 };
 
+struct dpni_load_sw_sequence {
+	uint8_t dest;
+	uint8_t pad0[7];
+	uint16_t ss_offset;
+	uint16_t pad1;
+	uint16_t ss_size;
+	uint16_t pad2;
+	uint64_t ss_iova;
+};
+
+struct dpni_enable_sw_sequence {
+	uint8_t dest;
+	uint8_t pad0[7];
+	uint16_t ss_offset;
+	uint16_t hxs;
+	uint8_t set_start;
+	uint8_t pad1[3];
+	uint8_t param_offset;
+	uint8_t pad2[3];
+	uint8_t param_size;
+	uint8_t pad3[3];
+	uint64_t param_iova;
+};
+
+struct dpni_get_sw_sequence_layout {
+	uint8_t src;
+	uint8_t pad0[7];
+	uint64_t layout_iova;
+};
+
+struct dpni_sw_sequence_layout_entry {
+	uint16_t ss_offset;
+	uint16_t ss_size;
+	uint8_t param_offset;
+	uint8_t param_size;
+	uint16_t pad;
+};
+
 #pragma pack(pop)
 #endif /* _FSL_DPNI_CMD_H */
-- 
2.17.1

[dpdk-dev] [PATCH v1 30/30] net/dpaa2: add soft parser driver

[Sachin Saxena]

From: Sunil Kumar Kori <sunil.kori@nxp.com>

Signed-off-by: Sunil Kumar Kori <sunil.kori@nxp.com>
---
 drivers/net/dpaa2/Makefile        |   1 +
 drivers/net/dpaa2/dpaa2_ethdev.c  |  24 +++
 drivers/net/dpaa2/dpaa2_ethdev.h  |   4 +
 drivers/net/dpaa2/dpaa2_sparser.c | 269 ++++++++++++++++++++++++++++++
 drivers/net/dpaa2/dpaa2_sparser.h | 206 +++++++++++++++++++++++
 drivers/net/dpaa2/meson.build     |   1 +
 6 files changed, 505 insertions(+)
 create mode 100644 drivers/net/dpaa2/dpaa2_sparser.c
 create mode 100644 drivers/net/dpaa2/dpaa2_sparser.h

diff --git a/drivers/net/dpaa2/Makefile b/drivers/net/dpaa2/Makefile
index 0cc539dc5..7924871c8 100644
--- a/drivers/net/dpaa2/Makefile
+++ b/drivers/net/dpaa2/Makefile
@@ -34,6 +34,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2_rxtx.c
 SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2_ethdev.c
 SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2_flow.c
 SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2_mux.c
+SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2_sparser.c
 SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += mc/dpni.c
 SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += mc/dpkg.c
 SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += mc/dpdmux.c
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index fe84f3ac6..34852ad08 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -26,6 +26,7 @@
 #include <dpaa2_hw_dpio.h>
 #include <mc/fsl_dpmng.h>
 #include "dpaa2_ethdev.h"
+#include "dpaa2_sparser.h"
 #include <fsl_qbman_debug.h>
 
 #define DRIVER_LOOPBACK_MODE "drv_loopback"
@@ -2498,6 +2499,29 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
 		goto init_err;
 	}
 
+	/*TODO To enable soft parser support DPAA2 driver needs to integrate
+	 * with external entity to receive byte code for software sequence
+	 * and same will be offload to the H/W using MC interface.
+	 * Currently it is assumed that DPAA2 driver has byte code by some
+	 * mean and same if offloaded to H/W.
+	 */
+	if (getenv("DPAA2_ENABLE_SOFT_PARSER")) {
+		WRIOP_SS_INITIALIZER(priv);
+		ret = dpaa2_eth_load_wriop_soft_parser(priv, DPNI_SS_INGRESS);
+		if (ret < 0) {
+			DPAA2_PMD_ERR(" Error(%d) in loading softparser\n",
+				      ret);
+			return ret;
+		}
+
+		ret = dpaa2_eth_enable_wriop_soft_parser(priv,
+							 DPNI_SS_INGRESS);
+		if (ret < 0) {
+			DPAA2_PMD_ERR(" Error(%d) in enabling softparser\n",
+				      ret);
+			return ret;
+		}
+	}
 	RTE_LOG(INFO, PMD, "%s: netdev created\n", eth_dev->data->name);
 	return 0;
 init_err:
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index bcb8360be..823f9e97c 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -22,6 +22,7 @@
 #define MAX_TCS			DPNI_MAX_TC
 #define MAX_RX_QUEUES		128
 #define MAX_TX_QUEUES		16
+#define MAX_DPNI		8
 
 /*default tc to be used for ,congestion, distribution etc configuration. */
 #define DPAA2_DEF_TC		0
@@ -131,6 +132,9 @@ struct dpaa2_dev_priv {
 		uint64_t fs_extract_param[MAX_TCS];
 	} extract;
 
+	uint16_t ss_offset;
+	uint64_t ss_iova;
+	uint64_t ss_param_iova;
 #if defined(RTE_LIBRTE_IEEE1588)
 	/*stores timestamp of last received packet on dev*/
 	uint64_t rx_timestamp;
diff --git a/drivers/net/dpaa2/dpaa2_sparser.c b/drivers/net/dpaa2/dpaa2_sparser.c
new file mode 100644
index 000000000..7e8fedd81
--- /dev/null
+++ b/drivers/net/dpaa2/dpaa2_sparser.c
@@ -0,0 +1,269 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2018-2019 NXP
+ */
+
+#include <rte_mbuf.h>
+#include <rte_ethdev.h>
+#include <rte_malloc.h>
+#include <rte_memcpy.h>
+#include <rte_string_fns.h>
+#include <rte_dev.h>
+
+#include <fslmc_logs.h>
+#include <fslmc_vfio.h>
+#include <dpaa2_hw_pvt.h>
+#include <dpaa2_hw_dpio.h>
+#include <dpaa2_hw_mempool.h>
+#include <dpaa2_pmd_logs.h>
+
+#include "dpaa2_ethdev.h"
+#include "dpaa2_sparser.h"
+#include "base/dpaa2_hw_dpni_annot.h"
+#define __STDC_FORMAT_MACROS
+#include <stdint.h>
+#include <inttypes.h>
+
+uint8_t wriop_bytecode[] = {
+	0x00, 0x04, 0x29, 0x42, 0x03, 0xe0, 0x12, 0x00, 0x29, 0x02,
+	0x18, 0x00, 0x87, 0x3c, 0x00, 0x02, 0x18, 0x00, 0x00, 0x00
+};
+
+struct frame_attr frame_attr_arr[] = {
+	/* Frame Attribute Flags 1 */
+	/* 000 */ {"Routing header present in IPv6 header 2 ", 0, 0x80000000},
+	/* 001 */ {"GTP Primed was detected                 ", 0, 0x40000000},
+	/* 002 */ {"VLAN with VID = 0 was detected          ", 0, 0x20000000},
+	/* 003 */ {"A PTP frame was detected                ", 0, 0x10000000},
+	/* 004 */ {"VXLAN was parsed                        ", 0, 0x08000000},
+	/* 005 */ {"A VXLAN HXS parsing error was detected  ", 0, 0x04000000},
+	/* 006 */ {"Ethernet control protocol was detected  ", 0, 0x02000000},
+	/* 007 */ {"IKE was detected at UDP port 4500       ", 0, 0x01000000},
+	/* 008 */ {"Shim Shell Soft Parsing Error           ", 0, 0x00800000},
+	/* 009 */ {"Parsing Error                           ", 0, 0x00400000},
+	/* 010 */ {"Ethernet MAC Present                    ", 0, 0x00200000},
+	/* 011 */ {"Ethernet Unicast                        ", 0, 0x00100000},
+	/* 012 */ {"Ethernet Multicast                      ", 0, 0x00080000},
+	/* 013 */ {"Ethernet Broadcast                      ", 0, 0x00040000},
+	/* 014 */ {"BPDU frame (MAC DA is 01:80:C2:00:00:00)", 0, 0x00020000},
+	/* 015 */ {"FCoE detected (Ether type is 0x8906)    ", 0, 0x00010000},
+	/* 016 */ {"FIP detected (Ether type is 0x8914)     ", 0, 0x00008000},
+	/* 017 */ {"Ethernet Parsing Error                  ", 0, 0x00004000},
+	/* 018 */ {"LLC+SNAP Present                        ", 0, 0x00002000},
+	/* 019 */ {"Unknown LLC/OUI                         ", 0, 0x00001000},
+	/* 020 */ {"LLC+SNAP Error                          ", 0, 0x00000800},
+	/* 021 */ {"VLAN 1 Present                          ", 0, 0x00000400},
+	/* 022 */ {"VLAN n Present                          ", 0, 0x00000200},
+	/* 023 */ {"CFI bit in a \"8100\" VLAN tag is set   ", 0, 0x00000100},
+	/* 024 */ {"VLAN Parsing Error                      ", 0, 0x00000080},
+	/* 025 */ {"PPPoE+PPP Present                       ", 0, 0x00000040},
+	/* 026 */ {"PPPoE+PPP Parsing Error                 ", 0, 0x00000020},
+	/* 027 */ {"MPLS 1 Present                          ", 0, 0x00000010},
+	/* 028 */ {"MPLS n Present                          ", 0, 0x00000008},
+	/* 029 */ {"MPLS Parsing Error                      ", 0, 0x00000004},
+	/* 030 */ {"ARP frame Present (Ethertype 0x0806)    ", 0, 0x00000002},
+	/* 031 */ {"ARP Parsing Error                       ", 0, 0x00000001},
+	/* Frame Attribute Flags 2 */
+	/* 032 */ {"L2 Unknown Protocol                     ", 1, 0x80000000},
+	/* 033 */ {"L2 Soft Parsing Error                   ", 1, 0x40000000},
+	/* 034 */ {"IPv4 1 Present                          ", 1, 0x20000000},
+	/* 035 */ {"IPv4 1 Unicast                          ", 1, 0x10000000},
+	/* 036 */ {"IPv4 1 Multicast                        ", 1, 0x08000000},
+	/* 037 */ {"IPv4 1 Broadcast                        ", 1, 0x04000000},
+	/* 038 */ {"IPv4 n Present                          ", 1, 0x02000000},
+	/* 039 */ {"IPv4 n Unicast                          ", 1, 0x01000000},
+	/* 040 */ {"IPv4 n Multicast                        ", 1, 0x00800000},
+	/* 041 */ {"IPv4 n Broadcast                        ", 1, 0x00400000},
+	/* 042 */ {"IPv6 1 Present                          ", 1, 0x00200000},
+	/* 043 */ {"IPv6 1 Unicast                          ", 1, 0x00100000},
+	/* 044 */ {"IPv6 1 Multicast                        ", 1, 0x00080000},
+	/* 045 */ {"IPv6 n Present                          ", 1, 0x00040000},
+	/* 046 */ {"IPv6 n Unicast                          ", 1, 0x00020000},
+	/* 047 */ {"IPv6 n Multicast                        ", 1, 0x00010000},
+	/* 048 */ {"IP 1 option present                     ", 1, 0x00008000},
+	/* 049 */ {"IP 1 Unknown Protocol                   ", 1, 0x00004000},
+	/* 050 */ {"IP 1 Packet is a fragment               ", 1, 0x00002000},
+	/* 051 */ {"IP 1 Packet is an initial fragment      ", 1, 0x00001000},
+	/* 052 */ {"IP 1 Parsing Error                      ", 1, 0x00000800},
+	/* 053 */ {"IP n option present                     ", 1, 0x00000400},
+	/* 054 */ {"IP n Unknown Protocol                   ", 1, 0x00000200},
+	/* 055 */ {"IP n Packet is a fragment               ", 1, 0x00000100},
+	/* 056 */ {"IP n Packet is an initial fragment      ", 1, 0x00000080},
+	/* 057 */ {"ICMP detected (IP proto is 1)           ", 1, 0x00000040},
+	/* 058 */ {"IGMP detected (IP proto is 2)           ", 1, 0x00000020},
+	/* 059 */ {"ICMPv6 detected (IP proto is 3a)        ", 1, 0x00000010},
+	/* 060 */ {"UDP Light detected (IP proto is 136)    ", 1, 0x00000008},
+	/* 061 */ {"IP n Parsing Error                      ", 1, 0x00000004},
+	/* 062 */ {"Min. Encap Present                      ", 1, 0x00000002},
+	/* 063 */ {"Min. Encap S flag set                   ", 1, 0x00000001},
+	/* Frame Attribute Flags 3 */
+	/* 064 */ {"Min. Encap Parsing Error                ", 2, 0x80000000},
+	/* 065 */ {"GRE Present                             ", 2, 0x40000000},
+	/* 066 */ {"GRE R bit set                           ", 2, 0x20000000},
+	/* 067 */ {"GRE Parsing Error                       ", 2, 0x10000000},
+	/* 068 */ {"L3 Unknown Protocol                     ", 2, 0x08000000},
+	/* 069 */ {"L3 Soft Parsing Error                   ", 2, 0x04000000},
+	/* 070 */ {"UDP Present                             ", 2, 0x02000000},
+	/* 071 */ {"UDP Parsing Error                       ", 2, 0x01000000},
+	/* 072 */ {"TCP Present                             ", 2, 0x00800000},
+	/* 073 */ {"TCP options present                     ", 2, 0x00400000},
+	/* 074 */ {"TCP Control bits 6-11 set               ", 2, 0x00200000},
+	/* 075 */ {"TCP Control bits 3-5 set                ", 2, 0x00100000},
+	/* 076 */ {"TCP Parsing Error                       ", 2, 0x00080000},
+	/* 077 */ {"IPSec Present                           ", 2, 0x00040000},
+	/* 078 */ {"IPSec ESP found                         ", 2, 0x00020000},
+	/* 079 */ {"IPSec AH found                          ", 2, 0x00010000},
+	/* 080 */ {"IPSec Parsing Error                     ", 2, 0x00008000},
+	/* 081 */ {"SCTP Present                            ", 2, 0x00004000},
+	/* 082 */ {"SCTP Parsing Error                      ", 2, 0x00002000},
+	/* 083 */ {"DCCP Present                            ", 2, 0x00001000},
+	/* 084 */ {"DCCP Parsing Error                      ", 2, 0x00000800},
+	/* 085 */ {"L4 Unknown Protocol                     ", 2, 0x00000400},
+	/* 086 */ {"L4 Soft Parsing Error                   ", 2, 0x00000200},
+	/* 087 */ {"GTP Present                             ", 2, 0x00000100},
+	/* 088 */ {"GTP Parsing Error                       ", 2, 0x00000080},
+	/* 089 */ {"ESP Present                             ", 2, 0x00000040},
+	/* 090 */ {"ESP Parsing Error                       ", 2, 0x00000020},
+	/* 091 */ {"iSCSI detected (Port# 860)              ", 2, 0x00000010},
+	/* 092 */ {"Capwap-control detected (Port# 5246)    ", 2, 0x00000008},
+	/* 093 */ {"Capwap-data detected (Port# 5247)       ", 2, 0x00000004},
+	/* 094 */ {"L5 Soft Parsing Error                   ", 2, 0x00000002},
+	/* 095 */ {"IPv6 Route hdr1 present                 ", 2, 0x00000001},
+	/* 096 */ {NULL,                                       0, 0x00000000}
+};
+
+struct frame_attr_ext frame_attr_ext_arr[] = {
+	/* Frame Attribute Flags Extension */
+	/* 096 */ {"User defined soft parser bit #0         ", 0, 0x8000},
+	/* 096 */ {"User defined soft parser bit #1         ", 0, 0x4000},
+	/* 096 */ {"User defined soft parser bit #2         ", 0, 0x2000},
+	/* 096 */ {"User defined soft parser bit #3         ", 0, 0x1000},
+	/* 096 */ {"User defined soft parser bit #4         ", 0, 0x0800},
+	/* 096 */ {"User defined soft parser bit #5         ", 0, 0x0400},
+	/* 096 */ {"User defined soft parser bit #6         ", 0, 0x0200},
+	/* 096 */ {"User defined soft parser bit #7         ", 0, 0x0100},
+	/* 097 */ {"Reserved                                ", 0, 0x00ff},
+	/* 112 */ {NULL,                                       0, 0x0000}
+};
+
+#define SWAP_WORD(pr)						\
+do {								\
+	for (int i = 0; i < 4 ; i++) {				\
+		pr[i] = pr[i] ^ pr[6 - i + 1];			\
+		pr[6 - i + 1] = pr[6 - i + 1] ^ pr[i];		\
+		pr[i] = pr[i] ^ pr[6 - i + 1];			\
+	}							\
+} while (0)
+
+#define fa_print_sb()						\
+do {								\
+	if (rte_cpu_to_be_32(*pdw) & frm_attr->fld_mask)	\
+		DPAA2_PMD_DP_DEBUG("t %s : Yes", frm_attr->fld_name);	\
+} while (0)
+
+#define fa_print_sb_ext()					\
+do {								\
+	if (rte_cpu_to_be_16(*pw) & frm_attr_ext->fld_mask)	\
+		DPAA2_PMD_DP_DEBUG("\t %s : Yes",			\
+			  frm_attr_ext->fld_name);		\
+} while (0)
+
+#define fa_print_mb_ext()					\
+do {								\
+	if (rte_cpu_to_be_16(*pw) & frm_attr_ext->fld_mask)	\
+		DPAA2_PMD_DP_DEBUG("\t %s : 0x%02x",			\
+			  frm_attr_ext->fld_name,		\
+			  rte_cpu_to_be_16(*pw) & frm_attr_ext->fld_mask);\
+} while (0)
+
+int dpaa2_eth_load_wriop_soft_parser(struct dpaa2_dev_priv *priv,
+				     enum dpni_soft_sequence_dest dest)
+{
+	struct fsl_mc_io *dpni = priv->hw;
+	struct dpni_load_ss_cfg     cfg;
+	struct dpni_drv_sparser_param	sp_param;
+	uint8_t *addr;
+	int ret;
+
+	memset(&sp_param, 0, sizeof(sp_param));
+	sp_param.start_pc = priv->ss_offset;
+	sp_param.byte_code = &wriop_bytecode[0];
+	sp_param.size = sizeof(wriop_bytecode);
+
+	cfg.dest = dest;
+	cfg.ss_offset = sp_param.start_pc;
+	cfg.ss_size = sp_param.size;
+
+	addr = rte_malloc(NULL, sp_param.size, 64);
+	if (!addr) {
+		DPAA2_PMD_ERR("Memory unavailable for soft parser param\n");
+		return -1;
+	}
+
+	memcpy(addr, sp_param.byte_code, sp_param.size);
+	cfg.ss_iova = (uint64_t)(DPAA2_VADDR_TO_IOVA(addr));
+
+	ret = dpni_load_sw_sequence(dpni, CMD_PRI_LOW, priv->token, &cfg);
+	if (ret) {
+		DPAA2_PMD_ERR("dpni_load_sw_sequence failed\n");
+		rte_free(addr);
+		return ret;
+	}
+
+	priv->ss_iova = (uint64_t)(DPAA2_VADDR_TO_IOVA(addr));
+	priv->ss_offset += sp_param.size;
+	RTE_LOG(INFO, PMD, "Soft parser loaded for dpni@%d\n", priv->hw_id);
+
+	rte_free(addr);
+	return 0;
+}
+
+int dpaa2_eth_enable_wriop_soft_parser(struct dpaa2_dev_priv *priv,
+				       enum dpni_soft_sequence_dest dest)
+{
+	struct fsl_mc_io *dpni = priv->hw;
+	struct dpni_enable_ss_cfg cfg;
+	uint8_t pa[3];
+	struct dpni_drv_sparser_param sp_param;
+	uint8_t *param_addr = NULL;
+	int ret;
+
+	memset(&sp_param, 0, sizeof(sp_param));
+	pa[0] = 32;	/* Custom Header Length in bytes */
+	sp_param.custom_header_first = 1;
+	sp_param.param_offset = 32;
+	sp_param.param_size = 1;
+	sp_param.start_pc = priv->ss_offset;
+	sp_param.param_array = (uint8_t *)&pa[0];
+
+	cfg.dest = dest;
+	cfg.ss_offset = sp_param.start_pc;
+	cfg.set_start = sp_param.custom_header_first;
+	cfg.hxs = (uint16_t)sp_param.link_to_hard_hxs;
+	cfg.param_offset = sp_param.param_offset;
+	cfg.param_size = sp_param.param_size;
+	if (cfg.param_size) {
+		param_addr = rte_malloc(NULL, cfg.param_size, 64);
+		if (!param_addr) {
+			DPAA2_PMD_ERR("Memory unavailable for soft parser param\n");
+			return -1;
+		}
+
+		memcpy(param_addr, sp_param.param_array, cfg.param_size);
+		cfg.param_iova = (uint64_t)(DPAA2_VADDR_TO_IOVA(param_addr));
+		priv->ss_param_iova = cfg.param_iova;
+	} else {
+		cfg.param_iova = 0;
+	}
+
+	ret = dpni_enable_sw_sequence(dpni, CMD_PRI_LOW, priv->token, &cfg);
+	if (ret) {
+		DPAA2_PMD_ERR("dpni_enable_sw_sequence failed for dpni%d\n",
+			priv->hw_id);
+		rte_free(param_addr);
+		return ret;
+	}
+
+	rte_free(param_addr);
+	RTE_LOG(INFO, PMD, "Soft parser enabled for dpni@%d\n", priv->hw_id);
+	return 0;
+}
diff --git a/drivers/net/dpaa2/dpaa2_sparser.h b/drivers/net/dpaa2/dpaa2_sparser.h
new file mode 100644
index 000000000..365b8062a
--- /dev/null
+++ b/drivers/net/dpaa2/dpaa2_sparser.h
@@ -0,0 +1,206 @@
+/* * SPDX-License-Identifier: BSD-3-Clause
+ *   Copyright 2018-2019 NXP
+ */
+
+/**
+ * @file	dpaa2_sparser.h
+ *
+ * @brief	Soft parser related macros & functions support for DPAA2 device
+ *	framework based applications.
+ *
+ */
+
+#ifndef _DPAA2_SPARSER_H
+#define _DPAA2_SPARSER_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define WRIOP_SS_INITIALIZER(priv)				\
+do {								\
+	/* Base offset of parse profile memory in WRIOP */	\
+	(priv)->ss_offset = 0x20;				\
+	(priv)->ss_iova	= (size_t)NULL;			\
+	(priv)->ss_param_iova = (size_t)NULL;			\
+} while (0)
+
+/**************************************************************************/
+/*
+ * @enum   parser_starting_hxs_code
+ * @Description PARSER Starting HXS code
+ */
+/***************************************************************************/
+enum parser_starting_hxs_code {
+	/** Ethernet Starting HXS coding */
+	PARSER_ETH_STARTING_HXS = 0x0000,
+	/** LLC+SNAP Starting HXS coding */
+	PARSER_LLC_SNAP_STARTING_HXS = 0x0001,
+	/** VLAN Starting HXS coding */
+	PARSER_VLAN_STARTING_HXS = 0x0002,
+	/** PPPoE+PPP Starting HXS coding */
+	PARSER_PPPOE_PPP_STARTING_HXS = 0x0003,
+	/** MPLS Starting HXS coding */
+	PARSER_MPLS_STARTING_HXS = 0x0004,
+	/** ARP Starting HXS coding */
+	PARSER_ARP_STARTING_HXS = 0x0005,
+	/** IP Starting HXS coding */
+	PARSER_IP_STARTING_HXS  = 0x0006,
+	/** IPv4 Starting HXS coding */
+	PARSER_IPV4_STARTING_HXS = 0x0007,
+	/** IPv6 Starting HXS coding */
+	PARSER_IPV6_STARTING_HXS = 0x0008,
+	/** GRE Starting HXS coding */
+	PARSER_GRE_STARTING_HXS = 0x0009,
+	/** MinEncap Starting HXS coding */
+	PARSER_MINENCAP_STARTING_HXS = 0x000A,
+	/** Other L3 Shell Starting HXS coding */
+	PARSER_OTHER_L3_SHELL_STARTING_HXS = 0x000B,
+	/** TCP Starting HXS coding */
+	PARSER_TCP_STARTING_HXS = 0x000C,
+	/** UDP Starting HXS coding */
+	PARSER_UDP_STARTING_HXS = 0x000D,
+	/** IPSec Starting HXS coding */
+	PARSER_IPSEC_STARTING_HXS = 0x000E,
+	/** SCTP Starting HXS coding */
+	PARSER_SCTP_STARTING_HXS = 0x000F,
+	/** DCCP Starting HXS coding */
+	PARSER_DCCP_STARTING_HXS = 0x0010,
+	/** Other L4 Shell Starting HXS coding */
+	PARSER_OTHER_L4_SHELL_STARTING_HXS = 0x0011,
+	/** GTP Starting HXS coding */
+	PARSER_GTP_STARTING_HXS = 0x0012,
+	/** ESP Starting HXS coding */
+	PARSER_ESP_STARTING_HXS = 0x0013,
+	/** VXLAN Starting HXS coding */
+	PARSER_VXLAN_STARTING_HXS = 0x0014,
+	/** L5 (and above) Shell Starting HXS coding */
+	PARSER_L5_SHELL_STARTING_HXS = 0x001E,
+	/** Final Shell Starting HXS coding */
+	PARSER_FINAL_SHELL_STARTING_HXS = 0x001F
+};
+
+/**************************************************************************/
+/*
+ * @Description    struct dpni_drv_sparser_param - Structure representing the
+ *			information needed to activate(enable) a Soft Parser.
+ */
+/***************************************************************************/
+
+struct dpni_drv_sparser_param {
+	/* The "custom_header_first" must be set if the custom header to parse
+	 * is the first header in the packet, otherwise "custom_header_first"
+	 * must be cleared.
+	 */
+	uint8_t             custom_header_first;
+	/* Hard HXS on which a soft parser is activated. This must be
+	 * configured.
+	 * if the header to parse is not the first header in the packet.
+	 */
+	enum parser_starting_hxs_code   link_to_hard_hxs;
+	/* Soft Sequence Start PC */
+	uint16_t            start_pc;
+	/* Soft Sequence byte-code */
+	uint8_t             *byte_code;
+	/* Soft Sequence size */
+	uint16_t            size;
+	/* Pointer to the Parameters Array of the SP */
+	uint8_t             *param_array;
+	/* Parameters offset */
+	uint8_t             param_offset;
+	/* Parameters size */
+	uint8_t             param_size;
+};
+
+struct sp_parse_result {
+	/* Next header */
+	uint16_t    nxt_hdr;
+	/* Frame Attribute Flags Extension */
+	uint16_t    frame_attribute_flags_extension;
+	/* Frame Attribute Flags (part 1) */
+	uint32_t    frame_attribute_flags_1;
+	/* Frame Attribute Flags (part 2) */
+	uint32_t    frame_attribute_flags_2;
+	/* Frame Attribute Flags (part 3) */
+	uint32_t    frame_attribute_flags_3;
+	/* Shim Offset 1 */
+	uint8_t     shim_offset_1;
+	/* Shim Offset 2 */
+	uint8_t     shim_offset_2;
+	/* Outer IP protocol field offset */
+	uint8_t     ip_1_pid_offset;
+	/* Ethernet offset */
+	uint8_t     eth_offset;
+	/* LLC+SNAP offset */
+	uint8_t     llc_snap_offset;
+	/* First VLAN's TCI field offset*/
+	uint8_t     vlan_tci1_offset;
+	/* Last VLAN's TCI field offset*/
+	uint8_t     vlan_tcin_offset;
+	/* Last Ethertype offset*/
+	uint8_t     last_etype_offset;
+	/* PPPoE offset */
+	uint8_t     pppoe_offset;
+	/* First MPLS offset */
+	uint8_t     mpls_offset_1;
+	/* Last MPLS offset */
+	uint8_t     mpls_offset_n;
+	/* Layer 3 (Outer IP, ARP, FCoE or FIP) offset */
+	uint8_t     l3_offset;
+	/* Inner IP or MinEncap offset*/
+	uint8_t     ipn_or_minencap_offset;
+	/* GRE offset */
+	uint8_t     gre_offset;
+	/* Layer 4 offset*/
+	uint8_t     l4_offset;
+	/* Layer 5 offset */
+	uint8_t     l5_offset;
+	/* Routing header offset of 1st IPv6 header */
+	uint8_t     routing_hdr_offset1;
+	/* Routing header offset of 2nd IPv6 header */
+	uint8_t     routing_hdr_offset2;
+	/* Next header offset */
+	uint8_t     nxt_hdr_offset;
+	/* IPv6 fragmentable part offset */
+	uint8_t     ipv6_frag_offset;
+	/* Frame's untouched running sum, input to parser */
+	uint16_t    gross_running_sum;
+	/* Running Sum */
+	uint16_t    running_sum;
+	/* Parse Error code */
+	uint8_t     parse_error_code;
+	/* Offset to the next header field before IPv6 fragment extension */
+	uint8_t     nxt_hdr_before_ipv6_frag_ext;
+	/* Inner IP Protocol field offset */
+	uint8_t     ip_n_pid_offset;
+	/* Reserved for Soft parsing context*/
+	uint8_t     soft_parsing_context[21];
+};
+
+struct frame_attr {
+	const char *fld_name;
+	uint8_t     faf_offset;
+	uint32_t    fld_mask;
+};
+
+struct frame_attr_ext {
+	const char *fld_name;
+	uint8_t     faf_ext_offset;
+	uint16_t    fld_mask;
+};
+
+
+struct parse_err {
+	uint16_t    code;
+	const char *err_name;
+};
+
+/* Macro definitions */
+#define IS_ONE_BIT_FIELD(_mask)                 \
+(!((_mask) & ((_mask) - 1)) || (_mask == 1))
+
+int dpaa2_eth_load_wriop_soft_parser(struct dpaa2_dev_priv *priv,
+		enum dpni_soft_sequence_dest dest);
+int dpaa2_eth_enable_wriop_soft_parser(struct dpaa2_dev_priv *priv,
+		enum dpni_soft_sequence_dest dest);
+#endif /* _DPAA2_SPARSER_H_ */
diff --git a/drivers/net/dpaa2/meson.build b/drivers/net/dpaa2/meson.build
index fc311e9f7..1a4ab212c 100644
--- a/drivers/net/dpaa2/meson.build
+++ b/drivers/net/dpaa2/meson.build
@@ -14,6 +14,7 @@ sources = files('base/dpaa2_hw_dpni.c',
 		'dpaa2_ethdev.c',
 		'dpaa2_flow.c',
 		'dpaa2_rxtx.c',
+		'dpaa2_sparser.c',
 		'mc/dpkg.c',
 		'mc/dpdmux.c',
 		'mc/dpni.c')
-- 
2.17.1

[dpdk-dev] [PATCH v2 00/30] Enhancements and fixes in NXP dpaax drivers and fsl-mc bus

[Sachin Saxena]

This patch set adds following enhancements:
	1. IEEE1588 support in net/dpaa2
	2. Interrupt support in net/dpaa
	3. Support multi vfio group in fsl-mc bus
	4. Taildrop support on frame count basis
	5. Soft parser driver in net/dpaa2
	6. Enhanced debug information

---
v2 Change-log:
	* Fixed compilation break with gcc-4.8 on x86 platform

Hemant Agrawal (14):
  bus/dpaa: fix DPAA SEC blacklist case
  net/dpaa: improve the Rx offload debug message
  net/dpaa: reduce debug messages
  net/dpaa2: improve the Rx offload debug message
  common/dpaax: reduce debug mesages
  mempool/dpaa: reduce debug messages
  net/dpaa2: realign Rx offload support types
  net/dpaa2: enable Rx offload for timestamp
  net/dpaa2: support L2 payload based RSS distribution
  net/dpaa2: add taildrop support on frame count basis
  net/dpaa2: add cgr counters in xtra stats
  net/dpaa2: add support for config max Rx length in HW
  net/dpaa2: support dpdmux classification on eth type
  bus/fslmc: support multi vfio group

Nipun Gupta (6):
  bus/dpaa: remove un-necessary thread affinity
  bus/dpaa: decouple fq portal alloc and init
  net/dpaa: support Rx interrupt handler
  net/dpaa: support for Rx interrupt enable and disable
  net/dpaa: add SG support in Tx for non DPAA buffer
  net/dpaa2: add optional non-prefetch Rx mode

Priyanka Jain (4):
  net/dpaa2: add Tx confirmation mode support
  net/dpaa2: add timestamp support
  net/dpaa2: add dprtc sub-module
  net/dpaa2: add ptp driver

Sachin Saxena (1):
  net/dpaa2: use LFQIDs in Tx instead of qdid

Shreyansh Jain (3):
  bus/fslmc: update PA-VA dpaax library only in PA mode
  bus/fslmc: check for Dma map in primary process only
  net/dpaa2: support separate MC portal per process

Sunil Kumar Kori (2):
  net/dpaa2: add support for soft parser in MC
  net/dpaa2: add soft parser driver

 config/defconfig_arm64-dpaa2-linuxapp-gcc    |   3 +
 doc/guides/cryptodevs/dpaa_sec.rst           |   6 +-
 doc/guides/nics/dpaa2.rst                    |   4 +
 drivers/bus/dpaa/base/qbman/qman.c           |  80 ++-
 drivers/bus/dpaa/base/qbman/qman_driver.c    | 104 ++--
 drivers/bus/dpaa/base/qbman/qman_priv.h      |  15 +-
 drivers/bus/dpaa/dpaa_bus.c                  |  32 +-
 drivers/bus/dpaa/include/fsl_qman.h          |  21 +-
 drivers/bus/dpaa/include/fsl_usd.h           |   7 +-
 drivers/bus/dpaa/rte_bus_dpaa_version.map    |  10 +
 drivers/bus/dpaa/rte_dpaa_bus.h              |   1 +
 drivers/bus/fslmc/fslmc_bus.c                |  32 +-
 drivers/bus/fslmc/fslmc_vfio.c               | 162 ++++--
 drivers/bus/fslmc/fslmc_vfio.h               |   3 +
 drivers/bus/fslmc/portal/dpaa2_hw_pvt.h      |   7 +-
 drivers/bus/fslmc/rte_fslmc.h                |   1 +
 drivers/common/dpaax/dpaax_iova_table.c      |  15 +-
 drivers/crypto/dpaa_sec/dpaa_sec.c           |   3 +-
 drivers/mempool/dpaa/dpaa_mempool.c          |   4 +-
 drivers/net/dpaa/dpaa_ethdev.c               | 110 +++-
 drivers/net/dpaa/dpaa_rxtx.c                 | 192 +++----
 drivers/net/dpaa2/Makefile                   |   3 +
 drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h |  24 +-
 drivers/net/dpaa2/dpaa2_ethdev.c             | 457 ++++++++++++----
 drivers/net/dpaa2/dpaa2_ethdev.h             |  49 +-
 drivers/net/dpaa2/dpaa2_mux.c                |  84 ++-
 drivers/net/dpaa2/dpaa2_ptp.c                | 181 +++++++
 drivers/net/dpaa2/dpaa2_rxtx.c               | 284 +++++++++-
 drivers/net/dpaa2/dpaa2_sparser.c            | 269 ++++++++++
 drivers/net/dpaa2/dpaa2_sparser.h            | 206 ++++++++
 drivers/net/dpaa2/mc/dpni.c                  | 117 +++++
 drivers/net/dpaa2/mc/dprtc.c                 | 523 +++++++++++++++++++
 drivers/net/dpaa2/mc/fsl_dpni.h              | 133 +++++
 drivers/net/dpaa2/mc/fsl_dpni_cmd.h          |  43 +-
 drivers/net/dpaa2/mc/fsl_dprtc.h             | 109 ++++
 drivers/net/dpaa2/mc/fsl_dprtc_cmd.h         |  91 ++++
 drivers/net/dpaa2/meson.build                |   6 +
 37 files changed, 2972 insertions(+), 419 deletions(-)
 create mode 100644 drivers/net/dpaa2/dpaa2_ptp.c
 create mode 100644 drivers/net/dpaa2/dpaa2_sparser.c
 create mode 100644 drivers/net/dpaa2/dpaa2_sparser.h
 create mode 100644 drivers/net/dpaa2/mc/dprtc.c
 create mode 100644 drivers/net/dpaa2/mc/fsl_dprtc.h
 create mode 100644 drivers/net/dpaa2/mc/fsl_dprtc_cmd.h

-- 
2.17.1

[dpdk-dev] [PATCH v2 01/30] bus/dpaa: fix DPAA SEC blacklist case

[Sachin Saxena]

From: Hemant Agrawal <hemant.agrawal@nxp.com>

The black list of dpaa_sec devices fails.
EAL: failed to parse device "dpaa:dpaa_sec-1"

This patch address following issues:
- bus usages dpaa-sec while the driver usage dpaa_sec
- bus usages numbers from 0 to MAX_SEC - while driver
probe usages sec number form max-fman_device +1

Fixes: 6e0752205bb2 ("bus/dpaa: support device blacklisting")
Cc: stable@dpdk.org

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Reviewed-by: Sachin Saxena <sachin.saxena@nxp.com>
---
 doc/guides/cryptodevs/dpaa_sec.rst | 6 +++---
 drivers/bus/dpaa/dpaa_bus.c        | 6 +++---
 drivers/crypto/dpaa_sec/dpaa_sec.c | 3 +--
 3 files changed, 7 insertions(+), 8 deletions(-)

diff --git a/doc/guides/cryptodevs/dpaa_sec.rst b/doc/guides/cryptodevs/dpaa_sec.rst
index 0a2600634..3a3e30aaf 100644
--- a/doc/guides/cryptodevs/dpaa_sec.rst
+++ b/doc/guides/cryptodevs/dpaa_sec.rst
@@ -85,11 +85,11 @@ For blacklisting a DPAA device, following commands can be used.
 
  .. code-block:: console
 
-    <dpdk app> <EAL args> -b "dpaa_bus:dpaa-secX" -- ...
-    e.g. "dpaa_bus:dpaa-sec0"
+    <dpdk app> <EAL args> -b "dpaa:dpaa_sec-X" -- ...
+    e.g. "dpaa:dpaa_sec-1"
 
     or to disable all 4 SEC devices
-    -b "dpaa_sec:dpaa-sec0"  -b "dpaa_sec:dpaa-sec1" -b "dpaa_sec:dpaa-sec2" -b "dpaa_sec:dpaa-sec3"
+    -b "dpaa:dpaa_sec-1"  -b "dpaa:dpaa_sec-2" -b "dpaa:dpaa_sec-3" -b "dpaa:dpaa_sec-4"
 
 Limitations
 -----------
diff --git a/drivers/bus/dpaa/dpaa_bus.c b/drivers/bus/dpaa/dpaa_bus.c
index 07cc5c667..f7d1a5b63 100644
--- a/drivers/bus/dpaa/dpaa_bus.c
+++ b/drivers/bus/dpaa/dpaa_bus.c
@@ -218,7 +218,7 @@ dpaa_create_device_list(void)
 		 * allocated for dev->name/
 		 */
 		memset(dev->name, 0, RTE_ETH_NAME_MAX_LEN);
-		sprintf(dev->name, "dpaa-sec%d", i);
+		sprintf(dev->name, "dpaa_sec-%d", i+1);
 		DPAA_BUS_LOG(INFO, "%s cryptodev added", dev->name);
 		dev->device.name = dev->name;
 		dev->device.devargs = dpaa_devargs_lookup(dev);
@@ -397,7 +397,7 @@ rte_dpaa_bus_parse(const char *name, void *out_name)
 	 * without separator. Both need to be handled.
 	 * It is also possible that "name=fm1-mac3" is passed along.
 	 */
-	DPAA_BUS_DEBUG("Parse device name (%s)\n", name);
+	DPAA_BUS_DEBUG("Parse device name (%s)", name);
 
 	/* Check for dpaa_bus:fm1-mac3 style */
 	dup_name = strdup(name);
@@ -428,7 +428,7 @@ rte_dpaa_bus_parse(const char *name, void *out_name)
 	for (i = 0; i < RTE_LIBRTE_DPAA_MAX_CRYPTODEV; i++) {
 		char sec_name[16];
 
-		snprintf(sec_name, 16, "dpaa-sec%d", i);
+		snprintf(sec_name, 16, "dpaa_sec-%d", i+1);
 		if (strcmp(sec_name, sep) == 0) {
 			if (out_name)
 				strcpy(out_name, sep);
diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c b/drivers/crypto/dpaa_sec/dpaa_sec.c
index 122c80a07..1754862be 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.c
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
@@ -2678,8 +2678,7 @@ cryptodev_dpaa_sec_probe(struct rte_dpaa_driver *dpaa_drv __rte_unused,
 
 	int retval;
 
-	snprintf(cryptodev_name, sizeof(cryptodev_name), "dpaa_sec-%d",
-			dpaa_dev->id.dev_id);
+	snprintf(cryptodev_name, sizeof(cryptodev_name), "%s", dpaa_dev->name);
 
 	cryptodev = rte_cryptodev_pmd_allocate(cryptodev_name, rte_socket_id());
 	if (cryptodev == NULL)
-- 
2.17.1

[dpdk-dev] [PATCH v2 02/30] net/dpaa: improve the Rx offload debug message

[Sachin Saxena]

From: Hemant Agrawal <hemant.agrawal@nxp.com>

This patch also align few RX offload support to right category.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Reviewed-by: Sachin Saxena <sachin.saxena@nxp.com>
---
 drivers/net/dpaa/dpaa_ethdev.c | 28 ++++++++++++++--------------
 1 file changed, 14 insertions(+), 14 deletions(-)

diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
index 7154fb9b4..7f5a8ac3b 100644
--- a/drivers/net/dpaa/dpaa_ethdev.c
+++ b/drivers/net/dpaa/dpaa_ethdev.c
@@ -59,7 +59,9 @@ static uint64_t dev_rx_offloads_nodis =
 		DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM;
 
 /* Supported Tx offloads */
-static uint64_t dev_tx_offloads_sup;
+static uint64_t dev_tx_offloads_sup =
+		DEV_TX_OFFLOAD_MT_LOCKFREE |
+		DEV_TX_OFFLOAD_MBUF_FAST_FREE;
 
 /* Tx offloads which cannot be disabled */
 static uint64_t dev_tx_offloads_nodis =
@@ -68,9 +70,7 @@ static uint64_t dev_tx_offloads_nodis =
 		DEV_TX_OFFLOAD_TCP_CKSUM |
 		DEV_TX_OFFLOAD_SCTP_CKSUM |
 		DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
-		DEV_TX_OFFLOAD_MULTI_SEGS |
-		DEV_TX_OFFLOAD_MT_LOCKFREE |
-		DEV_TX_OFFLOAD_MBUF_FAST_FREE;
+		DEV_TX_OFFLOAD_MULTI_SEGS;
 
 /* Keep track of whether QMAN and BMAN have been globally initialized */
 static int is_global_init;
@@ -196,20 +196,20 @@ dpaa_eth_dev_configure(struct rte_eth_dev *dev)
 
 	PMD_INIT_FUNC_TRACE();
 
-	/* Rx offloads validation */
+	/* Rx offloads which are enabled by default */
 	if (dev_rx_offloads_nodis & ~rx_offloads) {
-		DPAA_PMD_WARN(
-		"Rx offloads non configurable - requested 0x%" PRIx64
-		" ignored 0x%" PRIx64,
-			rx_offloads, dev_rx_offloads_nodis);
+		DPAA_PMD_INFO(
+		"Some of rx offloads enabled by default - requested 0x%" PRIx64
+		" fixed are 0x%" PRIx64,
+		rx_offloads, dev_rx_offloads_nodis);
 	}
 
-	/* Tx offloads validation */
+	/* Tx offloads which are enabled by default */
 	if (dev_tx_offloads_nodis & ~tx_offloads) {
-		DPAA_PMD_WARN(
-		"Tx offloads non configurable - requested 0x%" PRIx64
-		" ignored 0x%" PRIx64,
-			tx_offloads, dev_tx_offloads_nodis);
+		DPAA_PMD_INFO(
+		"Some of tx offloads enabled by default - requested 0x%" PRIx64
+		" fixed are 0x%" PRIx64,
+		tx_offloads, dev_tx_offloads_nodis);
 	}
 
 	if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
-- 
2.17.1

[dpdk-dev] [PATCH v2 03/30] bus/dpaa: remove un-necessary thread affinity

[Sachin Saxena]

From: Nipun Gupta <nipun.gupta@nxp.com>

Thread affinity is already taken care by DPDK. Remove them from bus.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
---
 drivers/bus/dpaa/base/qbman/qman_driver.c | 56 ++---------------------
 drivers/bus/dpaa/dpaa_bus.c               | 13 ------
 2 files changed, 3 insertions(+), 66 deletions(-)

diff --git a/drivers/bus/dpaa/base/qbman/qman_driver.c b/drivers/bus/dpaa/base/qbman/qman_driver.c
index ba153396d..5c773669a 100644
--- a/drivers/bus/dpaa/base/qbman/qman_driver.c
+++ b/drivers/bus/dpaa/base/qbman/qman_driver.c
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2008-2016 Freescale Semiconductor Inc.
- * Copyright 2017 NXP
+ * Copyright 2017,2019 NXP
  *
  */
 
@@ -32,31 +32,9 @@ static __thread struct dpaa_ioctl_portal_map map = {
 
 static int fsl_qman_portal_init(uint32_t index, int is_shared)
 {
-	cpu_set_t cpuset;
 	struct qman_portal *portal;
-	int loop, ret;
 	struct dpaa_ioctl_irq_map irq_map;
-
-	/* Verify the thread's cpu-affinity */
-	ret = pthread_getaffinity_np(pthread_self(), sizeof(cpu_set_t),
-				     &cpuset);
-	if (ret) {
-		error(0, ret, "pthread_getaffinity_np()");
-		return ret;
-	}
-	qpcfg.cpu = -1;
-	for (loop = 0; loop < CPU_SETSIZE; loop++)
-		if (CPU_ISSET(loop, &cpuset)) {
-			if (qpcfg.cpu != -1) {
-				pr_err("Thread is not affine to 1 cpu\n");
-				return -EINVAL;
-			}
-			qpcfg.cpu = loop;
-		}
-	if (qpcfg.cpu == -1) {
-		pr_err("Bug in getaffinity handling!\n");
-		return -EINVAL;
-	}
+	int ret;
 
 	/* Allocate and map a qman portal */
 	map.index = index;
@@ -145,14 +123,11 @@ void qman_thread_irq(void)
 
 struct qman_portal *fsl_qman_portal_create(void)
 {
-	cpu_set_t cpuset;
 	struct qman_portal *res;
-
 	struct qm_portal_config *q_pcfg;
-	int loop, ret;
 	struct dpaa_ioctl_irq_map irq_map;
 	struct dpaa_ioctl_portal_map q_map = {0};
-	int q_fd;
+	int q_fd, ret;
 
 	q_pcfg = kzalloc((sizeof(struct qm_portal_config)), 0);
 	if (!q_pcfg) {
@@ -160,31 +135,6 @@ struct qman_portal *fsl_qman_portal_create(void)
 		return NULL;
 	}
 
-	/* Verify the thread's cpu-affinity */
-	ret = pthread_getaffinity_np(pthread_self(), sizeof(cpu_set_t),
-				     &cpuset);
-	if (ret) {
-		error(0, ret, "pthread_getaffinity_np()");
-		kfree(q_pcfg);
-		return NULL;
-	}
-
-	q_pcfg->cpu = -1;
-	for (loop = 0; loop < CPU_SETSIZE; loop++)
-		if (CPU_ISSET(loop, &cpuset)) {
-			if (q_pcfg->cpu != -1) {
-				pr_err("Thread is not affine to 1 cpu\n");
-				kfree(q_pcfg);
-				return NULL;
-			}
-			q_pcfg->cpu = loop;
-		}
-	if (q_pcfg->cpu == -1) {
-		pr_err("Bug in getaffinity handling!\n");
-		kfree(q_pcfg);
-		return NULL;
-	}
-
 	/* Allocate and map a qman portal */
 	q_map.type = dpaa_portal_qman;
 	q_map.index = QBMAN_ANY_PORTAL_IDX;
diff --git a/drivers/bus/dpaa/dpaa_bus.c b/drivers/bus/dpaa/dpaa_bus.c
index f7d1a5b63..b0e68c4a4 100644
--- a/drivers/bus/dpaa/dpaa_bus.c
+++ b/drivers/bus/dpaa/dpaa_bus.c
@@ -250,11 +250,9 @@ dpaa_clean_device_list(void)
 
 int rte_dpaa_portal_init(void *arg)
 {
-	pthread_t id;
 	unsigned int cpu, lcore = rte_lcore_id();
 	int ret;
 	struct dpaa_portal *dpaa_io_portal;
-	rte_cpuset_t cpuset;
 
 	BUS_INIT_FUNC_TRACE();
 
@@ -266,17 +264,6 @@ int rte_dpaa_portal_init(void *arg)
 
 	cpu = rte_lcore_to_cpu_id(lcore);
 
-	/* Set CPU affinity for this thread.*/
-	id = pthread_self();
-	cpuset = rte_lcore_cpuset(lcore);
-	ret = pthread_setaffinity_np(id, sizeof(cpu_set_t),
-				     &cpuset);
-	if (ret) {
-		DPAA_BUS_LOG(ERR, "pthread_setaffinity_np failed on core :%u"
-			     " (lcore=%u) with ret: %d", cpu, lcore, ret);
-		return ret;
-	}
-
 	/* Initialise bman thread portals */
 	ret = bman_thread_init();
 	if (ret) {
-- 
2.17.1

[dpdk-dev] [PATCH v2 04/30] bus/dpaa: decouple fq portal alloc and init

[Sachin Saxena]

From: Nipun Gupta <nipun.gupta@nxp.com>

The decoupling of FQ portal allocation is required as a
pre-requisite to support Rx interrupts as we need to have
event FD's at portal allocation i.e. before the
initialization of the Frame Queues.
This change will help us get the event fd once the portals
have been allocated for static FQ's.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
---
 drivers/bus/dpaa/base/qbman/qman.c        | 35 ++++++++---------
 drivers/bus/dpaa/base/qbman/qman_driver.c | 46 ++++++++++++++++-------
 drivers/bus/dpaa/base/qbman/qman_priv.h   | 13 +++++--
 drivers/bus/dpaa/dpaa_bus.c               | 13 +++----
 drivers/bus/dpaa/include/fsl_qman.h       |  3 +-
 drivers/bus/dpaa/include/fsl_usd.h        |  6 ++-
 drivers/bus/dpaa/rte_bus_dpaa_version.map |  7 ++++
 drivers/net/dpaa/dpaa_ethdev.c            | 10 +++++
 drivers/net/dpaa/dpaa_rxtx.c              |  3 +-
 9 files changed, 90 insertions(+), 46 deletions(-)

diff --git a/drivers/bus/dpaa/base/qbman/qman.c b/drivers/bus/dpaa/base/qbman/qman.c
index c6f7d7bb3..79017f7f2 100644
--- a/drivers/bus/dpaa/base/qbman/qman.c
+++ b/drivers/bus/dpaa/base/qbman/qman.c
@@ -498,11 +498,10 @@ static inline void qm_mr_pvb_update(struct qm_portal *portal)
 	dcbit_ro(res);
 }
 
-static inline
-struct qman_portal *qman_create_portal(
-			struct qman_portal *portal,
-			      const struct qm_portal_config *c,
-			      const struct qman_cgrs *cgrs)
+struct qman_portal *
+qman_init_portal(struct qman_portal *portal,
+		   const struct qm_portal_config *c,
+		   const struct qman_cgrs *cgrs)
 {
 	struct qm_portal *p;
 	char buf[16];
@@ -511,6 +510,9 @@ struct qman_portal *qman_create_portal(
 
 	p = &portal->p;
 
+	if (!c)
+		c = portal->config;
+
 	if (dpaa_svr_family == SVR_LS1043A_FAMILY)
 		portal->use_eqcr_ci_stashing = 3;
 	else
@@ -632,21 +634,23 @@ struct qman_portal *qman_create_portal(
 static struct qman_portal global_portals[MAX_GLOBAL_PORTALS];
 static rte_atomic16_t global_portals_used[MAX_GLOBAL_PORTALS];
 
-static struct qman_portal *
-qman_alloc_global_portal(void)
+struct qman_portal *
+qman_alloc_global_portal(struct qm_portal_config *q_pcfg)
 {
 	unsigned int i;
 
 	for (i = 0; i < MAX_GLOBAL_PORTALS; i++) {
-		if (rte_atomic16_test_and_set(&global_portals_used[i]))
+		if (rte_atomic16_test_and_set(&global_portals_used[i])) {
+			global_portals[i].config = q_pcfg;
 			return &global_portals[i];
+		}
 	}
 	pr_err("No portal available (%x)\n", MAX_GLOBAL_PORTALS);
 
 	return NULL;
 }
 
-static int
+int
 qman_free_global_portal(struct qman_portal *portal)
 {
 	unsigned int i;
@@ -661,22 +665,15 @@ qman_free_global_portal(struct qman_portal *portal)
 }
 
 struct qman_portal *qman_create_affine_portal(const struct qm_portal_config *c,
-					      const struct qman_cgrs *cgrs,
-					      int alloc)
+					      const struct qman_cgrs *cgrs)
 {
 	struct qman_portal *res;
-	struct qman_portal *portal;
-
-	if (alloc)
-		portal = qman_alloc_global_portal();
-	else
-		portal = get_affine_portal();
+	struct qman_portal *portal = get_affine_portal();
 
 	/* A criteria for calling this function (from qman_driver.c) is that
 	 * we're already affine to the cpu and won't schedule onto another cpu.
 	 */
-
-	res = qman_create_portal(portal, c, cgrs);
+	res = qman_init_portal(portal, c, cgrs);
 	if (res) {
 		spin_lock(&affine_mask_lock);
 		CPU_SET(c->cpu, &affine_mask);
diff --git a/drivers/bus/dpaa/base/qbman/qman_driver.c b/drivers/bus/dpaa/base/qbman/qman_driver.c
index 5c773669a..06ed814e1 100644
--- a/drivers/bus/dpaa/base/qbman/qman_driver.c
+++ b/drivers/bus/dpaa/base/qbman/qman_driver.c
@@ -62,7 +62,7 @@ static int fsl_qman_portal_init(uint32_t index, int is_shared)
 	qpcfg.node = NULL;
 	qpcfg.irq = qmfd;
 
-	portal = qman_create_affine_portal(&qpcfg, NULL, 0);
+	portal = qman_create_affine_portal(&qpcfg, NULL);
 	if (!portal) {
 		pr_err("Qman portal initialisation failed (%d)\n",
 		       qpcfg.cpu);
@@ -121,13 +121,13 @@ void qman_thread_irq(void)
 	out_be32(qpcfg.addr_virt[DPAA_PORTAL_CI] + 0x36C0, 0);
 }
 
-struct qman_portal *fsl_qman_portal_create(void)
+struct qman_portal *fsl_qman_fq_portal_create(void)
 {
-	struct qman_portal *res;
+	struct qman_portal *portal = NULL;
 	struct qm_portal_config *q_pcfg;
 	struct dpaa_ioctl_irq_map irq_map;
 	struct dpaa_ioctl_portal_map q_map = {0};
-	int q_fd, ret;
+	int q_fd = 0, ret;
 
 	q_pcfg = kzalloc((sizeof(struct qm_portal_config)), 0);
 	if (!q_pcfg) {
@@ -155,38 +155,58 @@ struct qman_portal *fsl_qman_portal_create(void)
 	q_fd = open(QMAN_PORTAL_IRQ_PATH, O_RDONLY);
 	if (q_fd == -1) {
 		pr_err("QMan irq init failed\n");
-		goto err1;
+		goto err;
 	}
 
 	q_pcfg->irq = q_fd;
 
-	res = qman_create_affine_portal(q_pcfg, NULL, true);
-	if (!res) {
+	portal = qman_alloc_global_portal(q_pcfg);
+	if (!portal) {
 		pr_err("Qman portal initialisation failed (%d)\n",
 		       q_pcfg->cpu);
-		goto err2;
+		goto err;
 	}
 
 	irq_map.type = dpaa_portal_qman;
 	irq_map.portal_cinh = q_map.addr.cinh;
 	process_portal_irq_map(q_fd, &irq_map);
 
-	return res;
-err2:
-	close(q_fd);
-err1:
+	return portal;
+err:
+	if (portal)
+		qman_free_global_portal(portal);
+	if (q_fd)
+		close(q_fd);
 	process_portal_unmap(&q_map.addr);
 	kfree(q_pcfg);
 	return NULL;
 }
 
-int fsl_qman_portal_destroy(struct qman_portal *qp)
+int fsl_qman_fq_portal_init(struct qman_portal *qp)
+{
+	struct qman_portal *res;
+
+	res = qman_init_portal(qp, NULL, NULL);
+	if (!res) {
+		pr_err("Qman portal initialisation failed\n");
+		return -1;
+	}
+
+	return 0;
+}
+
+int fsl_qman_fq_portal_destroy(struct qman_portal *qp)
 {
 	const struct qm_portal_config *cfg;
 	struct dpaa_portal_map addr;
 	int ret;
 
 	cfg = qman_destroy_affine_portal(qp);
+
+	ret = qman_free_global_portal(qp);
+	if (ret)
+		pr_err("qman_free_global_portal() (%d)\n", ret);
+
 	kfree(qp);
 
 	process_portal_irq_unmap(cfg->irq);
diff --git a/drivers/bus/dpaa/base/qbman/qman_priv.h b/drivers/bus/dpaa/base/qbman/qman_priv.h
index 02f6301f0..97d5521a8 100644
--- a/drivers/bus/dpaa/base/qbman/qman_priv.h
+++ b/drivers/bus/dpaa/base/qbman/qman_priv.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2008-2016 Freescale Semiconductor Inc.
- * Copyright 2017 NXP
+ * Copyright 2017,2019 NXP
  *
  */
 
@@ -145,11 +145,18 @@ int qm_get_wpm(int *wpm);
 
 struct qman_portal *qman_create_affine_portal(
 			const struct qm_portal_config *config,
-			const struct qman_cgrs *cgrs,
-			int alloc);
+			const struct qman_cgrs *cgrs);
 const struct qm_portal_config *
 qman_destroy_affine_portal(struct qman_portal *q);
 
+struct qman_portal *
+qman_init_portal(struct qman_portal *portal,
+		   const struct qm_portal_config *c,
+		   const struct qman_cgrs *cgrs);
+
+struct qman_portal *qman_alloc_global_portal(struct qm_portal_config *q_pcfg);
+int qman_free_global_portal(struct qman_portal *portal);
+
 struct qm_portal_config *qm_get_unused_portal(void);
 struct qm_portal_config *qm_get_unused_portal_idx(uint32_t idx);
 
diff --git a/drivers/bus/dpaa/dpaa_bus.c b/drivers/bus/dpaa/dpaa_bus.c
index b0e68c4a4..1d8a294b1 100644
--- a/drivers/bus/dpaa/dpaa_bus.c
+++ b/drivers/bus/dpaa/dpaa_bus.c
@@ -321,7 +321,6 @@ rte_dpaa_portal_fq_init(void *arg, struct qman_fq *fq)
 {
 	/* Affine above created portal with channel*/
 	u32 sdqcr;
-	struct qman_portal *qp;
 	int ret;
 
 	if (unlikely(!RTE_PER_LCORE(dpaa_io))) {
@@ -333,21 +332,21 @@ rte_dpaa_portal_fq_init(void *arg, struct qman_fq *fq)
 	}
 
 	/* Initialise qman specific portals */
-	qp = fsl_qman_portal_create();
-	if (!qp) {
-		DPAA_BUS_LOG(ERR, "Unable to alloc fq portal");
+	ret = fsl_qman_fq_portal_init(fq->qp);
+	if (ret) {
+		DPAA_BUS_LOG(ERR, "Unable to init fq portal");
 		return -1;
 	}
-	fq->qp = qp;
+
 	sdqcr = QM_SDQCR_CHANNELS_POOL_CONV(fq->ch_id);
-	qman_static_dequeue_add(sdqcr, qp);
+	qman_static_dequeue_add(sdqcr, fq->qp);
 
 	return 0;
 }
 
 int rte_dpaa_portal_fq_close(struct qman_fq *fq)
 {
-	return fsl_qman_portal_destroy(fq->qp);
+	return fsl_qman_fq_portal_destroy(fq->qp);
 }
 
 void
diff --git a/drivers/bus/dpaa/include/fsl_qman.h b/drivers/bus/dpaa/include/fsl_qman.h
index e5cccbbea..5f13a5544 100644
--- a/drivers/bus/dpaa/include/fsl_qman.h
+++ b/drivers/bus/dpaa/include/fsl_qman.h
@@ -1217,7 +1217,8 @@ struct qman_fq {
 	u32 fqid_le;
 	u16 ch_id;
 	u8 cgr_groupid;
-	u8 is_static;
+	u8 is_static:4;
+	u8 qp_initialized:4;
 
 	/* DPDK Interface */
 	void *dpaa_intf;
diff --git a/drivers/bus/dpaa/include/fsl_usd.h b/drivers/bus/dpaa/include/fsl_usd.h
index ec1ab7cee..ea7be38af 100644
--- a/drivers/bus/dpaa/include/fsl_usd.h
+++ b/drivers/bus/dpaa/include/fsl_usd.h
@@ -2,6 +2,7 @@
  *
  * Copyright 2010-2011 Freescale Semiconductor, Inc.
  * All rights reserved.
+ * Copyright 2019 NXP
  *
  */
 
@@ -74,8 +75,9 @@ int qman_global_init(void);
 int bman_global_init(void);
 
 /* Direct portal create and destroy */
-struct qman_portal *fsl_qman_portal_create(void);
-int fsl_qman_portal_destroy(struct qman_portal *qp);
+struct qman_portal *fsl_qman_fq_portal_create(void);
+int fsl_qman_fq_portal_destroy(struct qman_portal *qp);
+int fsl_qman_fq_portal_init(struct qman_portal *qp);
 
 #ifdef __cplusplus
 }
diff --git a/drivers/bus/dpaa/rte_bus_dpaa_version.map b/drivers/bus/dpaa/rte_bus_dpaa_version.map
index c88deaf7f..f779469f9 100644
--- a/drivers/bus/dpaa/rte_bus_dpaa_version.map
+++ b/drivers/bus/dpaa/rte_bus_dpaa_version.map
@@ -123,3 +123,10 @@ DPDK_19.05 {
 
 	local: *;
 } DPDK_18.11;
+
+DPDK_19.11 {
+	global:
+	fsl_qman_fq_portal_create;
+
+	local: *;
+} DPDK_19.05;
diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
index 7f5a8ac3b..4e2c9471e 100644
--- a/drivers/net/dpaa/dpaa_ethdev.c
+++ b/drivers/net/dpaa/dpaa_ethdev.c
@@ -629,6 +629,8 @@ int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 		dev->data->dev_conf.rxmode.max_rx_pkt_len);
 	/* checking if push mode only, no error check for now */
 	if (dpaa_push_mode_max_queue > dpaa_push_queue_idx) {
+		struct qman_portal *qp;
+
 		dpaa_push_queue_idx++;
 		opts.we_mask = QM_INITFQ_WE_FQCTRL | QM_INITFQ_WE_CONTEXTA;
 		opts.fqd.fq_ctrl = QM_FQCTRL_AVOIDBLOCK |
@@ -672,6 +674,14 @@ int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 		}
 
 		rxq->is_static = true;
+
+		/* Allocate qman specific portals */
+		qp = fsl_qman_fq_portal_create();
+		if (!qp) {
+			DPAA_PMD_ERR("Unable to alloc fq portal");
+			return -1;
+		}
+		rxq->qp = qp;
 	}
 	rxq->bp_array = rte_dpaa_bpid_info;
 	dev->data->rx_queues[queue_idx] = rxq;
diff --git a/drivers/net/dpaa/dpaa_rxtx.c b/drivers/net/dpaa/dpaa_rxtx.c
index 30b183607..220c3477d 100644
--- a/drivers/net/dpaa/dpaa_rxtx.c
+++ b/drivers/net/dpaa/dpaa_rxtx.c
@@ -517,12 +517,13 @@ dpaa_eth_queue_portal_rx(struct qman_fq *fq,
 {
 	int ret;
 
-	if (unlikely(fq->qp == NULL)) {
+	if (unlikely(!fq->qp_initialized)) {
 		ret = rte_dpaa_portal_fq_init((void *)0, fq);
 		if (ret) {
 			DPAA_PMD_ERR("Failure in affining portal %d", ret);
 			return 0;
 		}
+		fq->qp_initialized = 1;
 	}
 
 	return qman_portal_poll_rx(nb_bufs, (void **)bufs, fq->qp);
-- 
2.17.1

[dpdk-dev] [PATCH v2 05/30] net/dpaa: support Rx interrupt handler

[Sachin Saxena]

From: Nipun Gupta <nipun.gupta@nxp.com>

This patch adds interrupt handler support for
the ethernet devices which are configured with
a dedicated portal for packet Rx
(i.e. for FQ's in push mode).

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
---
 drivers/bus/dpaa/base/qbman/qman_driver.c |  3 ++-
 drivers/bus/dpaa/include/fsl_qman.h       | 18 +++++++++++++-
 drivers/bus/dpaa/include/fsl_usd.h        |  2 +-
 drivers/bus/dpaa/rte_dpaa_bus.h           |  1 +
 drivers/net/dpaa/dpaa_ethdev.c            | 29 +++++++++++++++++++++--
 5 files changed, 48 insertions(+), 5 deletions(-)

diff --git a/drivers/bus/dpaa/base/qbman/qman_driver.c b/drivers/bus/dpaa/base/qbman/qman_driver.c
index 06ed814e1..acd003143 100644
--- a/drivers/bus/dpaa/base/qbman/qman_driver.c
+++ b/drivers/bus/dpaa/base/qbman/qman_driver.c
@@ -121,7 +121,7 @@ void qman_thread_irq(void)
 	out_be32(qpcfg.addr_virt[DPAA_PORTAL_CI] + 0x36C0, 0);
 }
 
-struct qman_portal *fsl_qman_fq_portal_create(void)
+struct qman_portal *fsl_qman_fq_portal_create(int *fd)
 {
 	struct qman_portal *portal = NULL;
 	struct qm_portal_config *q_pcfg;
@@ -171,6 +171,7 @@ struct qman_portal *fsl_qman_fq_portal_create(void)
 	irq_map.portal_cinh = q_map.addr.cinh;
 	process_portal_irq_map(q_fd, &irq_map);
 
+	*fd = q_fd;
 	return portal;
 err:
 	if (portal)
diff --git a/drivers/bus/dpaa/include/fsl_qman.h b/drivers/bus/dpaa/include/fsl_qman.h
index 5f13a5544..064b65aed 100644
--- a/drivers/bus/dpaa/include/fsl_qman.h
+++ b/drivers/bus/dpaa/include/fsl_qman.h
@@ -1215,6 +1215,9 @@ struct qman_fq {
 	struct qman_fq_cb cb;
 
 	u32 fqid_le;
+	u32 fqid;
+
+	int q_fd;
 	u16 ch_id;
 	u8 cgr_groupid;
 	u8 is_static:4;
@@ -1231,7 +1234,6 @@ struct qman_fq {
 	volatile unsigned long flags;
 
 	enum qman_fq_state state;
-	u32 fqid;
 	spinlock_t fqlock;
 
 	struct rb_node node;
@@ -1333,6 +1335,13 @@ u32 qman_portal_dequeue(struct rte_event ev[], unsigned int poll_limit,
  */
 int qman_irqsource_add(u32 bits);
 
+/**
+ * qman_fq_portal_irqsource_add - samilar to qman_irqsource_add, but it
+ * takes portal (fq specific) as input rather than using the thread affined
+ * portal.
+ */
+int qman_fq_portal_irqsource_add(struct qman_portal *p, u32 bits);
+
 /**
  * qman_irqsource_remove - remove processing sources from being interrupt-driven
  * @bits: bitmask of QM_PIRQ_**I processing sources
@@ -1343,6 +1352,13 @@ int qman_irqsource_add(u32 bits);
  */
 int qman_irqsource_remove(u32 bits);
 
+/**
+ * qman_fq_portal_irqsource_remove - similar to qman_irqsource_remove, but it
+ * takes portal (fq specific) as input rather than using the thread affined
+ * portal.
+ */
+int qman_fq_portal_irqsource_remove(struct qman_portal *p, u32 bits);
+
 /**
  * qman_affine_channel - return the channel ID of an portal
  * @cpu: the cpu whose affine portal is the subject of the query
diff --git a/drivers/bus/dpaa/include/fsl_usd.h b/drivers/bus/dpaa/include/fsl_usd.h
index ea7be38af..a407e2b22 100644
--- a/drivers/bus/dpaa/include/fsl_usd.h
+++ b/drivers/bus/dpaa/include/fsl_usd.h
@@ -75,7 +75,7 @@ int qman_global_init(void);
 int bman_global_init(void);
 
 /* Direct portal create and destroy */
-struct qman_portal *fsl_qman_fq_portal_create(void);
+struct qman_portal *fsl_qman_fq_portal_create(int *fd);
 int fsl_qman_fq_portal_destroy(struct qman_portal *qp);
 int fsl_qman_fq_portal_init(struct qman_portal *qp);
 
diff --git a/drivers/bus/dpaa/rte_dpaa_bus.h b/drivers/bus/dpaa/rte_dpaa_bus.h
index 554a56f2e..9601aebdd 100644
--- a/drivers/bus/dpaa/rte_dpaa_bus.h
+++ b/drivers/bus/dpaa/rte_dpaa_bus.h
@@ -75,6 +75,7 @@ struct rte_dpaa_device {
 	};
 	struct rte_dpaa_driver *driver;
 	struct dpaa_device_id id;
+	struct rte_intr_handle intr_handle;
 	enum rte_dpaa_type device_type; /**< Ethernet or crypto type device */
 	char name[RTE_ETH_NAME_MAX_LEN];
 };
diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
index 4e2c9471e..1934f85ae 100644
--- a/drivers/net/dpaa/dpaa_ethdev.c
+++ b/drivers/net/dpaa/dpaa_ethdev.c
@@ -628,8 +628,10 @@ int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 		fman_if_get_sg_enable(dpaa_intf->fif),
 		dev->data->dev_conf.rxmode.max_rx_pkt_len);
 	/* checking if push mode only, no error check for now */
-	if (dpaa_push_mode_max_queue > dpaa_push_queue_idx) {
+	if (!rxq->is_static &&
+	    dpaa_push_mode_max_queue > dpaa_push_queue_idx) {
 		struct qman_portal *qp;
+		int q_fd;
 
 		dpaa_push_queue_idx++;
 		opts.we_mask = QM_INITFQ_WE_FQCTRL | QM_INITFQ_WE_CONTEXTA;
@@ -676,12 +678,35 @@ int dpaa_eth_rx_queue_setup(struct rte_eth_dev *dev, uint16_t queue_idx,
 		rxq->is_static = true;
 
 		/* Allocate qman specific portals */
-		qp = fsl_qman_fq_portal_create();
+		qp = fsl_qman_fq_portal_create(&q_fd);
 		if (!qp) {
 			DPAA_PMD_ERR("Unable to alloc fq portal");
 			return -1;
 		}
 		rxq->qp = qp;
+
+		/* Set up the device interrupt handler */
+		if (!dev->intr_handle) {
+			struct rte_dpaa_device *dpaa_dev;
+			struct rte_device *rdev = dev->device;
+
+			dpaa_dev = container_of(rdev, struct rte_dpaa_device,
+						device);
+			dev->intr_handle = &dpaa_dev->intr_handle;
+			dev->intr_handle->intr_vec = rte_zmalloc(NULL,
+					dpaa_push_mode_max_queue, 0);
+			if (!dev->intr_handle->intr_vec) {
+				DPAA_PMD_ERR("intr_vec alloc failed");
+				return -ENOMEM;
+			}
+			dev->intr_handle->nb_efd = dpaa_push_mode_max_queue;
+			dev->intr_handle->max_intr = dpaa_push_mode_max_queue;
+		}
+
+		dev->intr_handle->type = RTE_INTR_HANDLE_EXT;
+		dev->intr_handle->intr_vec[queue_idx] = queue_idx + 1;
+		dev->intr_handle->efds[queue_idx] = q_fd;
+		rxq->q_fd = q_fd;
 	}
 	rxq->bp_array = rte_dpaa_bpid_info;
 	dev->data->rx_queues[queue_idx] = rxq;
-- 
2.17.1

[dpdk-dev] [PATCH v2 06/30] net/dpaa: support for Rx interrupt enable and disable

[Sachin Saxena]

From: Nipun Gupta <nipun.gupta@nxp.com>

This patch adds support for dpaa eth driver
interrupt enable and disable callback functions.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
---
 drivers/bus/dpaa/base/qbman/qman.c        | 45 +++++++++++++++++++++++
 drivers/bus/dpaa/base/qbman/qman_driver.c |  5 +++
 drivers/bus/dpaa/base/qbman/qman_priv.h   |  2 +
 drivers/bus/dpaa/include/fsl_usd.h        |  1 +
 drivers/bus/dpaa/rte_bus_dpaa_version.map |  3 ++
 drivers/net/dpaa/dpaa_ethdev.c            | 39 +++++++++++++++++++-
 6 files changed, 94 insertions(+), 1 deletion(-)

diff --git a/drivers/bus/dpaa/base/qbman/qman.c b/drivers/bus/dpaa/base/qbman/qman.c
index 79017f7f2..96208bc40 100644
--- a/drivers/bus/dpaa/base/qbman/qman.c
+++ b/drivers/bus/dpaa/base/qbman/qman.c
@@ -664,6 +664,12 @@ qman_free_global_portal(struct qman_portal *portal)
 	return -1;
 }
 
+void
+qman_portal_uninhibit_isr(struct qman_portal *portal)
+{
+	qm_isr_uninhibit(&portal->p);
+}
+
 struct qman_portal *qman_create_affine_portal(const struct qm_portal_config *c,
 					      const struct qman_cgrs *cgrs)
 {
@@ -1053,6 +1059,20 @@ int qman_irqsource_add(u32 bits)
 	dpaa_set_bits(bits, &p->irq_sources);
 	qm_isr_enable_write(&p->p, p->irq_sources);
 
+	return 0;
+}
+
+int qman_fq_portal_irqsource_add(struct qman_portal *p, u32 bits)
+{
+	bits = bits & QM_PIRQ_VISIBLE;
+
+	/* Clear any previously remaining interrupt conditions in
+	 * QCSP_ISR. This prevents raising a false interrupt when
+	 * interrupt conditions are enabled in QCSP_IER.
+	 */
+	qm_isr_status_clear(&p->p, bits);
+	dpaa_set_bits(bits, &p->irq_sources);
+	qm_isr_enable_write(&p->p, p->irq_sources);
 
 	return 0;
 }
@@ -1083,6 +1103,31 @@ int qman_irqsource_remove(u32 bits)
 	return 0;
 }
 
+int qman_fq_portal_irqsource_remove(struct qman_portal *p, u32 bits)
+{
+	u32 ier;
+
+	/* Our interrupt handler only processes+clears status register bits that
+	 * are in p->irq_sources. As we're trimming that mask, if one of them
+	 * were to assert in the status register just before we remove it from
+	 * the enable register, there would be an interrupt-storm when we
+	 * release the IRQ lock. So we wait for the enable register update to
+	 * take effect in h/w (by reading it back) and then clear all other bits
+	 * in the status register. Ie. we clear them from ISR once it's certain
+	 * IER won't allow them to reassert.
+	 */
+
+	bits &= QM_PIRQ_VISIBLE;
+	dpaa_clear_bits(bits, &p->irq_sources);
+	qm_isr_enable_write(&p->p, p->irq_sources);
+	ier = qm_isr_enable_read(&p->p);
+	/* Using "~ier" (rather than "bits" or "~p->irq_sources") creates a
+	 * data-dependency, ie. to protect against re-ordering.
+	 */
+	qm_isr_status_clear(&p->p, ~ier);
+	return 0;
+}
+
 u16 qman_affine_channel(int cpu)
 {
 	if (cpu < 0) {
diff --git a/drivers/bus/dpaa/base/qbman/qman_driver.c b/drivers/bus/dpaa/base/qbman/qman_driver.c
index acd003143..69244ef70 100644
--- a/drivers/bus/dpaa/base/qbman/qman_driver.c
+++ b/drivers/bus/dpaa/base/qbman/qman_driver.c
@@ -121,6 +121,11 @@ void qman_thread_irq(void)
 	out_be32(qpcfg.addr_virt[DPAA_PORTAL_CI] + 0x36C0, 0);
 }
 
+void qman_fq_portal_thread_irq(struct qman_portal *qp)
+{
+	qman_portal_uninhibit_isr(qp);
+}
+
 struct qman_portal *fsl_qman_fq_portal_create(int *fd)
 {
 	struct qman_portal *portal = NULL;
diff --git a/drivers/bus/dpaa/base/qbman/qman_priv.h b/drivers/bus/dpaa/base/qbman/qman_priv.h
index 97d5521a8..8254729e6 100644
--- a/drivers/bus/dpaa/base/qbman/qman_priv.h
+++ b/drivers/bus/dpaa/base/qbman/qman_priv.h
@@ -157,6 +157,8 @@ qman_init_portal(struct qman_portal *portal,
 struct qman_portal *qman_alloc_global_portal(struct qm_portal_config *q_pcfg);
 int qman_free_global_portal(struct qman_portal *portal);
 
+void qman_portal_uninhibit_isr(struct qman_portal *portal);
+
 struct qm_portal_config *qm_get_unused_portal(void);
 struct qm_portal_config *qm_get_unused_portal_idx(uint32_t idx);
 
diff --git a/drivers/bus/dpaa/include/fsl_usd.h b/drivers/bus/dpaa/include/fsl_usd.h
index a407e2b22..3c26d6ccb 100644
--- a/drivers/bus/dpaa/include/fsl_usd.h
+++ b/drivers/bus/dpaa/include/fsl_usd.h
@@ -67,6 +67,7 @@ int bman_thread_fd(void);
  */
 void qman_thread_irq(void);
 void bman_thread_irq(void);
+void qman_fq_portal_thread_irq(struct qman_portal *qp);
 
 void qman_clear_irq(void);
 
diff --git a/drivers/bus/dpaa/rte_bus_dpaa_version.map b/drivers/bus/dpaa/rte_bus_dpaa_version.map
index f779469f9..962b952d3 100644
--- a/drivers/bus/dpaa/rte_bus_dpaa_version.map
+++ b/drivers/bus/dpaa/rte_bus_dpaa_version.map
@@ -127,6 +127,9 @@ DPDK_19.05 {
 DPDK_19.11 {
 	global:
 	fsl_qman_fq_portal_create;
+	qman_fq_portal_irqsource_add;
+	qman_fq_portal_irqsource_remove;
+	qman_fq_portal_thread_irq;
 
 	local: *;
 } DPDK_19.05;
diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
index 1934f85ae..42ab3d05f 100644
--- a/drivers/net/dpaa/dpaa_ethdev.c
+++ b/drivers/net/dpaa/dpaa_ethdev.c
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  *
  *   Copyright 2016 Freescale Semiconductor, Inc. All rights reserved.
- *   Copyright 2017 NXP
+ *   Copyright 2017-2019 NXP
  *
  */
 /* System headers */
@@ -1013,6 +1013,40 @@ dpaa_dev_set_mac_addr(struct rte_eth_dev *dev,
 	return ret;
 }
 
+static int dpaa_dev_queue_intr_enable(struct rte_eth_dev *dev,
+				      uint16_t queue_id)
+{
+	struct dpaa_if *dpaa_intf = dev->data->dev_private;
+	struct qman_fq *rxq = &dpaa_intf->rx_queues[queue_id];
+
+	if (!rxq->is_static)
+		return -EINVAL;
+
+	return qman_fq_portal_irqsource_add(rxq->qp, QM_PIRQ_DQRI);
+}
+
+static int dpaa_dev_queue_intr_disable(struct rte_eth_dev *dev,
+				       uint16_t queue_id)
+{
+	struct dpaa_if *dpaa_intf = dev->data->dev_private;
+	struct qman_fq *rxq = &dpaa_intf->rx_queues[queue_id];
+	uint32_t temp;
+	ssize_t temp1;
+
+	if (!rxq->is_static)
+		return -EINVAL;
+
+	qman_fq_portal_irqsource_remove(rxq->qp, ~0);
+
+	temp1 = read(rxq->q_fd, &temp, sizeof(temp));
+	if (temp1 != sizeof(temp))
+		DPAA_EVENTDEV_ERR("irq read error");
+
+	qman_fq_portal_thread_irq(rxq->qp);
+
+	return 0;
+}
+
 static struct eth_dev_ops dpaa_devops = {
 	.dev_configure		  = dpaa_eth_dev_configure,
 	.dev_start		  = dpaa_eth_dev_start,
@@ -1050,6 +1084,9 @@ static struct eth_dev_ops dpaa_devops = {
 	.mac_addr_set		  = dpaa_dev_set_mac_addr,
 
 	.fw_version_get		  = dpaa_fw_version_get,
+
+	.rx_queue_intr_enable	  = dpaa_dev_queue_intr_enable,
+	.rx_queue_intr_disable	  = dpaa_dev_queue_intr_disable,
 };
 
 static bool
-- 
2.17.1

[dpdk-dev] [PATCH v2 07/30] net/dpaa: add SG support in Tx for non DPAA buffer

[Sachin Saxena]

From: Nipun Gupta <nipun.gupta@nxp.com>

This patch adds support for Scatter Gather
in the transmit side, for the cases where the
buffer are received which are not from DPAA
buffer pool.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
---
 drivers/net/dpaa/dpaa_rxtx.c | 189 +++++++++++++++++++----------------
 1 file changed, 101 insertions(+), 88 deletions(-)

diff --git a/drivers/net/dpaa/dpaa_rxtx.c b/drivers/net/dpaa/dpaa_rxtx.c
index 220c3477d..2de1a1a7e 100644
--- a/drivers/net/dpaa/dpaa_rxtx.c
+++ b/drivers/net/dpaa/dpaa_rxtx.c
@@ -642,53 +642,6 @@ uint16_t dpaa_eth_queue_rx(void *q,
 	return num_rx;
 }
 
-static void *dpaa_get_pktbuf(struct dpaa_bp_info *bp_info)
-{
-	int ret;
-	size_t buf = 0;
-	struct bm_buffer bufs;
-
-	ret = bman_acquire(bp_info->bp, &bufs, 1, 0);
-	if (ret <= 0) {
-		DPAA_PMD_WARN("Failed to allocate buffers %d", ret);
-		return (void *)buf;
-	}
-
-	DPAA_DP_LOG(DEBUG, "got buffer 0x%" PRIx64 " from pool %d",
-		    (uint64_t)bufs.addr, bufs.bpid);
-
-	buf = (size_t)DPAA_MEMPOOL_PTOV(bp_info, bufs.addr)
-				- bp_info->meta_data_size;
-	if (!buf)
-		goto out;
-
-out:
-	return (void *)buf;
-}
-
-static struct rte_mbuf *dpaa_get_dmable_mbuf(struct rte_mbuf *mbuf,
-					     struct dpaa_if *dpaa_intf)
-{
-	struct rte_mbuf *dpaa_mbuf;
-
-	/* allocate pktbuffer on bpid for dpaa port */
-	dpaa_mbuf = dpaa_get_pktbuf(dpaa_intf->bp_info);
-	if (!dpaa_mbuf)
-		return NULL;
-
-	memcpy((uint8_t *)(dpaa_mbuf->buf_addr) + RTE_PKTMBUF_HEADROOM, (void *)
-		((uint8_t *)(mbuf->buf_addr) + mbuf->data_off), mbuf->pkt_len);
-
-	/* Copy only the required fields */
-	dpaa_mbuf->data_off = RTE_PKTMBUF_HEADROOM;
-	dpaa_mbuf->pkt_len = mbuf->pkt_len;
-	dpaa_mbuf->ol_flags = mbuf->ol_flags;
-	dpaa_mbuf->packet_type = mbuf->packet_type;
-	dpaa_mbuf->tx_offload = mbuf->tx_offload;
-	rte_pktmbuf_free(mbuf);
-	return dpaa_mbuf;
-}
-
 int
 dpaa_eth_mbuf_to_sg_fd(struct rte_mbuf *mbuf,
 		struct qm_fd *fd,
@@ -862,26 +815,84 @@ tx_on_dpaa_pool(struct rte_mbuf *mbuf,
 }
 
 /* Handle all mbufs on an external pool (non-dpaa) */
-static inline uint16_t
-tx_on_external_pool(struct qman_fq *txq, struct rte_mbuf *mbuf,
-		    struct qm_fd *fd_arr)
+static inline struct rte_mbuf *
+reallocate_mbuf(struct qman_fq *txq, struct rte_mbuf *mbuf)
 {
 	struct dpaa_if *dpaa_intf = txq->dpaa_intf;
-	struct rte_mbuf *dmable_mbuf;
+	struct dpaa_bp_info *bp_info = dpaa_intf->bp_info;
+	struct rte_mbuf *new_mbufs[DPAA_SGT_MAX_ENTRIES + 1] = {0};
+	struct rte_mbuf *temp_mbuf;
+	int num_new_segs, mbuf_greater, ret, extra_seg = 0, i = 0;
+	uint64_t mbufs_size, bytes_to_copy, offset1 = 0, offset2 = 0;
+	char *data;
+
+	DPAA_DP_LOG(DEBUG, "Reallocating transmit buffer");
+
+	mbufs_size = bp_info->size -
+		bp_info->meta_data_size - RTE_PKTMBUF_HEADROOM;
+	extra_seg = !!(mbuf->pkt_len % mbufs_size);
+	num_new_segs = (mbuf->pkt_len / mbufs_size) + extra_seg;
+
+	ret = rte_pktmbuf_alloc_bulk(bp_info->mp, new_mbufs, num_new_segs);
+	if (ret != 0) {
+		DPAA_DP_LOG(DEBUG, "Allocation for new buffers failed");
+		return NULL;
+	}
 
-	DPAA_DP_LOG(DEBUG, "Non-BMAN offloaded buffer."
-		    "Allocating an offloaded buffer");
-	dmable_mbuf = dpaa_get_dmable_mbuf(mbuf, dpaa_intf);
-	if (!dmable_mbuf) {
-		DPAA_DP_LOG(DEBUG, "no dpaa buffers.");
-		return 1;
+	temp_mbuf = mbuf;
+
+	while (temp_mbuf) {
+		/* If mbuf data is less than new mbuf remaining memory */
+		if ((temp_mbuf->data_len - offset1) < (mbufs_size - offset2)) {
+			bytes_to_copy = temp_mbuf->data_len - offset1;
+			mbuf_greater = -1;
+		/* If mbuf data is greater than new mbuf remaining memory */
+		} else if ((temp_mbuf->data_len - offset1) >
+			   (mbufs_size - offset2)) {
+			bytes_to_copy = mbufs_size - offset2;
+			mbuf_greater = 1;
+		/* if mbuf data is equal to new mbuf remaining memory */
+		} else {
+			bytes_to_copy = temp_mbuf->data_len - offset1;
+			mbuf_greater = 0;
+		}
+
+		/* Copy the data */
+		data = rte_pktmbuf_append(new_mbufs[0], bytes_to_copy);
+
+		rte_memcpy((uint8_t *)data, rte_pktmbuf_mtod_offset(mbuf,
+			   void *, offset1), bytes_to_copy);
+
+		/* Set new offsets and the temp buffers */
+		if (mbuf_greater == -1) {
+			offset1 = 0;
+			offset2 += bytes_to_copy;
+			temp_mbuf = temp_mbuf->next;
+		} else if (mbuf_greater == 1) {
+			offset2 = 0;
+			offset1 += bytes_to_copy;
+			new_mbufs[i]->next = new_mbufs[i + 1];
+			new_mbufs[0]->nb_segs++;
+			i++;
+		} else {
+			offset1 = 0;
+			offset2 = 0;
+			temp_mbuf = temp_mbuf->next;
+			new_mbufs[i]->next = new_mbufs[i + 1];
+			if (new_mbufs[i + 1])
+				new_mbufs[0]->nb_segs++;
+			i++;
+		}
 	}
 
-	DPAA_MBUF_TO_CONTIG_FD(dmable_mbuf, fd_arr, dpaa_intf->bp_info->bpid);
-	if (mbuf->ol_flags & DPAA_TX_CKSUM_OFFLOAD_MASK)
-		dpaa_unsegmented_checksum(mbuf, fd_arr);
+	/* Copy other required fields */
+	new_mbufs[0]->ol_flags = mbuf->ol_flags;
+	new_mbufs[0]->packet_type = mbuf->packet_type;
+	new_mbufs[0]->tx_offload = mbuf->tx_offload;
 
-	return 0;
+	rte_pktmbuf_free(mbuf);
+
+	return new_mbufs[0];
 }
 
 uint16_t
@@ -893,7 +904,7 @@ dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs)
 	struct qm_fd fd_arr[DPAA_TX_BURST_SIZE];
 	uint32_t frames_to_send, loop, sent = 0;
 	uint16_t state;
-	int ret;
+	int ret, realloc_mbuf = 0;
 	uint32_t seqn, index, flags[DPAA_TX_BURST_SIZE] = {0};
 
 	if (unlikely(!RTE_PER_LCORE(dpaa_io))) {
@@ -911,6 +922,13 @@ dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs)
 				DPAA_TX_BURST_SIZE : nb_bufs;
 		for (loop = 0; loop < frames_to_send; loop++) {
 			mbuf = *(bufs++);
+			/* In case the data offset is not multiple of 16,
+			 * FMAN can stall because of an errata. So reallocate
+			 * the buffer in such case.
+			 */
+			if (dpaa_svr_family == SVR_LS1043A_FAMILY &&
+					(mbuf->data_off & 0xFF) != 0x0)
+				realloc_mbuf = 1;
 			seqn = mbuf->seqn;
 			if (seqn != DPAA_INVALID_MBUF_SEQN) {
 				index = seqn - 1;
@@ -930,6 +948,7 @@ dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs)
 				if (likely(mp->ops_index ==
 						bp_info->dpaa_ops_index &&
 					mbuf->nb_segs == 1 &&
+					realloc_mbuf == 0 &&
 					rte_mbuf_refcnt_read(mbuf) == 1)) {
 					DPAA_MBUF_TO_CONTIG_FD(mbuf,
 						&fd_arr[loop], bp_info->bpid);
@@ -945,32 +964,12 @@ dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs)
 			}
 
 			bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp);
-			if (likely(mp->ops_index == bp_info->dpaa_ops_index)) {
-				state = tx_on_dpaa_pool(mbuf, bp_info,
-							&fd_arr[loop]);
-				if (unlikely(state)) {
-					/* Set frames_to_send & nb_bufs so
-					 * that packets are transmitted till
-					 * previous frame.
-					 */
-					frames_to_send = loop;
-					nb_bufs = loop;
-					goto send_pkts;
-				}
-			} else {
-				/* TODO not supporting sg for external bufs*/
-				if (unlikely(mbuf->nb_segs > 1)) {
-					/* Set frames_to_send & nb_bufs so
-					 * that packets are transmitted till
-					 * previous frame.
-					 */
-					frames_to_send = loop;
-					nb_bufs = loop;
-					goto send_pkts;
-				}
-				state = tx_on_external_pool(q, mbuf,
-							    &fd_arr[loop]);
-				if (unlikely(state)) {
+			if (unlikely(mp->ops_index != bp_info->dpaa_ops_index ||
+				     realloc_mbuf == 1)) {
+				struct rte_mbuf *temp_mbuf;
+
+				temp_mbuf = reallocate_mbuf(q, mbuf);
+				if (!temp_mbuf) {
 					/* Set frames_to_send & nb_bufs so
 					 * that packets are transmitted till
 					 * previous frame.
@@ -979,6 +978,20 @@ dpaa_eth_queue_tx(void *q, struct rte_mbuf **bufs, uint16_t nb_bufs)
 					nb_bufs = loop;
 					goto send_pkts;
 				}
+				mbuf = temp_mbuf;
+				realloc_mbuf = 0;
+			}
+
+			state = tx_on_dpaa_pool(mbuf, bp_info,
+						&fd_arr[loop]);
+			if (unlikely(state)) {
+				/* Set frames_to_send & nb_bufs so
+				 * that packets are transmitted till
+				 * previous frame.
+				 */
+				frames_to_send = loop;
+				nb_bufs = loop;
+				goto send_pkts;
 			}
 		}
 
-- 
2.17.1

[dpdk-dev] [PATCH v2 08/30] net/dpaa: reduce debug messages

[Sachin Saxena]

From: Hemant Agrawal <hemant.agrawal@nxp.com>

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Reviewed-by: Sachin Saxena <sachin.saxena@nxp.com>
---
 drivers/net/dpaa/dpaa_ethdev.c | 6 +-----
 1 file changed, 1 insertion(+), 5 deletions(-)

diff --git a/drivers/net/dpaa/dpaa_ethdev.c b/drivers/net/dpaa/dpaa_ethdev.c
index 42ab3d05f..dc2e584b1 100644
--- a/drivers/net/dpaa/dpaa_ethdev.c
+++ b/drivers/net/dpaa/dpaa_ethdev.c
@@ -335,7 +335,7 @@ static void dpaa_eth_dev_info(struct rte_eth_dev *dev,
 {
 	struct dpaa_if *dpaa_intf = dev->data->dev_private;
 
-	PMD_INIT_FUNC_TRACE();
+	DPAA_PMD_DEBUG(": %s", dpaa_intf->name);
 
 	dev_info->max_rx_queues = dpaa_intf->nb_rx_queues;
 	dev_info->max_tx_queues = dpaa_intf->nb_tx_queues;
@@ -1172,8 +1172,6 @@ static int dpaa_rx_queue_init(struct qman_fq *fq, struct qman_cgr *cgr_rx,
 		}
 	};
 
-	PMD_INIT_FUNC_TRACE();
-
 	if (fqid) {
 		ret = qman_reserve_fqid(fqid);
 		if (ret) {
@@ -1225,8 +1223,6 @@ static int dpaa_tx_queue_init(struct qman_fq *fq,
 	struct qm_mcc_initfq opts = {0};
 	int ret;
 
-	PMD_INIT_FUNC_TRACE();
-
 	ret = qman_create_fq(0, QMAN_FQ_FLAG_DYNAMIC_FQID |
 			     QMAN_FQ_FLAG_TO_DCPORTAL, fq);
 	if (ret) {
-- 
2.17.1

[dpdk-dev] [PATCH v2 09/30] net/dpaa2: improve the Rx offload debug message

[Sachin Saxena]

From: Hemant Agrawal <hemant.agrawal@nxp.com>

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/net/dpaa2/dpaa2_ethdev.c | 20 ++++++++++----------
 1 file changed, 10 insertions(+), 10 deletions(-)

diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index dd6a78f9f..bbebb66fe 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -395,20 +395,20 @@ dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
 
 	PMD_INIT_FUNC_TRACE();
 
-	/* Rx offloads validation */
+	/* Rx offloads which are enabled by default */
 	if (dev_rx_offloads_nodis & ~rx_offloads) {
-		DPAA2_PMD_WARN(
-		"Rx offloads non configurable - requested 0x%" PRIx64
-		" ignored 0x%" PRIx64,
-			rx_offloads, dev_rx_offloads_nodis);
+		DPAA2_PMD_INFO(
+		"Some of rx offloads enabled by default - requested 0x%" PRIx64
+		" fixed are 0x%" PRIx64,
+		rx_offloads, dev_rx_offloads_nodis);
 	}
 
-	/* Tx offloads validation */
+	/* Tx offloads which are enabled by default */
 	if (dev_tx_offloads_nodis & ~tx_offloads) {
-		DPAA2_PMD_WARN(
-		"Tx offloads non configurable - requested 0x%" PRIx64
-		" ignored 0x%" PRIx64,
-			tx_offloads, dev_tx_offloads_nodis);
+		DPAA2_PMD_INFO(
+		"Some of tx offloads enabled by default - requested 0x%" PRIx64
+		" fixed are 0x%" PRIx64,
+		tx_offloads, dev_tx_offloads_nodis);
 	}
 
 	if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
-- 
2.17.1

[dpdk-dev] [PATCH v2 10/30] common/dpaax: reduce debug mesages

[Sachin Saxena]

From: Hemant Agrawal <hemant.agrawal@nxp.com>

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Reviewed-by: Sachin Saxena <sachin.saxena@nxp.com>
---
 drivers/common/dpaax/dpaax_iova_table.c | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/drivers/common/dpaax/dpaax_iova_table.c b/drivers/common/dpaax/dpaax_iova_table.c
index ae0af0919..43c9c72e6 100644
--- a/drivers/common/dpaax/dpaax_iova_table.c
+++ b/drivers/common/dpaax/dpaax_iova_table.c
@@ -140,7 +140,8 @@ read_memory_node(unsigned int *count)
 
 	DPAAX_DEBUG("Device-tree memory node data:");
 	do {
-		DPAAX_DEBUG("\n    %08" PRIx64 " %08zu", nodes[j].addr, nodes[j].len);
+		DPAAX_DEBUG("    %08" PRIx64 " %08zu",
+			    nodes[j].addr, nodes[j].len);
 	} while (--j);
 
 cleanup:
@@ -241,7 +242,7 @@ dpaax_iova_table_populate(void)
 	/* Release memory associated with nodes array - not required now */
 	free(nodes);
 
-	DPAAX_DEBUG("Adding mem-event handler\n");
+	DPAAX_DEBUG("Adding mem-event handler");
 	ret = dpaax_handle_memevents();
 	if (ret) {
 		DPAAX_ERR("Unable to add mem-event handler");
@@ -306,10 +307,11 @@ dpaax_iova_table_update(phys_addr_t paddr, void *vaddr, size_t length)
 			 * case.
 			 */
 			entry[i].pages[e_offset] = align_vaddr;
+#ifdef RTE_COMMON_DPAAX_DEBUG
 			DPAAX_DEBUG("Added: vaddr=%zu for Phy:%"PRIu64" at %zu"
 				    " remaining len %zu", align_vaddr,
 				    align_paddr, e_offset, req_length);
-
+#endif
 			/* Incoming request can be larger than the
 			 * DPAAX_MEM_SPLIT size - in which case, multiple
 			 * entries in entry->pages[] are filled up.
@@ -336,10 +338,11 @@ dpaax_iova_table_update(phys_addr_t paddr, void *vaddr, size_t length)
 			    vaddr, paddr);
 		return -1;
 	}
-
+#ifdef RTE_COMMON_DPAAX_DEBUG
 	DPAAX_DEBUG("Add: Found slot at (%"PRIu64")[(%zu)] for vaddr:(%p),"
 		    " phy(%"PRIu64"), len(%zu)", entry[i].start, e_offset,
 		    vaddr, paddr, length);
+#endif
 	return 0;
 }
 
@@ -404,13 +407,13 @@ dpaax_memevent_cb(enum rte_mem_event type, const void *addr, size_t len,
 		phys_addr = rte_mem_virt2phy(ms->addr);
 		virt_addr = ms->addr;
 		map_len = ms->len;
-
+#ifdef RTE_COMMON_DPAAX_DEBUG
 		DPAAX_DEBUG("Request for %s, va=%p, virt_addr=%p,"
 			    "iova=%"PRIu64", map_len=%zu",
 			    type == RTE_MEM_EVENT_ALLOC ?
 			    "alloc" : "dealloc",
 			    va, virt_addr, phys_addr, map_len);
-
+#endif
 		if (type == RTE_MEM_EVENT_ALLOC)
 			ret = dpaax_iova_table_update(phys_addr, virt_addr,
 						      map_len);
-- 
2.17.1

[dpdk-dev] [PATCH v2 11/30] mempool/dpaa: reduce debug messages

[Sachin Saxena]

From: Hemant Agrawal <hemant.agrawal@nxp.com>

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
Reviewed-by: Sachin Saxena <sachin.saxena@nxp.com>
---
 drivers/mempool/dpaa/dpaa_mempool.c | 4 +---
 1 file changed, 1 insertion(+), 3 deletions(-)

diff --git a/drivers/mempool/dpaa/dpaa_mempool.c b/drivers/mempool/dpaa/dpaa_mempool.c
index c371d3a6b..a25697f05 100644
--- a/drivers/mempool/dpaa/dpaa_mempool.c
+++ b/drivers/mempool/dpaa/dpaa_mempool.c
@@ -298,8 +298,6 @@ dpaa_populate(struct rte_mempool *mp, unsigned int max_objs,
 	struct dpaa_bp_info *bp_info;
 	unsigned int total_elt_sz;
 
-	MEMPOOL_INIT_FUNC_TRACE();
-
 	if (!mp || !mp->pool_data) {
 		DPAA_MEMPOOL_ERR("Invalid mempool provided\n");
 		return 0;
@@ -311,7 +309,7 @@ dpaa_populate(struct rte_mempool *mp, unsigned int max_objs,
 	bp_info = DPAA_MEMPOOL_TO_POOL_INFO(mp);
 	total_elt_sz = mp->header_size + mp->elt_size + mp->trailer_size;
 
-	DPAA_MEMPOOL_DEBUG("Req size %" PRIx64 " vs Available %u\n",
+	DPAA_MEMPOOL_DPDEBUG("Req size %" PRIx64 " vs Available %u\n",
 			   (uint64_t)len, total_elt_sz * mp->size);
 
 	/* Detect pool area has sufficient space for elements in this memzone */
-- 
2.17.1

[dpdk-dev] [PATCH v2 12/30] net/dpaa2: realign Rx offload support types

[Sachin Saxena]

From: Hemant Agrawal <hemant.agrawal@nxp.com>

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/net/dpaa2/dpaa2_ethdev.c | 19 ++++++++++---------
 1 file changed, 10 insertions(+), 9 deletions(-)

diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index bbebb66fe..130fb5297 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -32,11 +32,11 @@
 
 /* Supported Rx offloads */
 static uint64_t dev_rx_offloads_sup =
-		DEV_RX_OFFLOAD_VLAN_STRIP |
-		DEV_RX_OFFLOAD_IPV4_CKSUM |
-		DEV_RX_OFFLOAD_UDP_CKSUM |
-		DEV_RX_OFFLOAD_TCP_CKSUM |
+		DEV_RX_OFFLOAD_CHECKSUM |
+		DEV_RX_OFFLOAD_SCTP_CKSUM |
 		DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM |
+		DEV_RX_OFFLOAD_OUTER_UDP_CKSUM |
+		DEV_RX_OFFLOAD_VLAN_STRIP |
 		DEV_RX_OFFLOAD_VLAN_FILTER |
 		DEV_RX_OFFLOAD_JUMBO_FRAME;
 
@@ -51,13 +51,13 @@ static uint64_t dev_tx_offloads_sup =
 		DEV_TX_OFFLOAD_UDP_CKSUM |
 		DEV_TX_OFFLOAD_TCP_CKSUM |
 		DEV_TX_OFFLOAD_SCTP_CKSUM |
-		DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM;
+		DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM |
+		DEV_TX_OFFLOAD_MT_LOCKFREE |
+		DEV_TX_OFFLOAD_MBUF_FAST_FREE;
 
 /* Tx offloads which cannot be disabled */
 static uint64_t dev_tx_offloads_nodis =
-		DEV_TX_OFFLOAD_MULTI_SEGS |
-		DEV_TX_OFFLOAD_MT_LOCKFREE |
-		DEV_TX_OFFLOAD_MBUF_FAST_FREE;
+		DEV_TX_OFFLOAD_MULTI_SEGS;
 
 /* enable timestamp in mbuf */
 enum pmd_dpaa2_ts dpaa2_enable_ts;
@@ -439,7 +439,8 @@ dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
 		rx_l3_csum_offload = true;
 
 	if ((rx_offloads & DEV_RX_OFFLOAD_UDP_CKSUM) ||
-		(rx_offloads & DEV_RX_OFFLOAD_TCP_CKSUM))
+		(rx_offloads & DEV_RX_OFFLOAD_TCP_CKSUM) ||
+		(rx_offloads & DEV_RX_OFFLOAD_SCTP_CKSUM))
 		rx_l4_csum_offload = true;
 
 	ret = dpni_set_offload(dpni, CMD_PRI_LOW, priv->token,
-- 
2.17.1

[dpdk-dev] [PATCH v2 13/30] net/dpaa2: enable Rx offload for timestamp

[Sachin Saxena]

From: Hemant Agrawal <hemant.agrawal@nxp.com>

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/net/dpaa2/dpaa2_ethdev.c | 6 +++++-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 130fb5297..4689cf9a4 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -38,7 +38,8 @@ static uint64_t dev_rx_offloads_sup =
 		DEV_RX_OFFLOAD_OUTER_UDP_CKSUM |
 		DEV_RX_OFFLOAD_VLAN_STRIP |
 		DEV_RX_OFFLOAD_VLAN_FILTER |
-		DEV_RX_OFFLOAD_JUMBO_FRAME;
+		DEV_RX_OFFLOAD_JUMBO_FRAME |
+		DEV_RX_OFFLOAD_TIMESTAMP;
 
 /* Rx offloads which cannot be disabled */
 static uint64_t dev_rx_offloads_nodis =
@@ -457,6 +458,9 @@ dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
 		return ret;
 	}
 
+	if (rx_offloads & DEV_RX_OFFLOAD_TIMESTAMP)
+		dpaa2_enable_ts = true;
+
 	if (tx_offloads & DEV_TX_OFFLOAD_IPV4_CKSUM)
 		tx_l3_csum_offload = true;
 
-- 
2.17.1

[dpdk-dev] [PATCH v2 14/30] net/dpaa2: support L2 payload based RSS distribution

[Sachin Saxena]

From: Hemant Agrawal <hemant.agrawal@nxp.com>

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/net/dpaa2/dpaa2_ethdev.h | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index 33b1506aa..69ab577f5 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -54,6 +54,7 @@
 #define DPAA2_RX_TAILDROP_OFF	0x04
 
 #define DPAA2_RSS_OFFLOAD_ALL ( \
+	ETH_RSS_L2_PAYLOAD | \
 	ETH_RSS_IP | \
 	ETH_RSS_UDP | \
 	ETH_RSS_TCP | \
-- 
2.17.1

[dpdk-dev] [PATCH v2 15/30] net/dpaa2: add optional non-prefetch Rx mode

[Sachin Saxena]

From: Nipun Gupta <nipun.gupta@nxp.com>

When we need particular number of packets from the rx routine,
which would change in every call, we cannot prefetch the packets
and provide previous results to the user.

User can select the mode by using devargs for non pretech mode.

Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
---
 doc/guides/nics/dpaa2.rst        |   4 ++
 drivers/net/dpaa2/dpaa2_ethdev.c |  11 +++-
 drivers/net/dpaa2/dpaa2_ethdev.h |   2 +
 drivers/net/dpaa2/dpaa2_rxtx.c   | 105 +++++++++++++++++++++++++++++++
 4 files changed, 121 insertions(+), 1 deletion(-)

diff --git a/doc/guides/nics/dpaa2.rst b/doc/guides/nics/dpaa2.rst
index a698e5ab6..99e4c8d72 100644
--- a/doc/guides/nics/dpaa2.rst
+++ b/doc/guides/nics/dpaa2.rst
@@ -504,6 +504,10 @@ for details.
   driver level. Any packet received will be reflected back by the
   driver on same port. e.g. ``fslmc:dpni.1,drv_loopback=1``
 
+* Use dev arg option ``drv_no_prefetch=1`` to disable prefetching
+  of the packet pull command which is issued  in the previous cycle.
+  e.g. ``fslmc:dpni.1,drv_no_prefetch=1``
+
 Enabling logs
 -------------
 
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 4689cf9a4..f25cdfb3d 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -29,6 +29,7 @@
 #include <fsl_qbman_debug.h>
 
 #define DRIVER_LOOPBACK_MODE "drv_loopback"
+#define DRIVER_NO_PREFETCH_MODE "drv_no_prefetch"
 
 /* Supported Rx offloads */
 static uint64_t dev_rx_offloads_sup =
@@ -750,6 +751,7 @@ dpaa2_supported_ptypes_get(struct rte_eth_dev *dev)
 	};
 
 	if (dev->rx_pkt_burst == dpaa2_dev_prefetch_rx ||
+		dev->rx_pkt_burst == dpaa2_dev_rx ||
 		dev->rx_pkt_burst == dpaa2_dev_loopback_rx)
 		return ptypes;
 	return NULL;
@@ -2118,6 +2120,9 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
 		eth_dev->dev_ops = &dpaa2_ethdev_ops;
 		if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE))
 			eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx;
+		else if (dpaa2_get_devargs(dev->devargs,
+					DRIVER_NO_PREFETCH_MODE))
+			eth_dev->rx_pkt_burst = dpaa2_dev_rx;
 		else
 			eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
 		eth_dev->tx_pkt_burst = dpaa2_dev_tx;
@@ -2236,6 +2241,9 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
 	if (dpaa2_get_devargs(dev->devargs, DRIVER_LOOPBACK_MODE)) {
 		eth_dev->rx_pkt_burst = dpaa2_dev_loopback_rx;
 		DPAA2_PMD_INFO("Loopback mode");
+	} else if (dpaa2_get_devargs(dev->devargs, DRIVER_NO_PREFETCH_MODE)) {
+		eth_dev->rx_pkt_burst = dpaa2_dev_rx;
+		DPAA2_PMD_INFO("No Prefetch mode");
 	} else {
 		eth_dev->rx_pkt_burst = dpaa2_dev_prefetch_rx;
 	}
@@ -2395,7 +2403,8 @@ static struct rte_dpaa2_driver rte_dpaa2_pmd = {
 
 RTE_PMD_REGISTER_DPAA2(net_dpaa2, rte_dpaa2_pmd);
 RTE_PMD_REGISTER_PARAM_STRING(net_dpaa2,
-		DRIVER_LOOPBACK_MODE "=<int>");
+		DRIVER_LOOPBACK_MODE "=<int> "
+		DRIVER_NO_PREFETCH_MODE "=<int>");
 RTE_INIT(dpaa2_pmd_init_log)
 {
 	dpaa2_logtype_pmd = rte_log_register("pmd.net.dpaa2");
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index 69ab577f5..a991ccc1d 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -149,6 +149,8 @@ int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev,
 int dpaa2_eth_eventq_detach(const struct rte_eth_dev *dev,
 		int eth_rx_queue_id);
 
+uint16_t dpaa2_dev_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts);
+
 uint16_t dpaa2_dev_loopback_rx(void *queue, struct rte_mbuf **bufs,
 				uint16_t nb_pkts);
 
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index 6ca5071e0..19838180f 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -727,6 +727,111 @@ dpaa2_dev_process_ordered_event(struct qbman_swp *swp,
 	qbman_swp_dqrr_consume(swp, dq);
 }
 
+uint16_t
+dpaa2_dev_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
+{
+	/* Function receive frames for a given device and VQ */
+	struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)queue;
+	struct qbman_result *dq_storage;
+	uint32_t fqid = dpaa2_q->fqid;
+	int ret, num_rx = 0, next_pull = nb_pkts, num_pulled;
+	uint8_t pending, status;
+	struct qbman_swp *swp;
+	const struct qbman_fd *fd, *next_fd;
+	struct qbman_pull_desc pulldesc;
+	struct rte_eth_dev_data *eth_data = dpaa2_q->eth_data;
+
+	if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
+		ret = dpaa2_affine_qbman_swp();
+		if (ret) {
+			DPAA2_PMD_ERR("Failure in affining portal\n");
+			return 0;
+		}
+	}
+	swp = DPAA2_PER_LCORE_PORTAL;
+
+	do {
+		dq_storage = dpaa2_q->q_storage->dq_storage[0];
+		qbman_pull_desc_clear(&pulldesc);
+		qbman_pull_desc_set_fq(&pulldesc, fqid);
+		qbman_pull_desc_set_storage(&pulldesc, dq_storage,
+				(size_t)(DPAA2_VADDR_TO_IOVA(dq_storage)), 1);
+
+		if (next_pull > dpaa2_dqrr_size) {
+			qbman_pull_desc_set_numframes(&pulldesc,
+				dpaa2_dqrr_size);
+			next_pull -= dpaa2_dqrr_size;
+		} else {
+			qbman_pull_desc_set_numframes(&pulldesc, next_pull);
+			next_pull = 0;
+		}
+
+		while (1) {
+			if (qbman_swp_pull(swp, &pulldesc)) {
+				DPAA2_PMD_DP_DEBUG(
+					"VDQ command is not issued.QBMAN is busy\n");
+				/* Portal was busy, try again */
+				continue;
+			}
+			break;
+		}
+
+		rte_prefetch0((void *)((size_t)(dq_storage + 1)));
+		/* Check if the previous issued command is completed. */
+		while (!qbman_check_command_complete(dq_storage))
+			;
+
+		num_pulled = 0;
+		pending = 1;
+		do {
+			/* Loop until the dq_storage is updated with
+			 * new token by QBMAN
+			 */
+			while (!qbman_check_new_result(dq_storage))
+				;
+			rte_prefetch0((void *)((size_t)(dq_storage + 2)));
+			/* Check whether Last Pull command is Expired and
+			 * setting Condition for Loop termination
+			 */
+			if (qbman_result_DQ_is_pull_complete(dq_storage)) {
+				pending = 0;
+				/* Check for valid frame. */
+				status = qbman_result_DQ_flags(dq_storage);
+				if (unlikely((status &
+					QBMAN_DQ_STAT_VALIDFRAME) == 0))
+					continue;
+			}
+			fd = qbman_result_DQ_fd(dq_storage);
+
+			next_fd = qbman_result_DQ_fd(dq_storage + 1);
+			/* Prefetch Annotation address for the parse results */
+			rte_prefetch0(
+				(void *)(size_t)(DPAA2_GET_FD_ADDR(next_fd)
+					+ DPAA2_FD_PTA_SIZE + 16));
+
+			if (unlikely(DPAA2_FD_GET_FORMAT(fd) == qbman_fd_sg))
+				bufs[num_rx] = eth_sg_fd_to_mbuf(fd);
+			else
+				bufs[num_rx] = eth_fd_to_mbuf(fd);
+			bufs[num_rx]->port = eth_data->port_id;
+
+		if (eth_data->dev_conf.rxmode.offloads &
+				DEV_RX_OFFLOAD_VLAN_STRIP) {
+			rte_vlan_strip(bufs[num_rx]);
+		}
+
+			dq_storage++;
+			num_rx++;
+			num_pulled++;
+		} while (pending);
+	/* Last VDQ provided all packets and more packets are requested */
+	} while (next_pull && num_pulled == dpaa2_dqrr_size);
+
+	dpaa2_q->rx_pkts += num_rx;
+
+	return num_rx;
+}
+
 /*
  * Callback to handle sending packets through WRIOP based interface
  */
-- 
2.17.1

[dpdk-dev] [PATCH v2 16/30] net/dpaa2: add taildrop support on frame count basis

[Sachin Saxena]

From: Hemant Agrawal <hemant.agrawal@nxp.com>

The existing taildrop was based on queue data size.
This patch replaces it with frame count bases using
CGR methods of DPAA2 device.
The number of CGRs are limited. So,
- use per queue CGR based tail drop for as many as CGR
available.
- Remaining queues shall use the legacy byte based tail drop

Number of CGRs can be controlled by dpl file during dpni_create.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/bus/fslmc/portal/dpaa2_hw_pvt.h |   5 +-
 drivers/net/dpaa2/dpaa2_ethdev.c        | 113 +++++++++++++++++++++---
 drivers/net/dpaa2/dpaa2_ethdev.h        |   6 +-
 3 files changed, 107 insertions(+), 17 deletions(-)

diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index 4bb6b26c7..7f7e2fd78 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -145,10 +145,10 @@ struct dpaa2_queue {
 		struct rte_eth_dev_data *eth_data;
 		struct rte_cryptodev_data *crypto_data;
 	};
-	int32_t eventfd;	/*!< Event Fd of this queue */
 	uint32_t fqid;		/*!< Unique ID of this queue */
-	uint8_t tc_index;	/*!< traffic class identifier */
 	uint16_t flow_id;	/*!< To be used by DPAA2 frmework */
+	uint8_t tc_index;	/*!< traffic class identifier */
+	uint8_t cgid;		/*! < Congestion Group id for this queue */
 	uint64_t rx_pkts;
 	uint64_t tx_pkts;
 	uint64_t err_pkts;
@@ -157,6 +157,7 @@ struct dpaa2_queue {
 		struct qbman_result *cscn;
 	};
 	struct rte_event ev;
+	int32_t eventfd;	/*!< Event Fd of this queue */
 	dpaa2_queue_cb_dqrr_t *cb;
 	dpaa2_queue_cb_eqresp_free_t *cb_eqresp_free;
 	struct dpaa2_bp_info *bp_array;
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index f25cdfb3d..877acff94 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -514,7 +514,7 @@ dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
 static int
 dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
 			 uint16_t rx_queue_id,
-			 uint16_t nb_rx_desc __rte_unused,
+			 uint16_t nb_rx_desc,
 			 unsigned int socket_id __rte_unused,
 			 const struct rte_eth_rxconf *rx_conf __rte_unused,
 			 struct rte_mempool *mb_pool)
@@ -526,7 +526,7 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
 	uint8_t options = 0;
 	uint8_t flow_id;
 	uint32_t bpid;
-	int ret;
+	int i, ret;
 
 	PMD_INIT_FUNC_TRACE();
 
@@ -545,12 +545,28 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
 	dpaa2_q->bp_array = rte_dpaa2_bpid_info;
 
 	/*Get the flow id from given VQ id*/
-	flow_id = rx_queue_id % priv->nb_rx_queues;
+	flow_id = dpaa2_q->flow_id;
 	memset(&cfg, 0, sizeof(struct dpni_queue));
 
 	options = options | DPNI_QUEUE_OPT_USER_CTX;
 	cfg.user_context = (size_t)(dpaa2_q);
 
+	/* check if a private cgr available. */
+	for (i = 0; i < priv->max_cgs; i++) {
+		if (!priv->cgid_in_use[i]) {
+			priv->cgid_in_use[i] = 1;
+			break;
+		}
+	}
+
+	if (i < priv->max_cgs) {
+		options |= DPNI_QUEUE_OPT_SET_CGID;
+		cfg.cgid = i;
+		dpaa2_q->cgid = cfg.cgid;
+	} else {
+		dpaa2_q->cgid = 0xff;
+	}
+
 	/*if ls2088 or rev2 device, enable the stashing */
 
 	if ((dpaa2_svr_family & 0xffff0000) != SVR_LS2080A) {
@@ -579,15 +595,56 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
 		struct dpni_taildrop taildrop;
 
 		taildrop.enable = 1;
-		/*enabling per rx queue congestion control */
-		taildrop.threshold = CONG_THRESHOLD_RX_Q;
-		taildrop.units = DPNI_CONGESTION_UNIT_BYTES;
-		taildrop.oal = CONG_RX_OAL;
-		DPAA2_PMD_DEBUG("Enabling Early Drop on queue = %d",
-				rx_queue_id);
-		ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
+
+		/* Private CGR will use tail drop length as nb_rx_desc.
+		 * for rest cases we can use standard byte based tail drop.
+		 * There is no HW restriction, but number of CGRs are limited,
+		 * hence this restriction is placed.
+		 */
+		if (dpaa2_q->cgid != 0xff) {
+			/*enabling per rx queue congestion control */
+			taildrop.threshold = nb_rx_desc;
+			taildrop.units = DPNI_CONGESTION_UNIT_FRAMES;
+			taildrop.oal = 0;
+			DPAA2_PMD_DEBUG("Enabling CG Tail Drop on queue = %d",
+					rx_queue_id);
+			ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
+						DPNI_CP_CONGESTION_GROUP,
+						DPNI_QUEUE_RX,
+						dpaa2_q->tc_index,
+						flow_id, &taildrop);
+		} else {
+			/*enabling per rx queue congestion control */
+			taildrop.threshold = CONG_THRESHOLD_RX_BYTES_Q;
+			taildrop.units = DPNI_CONGESTION_UNIT_BYTES;
+			taildrop.oal = CONG_RX_OAL;
+			DPAA2_PMD_DEBUG("Enabling Byte based Drop on queue= %d",
+					rx_queue_id);
+			ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
+						DPNI_CP_QUEUE, DPNI_QUEUE_RX,
+						dpaa2_q->tc_index, flow_id,
+						&taildrop);
+		}
+		if (ret) {
+			DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)",
+				      ret);
+			return -1;
+		}
+	} else { /* Disable tail Drop */
+		struct dpni_taildrop taildrop = {0};
+		DPAA2_PMD_INFO("Tail drop is disabled on queue");
+
+		taildrop.enable = 0;
+		if (dpaa2_q->cgid != 0xff) {
+			ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
+					DPNI_CP_CONGESTION_GROUP, DPNI_QUEUE_RX,
+					dpaa2_q->tc_index,
+					flow_id, &taildrop);
+		} else {
+			ret = dpni_set_taildrop(dpni, CMD_PRI_LOW, priv->token,
 					DPNI_CP_QUEUE, DPNI_QUEUE_RX,
 					dpaa2_q->tc_index, flow_id, &taildrop);
+		}
 		if (ret) {
 			DPAA2_PMD_ERR("Error in setting taildrop. err=(%d)",
 				      ret);
@@ -655,7 +712,7 @@ dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
 	dpaa2_q->tc_index = tc_id;
 
 	if (!(priv->flags & DPAA2_TX_CGR_OFF)) {
-		struct dpni_congestion_notification_cfg cong_notif_cfg;
+		struct dpni_congestion_notification_cfg cong_notif_cfg = {0};
 
 		cong_notif_cfg.units = DPNI_CONGESTION_UNIT_FRAMES;
 		cong_notif_cfg.threshold_entry = CONG_ENTER_TX_THRESHOLD;
@@ -693,7 +750,29 @@ dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
 static void
 dpaa2_dev_rx_queue_release(void *q __rte_unused)
 {
+	struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)q;
+	struct dpaa2_dev_priv *priv = dpaa2_q->eth_data->dev_private;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	uint8_t options = 0;
+	int ret;
+	struct dpni_queue cfg;
+
+	memset(&cfg, 0, sizeof(struct dpni_queue));
 	PMD_INIT_FUNC_TRACE();
+	if (dpaa2_q->cgid != 0xff) {
+		options = DPNI_QUEUE_OPT_CLEAR_CGID;
+		cfg.cgid = dpaa2_q->cgid;
+
+		ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token,
+				     DPNI_QUEUE_RX,
+				     dpaa2_q->tc_index, dpaa2_q->flow_id,
+				     options, &cfg);
+		if (ret)
+			DPAA2_PMD_ERR("Unable to clear CGR from q=%u err=%d",
+					dpaa2_q->fqid, ret);
+		priv->cgid_in_use[dpaa2_q->cgid] = 0;
+		dpaa2_q->cgid = 0xff;
+	}
 }
 
 static void
@@ -2166,6 +2245,14 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
 	}
 
 	priv->num_rx_tc = attr.num_rx_tcs;
+	/* only if the custom CG is enabled */
+	if (attr.options & DPNI_OPT_CUSTOM_CG)
+		priv->max_cgs = attr.num_cgs;
+	else
+		priv->max_cgs = 0;
+
+	for (i = 0; i < priv->max_cgs; i++)
+		priv->cgid_in_use[i] = 0;
 
 	for (i = 0; i < attr.num_rx_tcs; i++)
 		priv->nb_rx_queues += attr.num_queues;
@@ -2173,9 +2260,9 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
 	/* Using number of TX queues as number of TX TCs */
 	priv->nb_tx_queues = attr.num_tx_tcs;
 
-	DPAA2_PMD_DEBUG("RX-TC= %d, nb_rx_queues= %d, nb_tx_queues=%d",
+	DPAA2_PMD_DEBUG("RX-TC= %d, rx_queues= %d, tx_queues=%d, max_cgs=%d",
 			priv->num_rx_tc, priv->nb_rx_queues,
-			priv->nb_tx_queues);
+			priv->nb_tx_queues, priv->max_cgs);
 
 	priv->hw = dpni_dev;
 	priv->hw_id = hw_id;
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index a991ccc1d..2f14a3525 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -37,9 +37,9 @@
 #define CONG_RETRY_COUNT 18000
 
 /* RX queue tail drop threshold
- * currently considering 32 KB packets
+ * currently considering 64 KB packets
  */
-#define CONG_THRESHOLD_RX_Q  (64 * 1024)
+#define CONG_THRESHOLD_RX_BYTES_Q  (64 * 1024)
 #define CONG_RX_OAL	128
 
 /* Size of the input SMMU mapped memory required by MC */
@@ -115,6 +115,8 @@ struct dpaa2_dev_priv {
 	uint8_t flags; /*dpaa2 config flags */
 	uint8_t en_ordered;
 	uint8_t en_loose_ordered;
+	uint8_t max_cgs;
+	uint8_t cgid_in_use[MAX_RX_QUEUES];
 
 	struct pattern_s {
 		uint8_t item_count;
-- 
2.17.1

[dpdk-dev] [PATCH v2 17/30] net/dpaa2: add cgr counters in xtra stats

[Sachin Saxena]

From: Hemant Agrawal <hemant.agrawal@nxp.com>

Add congestion frame drop and byte drop count in xtra stats.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/net/dpaa2/dpaa2_ethdev.c | 24 ++++++++++++++++++++++--
 1 file changed, 22 insertions(+), 2 deletions(-)

diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 877acff94..721e125b4 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -84,6 +84,8 @@ static const struct rte_dpaa2_xstats_name_off dpaa2_xstats_strings[] = {
 	{"ingress_nobuffer_discards", 2, 2},
 	{"egress_discarded_frames", 2, 3},
 	{"egress_confirmed_frames", 2, 4},
+	{"cgr_reject_frames", 4, 0},
+	{"cgr_reject_bytes", 4, 1},
 };
 
 static const enum rte_filter_op dpaa2_supported_filter_ops[] = {
@@ -1371,7 +1373,7 @@ dpaa2_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
 	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
 	int32_t  retcode;
-	union dpni_statistics value[3] = {};
+	union dpni_statistics value[5] = {};
 	unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings);
 
 	if (n < num)
@@ -1398,6 +1400,18 @@ dpaa2_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
 	if (retcode)
 		goto err;
 
+	for (i = 0; i < priv->max_cgs; i++) {
+		if (!priv->cgid_in_use[i]) {
+			/* Get Counters from page_4*/
+			retcode = dpni_get_statistics(dpni, CMD_PRI_LOW,
+						      priv->token,
+						      4, 0, &value[4]);
+			if (retcode)
+				goto err;
+			break;
+		}
+	}
+
 	for (i = 0; i < num; i++) {
 		xstats[i].id = i;
 		xstats[i].value = value[dpaa2_xstats_strings[i].page_id].
@@ -1439,7 +1453,7 @@ dpaa2_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
 		struct dpaa2_dev_priv *priv = dev->data->dev_private;
 		struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
 		int32_t  retcode;
-		union dpni_statistics value[3] = {};
+		union dpni_statistics value[5] = {};
 
 		if (n < stat_cnt)
 			return stat_cnt;
@@ -1465,6 +1479,12 @@ dpaa2_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
 		if (retcode)
 			return 0;
 
+		/* Get Counters from page_4*/
+		retcode = dpni_get_statistics(dpni, CMD_PRI_LOW, priv->token,
+					      4, 0, &value[4]);
+		if (retcode)
+			return 0;
+
 		for (i = 0; i < stat_cnt; i++) {
 			values[i] = value[dpaa2_xstats_strings[i].page_id].
 				raw.counter[dpaa2_xstats_strings[i].stats_id];
-- 
2.17.1

[dpdk-dev] [PATCH v2 18/30] net/dpaa2: add support for config max Rx length in HW

[Sachin Saxena]

From: Hemant Agrawal <hemant.agrawal@nxp.com>

The MC expects the length to be configured without CRC

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/net/dpaa2/dpaa2_ethdev.c | 17 +++++++++++++++--
 1 file changed, 15 insertions(+), 2 deletions(-)

diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 721e125b4..a1ef5be6a 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -418,12 +418,17 @@ dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
 	if (rx_offloads & DEV_RX_OFFLOAD_JUMBO_FRAME) {
 		if (eth_conf->rxmode.max_rx_pkt_len <= DPAA2_MAX_RX_PKT_LEN) {
 			ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW,
-				priv->token, eth_conf->rxmode.max_rx_pkt_len);
+				priv->token, eth_conf->rxmode.max_rx_pkt_len
+				- RTE_ETHER_CRC_LEN);
 			if (ret) {
 				DPAA2_PMD_ERR(
 					"Unable to set mtu. check config");
 				return ret;
 			}
+			dev->data->mtu =
+				dev->data->dev_conf.rxmode.max_rx_pkt_len -
+				RTE_ETHER_HDR_LEN - RTE_ETHER_CRC_LEN -
+				VLAN_TAG_SIZE;
 		} else {
 			return -1;
 		}
@@ -1201,7 +1206,7 @@ dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
 	 * Maximum Ethernet header length
 	 */
 	ret = dpni_set_max_frame_length(dpni, CMD_PRI_LOW, priv->token,
-					frame_size);
+					frame_size - RTE_ETHER_CRC_LEN);
 	if (ret) {
 		DPAA2_PMD_ERR("Setting the max frame length failed");
 		return -1;
@@ -2376,6 +2381,14 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
 		}
 	}
 
+	ret = dpni_set_max_frame_length(dpni_dev, CMD_PRI_LOW, priv->token,
+					RTE_ETHER_MAX_LEN - RTE_ETHER_CRC_LEN
+					+ VLAN_TAG_SIZE);
+	if (ret) {
+		DPAA2_PMD_ERR("Unable to set mtu. check config");
+		goto init_err;
+	}
+
 	RTE_LOG(INFO, PMD, "%s: netdev created\n", eth_dev->data->name);
 	return 0;
 init_err:
-- 
2.17.1

[dpdk-dev] [PATCH v2 19/30] net/dpaa2: use LFQIDs in Tx instead of qdid

[Sachin Saxena]

Signed-off-by: Sachin Saxena <sachin.saxena@nxp.com>
---
 drivers/net/dpaa2/dpaa2_ethdev.c | 10 ++++++++++
 drivers/net/dpaa2/dpaa2_rxtx.c   | 12 +++++-------
 2 files changed, 15 insertions(+), 7 deletions(-)

diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index a1ef5be6a..29f0bfdf2 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -677,6 +677,7 @@ dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
 	struct dpni_queue tx_conf_cfg;
 	struct dpni_queue tx_flow_cfg;
 	uint8_t options = 0, flow_id;
+	struct dpni_queue_id qid;
 	uint32_t tc_id;
 	int ret;
 
@@ -718,6 +719,15 @@ dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
 	}
 	dpaa2_q->tc_index = tc_id;
 
+	ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
+			     DPNI_QUEUE_TX, dpaa2_q->tc_index,
+			     dpaa2_q->flow_id, &tx_flow_cfg, &qid);
+	if (ret) {
+		DPAA2_PMD_ERR("Error in getting LFQID err=%d", ret);
+		return -1;
+	}
+	dpaa2_q->fqid = qid.fqid;
+
 	if (!(priv->flags & DPAA2_TX_CGR_OFF)) {
 		struct dpni_congestion_notification_cfg cong_notif_cfg = {0};
 
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index 19838180f..2209b78a4 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -869,8 +869,8 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
 	/*Prepare enqueue descriptor*/
 	qbman_eq_desc_clear(&eqdesc);
 	qbman_eq_desc_set_no_orp(&eqdesc, DPAA2_EQ_RESP_ERR_FQ);
-	qbman_eq_desc_set_qd(&eqdesc, priv->qdid,
-			     dpaa2_q->flow_id, dpaa2_q->tc_index);
+	qbman_eq_desc_set_fq(&eqdesc, dpaa2_q->fqid);
+
 	/*Clear the unused FD fields before sending*/
 	while (nb_pkts) {
 		/*Check if the queue is congested*/
@@ -1021,8 +1021,7 @@ dpaa2_set_enqueue_descriptor(struct dpaa2_queue *dpaa2_q,
 	uint16_t orpid, seqnum;
 	uint8_t dq_idx;
 
-	qbman_eq_desc_set_qd(eqdesc, priv->qdid, dpaa2_q->flow_id,
-			     dpaa2_q->tc_index);
+	qbman_eq_desc_set_fq(eqdesc, dpaa2_q->fqid);
 
 	if (m->seqn & DPAA2_ENQUEUE_FLAG_ORP) {
 		orpid = (m->seqn & DPAA2_EQCR_OPRID_MASK) >>
@@ -1128,9 +1127,8 @@ dpaa2_dev_tx_ordered(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
 			} else {
 				qbman_eq_desc_set_no_orp(&eqdesc[loop],
 							 DPAA2_EQ_RESP_ERR_FQ);
-				qbman_eq_desc_set_qd(&eqdesc[loop], priv->qdid,
-						     dpaa2_q->flow_id,
-						     dpaa2_q->tc_index);
+				qbman_eq_desc_set_fq(&eqdesc[loop],
+						     dpaa2_q->fqid);
 			}
 
 			if (likely(RTE_MBUF_DIRECT(*bufs))) {
-- 
2.17.1

[dpdk-dev] [PATCH v2 20/30] net/dpaa2: support dpdmux classification on eth type

[Sachin Saxena]

From: Hemant Agrawal <hemant.agrawal@nxp.com>

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/net/dpaa2/dpaa2_mux.c | 84 +++++++++++++++++++++++------------
 1 file changed, 55 insertions(+), 29 deletions(-)

diff --git a/drivers/net/dpaa2/dpaa2_mux.c b/drivers/net/dpaa2/dpaa2_mux.c
index e487c6b54..1910cc418 100644
--- a/drivers/net/dpaa2/dpaa2_mux.c
+++ b/drivers/net/dpaa2/dpaa2_mux.c
@@ -1,5 +1,5 @@
 /* SPDX-License-Identifier: BSD-3-Clause
- * Copyright 2018 NXP
+ * Copyright 2018-2019 NXP
  */
 
 #include <sys/queue.h>
@@ -60,19 +60,13 @@ rte_pmd_dpaa2_mux_flow_create(uint32_t dpdmux_id,
 {
 	struct dpaa2_dpdmux_dev *dpdmux_dev;
 	struct dpkg_profile_cfg kg_cfg;
-	const struct rte_flow_item_ipv4 *spec;
 	const struct rte_flow_action_vf *vf_conf;
 	struct dpdmux_cls_action dpdmux_action;
 	struct rte_flow *flow = NULL;
 	void *key_iova, *mask_iova, *key_cfg_iova = NULL;
+	uint8_t key_size = 0;
 	int ret;
 
-	if (pattern[0]->type != RTE_FLOW_ITEM_TYPE_IPV4) {
-		DPAA2_PMD_ERR("Not supported pattern type: %d",
-			      pattern[0]->type);
-		return NULL;
-	}
-
 	/* Find the DPDMUX from dpdmux_id in our list */
 	dpdmux_dev = get_dpdmux_from_id(dpdmux_id);
 	if (!dpdmux_dev) {
@@ -86,16 +80,63 @@ rte_pmd_dpaa2_mux_flow_create(uint32_t dpdmux_id,
 		DPAA2_PMD_ERR("Unable to allocate flow-dist parameters");
 		return NULL;
 	}
+	flow = rte_zmalloc(NULL, sizeof(struct rte_flow) +
+			   (2 * DIST_PARAM_IOVA_SIZE), RTE_CACHE_LINE_SIZE);
+	if (!flow) {
+		DPAA2_PMD_ERR(
+			"Memory allocation failure for rule configration\n");
+		goto creation_error;
+	}
+	key_iova = (void *)((size_t)flow + sizeof(struct rte_flow));
+	mask_iova = (void *)((size_t)key_iova + DIST_PARAM_IOVA_SIZE);
 
 	/* Currently taking only IP protocol as an extract type.
 	 * This can be exended to other fields using pattern->type.
 	 */
 	memset(&kg_cfg, 0, sizeof(struct dpkg_profile_cfg));
-	kg_cfg.extracts[0].extract.from_hdr.prot = NET_PROT_IP;
-	kg_cfg.extracts[0].extract.from_hdr.field = NH_FLD_IP_PROTO;
-	kg_cfg.extracts[0].type = DPKG_EXTRACT_FROM_HDR;
-	kg_cfg.extracts[0].extract.from_hdr.type = DPKG_FULL_FIELD;
-	kg_cfg.num_extracts = 1;
+
+	switch (pattern[0]->type) {
+	case RTE_FLOW_ITEM_TYPE_IPV4:
+	{
+		const struct rte_flow_item_ipv4 *spec;
+		kg_cfg.extracts[0].extract.from_hdr.prot = NET_PROT_IP;
+		kg_cfg.extracts[0].extract.from_hdr.field = NH_FLD_IP_PROTO;
+		kg_cfg.extracts[0].type = DPKG_EXTRACT_FROM_HDR;
+		kg_cfg.extracts[0].extract.from_hdr.type = DPKG_FULL_FIELD;
+		kg_cfg.num_extracts = 1;
+
+		spec = (const struct rte_flow_item_ipv4 *)pattern[0]->spec;
+		memcpy(key_iova, (const void *)(&spec->hdr.next_proto_id),
+			sizeof(uint8_t));
+		memcpy(mask_iova, pattern[0]->mask, sizeof(uint8_t));
+		key_size = sizeof(uint8_t);
+	}
+	break;
+
+	case RTE_FLOW_ITEM_TYPE_ETH:
+	{
+		const struct rte_flow_item_eth *spec;
+		uint16_t eth_type;
+		kg_cfg.extracts[0].extract.from_hdr.prot = NET_PROT_ETH;
+		kg_cfg.extracts[0].extract.from_hdr.field = NH_FLD_ETH_TYPE;
+		kg_cfg.extracts[0].type = DPKG_EXTRACT_FROM_HDR;
+		kg_cfg.extracts[0].extract.from_hdr.type = DPKG_FULL_FIELD;
+		kg_cfg.num_extracts = 1;
+
+		spec = (const struct rte_flow_item_eth *)pattern[0]->spec;
+		eth_type = rte_constant_bswap16(spec->type);
+		memcpy((void *)key_iova, (const void *)&eth_type,
+							sizeof(rte_be16_t));
+		memcpy(mask_iova, pattern[0]->mask, sizeof(uint16_t));
+		key_size = sizeof(uint16_t);
+	}
+	break;
+
+	default:
+		DPAA2_PMD_ERR("Not supported pattern type: %d",
+				pattern[0]->type);
+		goto creation_error;
+	}
 
 	ret = dpkg_prepare_key_cfg(&kg_cfg, key_cfg_iova);
 	if (ret) {
@@ -114,24 +155,9 @@ rte_pmd_dpaa2_mux_flow_create(uint32_t dpdmux_id,
 	/* As now our key extract parameters are set, let us configure
 	 * the rule.
 	 */
-	flow = rte_zmalloc(NULL, sizeof(struct rte_flow) +
-			   (2 * DIST_PARAM_IOVA_SIZE), RTE_CACHE_LINE_SIZE);
-	if (!flow) {
-		DPAA2_PMD_ERR(
-			"Memory allocation failure for rule configration\n");
-		goto creation_error;
-	}
-	key_iova = (void *)((size_t)flow + sizeof(struct rte_flow));
-	mask_iova = (void *)((size_t)key_iova + DIST_PARAM_IOVA_SIZE);
-
-	spec = (const struct rte_flow_item_ipv4 *)pattern[0]->spec;
-	memcpy(key_iova, (const void *)&spec->hdr.next_proto_id,
-	       sizeof(uint8_t));
-	memcpy(mask_iova, pattern[0]->mask, sizeof(uint8_t));
-
 	flow->rule.key_iova = (uint64_t)(DPAA2_VADDR_TO_IOVA(key_iova));
 	flow->rule.mask_iova = (uint64_t)(DPAA2_VADDR_TO_IOVA(mask_iova));
-	flow->rule.key_size = sizeof(uint8_t);
+	flow->rule.key_size = key_size;
 
 	vf_conf = (const struct rte_flow_action_vf *)(actions[0]->conf);
 	if (vf_conf->id == 0 || vf_conf->id > dpdmux_dev->num_ifs) {
-- 
2.17.1

[dpdk-dev] [PATCH v2 21/30] net/dpaa2: add Tx confirmation mode support

[Sachin Saxena]

From: Priyanka Jain <priyanka.jain@nxp.com>

TX confirmation mode provides dedicated confirmation
queues for transmitted packets. These queues are used
by software to get the status and release
transmitted packets buffers.

By default TX confirmation mode is kept disabled.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
---
 drivers/bus/fslmc/portal/dpaa2_hw_pvt.h      |   2 +
 drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h |  22 ++++
 drivers/net/dpaa2/dpaa2_ethdev.c             | 101 ++++++++++++++++--
 drivers/net/dpaa2/dpaa2_ethdev.h             |   4 +-
 drivers/net/dpaa2/dpaa2_rxtx.c               | 106 ++++++++++++++++++-
 5 files changed, 227 insertions(+), 8 deletions(-)

diff --git a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
index 7f7e2fd78..5087f68c6 100644
--- a/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
+++ b/drivers/bus/fslmc/portal/dpaa2_hw_pvt.h
@@ -161,6 +161,8 @@ struct dpaa2_queue {
 	dpaa2_queue_cb_dqrr_t *cb;
 	dpaa2_queue_cb_eqresp_free_t *cb_eqresp_free;
 	struct dpaa2_bp_info *bp_array;
+	/*to store tx_conf_queue corresponding to tx_queue*/
+	struct dpaa2_queue *tx_conf_queue;
 };
 
 struct swp_active_dqs {
diff --git a/drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h b/drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h
index adb730b71..0d6324183 100644
--- a/drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h
+++ b/drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h
@@ -253,6 +253,28 @@ struct dpaa2_annot_hdr {
 #define PARSE_ERROR_CODE(var)		((uint64_t)(var) & 0xFF00000000000000)
 #define SOFT_PARSING_CONTEXT(var)	((uint64_t)(var) & 0x00FFFFFFFFFFFFFF)
 
+/*FAEAD offset in anmotation area*/
+#define DPAA2_FD_HW_ANNOT_FAEAD_OFFSET	0x58
+
+struct dpaa2_faead {
+	uint32_t fqid;
+	uint32_t ctrl;
+};
+
+/*FAEAD bits */
+/*A2 OMB contains valid data*/
+#define DPAA2_ANNOT_FAEAD_A2V		0x20000000
+/*egress confirmation FQID in FAEAD contains valid data*/
+#define DPAA2_ANNOT_FAEAD_A4V		0x08000000
+/*UPD is valid*/
+#define DPAA2_ANNOT_FAEAD_UPDV		0x00001000
+/*EBDD is valid*/
+#define DPAA2_ANNOT_FAEAD_EBDDV		0x00002000
+/*EBDD (External Buffer Deallocation Disable) */
+#define DPAA2_ANNOT_FAEAD_EBDD		0x00000020
+/*UPD (Update prepended data)*/
+#define DPAA2_ANNOT_FAEAD_UPD		0x00000010
+
 /* Debug frame, otherwise supposed to be discarded */
 #define DPAA2_ETH_FAS_DISC	      0x80000000
 /* MACSEC frame */
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 29f0bfdf2..a3af9588e 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -290,7 +290,10 @@ dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
 	PMD_INIT_FUNC_TRACE();
 
 	num_rxqueue_per_tc = (priv->nb_rx_queues / priv->num_rx_tc);
-	tot_queues = priv->nb_rx_queues + priv->nb_tx_queues;
+	if (priv->tx_conf_en)
+		tot_queues = priv->nb_rx_queues + 2 * priv->nb_tx_queues;
+	else
+		tot_queues = priv->nb_rx_queues + priv->nb_tx_queues;
 	mc_q = rte_malloc(NULL, sizeof(struct dpaa2_queue) * tot_queues,
 			  RTE_CACHE_LINE_SIZE);
 	if (!mc_q) {
@@ -325,6 +328,28 @@ dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
 			goto fail_tx;
 	}
 
+	if (priv->tx_conf_en) {
+		/*Setup tx confirmation queues*/
+		for (i = 0; i < priv->nb_tx_queues; i++) {
+			mc_q->eth_data = dev->data;
+			mc_q->tc_index = i;
+			mc_q->flow_id = 0;
+			priv->tx_conf_vq[i] = mc_q++;
+			dpaa2_q = (struct dpaa2_queue *)priv->tx_conf_vq[i];
+			dpaa2_q->q_storage =
+				rte_malloc("dq_storage",
+					sizeof(struct queue_storage_info_t),
+					RTE_CACHE_LINE_SIZE);
+			if (!dpaa2_q->q_storage)
+				goto fail_tx_conf;
+
+			memset(dpaa2_q->q_storage, 0,
+			       sizeof(struct queue_storage_info_t));
+			if (dpaa2_alloc_dq_storage(dpaa2_q->q_storage))
+				goto fail_tx_conf;
+		}
+	}
+
 	vq_id = 0;
 	for (dist_idx = 0; dist_idx < priv->nb_rx_queues; dist_idx++) {
 		mcq = (struct dpaa2_queue *)priv->rx_vq[vq_id];
@@ -334,6 +359,14 @@ dpaa2_alloc_rx_tx_queues(struct rte_eth_dev *dev)
 	}
 
 	return 0;
+fail_tx_conf:
+	i -= 1;
+	while (i >= 0) {
+		dpaa2_q = (struct dpaa2_queue *)priv->tx_conf_vq[i];
+		rte_free(dpaa2_q->q_storage);
+		priv->tx_conf_vq[i--] = NULL;
+	}
+	i = priv->nb_tx_queues;
 fail_tx:
 	i -= 1;
 	while (i >= 0) {
@@ -377,6 +410,14 @@ dpaa2_free_rx_tx_queues(struct rte_eth_dev *dev)
 			dpaa2_q = (struct dpaa2_queue *)priv->tx_vq[i];
 			rte_free(dpaa2_q->cscn);
 		}
+		if (priv->tx_conf_en) {
+			/* cleanup tx conf queue storage */
+			for (i = 0; i < priv->nb_tx_queues; i++) {
+				dpaa2_q = (struct dpaa2_queue *)
+						priv->tx_conf_vq[i];
+				rte_free(dpaa2_q->q_storage);
+			}
+		}
 		/*free memory for all queues (RX+TX) */
 		rte_free(priv->rx_vq[0]);
 		priv->rx_vq[0] = NULL;
@@ -673,6 +714,8 @@ dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
 	struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)
 		priv->tx_vq[tx_queue_id];
+	struct dpaa2_queue *dpaa2_tx_conf_q = (struct dpaa2_queue *)
+		priv->tx_conf_vq[tx_queue_id];
 	struct fsl_mc_io *dpni = priv->hw;
 	struct dpni_queue tx_conf_cfg;
 	struct dpni_queue tx_flow_cfg;
@@ -708,9 +751,14 @@ dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
 
 	if (tx_queue_id == 0) {
 		/*Set tx-conf and error configuration*/
-		ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
-						    priv->token,
-						    DPNI_CONF_DISABLE);
+		if (priv->tx_conf_en)
+			ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
+							    priv->token,
+							    DPNI_CONF_AFFINE);
+		else
+			ret = dpni_set_tx_confirmation_mode(dpni, CMD_PRI_LOW,
+							    priv->token,
+							    DPNI_CONF_DISABLE);
 		if (ret) {
 			DPAA2_PMD_ERR("Error in set tx conf mode settings: "
 				      "err=%d", ret);
@@ -761,6 +809,31 @@ dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
 	}
 	dpaa2_q->cb_eqresp_free = dpaa2_dev_free_eqresp_buf;
 	dev->data->tx_queues[tx_queue_id] = dpaa2_q;
+
+	if (priv->tx_conf_en) {
+		dpaa2_q->tx_conf_queue = dpaa2_tx_conf_q;
+		options = options | DPNI_QUEUE_OPT_USER_CTX;
+		tx_conf_cfg.user_context = (size_t)(dpaa2_q);
+		ret = dpni_set_queue(dpni, CMD_PRI_LOW, priv->token,
+			     DPNI_QUEUE_TX_CONFIRM, dpaa2_tx_conf_q->tc_index,
+			     dpaa2_tx_conf_q->flow_id, options, &tx_conf_cfg);
+		if (ret) {
+			DPAA2_PMD_ERR("Error in setting the tx conf flow: "
+			      "tc_index=%d, flow=%d err=%d",
+			      dpaa2_tx_conf_q->tc_index,
+			      dpaa2_tx_conf_q->flow_id, ret);
+			return -1;
+		}
+
+		ret = dpni_get_queue(dpni, CMD_PRI_LOW, priv->token,
+			     DPNI_QUEUE_TX_CONFIRM, dpaa2_tx_conf_q->tc_index,
+			     dpaa2_tx_conf_q->flow_id, &tx_conf_cfg, &qid);
+		if (ret) {
+			DPAA2_PMD_ERR("Error in getting LFQID err=%d", ret);
+			return -1;
+		}
+		dpaa2_tx_conf_q->fqid = qid.fqid;
+	}
 	return 0;
 }
 
@@ -2337,7 +2410,13 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
 
 	/* ... tx buffer layout ... */
 	memset(&layout, 0, sizeof(struct dpni_buffer_layout));
-	layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
+	if (priv->tx_conf_en) {
+		layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
+				 DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
+		layout.pass_timestamp = true;
+	} else {
+		layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
+	}
 	layout.pass_frame_status = 1;
 	ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
 				     DPNI_QUEUE_TX, &layout);
@@ -2348,7 +2427,13 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
 
 	/* ... tx-conf and error buffer layout ... */
 	memset(&layout, 0, sizeof(struct dpni_buffer_layout));
-	layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
+	if (priv->tx_conf_en) {
+		layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS |
+				 DPNI_BUF_LAYOUT_OPT_TIMESTAMP;
+		layout.pass_timestamp = true;
+	} else {
+		layout.options = DPNI_BUF_LAYOUT_OPT_FRAME_STATUS;
+	}
 	layout.pass_frame_status = 1;
 	ret = dpni_set_buffer_layout(dpni_dev, CMD_PRI_LOW, priv->token,
 				     DPNI_QUEUE_TX_CONFIRM, &layout);
@@ -2460,6 +2545,7 @@ rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
 		struct rte_dpaa2_device *dpaa2_dev)
 {
 	struct rte_eth_dev *eth_dev;
+	struct dpaa2_dev_priv *priv;
 	int diag;
 
 	if ((DPAA2_MBUF_HW_ANNOTATION + DPAA2_FD_PTA_SIZE) >
@@ -2507,6 +2593,9 @@ rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
 		return 0;
 	}
 
+	priv = eth_dev->data->dev_private;
+	priv->tx_conf_en = 0;
+
 	rte_eth_dev_release_port(eth_dev);
 	return diag;
 }
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index 2f14a3525..04a8ef8da 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -107,8 +107,9 @@ struct dpaa2_dev_priv {
 	uint32_t options;
 	void *rx_vq[MAX_RX_QUEUES];
 	void *tx_vq[MAX_TX_QUEUES];
-
 	struct dpaa2_bp_list *bp_list; /**<Attached buffer pool list */
+	void *tx_conf_vq[MAX_TX_QUEUES];
+	uint8_t tx_conf_en;
 	uint8_t max_mac_filters;
 	uint8_t max_vlan_filters;
 	uint8_t num_rx_tc;
@@ -179,5 +180,6 @@ uint16_t dpaa2_dev_tx_ordered(void *queue, struct rte_mbuf **bufs,
 uint16_t dummy_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts);
 void dpaa2_dev_free_eqresp_buf(uint16_t eqresp_ci);
 void dpaa2_flow_clean(struct rte_eth_dev *dev);
+uint16_t dpaa2_dev_tx_conf(void *queue)  __attribute__((unused));
 
 #endif /* _DPAA2_ETHDEV_H */
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index 2209b78a4..1c14b7354 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  *
  *   Copyright (c) 2016 Freescale Semiconductor, Inc. All rights reserved.
- *   Copyright 2016-2018 NXP
+ *   Copyright 2016-2019 NXP
  *
  */
 
@@ -832,6 +832,110 @@ dpaa2_dev_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
 	return num_rx;
 }
 
+uint16_t dpaa2_dev_tx_conf(void *queue)
+{
+	/* Function receive frames for a given device and VQ */
+	struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)queue;
+	struct qbman_result *dq_storage;
+	uint32_t fqid = dpaa2_q->fqid;
+	int ret, num_tx_conf = 0, num_pulled;
+	uint8_t pending, status;
+	struct qbman_swp *swp;
+	const struct qbman_fd *fd, *next_fd;
+	struct qbman_pull_desc pulldesc;
+	struct qbman_release_desc releasedesc;
+	uint32_t bpid;
+	uint64_t buf;
+
+	if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
+		ret = dpaa2_affine_qbman_swp();
+		if (ret) {
+			DPAA2_PMD_ERR("Failure in affining portal\n");
+			return 0;
+		}
+	}
+	swp = DPAA2_PER_LCORE_PORTAL;
+
+	do {
+		dq_storage = dpaa2_q->q_storage->dq_storage[0];
+		qbman_pull_desc_clear(&pulldesc);
+		qbman_pull_desc_set_fq(&pulldesc, fqid);
+		qbman_pull_desc_set_storage(&pulldesc, dq_storage,
+				(size_t)(DPAA2_VADDR_TO_IOVA(dq_storage)), 1);
+
+		qbman_pull_desc_set_numframes(&pulldesc, dpaa2_dqrr_size);
+
+		while (1) {
+			if (qbman_swp_pull(swp, &pulldesc)) {
+				DPAA2_PMD_DP_DEBUG("VDQ command is not issued."
+						   "QBMAN is busy\n");
+				/* Portal was busy, try again */
+				continue;
+			}
+			break;
+		}
+
+		rte_prefetch0((void *)((size_t)(dq_storage + 1)));
+		/* Check if the previous issued command is completed. */
+		while (!qbman_check_command_complete(dq_storage))
+			;
+
+		num_pulled = 0;
+		pending = 1;
+		do {
+			/* Loop until the dq_storage is updated with
+			 * new token by QBMAN
+			 */
+			while (!qbman_check_new_result(dq_storage))
+				;
+			rte_prefetch0((void *)((size_t)(dq_storage + 2)));
+			/* Check whether Last Pull command is Expired and
+			 * setting Condition for Loop termination
+			 */
+			if (qbman_result_DQ_is_pull_complete(dq_storage)) {
+				pending = 0;
+				/* Check for valid frame. */
+				status = qbman_result_DQ_flags(dq_storage);
+				if (unlikely((status &
+					QBMAN_DQ_STAT_VALIDFRAME) == 0))
+					continue;
+			}
+			fd = qbman_result_DQ_fd(dq_storage);
+
+			next_fd = qbman_result_DQ_fd(dq_storage + 1);
+			/* Prefetch Annotation address for the parse results */
+			rte_prefetch0((void *)(size_t)
+				(DPAA2_GET_FD_ADDR(next_fd) +
+				 DPAA2_FD_PTA_SIZE + 16));
+
+			bpid = DPAA2_GET_FD_BPID(fd);
+
+			/* Create a release descriptor required for releasing
+			 * buffers into QBMAN
+			 */
+			qbman_release_desc_clear(&releasedesc);
+			qbman_release_desc_set_bpid(&releasedesc, bpid);
+
+			buf = DPAA2_GET_FD_ADDR(fd);
+			/* feed them to bman */
+			do {
+				ret = qbman_swp_release(swp, &releasedesc,
+							&buf, 1);
+			} while (ret == -EBUSY);
+
+			dq_storage++;
+			num_tx_conf++;
+			num_pulled++;
+		} while (pending);
+
+	/* Last VDQ provided all packets and more packets are requested */
+	} while (num_pulled == dpaa2_dqrr_size);
+
+	dpaa2_q->rx_pkts += num_tx_conf;
+
+	return num_tx_conf;
+}
+
 /*
  * Callback to handle sending packets through WRIOP based interface
  */
-- 
2.17.1

[dpdk-dev] [PATCH v2 22/30] net/dpaa2: add timestamp support

[Sachin Saxena]

From: Priyanka Jain <priyanka.jain@nxp.com>

IEEE1588 driver needs timestamp of packets.
For DPAA2, the timestamp of TX packets is
stored in annotation area of corresponding
TX confirmation packet.

This patch enables timestamp fields in
annotation area and TX confirmation mode if
CONFIG_RTE_LIBRTE_IEEE1588 is set in
config/defconfig_arm64-dpaa2-linuxapp-gc

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
---
 config/defconfig_arm64-dpaa2-linuxapp-gcc |  3 ++
 drivers/net/dpaa2/dpaa2_ethdev.c          |  5 ++
 drivers/net/dpaa2/dpaa2_rxtx.c            | 61 +++++++++++++++++++++++
 3 files changed, 69 insertions(+)

diff --git a/config/defconfig_arm64-dpaa2-linuxapp-gcc b/config/defconfig_arm64-dpaa2-linuxapp-gcc
index 8b545f5f7..b2543266a 100644
--- a/config/defconfig_arm64-dpaa2-linuxapp-gcc
+++ b/config/defconfig_arm64-dpaa2-linuxapp-gcc
@@ -15,6 +15,9 @@ CONFIG_RTE_CACHE_LINE_SIZE=64
 
 CONFIG_RTE_PKTMBUF_HEADROOM=128
 
+# Enable IEEE1588, Keep it disable by default
+CONFIG_RTE_LIBRTE_IEEE1588=n
+
 # Doesn't support NUMA
 CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
 CONFIG_RTE_LIBRTE_VHOST_NUMA=n
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index a3af9588e..5ba8c911b 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -2378,6 +2378,11 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
 	priv->max_mac_filters = attr.mac_filter_entries;
 	priv->max_vlan_filters = attr.vlan_filter_entries;
 	priv->flags = 0;
+#if defined(RTE_LIBRTE_IEEE1588)
+	priv->tx_conf_en = 1;
+#else
+	priv->tx_conf_en = 0;
+#endif
 
 	/* Allocate memory for hardware structure for queues */
 	ret = dpaa2_alloc_rx_tx_queues(eth_dev);
diff --git a/drivers/net/dpaa2/dpaa2_rxtx.c b/drivers/net/dpaa2/dpaa2_rxtx.c
index 1c14b7354..7cea109d5 100644
--- a/drivers/net/dpaa2/dpaa2_rxtx.c
+++ b/drivers/net/dpaa2/dpaa2_rxtx.c
@@ -29,6 +29,8 @@ static inline uint32_t __attribute__((hot))
 dpaa2_dev_rx_parse_slow(struct rte_mbuf *mbuf,
 			struct dpaa2_annot_hdr *annotation);
 
+static void enable_tx_tstamp(struct qbman_fd *fd) __attribute__((unused));
+
 #define DPAA2_MBUF_TO_CONTIG_FD(_mbuf, _fd, _bpid)  do { \
 	DPAA2_SET_FD_ADDR(_fd, DPAA2_MBUF_VADDR_TO_IOVA(_mbuf)); \
 	DPAA2_SET_FD_LEN(_fd, _mbuf->data_len); \
@@ -131,6 +133,11 @@ dpaa2_dev_rx_parse_slow(struct rte_mbuf *mbuf,
 			"(4)=0x%" PRIx64 "\t",
 			annotation->word3, annotation->word4);
 
+#if defined(RTE_LIBRTE_IEEE1588)
+	if (BIT_ISSET_AT_POS(annotation->word1, DPAA2_ETH_FAS_PTP))
+		mbuf->ol_flags |= PKT_RX_IEEE1588_PTP;
+#endif
+
 	if (BIT_ISSET_AT_POS(annotation->word3, L2_VLAN_1_PRESENT)) {
 		vlan_tci = rte_pktmbuf_mtod_offset(mbuf, uint16_t *,
 			(VLAN_TCI_OFFSET_1(annotation->word5) >> 16));
@@ -511,6 +518,9 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
 	struct qbman_pull_desc pulldesc;
 	struct queue_storage_info_t *q_storage = dpaa2_q->q_storage;
 	struct rte_eth_dev_data *eth_data = dpaa2_q->eth_data;
+#if defined(RTE_LIBRTE_IEEE1588)
+	struct dpaa2_dev_priv *priv = eth_data->dev_private;
+#endif
 
 	if (unlikely(!DPAA2_PER_LCORE_ETHRX_DPIO)) {
 		ret = dpaa2_affine_qbman_ethrx_swp();
@@ -615,6 +625,9 @@ dpaa2_dev_prefetch_rx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
 		else
 			bufs[num_rx] = eth_fd_to_mbuf(fd);
 		bufs[num_rx]->port = eth_data->port_id;
+#if defined(RTE_LIBRTE_IEEE1588)
+		priv->rx_timestamp = bufs[num_rx]->timestamp;
+#endif
 
 		if (eth_data->dev_conf.rxmode.offloads &
 				DEV_RX_OFFLOAD_VLAN_STRIP)
@@ -846,6 +859,11 @@ uint16_t dpaa2_dev_tx_conf(void *queue)
 	struct qbman_release_desc releasedesc;
 	uint32_t bpid;
 	uint64_t buf;
+#if defined(RTE_LIBRTE_IEEE1588)
+	struct rte_eth_dev_data *eth_data = dpaa2_q->eth_data;
+	struct dpaa2_dev_priv *priv = eth_data->dev_private;
+	struct dpaa2_annot_hdr *annotation;
+#endif
 
 	if (unlikely(!DPAA2_PER_LCORE_DPIO)) {
 		ret = dpaa2_affine_qbman_swp();
@@ -926,6 +944,12 @@ uint16_t dpaa2_dev_tx_conf(void *queue)
 			dq_storage++;
 			num_tx_conf++;
 			num_pulled++;
+#if defined(RTE_LIBRTE_IEEE1588)
+			annotation = (struct dpaa2_annot_hdr *)((size_t)
+				DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd)) +
+				DPAA2_FD_PTA_SIZE);
+			priv->tx_timestamp = annotation->word2;
+#endif
 		} while (pending);
 
 	/* Last VDQ provided all packets and more packets are requested */
@@ -936,6 +960,28 @@ uint16_t dpaa2_dev_tx_conf(void *queue)
 	return num_tx_conf;
 }
 
+/* Configure the egress frame annotation for timestamp update */
+static void enable_tx_tstamp(struct qbman_fd *fd)
+{
+	struct dpaa2_faead *fd_faead;
+
+	/* Set frame annotation status field as valid */
+	(fd)->simple.frc |= DPAA2_FD_FRC_FASV;
+
+	/* Set frame annotation egress action descriptor as valid */
+	(fd)->simple.frc |= DPAA2_FD_FRC_FAEADV;
+
+	/* Set Annotation Length as 128B */
+	(fd)->simple.ctrl |= DPAA2_FD_CTRL_ASAL;
+
+	/* enable update of confirmation frame annotation */
+	fd_faead = (struct dpaa2_faead *)((size_t)
+			DPAA2_IOVA_TO_VADDR(DPAA2_GET_FD_ADDR(fd)) +
+			DPAA2_FD_PTA_SIZE + DPAA2_FD_HW_ANNOT_FAEAD_OFFSET);
+	fd_faead->ctrl = DPAA2_ANNOT_FAEAD_A2V | DPAA2_ANNOT_FAEAD_UPDV |
+				DPAA2_ANNOT_FAEAD_UPD;
+}
+
 /*
  * Callback to handle sending packets through WRIOP based interface
  */
@@ -970,6 +1016,15 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
 	DPAA2_PMD_DP_DEBUG("===> eth_data =%p, fqid =%d\n",
 			eth_data, dpaa2_q->fqid);
 
+#ifdef RTE_LIBRTE_IEEE1588
+	/* IEEE1588 driver need pointer to tx confirmation queue
+	 * corresponding to last packet transmitted for reading
+	 * the timestamp
+	 */
+	priv->next_tx_conf_queue = dpaa2_q->tx_conf_queue;
+	dpaa2_dev_tx_conf(dpaa2_q->tx_conf_queue);
+#endif
+
 	/*Prepare enqueue descriptor*/
 	qbman_eq_desc_clear(&eqdesc);
 	qbman_eq_desc_set_no_orp(&eqdesc, DPAA2_EQ_RESP_ERR_FQ);
@@ -1020,6 +1075,9 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
 					DPAA2_MBUF_TO_CONTIG_FD((*bufs),
 					&fd_arr[loop], mempool_to_bpid(mp));
 					bufs++;
+#ifdef RTE_LIBRTE_IEEE1588
+					enable_tx_tstamp(&fd_arr[loop]);
+#endif
 					continue;
 				}
 			} else {
@@ -1068,6 +1126,9 @@ dpaa2_dev_tx(void *queue, struct rte_mbuf **bufs, uint16_t nb_pkts)
 						       &fd_arr[loop], bpid);
 				}
 			}
+#ifdef RTE_LIBRTE_IEEE1588
+			enable_tx_tstamp(&fd_arr[loop]);
+#endif
 			bufs++;
 		}
 		loop = 0;
-- 
2.17.1

[dpdk-dev] [PATCH v2 23/30] net/dpaa2: add dprtc sub-module

[Sachin Saxena]

From: Priyanka Jain <priyanka.jain@nxp.com>

This patch add support for dprtc
(Data Path Real Time Clock) sub-module
based on MC 10.16.0 flib.

It provides interface for PTP stack software
to access physical IEEE 1588 Real Time Clock.

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
---
 drivers/net/dpaa2/Makefile           |   1 +
 drivers/net/dpaa2/mc/dprtc.c         | 523 +++++++++++++++++++++++++++
 drivers/net/dpaa2/mc/fsl_dprtc.h     | 109 ++++++
 drivers/net/dpaa2/mc/fsl_dprtc_cmd.h |  91 +++++
 drivers/net/dpaa2/meson.build        |   4 +
 5 files changed, 728 insertions(+)
 create mode 100644 drivers/net/dpaa2/mc/dprtc.c
 create mode 100644 drivers/net/dpaa2/mc/fsl_dprtc.h
 create mode 100644 drivers/net/dpaa2/mc/fsl_dprtc_cmd.h

diff --git a/drivers/net/dpaa2/Makefile b/drivers/net/dpaa2/Makefile
index c7262ffd5..9b52fa1e5 100644
--- a/drivers/net/dpaa2/Makefile
+++ b/drivers/net/dpaa2/Makefile
@@ -37,6 +37,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2_mux.c
 SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += mc/dpni.c
 SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += mc/dpkg.c
 SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += mc/dpdmux.c
+SRCS-$(CONFIG_RTE_LIBRTE_IEEE1588)  += mc/dprtc.c
 
 LDLIBS += -lrte_bus_fslmc
 LDLIBS += -lrte_mempool_dpaa2
diff --git a/drivers/net/dpaa2/mc/dprtc.c b/drivers/net/dpaa2/mc/dprtc.c
new file mode 100644
index 000000000..42ac89150
--- /dev/null
+++ b/drivers/net/dpaa2/mc/dprtc.c
@@ -0,0 +1,523 @@
+/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
+ * Copyright 2019 NXP
+ */
+#include <fsl_mc_sys.h>
+#include <fsl_mc_cmd.h>
+#include <fsl_dprtc.h>
+#include <fsl_dprtc_cmd.h>
+
+/** @addtogroup dprtc
+ * @{
+ */
+
+/**
+ * dprtc_open() - Open a control session for the specified object.
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @dprtc_id:	DPRTC unique ID
+ * @token:	Returned token; use in subsequent API calls
+ *
+ * This function can be used to open a control session for an
+ * already created object; an object may have been declared in
+ * the DPL or by calling the dprtc_create function.
+ * This function returns a unique authentication token,
+ * associated with the specific object ID and the specific MC
+ * portal; this token must be used in all subsequent commands for
+ * this specific object
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dprtc_open(struct fsl_mc_io *mc_io,
+	       uint32_t cmd_flags,
+	       int dprtc_id,
+	       uint16_t *token)
+{
+	struct dprtc_cmd_open *cmd_params;
+	struct mc_command cmd = { 0 };
+	int err;
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_OPEN,
+					  cmd_flags,
+					  0);
+	cmd_params = (struct dprtc_cmd_open *)cmd.params;
+	cmd_params->dprtc_id = cpu_to_le32(dprtc_id);
+
+	/* send command to mc*/
+	err = mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	/* retrieve response parameters */
+	*token = mc_cmd_hdr_read_token(&cmd);
+
+	return err;
+}
+
+/**
+ * dprtc_close() - Close the control session of the object
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPRTC object
+ *
+ * After this function is called, no further operations are
+ * allowed on the object without opening a new control session.
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dprtc_close(struct fsl_mc_io *mc_io,
+		uint32_t cmd_flags,
+		uint16_t token)
+{
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_CLOSE, cmd_flags,
+					  token);
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dprtc_create() - Create the DPRTC object.
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @dprc_token:	Parent container token; '0' for default container
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @cfg:	Configuration structure
+ * @obj_id:	Returned object id
+ *
+ * Create the DPRTC object, allocate required resources and
+ * perform required initialization.
+ *
+ * The function accepts an authentication token of a parent
+ * container that this object should be assigned to. The token
+ * can be '0' so the object will be assigned to the default container.
+ * The newly created object can be opened with the returned
+ * object id and using the container's associated tokens and MC portals.
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dprtc_create(struct fsl_mc_io *mc_io,
+		 uint16_t dprc_token,
+		 uint32_t cmd_flags,
+		 const struct dprtc_cfg *cfg,
+		 uint32_t *obj_id)
+{
+	struct mc_command cmd = { 0 };
+	int err;
+
+	(void)(cfg); /* unused */
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_CREATE,
+					  cmd_flags,
+					  dprc_token);
+
+	/* send command to mc*/
+	err = mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	/* retrieve response parameters */
+	*obj_id = mc_cmd_read_object_id(&cmd);
+
+	return 0;
+}
+
+/**
+ * dprtc_destroy() - Destroy the DPRTC object and release all its resources.
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @dprc_token: Parent container token; '0' for default container
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @object_id:	The object id; it must be a valid id within the container that
+ * created this object;
+ *
+ * The function accepts the authentication token of the parent container that
+ * created the object (not the one that currently owns the object). The object
+ * is searched within parent using the provided 'object_id'.
+ * All tokens to the object must be closed before calling destroy.
+ *
+ * Return:	'0' on Success; error code otherwise.
+ */
+int dprtc_destroy(struct fsl_mc_io *mc_io,
+		  uint16_t dprc_token,
+		  uint32_t cmd_flags,
+		  uint32_t object_id)
+{
+	struct dprtc_cmd_destroy *cmd_params;
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_DESTROY,
+					  cmd_flags,
+					  dprc_token);
+	cmd_params = (struct dprtc_cmd_destroy *)cmd.params;
+	cmd_params->object_id = cpu_to_le32(object_id);
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dprtc_enable() - Enable the DPRTC.
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPRTC object
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dprtc_enable(struct fsl_mc_io *mc_io,
+		 uint32_t cmd_flags,
+		 uint16_t token)
+{
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_ENABLE, cmd_flags,
+					  token);
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dprtc_disable() - Disable the DPRTC.
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPRTC object
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dprtc_disable(struct fsl_mc_io *mc_io,
+		  uint32_t cmd_flags,
+		  uint16_t token)
+{
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_DISABLE,
+					  cmd_flags,
+					  token);
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dprtc_is_enabled() - Check if the DPRTC is enabled.
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPRTC object
+ * @en:		Returns '1' if object is enabled; '0' otherwise
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dprtc_is_enabled(struct fsl_mc_io *mc_io,
+		     uint32_t cmd_flags,
+		     uint16_t token,
+		     int *en)
+{
+	struct dprtc_rsp_is_enabled *rsp_params;
+	struct mc_command cmd = { 0 };
+	int err;
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_IS_ENABLED, cmd_flags,
+					  token);
+
+	/* send command to mc*/
+	err = mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	/* retrieve response parameters */
+	rsp_params = (struct dprtc_rsp_is_enabled *)cmd.params;
+	*en = dprtc_get_field(rsp_params->en, ENABLE);
+
+	return 0;
+}
+
+/**
+ * dprtc_reset() - Reset the DPRTC, returns the object to initial state.
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPRTC object
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dprtc_reset(struct fsl_mc_io *mc_io,
+		uint32_t cmd_flags,
+		uint16_t token)
+{
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_RESET,
+					  cmd_flags,
+					  token);
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dprtc_get_attributes - Retrieve DPRTC attributes.
+ *
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPRTC object
+ * @attr:	Returned object's attributes
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dprtc_get_attributes(struct fsl_mc_io *mc_io,
+			 uint32_t cmd_flags,
+			 uint16_t token,
+			 struct dprtc_attr *attr)
+{
+	struct dprtc_rsp_get_attributes *rsp_params;
+	struct mc_command cmd = { 0 };
+	int err;
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_ATTR,
+					  cmd_flags,
+					  token);
+
+	/* send command to mc*/
+	err = mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	/* retrieve response parameters */
+	rsp_params = (struct dprtc_rsp_get_attributes *)cmd.params;
+	attr->id = le32_to_cpu(rsp_params->id);
+	attr->paddr = le32_to_cpu(rsp_params->paddr);
+	attr->little_endian =
+		dprtc_get_field(rsp_params->little_endian, ENDIANNESS);
+	return 0;
+}
+
+/**
+ * dprtc_set_clock_offset() - Sets the clock's offset
+ * (usually relative to another clock).
+ *
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPRTC object
+ * @offset:	New clock offset (in nanoseconds).
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dprtc_set_clock_offset(struct fsl_mc_io *mc_io,
+			   uint32_t cmd_flags,
+			   uint16_t token,
+			   int64_t offset)
+{
+	struct dprtc_cmd_set_clock_offset *cmd_params;
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_CLOCK_OFFSET,
+					  cmd_flags,
+					  token);
+	cmd_params = (struct dprtc_cmd_set_clock_offset *)cmd.params;
+	cmd_params->offset = cpu_to_le64(offset);
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dprtc_set_freq_compensation() - Sets a new frequency compensation value.
+ *
+ * @mc_io:		Pointer to MC portal's I/O object
+ * @cmd_flags:		Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:		Token of DPRTC object
+ * @freq_compensation:	The new frequency compensation value to set.
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dprtc_set_freq_compensation(struct fsl_mc_io *mc_io,
+				uint32_t cmd_flags,
+				uint16_t token,
+				uint32_t freq_compensation)
+{
+	struct dprtc_get_freq_compensation *cmd_params;
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_FREQ_COMPENSATION,
+					  cmd_flags,
+					  token);
+	cmd_params = (struct dprtc_get_freq_compensation *)cmd.params;
+	cmd_params->freq_compensation = cpu_to_le32(freq_compensation);
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dprtc_get_freq_compensation() - Retrieves the frequency compensation value
+ *
+ * @mc_io:		Pointer to MC portal's I/O object
+ * @cmd_flags:		Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:		Token of DPRTC object
+ * @freq_compensation:	Frequency compensation value
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dprtc_get_freq_compensation(struct fsl_mc_io *mc_io,
+				uint32_t cmd_flags,
+				uint16_t token,
+				uint32_t *freq_compensation)
+{
+	struct dprtc_get_freq_compensation *rsp_params;
+	struct mc_command cmd = { 0 };
+	int err;
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_FREQ_COMPENSATION,
+					  cmd_flags,
+					  token);
+
+	/* send command to mc*/
+	err = mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	/* retrieve response parameters */
+	rsp_params = (struct dprtc_get_freq_compensation *)cmd.params;
+	*freq_compensation = le32_to_cpu(rsp_params->freq_compensation);
+
+	return 0;
+}
+
+/**
+ * dprtc_get_time() - Returns the current RTC time.
+ *
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPRTC object
+ * @time:	Current RTC time.
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dprtc_get_time(struct fsl_mc_io *mc_io,
+		   uint32_t cmd_flags,
+		   uint16_t token,
+		   uint64_t *time)
+{
+	struct dprtc_time *rsp_params;
+	struct mc_command cmd = { 0 };
+	int err;
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_TIME,
+					  cmd_flags,
+					  token);
+
+	/* send command to mc*/
+	err = mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	/* retrieve response parameters */
+	rsp_params = (struct dprtc_time *)cmd.params;
+	*time = le64_to_cpu(rsp_params->time);
+
+	return 0;
+}
+
+/**
+ * dprtc_set_time() - Updates current RTC time.
+ *
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPRTC object
+ * @time:	New RTC time.
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dprtc_set_time(struct fsl_mc_io *mc_io,
+		   uint32_t cmd_flags,
+		   uint16_t token,
+		   uint64_t time)
+{
+	struct dprtc_time *cmd_params;
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_TIME,
+					  cmd_flags,
+					  token);
+	cmd_params = (struct dprtc_time *)cmd.params;
+	cmd_params->time = cpu_to_le64(time);
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dprtc_set_alarm() - Defines and sets alarm.
+ *
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPRTC object
+ * @time:	In nanoseconds, the time when the alarm
+ *			should go off - must be a multiple of
+ *			1 microsecond
+ *
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dprtc_set_alarm(struct fsl_mc_io *mc_io,
+		    uint32_t cmd_flags,
+		    uint16_t token, uint64_t time)
+{
+	struct dprtc_time *cmd_params;
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_SET_ALARM,
+					  cmd_flags,
+					  token);
+	cmd_params = (struct dprtc_time *)cmd.params;
+	cmd_params->time = cpu_to_le64(time);
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dprtc_get_api_version() - Get Data Path Real Time Counter API version
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @major_ver:	Major version of data path real time counter API
+ * @minor_ver:	Minor version of data path real time counter API
+ *
+ * Return:  '0' on Success; Error code otherwise.
+ */
+int dprtc_get_api_version(struct fsl_mc_io *mc_io,
+			  uint32_t cmd_flags,
+			  uint16_t *major_ver,
+			  uint16_t *minor_ver)
+{
+	struct dprtc_rsp_get_api_version *rsp_params;
+	struct mc_command cmd = { 0 };
+	int err;
+
+	cmd.header = mc_encode_cmd_header(DPRTC_CMDID_GET_API_VERSION,
+					cmd_flags,
+					0);
+
+	err = mc_send_command(mc_io, &cmd);
+	if (err)
+		return err;
+
+	rsp_params = (struct dprtc_rsp_get_api_version *)cmd.params;
+	*major_ver = le16_to_cpu(rsp_params->major);
+	*minor_ver = le16_to_cpu(rsp_params->minor);
+
+	return 0;
+}
diff --git a/drivers/net/dpaa2/mc/fsl_dprtc.h b/drivers/net/dpaa2/mc/fsl_dprtc.h
new file mode 100644
index 000000000..49edb5a05
--- /dev/null
+++ b/drivers/net/dpaa2/mc/fsl_dprtc.h
@@ -0,0 +1,109 @@
+/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
+ * Copyright 2019 NXP
+ */
+#ifndef __FSL_DPRTC_H
+#define __FSL_DPRTC_H
+
+/** @addtogroup dprtc Data Path Real Time Counter API
+ * Contains initialization APIs and runtime control APIs for RTC
+ * @{
+ */
+
+struct fsl_mc_io;
+
+int dprtc_open(struct fsl_mc_io *mc_io,
+	       uint32_t cmd_flags,
+	       int dprtc_id,
+	       uint16_t *token);
+
+int dprtc_close(struct fsl_mc_io *mc_io,
+		uint32_t cmd_flags,
+		uint16_t token);
+
+/**
+ * struct dprtc_cfg - Structure representing DPRTC configuration
+ * @options:	place holder
+ */
+struct dprtc_cfg {
+	uint32_t options;
+};
+
+int dprtc_create(struct fsl_mc_io *mc_io,
+		 uint16_t dprc_token,
+		 uint32_t cmd_flags,
+		 const struct dprtc_cfg *cfg,
+		 uint32_t *obj_id);
+
+int dprtc_destroy(struct fsl_mc_io *mc_io,
+		  uint16_t dprc_token,
+		  uint32_t cmd_flags,
+		  uint32_t object_id);
+
+int dprtc_enable(struct fsl_mc_io *mc_io,
+		 uint32_t cmd_flags,
+		 uint16_t token);
+
+int dprtc_disable(struct fsl_mc_io *mc_io,
+		  uint32_t cmd_flags,
+		  uint16_t token);
+
+int dprtc_is_enabled(struct fsl_mc_io *mc_io,
+		     uint32_t cmd_flags,
+		     uint16_t token,
+		     int *en);
+
+int dprtc_reset(struct fsl_mc_io *mc_io,
+		uint32_t cmd_flags,
+		uint16_t token);
+
+int dprtc_set_clock_offset(struct fsl_mc_io *mc_io,
+			   uint32_t cmd_flags,
+			   uint16_t token,
+			   int64_t offset);
+
+int dprtc_set_freq_compensation(struct fsl_mc_io *mc_io,
+		  uint32_t cmd_flags,
+		  uint16_t token,
+		  uint32_t freq_compensation);
+
+int dprtc_get_freq_compensation(struct fsl_mc_io *mc_io,
+		  uint32_t cmd_flags,
+		  uint16_t token,
+		  uint32_t *freq_compensation);
+
+int dprtc_get_time(struct fsl_mc_io *mc_io,
+		   uint32_t cmd_flags,
+		   uint16_t token,
+		   uint64_t *time);
+
+int dprtc_set_time(struct fsl_mc_io *mc_io,
+		   uint32_t cmd_flags,
+		   uint16_t token,
+		   uint64_t time);
+
+int dprtc_set_alarm(struct fsl_mc_io *mc_io,
+		    uint32_t cmd_flags,
+		    uint16_t token,
+		    uint64_t time);
+
+/**
+ * struct dprtc_attr - Structure representing DPRTC attributes
+ * @id:		DPRTC object ID
+ */
+struct dprtc_attr {
+	int id;
+	int paddr;
+	int little_endian;
+};
+
+int dprtc_get_attributes(struct fsl_mc_io *mc_io,
+			 uint32_t cmd_flags,
+			 uint16_t token,
+			 struct dprtc_attr *attr);
+
+int dprtc_get_api_version(struct fsl_mc_io *mc_io,
+			  uint32_t cmd_flags,
+			  uint16_t *major_ver,
+			  uint16_t *minor_ver);
+
+#endif /* __FSL_DPRTC_H */
diff --git a/drivers/net/dpaa2/mc/fsl_dprtc_cmd.h b/drivers/net/dpaa2/mc/fsl_dprtc_cmd.h
new file mode 100644
index 000000000..eca12ff5e
--- /dev/null
+++ b/drivers/net/dpaa2/mc/fsl_dprtc_cmd.h
@@ -0,0 +1,91 @@
+/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
+ * Copyright 2019 NXP
+ */
+#include <fsl_mc_sys.h>
+#ifndef _FSL_DPRTC_CMD_H
+#define _FSL_DPRTC_CMD_H
+
+/* DPRTC Version */
+#define DPRTC_VER_MAJOR			2
+#define DPRTC_VER_MINOR			1
+
+/* Command versioning */
+#define DPRTC_CMD_BASE_VERSION		1
+#define DPRTC_CMD_ID_OFFSET		4
+
+#define DPRTC_CMD(id)	(((id) << DPRTC_CMD_ID_OFFSET) | DPRTC_CMD_BASE_VERSION)
+
+/* Command IDs */
+#define DPRTC_CMDID_CLOSE			DPRTC_CMD(0x800)
+#define DPRTC_CMDID_OPEN			DPRTC_CMD(0x810)
+#define DPRTC_CMDID_CREATE			DPRTC_CMD(0x910)
+#define DPRTC_CMDID_DESTROY			DPRTC_CMD(0x990)
+#define DPRTC_CMDID_GET_API_VERSION		DPRTC_CMD(0xa10)
+
+#define DPRTC_CMDID_ENABLE			DPRTC_CMD(0x002)
+#define DPRTC_CMDID_DISABLE			DPRTC_CMD(0x003)
+#define DPRTC_CMDID_GET_ATTR			DPRTC_CMD(0x004)
+#define DPRTC_CMDID_RESET			DPRTC_CMD(0x005)
+#define DPRTC_CMDID_IS_ENABLED			DPRTC_CMD(0x006)
+
+#define DPRTC_CMDID_SET_CLOCK_OFFSET		DPRTC_CMD(0x1d0)
+#define DPRTC_CMDID_SET_FREQ_COMPENSATION	DPRTC_CMD(0x1d1)
+#define DPRTC_CMDID_GET_FREQ_COMPENSATION	DPRTC_CMD(0x1d2)
+#define DPRTC_CMDID_GET_TIME			DPRTC_CMD(0x1d3)
+#define DPRTC_CMDID_SET_TIME			DPRTC_CMD(0x1d4)
+#define DPRTC_CMDID_SET_ALARM			DPRTC_CMD(0x1d5)
+#define DPRTC_CMDID_SET_PERIODIC_PULSE		DPRTC_CMD(0x1d6)
+#define DPRTC_CMDID_CLEAR_PERIODIC_PULSE	DPRTC_CMD(0x1d7)
+#define DPRTC_CMDID_SET_EXT_TRIGGER		DPRTC_CMD(0x1d8)
+#define DPRTC_CMDID_CLEAR_EXT_TRIGGER		DPRTC_CMD(0x1d9)
+#define DPRTC_CMDID_GET_EXT_TRIGGER_TIMESTAMP	DPRTC_CMD(0x1dA)
+
+/* Macros for accessing command fields smaller than 1byte */
+#define DPRTC_MASK(field)        \
+	GENMASK(DPRTC_##field##_SHIFT + DPRTC_##field##_SIZE - 1, \
+		DPRTC_##field##_SHIFT)
+#define dprtc_get_field(var, field)      \
+	(((var) & DPRTC_MASK(field)) >> DPRTC_##field##_SHIFT)
+
+#pragma pack(push, 1)
+struct dprtc_cmd_open {
+	uint32_t dprtc_id;
+};
+
+struct dprtc_cmd_destroy {
+	uint32_t object_id;
+};
+
+#define DPRTC_ENABLE_SHIFT	0
+#define DPRTC_ENABLE_SIZE	1
+#define DPRTC_ENDIANNESS_SHIFT 0
+#define DPRTC_ENDIANNESS_SIZE  1
+
+struct dprtc_rsp_is_enabled {
+	uint8_t en;
+};
+
+struct dprtc_rsp_get_attributes {
+	uint32_t paddr;
+	uint32_t id;
+	uint8_t little_endian;
+};
+
+struct dprtc_cmd_set_clock_offset {
+	uint64_t offset;
+};
+
+struct dprtc_get_freq_compensation {
+	uint32_t freq_compensation;
+};
+
+struct dprtc_time {
+	uint64_t time;
+};
+
+struct dprtc_rsp_get_api_version {
+	uint16_t major;
+	uint16_t minor;
+};
+#pragma pack(pop)
+#endif /* _FSL_DPRTC_CMD_H */
diff --git a/drivers/net/dpaa2/meson.build b/drivers/net/dpaa2/meson.build
index 7e74c656a..1184ce6b9 100644
--- a/drivers/net/dpaa2/meson.build
+++ b/drivers/net/dpaa2/meson.build
@@ -18,6 +18,10 @@ sources = files('base/dpaa2_hw_dpni.c',
 		'mc/dpdmux.c',
 		'mc/dpni.c')
 
+if dpdk_conf.has('RTE_LIBRTE_IEEE1588')
+	sources += files('mc/dprtc.c')
+endif
+
 includes += include_directories('base', 'mc')
 
 # depends on fslmc bus which uses experimental API
-- 
2.17.1

[dpdk-dev] [PATCH v2 24/30] net/dpaa2: add ptp driver

[Sachin Saxena]

From: Priyanka Jain <priyanka.jain@nxp.com>

This patch adds the support for PTP driver for
DPAA2 devices.

To enable set
CONFIG_RTE_LIBRTE_IEEE1588=y in
config/defconfig_arm64-dpaa2-linuxapp-gc

Signed-off-by: Priyanka Jain <priyanka.jain@nxp.com>
---
 config/defconfig_arm64-dpaa2-linuxapp-gcc    |   2 +-
 drivers/bus/fslmc/fslmc_bus.c                |   2 +
 drivers/bus/fslmc/fslmc_vfio.c               |   2 +
 drivers/bus/fslmc/rte_fslmc.h                |   1 +
 drivers/net/dpaa2/Makefile                   |   1 +
 drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h |   2 +-
 drivers/net/dpaa2/dpaa2_ethdev.c             |   9 +
 drivers/net/dpaa2/dpaa2_ethdev.h             |  27 ++-
 drivers/net/dpaa2/dpaa2_ptp.c                | 181 +++++++++++++++++++
 drivers/net/dpaa2/meson.build                |   1 +
 10 files changed, 225 insertions(+), 3 deletions(-)
 create mode 100644 drivers/net/dpaa2/dpaa2_ptp.c

diff --git a/config/defconfig_arm64-dpaa2-linuxapp-gcc b/config/defconfig_arm64-dpaa2-linuxapp-gcc
index b2543266a..5c7eddd5e 100644
--- a/config/defconfig_arm64-dpaa2-linuxapp-gcc
+++ b/config/defconfig_arm64-dpaa2-linuxapp-gcc
@@ -16,7 +16,7 @@ CONFIG_RTE_CACHE_LINE_SIZE=64
 CONFIG_RTE_PKTMBUF_HEADROOM=128
 
 # Enable IEEE1588, Keep it disable by default
-CONFIG_RTE_LIBRTE_IEEE1588=n
+CONFIG_RTE_LIBRTE_IEEE1588=y
 
 # Doesn't support NUMA
 CONFIG_RTE_EAL_NUMA_AWARE_HUGEPAGES=n
diff --git a/drivers/bus/fslmc/fslmc_bus.c b/drivers/bus/fslmc/fslmc_bus.c
index a2f482516..9b2dd51c4 100644
--- a/drivers/bus/fslmc/fslmc_bus.c
+++ b/drivers/bus/fslmc/fslmc_bus.c
@@ -191,6 +191,8 @@ scan_one_fslmc_device(char *dev_name)
 		dev->dev_type = DPAA2_QDMA;
 	else if (!strncmp("dpdmux", t_ptr, 6))
 		dev->dev_type = DPAA2_MUX;
+	else if (!strncmp("dprtc", t_ptr, 5))
+		dev->dev_type = DPAA2_DPRTC;
 	else
 		dev->dev_type = DPAA2_UNKNOWN;
 
diff --git a/drivers/bus/fslmc/fslmc_vfio.c b/drivers/bus/fslmc/fslmc_vfio.c
index 9658fd84d..60c51d80e 100644
--- a/drivers/bus/fslmc/fslmc_vfio.c
+++ b/drivers/bus/fslmc/fslmc_vfio.c
@@ -612,6 +612,7 @@ fslmc_process_iodevices(struct rte_dpaa2_device *dev)
 	case DPAA2_IO:
 	case DPAA2_CI:
 	case DPAA2_BPOOL:
+	case DPAA2_DPRTC:
 	case DPAA2_MUX:
 		TAILQ_FOREACH(object, &dpaa2_obj_list, next) {
 			if (dev->dev_type == object->dev_type)
@@ -768,6 +769,7 @@ fslmc_vfio_process_group(void)
 		case DPAA2_CON:
 		case DPAA2_CI:
 		case DPAA2_BPOOL:
+		case DPAA2_DPRTC:
 		case DPAA2_MUX:
 			/* IN case of secondary processes, all control objects
 			 * like dpbp, dpcon, dpci are not initialized/required
diff --git a/drivers/bus/fslmc/rte_fslmc.h b/drivers/bus/fslmc/rte_fslmc.h
index 5cfb24505..31dfd1377 100644
--- a/drivers/bus/fslmc/rte_fslmc.h
+++ b/drivers/bus/fslmc/rte_fslmc.h
@@ -67,6 +67,7 @@ enum rte_dpaa2_dev_type {
 	DPAA2_MPORTAL,  /**< DPMCP type device */
 	DPAA2_QDMA,     /**< DPDMAI type device */
 	DPAA2_MUX,	/**< DPDMUX type device */
+	DPAA2_DPRTC,	/**< DPRTC type device */
 	/* Unknown device placeholder */
 	DPAA2_UNKNOWN,
 	DPAA2_DEVTYPE_MAX,
diff --git a/drivers/net/dpaa2/Makefile b/drivers/net/dpaa2/Makefile
index 9b52fa1e5..0cc539dc5 100644
--- a/drivers/net/dpaa2/Makefile
+++ b/drivers/net/dpaa2/Makefile
@@ -38,6 +38,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += mc/dpni.c
 SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += mc/dpkg.c
 SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += mc/dpdmux.c
 SRCS-$(CONFIG_RTE_LIBRTE_IEEE1588)  += mc/dprtc.c
+SRCS-$(CONFIG_RTE_LIBRTE_IEEE1588)  += dpaa2_ptp.c
 
 LDLIBS += -lrte_bus_fslmc
 LDLIBS += -lrte_mempool_dpaa2
diff --git a/drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h b/drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h
index 0d6324183..699e4c089 100644
--- a/drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h
+++ b/drivers/net/dpaa2/base/dpaa2_hw_dpni_annot.h
@@ -279,7 +279,7 @@ struct dpaa2_faead {
 #define DPAA2_ETH_FAS_DISC	      0x80000000
 /* MACSEC frame */
 #define DPAA2_ETH_FAS_MS		0x40000000
-#define DPAA2_ETH_FAS_PTP	       0x08000000
+#define DPAA2_ETH_FAS_PTP	       BIT_POS(59)
 /* Ethernet multicast frame */
 #define DPAA2_ETH_FAS_MC		0x04000000
 /* Ethernet broadcast frame */
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 5ba8c911b..72832a0f6 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -2178,6 +2178,15 @@ static struct eth_dev_ops dpaa2_ethdev_ops = {
 	.rss_hash_update      = dpaa2_dev_rss_hash_update,
 	.rss_hash_conf_get    = dpaa2_dev_rss_hash_conf_get,
 	.filter_ctrl          = dpaa2_dev_flow_ctrl,
+#if defined(RTE_LIBRTE_IEEE1588)
+	.timesync_enable      = dpaa2_timesync_enable,
+	.timesync_disable     = dpaa2_timesync_disable,
+	.timesync_read_time   = dpaa2_timesync_read_time,
+	.timesync_write_time  = dpaa2_timesync_write_time,
+	.timesync_adjust_time = dpaa2_timesync_adjust_time,
+	.timesync_read_rx_timestamp = dpaa2_timesync_read_rx_timestamp,
+	.timesync_read_tx_timestamp = dpaa2_timesync_read_tx_timestamp,
+#endif
 };
 
 /* Populate the mac address from physically available (u-boot/firmware) and/or
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index 04a8ef8da..b51c35f89 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  *
  *   Copyright (c) 2015-2016 Freescale Semiconductor, Inc. All rights reserved.
- *   Copyright 2016 NXP
+ *   Copyright 2016-2019 NXP
  *
  */
 
@@ -130,6 +130,17 @@ struct dpaa2_dev_priv {
 		uint64_t qos_extract_param;
 		uint64_t fs_extract_param[MAX_TCS];
 	} extract;
+
+#if defined(RTE_LIBRTE_IEEE1588)
+	/*stores timestamp of last received packet on dev*/
+	uint64_t rx_timestamp;
+	/*stores timestamp of last received tx confirmation packet on dev*/
+	uint64_t tx_timestamp;
+	/* stores pointer to next tx_conf queue that should be processed,
+	 * it corresponds to last packet transmitted
+	 */
+	struct dpaa2_queue *next_tx_conf_queue;
+#endif
 	LIST_HEAD(, rte_flow) flows; /**< Configured flow rule handles. */
 };
 
@@ -182,4 +193,18 @@ void dpaa2_dev_free_eqresp_buf(uint16_t eqresp_ci);
 void dpaa2_flow_clean(struct rte_eth_dev *dev);
 uint16_t dpaa2_dev_tx_conf(void *queue)  __attribute__((unused));
 
+#if defined(RTE_LIBRTE_IEEE1588)
+int dpaa2_timesync_enable(struct rte_eth_dev *dev);
+int dpaa2_timesync_disable(struct rte_eth_dev *dev);
+int dpaa2_timesync_read_time(struct rte_eth_dev *dev,
+					struct timespec *timestamp);
+int dpaa2_timesync_write_time(struct rte_eth_dev *dev,
+					const struct timespec *timestamp);
+int dpaa2_timesync_adjust_time(struct rte_eth_dev *dev, int64_t delta);
+int dpaa2_timesync_read_rx_timestamp(struct rte_eth_dev *dev,
+						struct timespec *timestamp,
+						uint32_t flags __rte_unused);
+int dpaa2_timesync_read_tx_timestamp(struct rte_eth_dev *dev,
+					  struct timespec *timestamp);
+#endif
 #endif /* _DPAA2_ETHDEV_H */
diff --git a/drivers/net/dpaa2/dpaa2_ptp.c b/drivers/net/dpaa2/dpaa2_ptp.c
new file mode 100644
index 000000000..316912fe3
--- /dev/null
+++ b/drivers/net/dpaa2/dpaa2_ptp.c
@@ -0,0 +1,181 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2019 NXP
+ */
+
+#include <sys/queue.h>
+#include <stdio.h>
+#include <errno.h>
+#include <stdint.h>
+#include <string.h>
+#include <unistd.h>
+#include <stdarg.h>
+
+#include <rte_ethdev.h>
+#include <rte_log.h>
+#include <rte_eth_ctrl.h>
+#include <rte_malloc.h>
+#include <rte_time.h>
+
+#include <rte_fslmc.h>
+#include <fsl_dprtc.h>
+#include <fsl_dpkg.h>
+
+#include <dpaa2_ethdev.h>
+#include <dpaa2_pmd_logs.h>
+
+struct dpaa2_dprtc_dev {
+	struct fsl_mc_io dprtc;  /** handle to DPRTC portal object */
+	uint16_t token;
+	uint32_t dprtc_id; /*HW ID for DPRTC object */
+};
+static struct dpaa2_dprtc_dev *dprtc_dev;
+
+int dpaa2_timesync_enable(struct rte_eth_dev *dev __rte_unused)
+{
+	return 0;
+}
+
+int dpaa2_timesync_disable(struct rte_eth_dev *dev __rte_unused)
+{
+	return 0;
+}
+
+int dpaa2_timesync_read_time(struct rte_eth_dev *dev,
+					struct timespec *timestamp)
+{
+	uint64_t ns;
+	int ret = 0;
+
+	RTE_SET_USED(dev);
+
+	ret = dprtc_get_time(&dprtc_dev->dprtc, CMD_PRI_LOW,
+			     dprtc_dev->token, &ns);
+	if (ret) {
+		DPAA2_PMD_ERR("dprtc_get_time failed ret: %d", ret);
+		return ret;
+	}
+
+	*timestamp = rte_ns_to_timespec(ns);
+
+	return 0;
+}
+
+int dpaa2_timesync_write_time(struct rte_eth_dev *dev,
+					const struct timespec *ts)
+{
+	uint64_t ns;
+	int ret = 0;
+
+	RTE_SET_USED(dev);
+
+	ns = rte_timespec_to_ns(ts);
+
+	ret = dprtc_set_time(&dprtc_dev->dprtc, CMD_PRI_LOW,
+			     dprtc_dev->token, ns);
+	if (ret) {
+		DPAA2_PMD_ERR("dprtc_set_time failed ret: %d", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+int dpaa2_timesync_adjust_time(struct rte_eth_dev *dev, int64_t delta)
+{
+	uint64_t ns;
+	int ret = 0;
+
+	RTE_SET_USED(dev);
+
+	ret = dprtc_get_time(&dprtc_dev->dprtc, CMD_PRI_LOW,
+			     dprtc_dev->token, &ns);
+	if (ret) {
+		DPAA2_PMD_ERR("dprtc_get_time failed ret: %d", ret);
+		return ret;
+	}
+
+	ns += delta;
+
+	ret = dprtc_set_time(&dprtc_dev->dprtc, CMD_PRI_LOW,
+			     dprtc_dev->token, ns);
+	if (ret) {
+		DPAA2_PMD_ERR("dprtc_set_time failed ret: %d", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+int dpaa2_timesync_read_tx_timestamp(struct rte_eth_dev *dev,
+						struct timespec *timestamp)
+{
+	struct dpaa2_dev_priv *priv = dev->data->dev_private;
+
+	if (priv->next_tx_conf_queue)
+		dpaa2_dev_tx_conf(priv->next_tx_conf_queue);
+	else
+		return -1;
+	*timestamp = rte_ns_to_timespec(priv->tx_timestamp);
+
+	return 0;
+}
+
+int dpaa2_timesync_read_rx_timestamp(struct rte_eth_dev *dev,
+						struct timespec *timestamp,
+						uint32_t flags __rte_unused)
+{
+	struct dpaa2_dev_priv *priv = dev->data->dev_private;
+	*timestamp = rte_ns_to_timespec(priv->rx_timestamp);
+	return 0;
+}
+
+static int
+dpaa2_create_dprtc_device(int vdev_fd __rte_unused,
+			   struct vfio_device_info *obj_info __rte_unused,
+			   int dprtc_id)
+{
+	struct dprtc_attr attr;
+	int ret;
+
+	PMD_INIT_FUNC_TRACE();
+
+	/* Allocate DPAA2 dprtc handle */
+	dprtc_dev = rte_malloc(NULL, sizeof(struct dpaa2_dprtc_dev), 0);
+	if (!dprtc_dev) {
+		DPAA2_PMD_ERR("Memory allocation failed for DPRTC Device");
+		return -1;
+	}
+
+	/* Open the dprtc object */
+	dprtc_dev->dprtc.regs = rte_mcp_ptr_list[MC_PORTAL_INDEX];
+	ret = dprtc_open(&dprtc_dev->dprtc, CMD_PRI_LOW, dprtc_id,
+			  &dprtc_dev->token);
+	if (ret) {
+		DPAA2_PMD_ERR("Unable to open dprtc object: err(%d)", ret);
+		goto init_err;
+	}
+
+	ret = dprtc_get_attributes(&dprtc_dev->dprtc, CMD_PRI_LOW,
+				    dprtc_dev->token, &attr);
+	if (ret) {
+		DPAA2_PMD_ERR("Unable to get dprtc attr: err(%d)", ret);
+		goto init_err;
+	}
+
+	dprtc_dev->dprtc_id = dprtc_id;
+
+	return 0;
+
+init_err:
+	if (dprtc_dev)
+		rte_free(dprtc_dev);
+
+	return -1;
+}
+
+static struct rte_dpaa2_object rte_dpaa2_dprtc_obj = {
+	.dev_type = DPAA2_DPRTC,
+	.create = dpaa2_create_dprtc_device,
+};
+
+RTE_PMD_REGISTER_DPAA2_OBJECT(dprtc, rte_dpaa2_dprtc_obj);
diff --git a/drivers/net/dpaa2/meson.build b/drivers/net/dpaa2/meson.build
index 1184ce6b9..fc311e9f7 100644
--- a/drivers/net/dpaa2/meson.build
+++ b/drivers/net/dpaa2/meson.build
@@ -20,6 +20,7 @@ sources = files('base/dpaa2_hw_dpni.c',
 
 if dpdk_conf.has('RTE_LIBRTE_IEEE1588')
 	sources += files('mc/dprtc.c')
+	sources += files('dpaa2_ptp.c')
 endif
 
 includes += include_directories('base', 'mc')
-- 
2.17.1

[dpdk-dev] [PATCH v2 25/30] bus/fslmc: update PA-VA dpaax library only in PA mode

[Sachin Saxena]

From: Shreyansh Jain <shreyansh.jain@nxp.com>

The address translation support for PA->VA is required only in
case of PA mode operation of DPDK. This was causing warning to
be reported on running any DPAA2 application in VA mode:

    Add: Incorrect entry for PA->VA Table(xxxxxxxxxx)
    Add: Lowest address: xxxxxxxxxxxx

This was caused by call to update the DPAAX table when VA mode
was enabled, in which case the VA==IOVA address.

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Reviewed-by: Sachin Saxena <sachin.saxena@nxp.com>
---
 drivers/bus/fslmc/fslmc_bus.c | 8 ++++++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/drivers/bus/fslmc/fslmc_bus.c b/drivers/bus/fslmc/fslmc_bus.c
index 9b2dd51c4..aa90d686f 100644
--- a/drivers/bus/fslmc/fslmc_bus.c
+++ b/drivers/bus/fslmc/fslmc_bus.c
@@ -421,8 +421,11 @@ rte_fslmc_probe(void)
 	 *
 	 * Error is ignored as relevant logs are handled within dpaax and
 	 * handling for unavailable dpaax table too is transparent to caller.
+	 *
+	 * And, the IOVA table is only applicable in case of PA mode.
 	 */
-	dpaax_iova_table_populate();
+	if (rte_eal_iova_mode() == RTE_IOVA_PA)
+		dpaax_iova_table_populate();
 
 	TAILQ_FOREACH(dev, &rte_fslmc_bus.device_list, next) {
 		TAILQ_FOREACH(drv, &rte_fslmc_bus.driver_list, next) {
@@ -519,7 +522,8 @@ rte_fslmc_driver_unregister(struct rte_dpaa2_driver *driver)
 	/* Cleanup the PA->VA Translation table; From whereever this function
 	 * is called from.
 	 */
-	dpaax_iova_table_depopulate();
+	if (rte_eal_iova_mode() == RTE_IOVA_PA)
+		dpaax_iova_table_depopulate();
 
 	TAILQ_REMOVE(&fslmc_bus->driver_list, driver, next);
 	/* Update Bus references */
-- 
2.17.1

[dpdk-dev] [PATCH v2 26/30] bus/fslmc: check for Dma map in primary process only

[Sachin Saxena]

From: Shreyansh Jain <shreyansh.jain@nxp.com>

DMA mapping is a property of primary process - SMMU population done
once by primary doesn't need to be populated again in secondary

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Reviewed-by: Sachin Saxena <sachin.saxena@nxp.com>
---
 drivers/bus/fslmc/fslmc_bus.c | 15 +++++++++------
 1 file changed, 9 insertions(+), 6 deletions(-)

diff --git a/drivers/bus/fslmc/fslmc_bus.c b/drivers/bus/fslmc/fslmc_bus.c
index aa90d686f..9226d5b62 100644
--- a/drivers/bus/fslmc/fslmc_bus.c
+++ b/drivers/bus/fslmc/fslmc_bus.c
@@ -395,12 +395,15 @@ rte_fslmc_probe(void)
 	/* Map existing segments as well as, in case of hotpluggable memory,
 	 * install callback handler.
 	 */
-	ret = rte_fslmc_vfio_dmamap();
-	if (ret) {
-		DPAA2_BUS_ERR("Unable to DMA map existing VAs: (%d)", ret);
-		/* Not continuing ahead */
-		DPAA2_BUS_ERR("FSLMC VFIO Mapping failed");
-		return 0;
+	if (rte_eal_process_type() == RTE_PROC_PRIMARY) {
+		ret = rte_fslmc_vfio_dmamap();
+		if (ret) {
+			DPAA2_BUS_ERR("Unable to DMA map existing VAs: (%d)",
+				      ret);
+			/* Not continuing ahead */
+			DPAA2_BUS_ERR("FSLMC VFIO Mapping failed");
+			return 0;
+		}
 	}
 
 	ret = fslmc_vfio_process_group();
-- 
2.17.1

[dpdk-dev] [PATCH v2 27/30] bus/fslmc: support multi vfio group

[Sachin Saxena]

From: Hemant Agrawal <hemant.agrawal@nxp.com>

DPAA2 support VFIO device passthrough in VM.
However in this case, each device is associated with different vfio group.

This code required different container id for each group.
On using the same container fd the second time,
ioctl calls are returning error.

Signed-off-by: Hemant Agrawal <hemant.agrawal@nxp.com>
---
 drivers/bus/fslmc/fslmc_bus.c  |   7 +-
 drivers/bus/fslmc/fslmc_vfio.c | 160 ++++++++++++++++++++++++++-------
 drivers/bus/fslmc/fslmc_vfio.h |   3 +
 3 files changed, 133 insertions(+), 37 deletions(-)

diff --git a/drivers/bus/fslmc/fslmc_bus.c b/drivers/bus/fslmc/fslmc_bus.c
index 9226d5b62..eff15f25d 100644
--- a/drivers/bus/fslmc/fslmc_bus.c
+++ b/drivers/bus/fslmc/fslmc_bus.c
@@ -1,6 +1,6 @@
 /* SPDX-License-Identifier: BSD-3-Clause
  *
- *   Copyright 2016,2018 NXP
+ *   Copyright 2016,2018-2019 NXP
  *
  */
 
@@ -325,8 +325,7 @@ rte_fslmc_scan(void)
 		goto scan_fail;
 
 	/* Scan devices on the group */
-	snprintf(fslmc_dirpath, sizeof(fslmc_dirpath), "%s/%d/devices",
-			VFIO_IOMMU_GROUP_PATH, groupid);
+	sprintf(fslmc_dirpath, "%s/%s", SYSFS_FSL_MC_DEVICES, fslmc_container);
 	dir = opendir(fslmc_dirpath);
 	if (!dir) {
 		DPAA2_BUS_ERR("Unable to open VFIO group directory");
@@ -334,7 +333,7 @@ rte_fslmc_scan(void)
 	}
 
 	while ((entry = readdir(dir)) != NULL) {
-		if (entry->d_name[0] == '.' || entry->d_type != DT_LNK)
+		if (entry->d_name[0] == '.' || entry->d_type != DT_DIR)
 			continue;
 
 		ret = scan_one_fslmc_device(entry->d_name);
diff --git a/drivers/bus/fslmc/fslmc_vfio.c b/drivers/bus/fslmc/fslmc_vfio.c
index 60c51d80e..970969d2b 100644
--- a/drivers/bus/fslmc/fslmc_vfio.c
+++ b/drivers/bus/fslmc/fslmc_vfio.c
@@ -40,16 +40,13 @@
 #include "portal/dpaa2_hw_pvt.h"
 #include "portal/dpaa2_hw_dpio.h"
 
-/** Pathname of FSL-MC devices directory. */
-#define SYSFS_FSL_MC_DEVICES "/sys/bus/fsl-mc/devices"
-
 #define FSLMC_CONTAINER_MAX_LEN 8 /**< Of the format dprc.XX */
 
 /* Number of VFIO containers & groups with in */
 static struct fslmc_vfio_group vfio_group;
 static struct fslmc_vfio_container vfio_container;
 static int container_device_fd;
-static char *fslmc_container;
+char *fslmc_container;
 static int fslmc_iommu_type;
 static uint32_t *msi_intr_vaddr;
 void *(*rte_mcp_ptr_list);
@@ -435,28 +432,136 @@ int rte_fslmc_vfio_dmamap(void)
 	return 0;
 }
 
-static int64_t vfio_map_mcp_obj(struct fslmc_vfio_group *group, char *mcp_obj)
+static int
+fslmc_vfio_setup_device(const char *sysfs_base, const char *dev_addr,
+		int *vfio_dev_fd, struct vfio_device_info *device_info)
+{
+	struct vfio_group_status group_status = {
+			.argsz = sizeof(group_status)
+	};
+	int vfio_group_fd, vfio_container_fd, iommu_group_no, ret;
+
+	/* get group number */
+	ret = rte_vfio_get_group_num(sysfs_base, dev_addr, &iommu_group_no);
+	if (ret < 0)
+		return -1;
+
+	/* get the actual group fd */
+	vfio_group_fd = rte_vfio_get_group_fd(iommu_group_no);
+	if (vfio_group_fd < 0)
+		return -1;
+
+	/* if group_fd == 0, that means the device isn't managed by VFIO */
+	if (vfio_group_fd == 0) {
+		RTE_LOG(WARNING, EAL, " %s not managed by VFIO driver, skipping\n",
+				dev_addr);
+		return 1;
+	}
+
+	/* Opens main vfio file descriptor which represents the "container" */
+	vfio_container_fd = rte_vfio_get_container_fd();
+	if (vfio_container_fd < 0) {
+		DPAA2_BUS_ERR("Failed to open VFIO container");
+		return -errno;
+	}
+
+	/* check if the group is viable */
+	ret = ioctl(vfio_group_fd, VFIO_GROUP_GET_STATUS, &group_status);
+	if (ret) {
+		DPAA2_BUS_ERR("  %s cannot get group status, "
+				"error %i (%s)\n", dev_addr,
+				errno, strerror(errno));
+		close(vfio_group_fd);
+		rte_vfio_clear_group(vfio_group_fd);
+		return -1;
+	} else if (!(group_status.flags & VFIO_GROUP_FLAGS_VIABLE)) {
+		DPAA2_BUS_ERR("  %s VFIO group is not viable!\n", dev_addr);
+		close(vfio_group_fd);
+		rte_vfio_clear_group(vfio_group_fd);
+		return -1;
+	}
+	/* At this point, we know that this group is viable (meaning,
+	 * all devices are either bound to VFIO or not bound to anything)
+	 */
+
+	/* check if group does not have a container yet */
+	if (!(group_status.flags & VFIO_GROUP_FLAGS_CONTAINER_SET)) {
+
+		/* add group to a container */
+		ret = ioctl(vfio_group_fd, VFIO_GROUP_SET_CONTAINER,
+				&vfio_container_fd);
+		if (ret) {
+			DPAA2_BUS_ERR("  %s cannot add VFIO group to container, "
+					"error %i (%s)\n", dev_addr,
+					errno, strerror(errno));
+			close(vfio_group_fd);
+			close(vfio_container_fd);
+			rte_vfio_clear_group(vfio_group_fd);
+			return -1;
+		}
+
+		/*
+		 * set an IOMMU type for container
+		 *
+		 */
+		if (ioctl(vfio_container_fd, VFIO_CHECK_EXTENSION,
+			  fslmc_iommu_type)) {
+			ret = ioctl(vfio_container_fd, VFIO_SET_IOMMU,
+				    fslmc_iommu_type);
+			if (ret) {
+				DPAA2_BUS_ERR("Failed to setup VFIO iommu");
+				close(vfio_group_fd);
+				close(vfio_container_fd);
+				return -errno;
+			}
+		} else {
+			DPAA2_BUS_ERR("No supported IOMMU available");
+			close(vfio_group_fd);
+			close(vfio_container_fd);
+			return -EINVAL;
+		}
+	}
+
+	/* get a file descriptor for the device */
+	*vfio_dev_fd = ioctl(vfio_group_fd, VFIO_GROUP_GET_DEVICE_FD, dev_addr);
+	if (*vfio_dev_fd < 0) {
+		/* if we cannot get a device fd, this implies a problem with
+		 * the VFIO group or the container not having IOMMU configured.
+		 */
+
+		DPAA2_BUS_WARN("Getting a vfio_dev_fd for %s failed", dev_addr);
+		close(vfio_group_fd);
+		close(vfio_container_fd);
+		rte_vfio_clear_group(vfio_group_fd);
+		return -1;
+	}
+
+	/* test and setup the device */
+	ret = ioctl(*vfio_dev_fd, VFIO_DEVICE_GET_INFO, device_info);
+	if (ret) {
+		DPAA2_BUS_ERR("  %s cannot get device info, error %i (%s)",
+				dev_addr, errno, strerror(errno));
+		close(*vfio_dev_fd);
+		close(vfio_group_fd);
+		close(vfio_container_fd);
+		rte_vfio_clear_group(vfio_group_fd);
+		return -1;
+	}
+
+	return 0;
+}
+
+static intptr_t vfio_map_mcp_obj(const char *mcp_obj)
 {
 	intptr_t v_addr = (intptr_t)MAP_FAILED;
 	int32_t ret, mc_fd;
+	struct vfio_group_status status = { .argsz = sizeof(status) };
 
 	struct vfio_device_info d_info = { .argsz = sizeof(d_info) };
 	struct vfio_region_info reg_info = { .argsz = sizeof(reg_info) };
 
-	/* getting the mcp object's fd*/
-	mc_fd = ioctl(group->fd, VFIO_GROUP_GET_DEVICE_FD, mcp_obj);
-	if (mc_fd < 0) {
-		DPAA2_BUS_ERR("Error in VFIO get dev %s fd from group %d",
-			      mcp_obj, group->fd);
-		return v_addr;
-	}
-
-	/* getting device info*/
-	ret = ioctl(mc_fd, VFIO_DEVICE_GET_INFO, &d_info);
-	if (ret < 0) {
-		DPAA2_BUS_ERR("Error in VFIO getting DEVICE_INFO");
-		goto MC_FAILURE;
-	}
+	fslmc_vfio_setup_device(SYSFS_FSL_MC_DEVICES, mcp_obj,
+			&mc_fd, &d_info);
 
 	/* getting device region info*/
 	ret = ioctl(mc_fd, VFIO_DEVICE_GET_REGION_INFO, &reg_info);
@@ -589,19 +694,8 @@ fslmc_process_iodevices(struct rte_dpaa2_device *dev)
 	struct vfio_device_info device_info = { .argsz = sizeof(device_info) };
 	struct rte_dpaa2_object *object = NULL;
 
-	dev_fd = ioctl(vfio_group.fd, VFIO_GROUP_GET_DEVICE_FD,
-		       dev->device.name);
-	if (dev_fd <= 0) {
-		DPAA2_BUS_ERR("Unable to obtain device FD for device:%s",
-			      dev->device.name);
-		return -1;
-	}
-
-	if (ioctl(dev_fd, VFIO_DEVICE_GET_INFO, &device_info)) {
-		DPAA2_BUS_ERR("Unable to obtain information for device:%s",
-			      dev->device.name);
-		return -1;
-	}
+	fslmc_vfio_setup_device(SYSFS_FSL_MC_DEVICES, dev->device.name,
+			&dev_fd, &device_info);
 
 	switch (dev->dev_type) {
 	case DPAA2_ETH:
@@ -654,7 +748,7 @@ fslmc_process_mcp(struct rte_dpaa2_device *dev)
 		goto cleanup;
 	}
 
-	v_addr = vfio_map_mcp_obj(&vfio_group, dev_name);
+	v_addr = vfio_map_mcp_obj(dev->device.name);
 	if (v_addr == (intptr_t)MAP_FAILED) {
 		DPAA2_BUS_ERR("Error mapping region (errno = %d)", errno);
 		ret = -1;
diff --git a/drivers/bus/fslmc/fslmc_vfio.h b/drivers/bus/fslmc/fslmc_vfio.h
index e877255ea..c98812129 100644
--- a/drivers/bus/fslmc/fslmc_vfio.h
+++ b/drivers/bus/fslmc/fslmc_vfio.h
@@ -10,6 +10,8 @@
 
 #include <rte_vfio.h>
 
+/* Pathname of FSL-MC devices directory. */
+#define SYSFS_FSL_MC_DEVICES	"/sys/bus/fsl-mc/devices"
 #define DPAA2_MC_DPNI_DEVID	7
 #define DPAA2_MC_DPSECI_DEVID	3
 #define DPAA2_MC_DPCON_DEVID	5
@@ -38,6 +40,7 @@ typedef struct fslmc_vfio_container {
 	struct fslmc_vfio_group *group;
 } fslmc_vfio_container;
 
+extern char *fslmc_container;
 int rte_dpaa2_intr_enable(struct rte_intr_handle *intr_handle, int index);
 int rte_dpaa2_intr_disable(struct rte_intr_handle *intr_handle, int index);
 
-- 
2.17.1

[dpdk-dev] [PATCH v2 28/30] net/dpaa2: support separate MC portal per process

[Sachin Saxena]

From: Shreyansh Jain <shreyansh.jain@nxp.com>

Earlier, there was a single MCP handle which was available across
complete DPAA2 driver as well as part of the dev_private which was
shared by the secondary process.

For secondary, that is not valid and it would require to open its
own handle for the MC. This is eventually used as part of the DPNI
configuration.

By using the process_private member of the rte_eth_dev, it is
possible to keep separate handles per process. Without worry of
overwriting when secondary process accesses the dev_private.

Signed-off-by: Shreyansh Jain <shreyansh.jain@nxp.com>
Reviewed-by: Sachin Saxena <sachin.saxena@nxp.com>
---
 drivers/net/dpaa2/dpaa2_ethdev.c | 108 ++++++++++++++++---------------
 drivers/net/dpaa2/dpaa2_ethdev.h |   3 +
 2 files changed, 59 insertions(+), 52 deletions(-)

diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 72832a0f6..2fb65685d 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -117,7 +117,7 @@ dpaa2_vlan_filter_set(struct rte_eth_dev *dev, uint16_t vlan_id, int on)
 {
 	int ret;
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = priv->hw;
+	struct fsl_mc_io *dpni = dev->process_private;
 
 	PMD_INIT_FUNC_TRACE();
 
@@ -144,7 +144,7 @@ static int
 dpaa2_vlan_offload_set(struct rte_eth_dev *dev, int mask)
 {
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = priv->hw;
+	struct fsl_mc_io *dpni = dev->process_private;
 	int ret;
 
 	PMD_INIT_FUNC_TRACE();
@@ -182,7 +182,7 @@ dpaa2_vlan_tpid_set(struct rte_eth_dev *dev,
 		      uint16_t tpid)
 {
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = priv->hw;
+	struct fsl_mc_io *dpni = dev->process_private;
 	int ret = -ENOTSUP;
 
 	PMD_INIT_FUNC_TRACE();
@@ -220,8 +220,7 @@ dpaa2_fw_version_get(struct rte_eth_dev *dev,
 		     size_t fw_size)
 {
 	int ret;
-	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = priv->hw;
+	struct fsl_mc_io *dpni = dev->process_private;
 	struct mc_soc_version mc_plat_info = {0};
 	struct mc_version mc_ver_info = {0};
 
@@ -428,7 +427,7 @@ static int
 dpaa2_eth_dev_configure(struct rte_eth_dev *dev)
 {
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = priv->hw;
+	struct fsl_mc_io *dpni = dev->process_private;
 	struct rte_eth_conf *eth_conf = &dev->data->dev_conf;
 	uint64_t rx_offloads = eth_conf->rxmode.offloads;
 	uint64_t tx_offloads = eth_conf->txmode.offloads;
@@ -568,7 +567,7 @@ dpaa2_dev_rx_queue_setup(struct rte_eth_dev *dev,
 			 struct rte_mempool *mb_pool)
 {
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 	struct dpaa2_queue *dpaa2_q;
 	struct dpni_queue cfg;
 	uint8_t options = 0;
@@ -716,7 +715,7 @@ dpaa2_dev_tx_queue_setup(struct rte_eth_dev *dev,
 		priv->tx_vq[tx_queue_id];
 	struct dpaa2_queue *dpaa2_tx_conf_q = (struct dpaa2_queue *)
 		priv->tx_conf_vq[tx_queue_id];
-	struct fsl_mc_io *dpni = priv->hw;
+	struct fsl_mc_io *dpni = dev->process_private;
 	struct dpni_queue tx_conf_cfg;
 	struct dpni_queue tx_flow_cfg;
 	uint8_t options = 0, flow_id;
@@ -842,7 +841,8 @@ dpaa2_dev_rx_queue_release(void *q __rte_unused)
 {
 	struct dpaa2_queue *dpaa2_q = (struct dpaa2_queue *)q;
 	struct dpaa2_dev_priv *priv = dpaa2_q->eth_data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni =
+		(struct fsl_mc_io *)priv->eth_dev->process_private;
 	uint8_t options = 0;
 	int ret;
 	struct dpni_queue cfg;
@@ -940,7 +940,7 @@ dpaa2_interrupt_handler(void *param)
 {
 	struct rte_eth_dev *dev = param;
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 	int ret;
 	int irq_index = DPNI_IRQ_INDEX;
 	unsigned int status = 0, clear = 0;
@@ -979,7 +979,7 @@ dpaa2_eth_setup_irqs(struct rte_eth_dev *dev, int enable)
 {
 	int err = 0;
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 	int irq_index = DPNI_IRQ_INDEX;
 	unsigned int mask = DPNI_IRQ_EVENT_LINK_CHANGED;
 
@@ -1009,7 +1009,7 @@ dpaa2_dev_start(struct rte_eth_dev *dev)
 	struct rte_dpaa2_device *dpaa2_dev;
 	struct rte_eth_dev_data *data = dev->data;
 	struct dpaa2_dev_priv *priv = data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 	struct dpni_queue cfg;
 	struct dpni_error_cfg	err_cfg;
 	uint16_t qdid;
@@ -1102,7 +1102,7 @@ static void
 dpaa2_dev_stop(struct rte_eth_dev *dev)
 {
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 	int ret;
 	struct rte_eth_link link;
 	struct rte_intr_handle *intr_handle = dev->intr_handle;
@@ -1142,7 +1142,7 @@ static void
 dpaa2_dev_close(struct rte_eth_dev *dev)
 {
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 	int ret;
 	struct rte_eth_link link;
 
@@ -1167,7 +1167,7 @@ dpaa2_dev_promiscuous_enable(
 {
 	int ret;
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 
 	PMD_INIT_FUNC_TRACE();
 
@@ -1191,7 +1191,7 @@ dpaa2_dev_promiscuous_disable(
 {
 	int ret;
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 
 	PMD_INIT_FUNC_TRACE();
 
@@ -1219,7 +1219,7 @@ dpaa2_dev_allmulticast_enable(
 {
 	int ret;
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 
 	PMD_INIT_FUNC_TRACE();
 
@@ -1238,7 +1238,7 @@ dpaa2_dev_allmulticast_disable(struct rte_eth_dev *dev)
 {
 	int ret;
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 
 	PMD_INIT_FUNC_TRACE();
 
@@ -1261,7 +1261,7 @@ dpaa2_dev_mtu_set(struct rte_eth_dev *dev, uint16_t mtu)
 {
 	int ret;
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 	uint32_t frame_size = mtu + RTE_ETHER_HDR_LEN + RTE_ETHER_CRC_LEN
 				+ VLAN_TAG_SIZE;
 
@@ -1306,7 +1306,7 @@ dpaa2_dev_add_mac_addr(struct rte_eth_dev *dev,
 {
 	int ret;
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 
 	PMD_INIT_FUNC_TRACE();
 
@@ -1329,7 +1329,7 @@ dpaa2_dev_remove_mac_addr(struct rte_eth_dev *dev,
 {
 	int ret;
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 	struct rte_eth_dev_data *data = dev->data;
 	struct rte_ether_addr *macaddr;
 
@@ -1355,7 +1355,7 @@ dpaa2_dev_set_mac_addr(struct rte_eth_dev *dev,
 {
 	int ret;
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 
 	PMD_INIT_FUNC_TRACE();
 
@@ -1379,7 +1379,7 @@ int dpaa2_dev_stats_get(struct rte_eth_dev *dev,
 			 struct rte_eth_stats *stats)
 {
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 	int32_t  retcode;
 	uint8_t page0 = 0, page1 = 1, page2 = 2;
 	union dpni_statistics value;
@@ -1459,7 +1459,7 @@ dpaa2_dev_xstats_get(struct rte_eth_dev *dev, struct rte_eth_xstat *xstats,
 		     unsigned int n)
 {
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 	int32_t  retcode;
 	union dpni_statistics value[5] = {};
 	unsigned int i = 0, num = RTE_DIM(dpaa2_xstats_strings);
@@ -1539,7 +1539,8 @@ dpaa2_xstats_get_by_id(struct rte_eth_dev *dev, const uint64_t *ids,
 
 	if (!ids) {
 		struct dpaa2_dev_priv *priv = dev->data->dev_private;
-		struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+		struct fsl_mc_io *dpni =
+			(struct fsl_mc_io *)dev->process_private;
 		int32_t  retcode;
 		union dpni_statistics value[5] = {};
 
@@ -1621,7 +1622,7 @@ static void
 dpaa2_dev_stats_reset(struct rte_eth_dev *dev)
 {
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 	int32_t  retcode;
 	int i;
 	struct dpaa2_queue *dpaa2_q;
@@ -1664,7 +1665,7 @@ dpaa2_dev_link_update(struct rte_eth_dev *dev,
 {
 	int ret;
 	struct dpaa2_dev_priv *priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 	struct rte_eth_link link;
 	struct dpni_link_state state = {0};
 
@@ -1712,7 +1713,7 @@ dpaa2_dev_set_link_up(struct rte_eth_dev *dev)
 	struct dpni_link_state state = {0};
 
 	priv = dev->data->dev_private;
-	dpni = (struct fsl_mc_io *)priv->hw;
+	dpni = (struct fsl_mc_io *)dev->process_private;
 
 	if (dpni == NULL) {
 		DPAA2_PMD_ERR("dpni is NULL");
@@ -1768,7 +1769,7 @@ dpaa2_dev_set_link_down(struct rte_eth_dev *dev)
 	PMD_INIT_FUNC_TRACE();
 
 	priv = dev->data->dev_private;
-	dpni = (struct fsl_mc_io *)priv->hw;
+	dpni = (struct fsl_mc_io *)dev->process_private;
 
 	if (dpni == NULL) {
 		DPAA2_PMD_ERR("Device has not yet been configured");
@@ -1822,7 +1823,7 @@ dpaa2_flow_ctrl_get(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
 	PMD_INIT_FUNC_TRACE();
 
 	priv = dev->data->dev_private;
-	dpni = (struct fsl_mc_io *)priv->hw;
+	dpni = (struct fsl_mc_io *)dev->process_private;
 
 	if (dpni == NULL || fc_conf == NULL) {
 		DPAA2_PMD_ERR("device not configured");
@@ -1878,7 +1879,7 @@ dpaa2_flow_ctrl_set(struct rte_eth_dev *dev, struct rte_eth_fc_conf *fc_conf)
 	PMD_INIT_FUNC_TRACE();
 
 	priv = dev->data->dev_private;
-	dpni = (struct fsl_mc_io *)priv->hw;
+	dpni = (struct fsl_mc_io *)dev->process_private;
 
 	if (dpni == NULL) {
 		DPAA2_PMD_ERR("dpni is NULL");
@@ -1998,7 +1999,7 @@ int dpaa2_eth_eventq_attach(const struct rte_eth_dev *dev,
 		const struct rte_event_eth_rx_adapter_queue_conf *queue_conf)
 {
 	struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 	struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
 	uint8_t flow_id = dpaa2_ethq->flow_id;
 	struct dpni_queue cfg;
@@ -2079,7 +2080,7 @@ int dpaa2_eth_eventq_detach(const struct rte_eth_dev *dev,
 		int eth_rx_queue_id)
 {
 	struct dpaa2_dev_priv *eth_priv = dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)dev->process_private;
 	struct dpaa2_queue *dpaa2_ethq = eth_priv->rx_vq[eth_rx_queue_id];
 	uint8_t flow_id = dpaa2_ethq->flow_id;
 	struct dpni_queue cfg;
@@ -2308,6 +2309,14 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
 
 	PMD_INIT_FUNC_TRACE();
 
+	dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0);
+	if (!dpni_dev) {
+		DPAA2_PMD_ERR("Memory allocation failed for dpni device");
+		return -1;
+	}
+	dpni_dev->regs = rte_mcp_ptr_list[0];
+	eth_dev->process_private = (void *)dpni_dev;
+
 	/* For secondary processes, the primary has done all the work */
 	if (rte_eal_process_type() != RTE_PROC_PRIMARY) {
 		/* In case of secondary, only burst and ops API need to be
@@ -2328,14 +2337,6 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
 	dpaa2_dev = container_of(dev, struct rte_dpaa2_device, device);
 
 	hw_id = dpaa2_dev->object_id;
-
-	dpni_dev = rte_malloc(NULL, sizeof(struct fsl_mc_io), 0);
-	if (!dpni_dev) {
-		DPAA2_PMD_ERR("Memory allocation failed for dpni device");
-		return -1;
-	}
-
-	dpni_dev->regs = rte_mcp_ptr_list[0];
 	ret = dpni_open(dpni_dev, CMD_PRI_LOW, hw_id, &priv->token);
 	if (ret) {
 		DPAA2_PMD_ERR(
@@ -2509,7 +2510,7 @@ static int
 dpaa2_dev_uninit(struct rte_eth_dev *eth_dev)
 {
 	struct dpaa2_dev_priv *priv = eth_dev->data->dev_private;
-	struct fsl_mc_io *dpni = (struct fsl_mc_io *)priv->hw;
+	struct fsl_mc_io *dpni = (struct fsl_mc_io *)eth_dev->process_private;
 	int i, ret;
 
 	PMD_INIT_FUNC_TRACE();
@@ -2536,6 +2537,7 @@ dpaa2_dev_uninit(struct rte_eth_dev *eth_dev)
 
 	/* Free the allocated memory for ethernet private data and dpni*/
 	priv->hw = NULL;
+	eth_dev->process_private = NULL;
 	rte_free(dpni);
 
 	for (i = 0; i < MAX_TCS; i++) {
@@ -2559,7 +2561,7 @@ rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
 		struct rte_dpaa2_device *dpaa2_dev)
 {
 	struct rte_eth_dev *eth_dev;
-	struct dpaa2_dev_priv *priv;
+	struct dpaa2_dev_priv *dev_priv;
 	int diag;
 
 	if ((DPAA2_MBUF_HW_ANNOTATION + DPAA2_FD_PTA_SIZE) >
@@ -2576,20 +2578,25 @@ rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
 		eth_dev = rte_eth_dev_allocate(dpaa2_dev->device.name);
 		if (!eth_dev)
 			return -ENODEV;
-		eth_dev->data->dev_private = rte_zmalloc(
-						"ethdev private structure",
-						sizeof(struct dpaa2_dev_priv),
-						RTE_CACHE_LINE_SIZE);
-		if (eth_dev->data->dev_private == NULL) {
+		dev_priv = rte_zmalloc("ethdev private structure",
+				       sizeof(struct dpaa2_dev_priv),
+				       RTE_CACHE_LINE_SIZE);
+		if (dev_priv == NULL) {
 			DPAA2_PMD_CRIT(
 				"Unable to allocate memory for private data");
 			rte_eth_dev_release_port(eth_dev);
 			return -ENOMEM;
 		}
+		eth_dev->data->dev_private = (void *)dev_priv;
+		/* Store a pointer to eth_dev in dev_private */
+		dev_priv->eth_dev = eth_dev;
+		dev_priv->tx_conf_en = 0;
 	} else {
 		eth_dev = rte_eth_dev_attach_secondary(dpaa2_dev->device.name);
-		if (!eth_dev)
+		if (!eth_dev) {
+			DPAA2_PMD_DEBUG("returning enodev");
 			return -ENODEV;
+		}
 	}
 
 	eth_dev->device = &dpaa2_dev->device;
@@ -2607,9 +2614,6 @@ rte_dpaa2_probe(struct rte_dpaa2_driver *dpaa2_drv,
 		return 0;
 	}
 
-	priv = eth_dev->data->dev_private;
-	priv->tx_conf_en = 0;
-
 	rte_eth_dev_release_port(eth_dev);
 	return diag;
 }
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index b51c35f89..bcb8360be 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -141,6 +141,9 @@ struct dpaa2_dev_priv {
 	 */
 	struct dpaa2_queue *next_tx_conf_queue;
 #endif
+
+	struct rte_eth_dev *eth_dev; /**< Pointer back to holding ethdev */
+
 	LIST_HEAD(, rte_flow) flows; /**< Configured flow rule handles. */
 };
 
-- 
2.17.1

[dpdk-dev] [PATCH v2 29/30] net/dpaa2: add support for soft parser in MC

[Sachin Saxena]

From: Sunil Kumar Kori <sunil.kori@nxp.com>

Signed-off-by: Sunil Kumar Kori <sunil.kori@nxp.com>
Reviewed-by: Sachin Saxena <sachin.saxena@nxp.com>
---
 drivers/net/dpaa2/mc/dpni.c         | 117 ++++++++++++++++++++++++
 drivers/net/dpaa2/mc/fsl_dpni.h     | 133 ++++++++++++++++++++++++++++
 drivers/net/dpaa2/mc/fsl_dpni_cmd.h |  43 ++++++++-
 3 files changed, 292 insertions(+), 1 deletion(-)

diff --git a/drivers/net/dpaa2/mc/dpni.c b/drivers/net/dpaa2/mc/dpni.c
index 362cd476f..b37f9976f 100644
--- a/drivers/net/dpaa2/mc/dpni.c
+++ b/drivers/net/dpaa2/mc/dpni.c
@@ -2484,3 +2484,120 @@ int dpni_get_custom_tpid(struct fsl_mc_io *mc_io, uint32_t cmd_flags,
 
 	return err;
 }
+
+int dpni_load_sw_sequence(struct fsl_mc_io *mc_io,
+	      uint32_t cmd_flags,
+	      uint16_t token,
+		  struct dpni_load_ss_cfg *cfg)
+{
+	struct dpni_load_sw_sequence *cmd_params;
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPNI_CMDID_LOAD_SW_SEQUENCE,
+					  cmd_flags,
+					  token);
+	cmd_params = (struct dpni_load_sw_sequence *)cmd.params;
+	cmd_params->dest = cfg->dest;
+	cmd_params->ss_offset = cpu_to_le16(cfg->ss_offset);
+	cmd_params->ss_size = cpu_to_le16(cfg->ss_size);
+	cmd_params->ss_iova = cpu_to_le64(cfg->ss_iova);
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+int dpni_enable_sw_sequence(struct fsl_mc_io *mc_io,
+	      uint32_t cmd_flags,
+	      uint16_t token,
+		  struct dpni_enable_ss_cfg *cfg)
+{
+	struct dpni_enable_sw_sequence *cmd_params;
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPNI_CMDID_ENABLE_SW_SEQUENCE,
+					  cmd_flags,
+					  token);
+	cmd_params = (struct dpni_enable_sw_sequence *)cmd.params;
+	cmd_params->dest = cfg->dest;
+	cmd_params->set_start = cfg->set_start;
+	cmd_params->hxs = cpu_to_le16(cfg->hxs);
+	cmd_params->ss_offset = cpu_to_le16(cfg->ss_offset);
+	cmd_params->param_offset = cfg->param_offset;
+	cmd_params->param_size = cfg->param_size;
+	cmd_params->param_iova = cpu_to_le64(cfg->param_iova);
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dpni_get_sw_sequence_layout() - Get the soft sequence layout
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPNI object
+ * @src:	Source of the layout (WRIOP Rx or Tx)
+ * @ss_layout_iova:  I/O virtual address of 264 bytes DMA-able memory
+ *
+ * warning: After calling this function, call dpni_extract_sw_sequence_layout()
+ *		to get the layout.
+ *
+ * Return:	'0' on Success; error code otherwise.
+ */
+int dpni_get_sw_sequence_layout(struct fsl_mc_io *mc_io,
+	      uint32_t cmd_flags,
+	      uint16_t token,
+		  enum dpni_soft_sequence_dest src,
+		  uint64_t ss_layout_iova)
+{
+	struct dpni_get_sw_sequence_layout *cmd_params;
+	struct mc_command cmd = { 0 };
+
+	/* prepare command */
+	cmd.header = mc_encode_cmd_header(DPNI_CMDID_GET_SW_SEQUENCE_LAYOUT,
+					  cmd_flags,
+					  token);
+
+	cmd_params = (struct dpni_get_sw_sequence_layout *)cmd.params;
+	cmd_params->src = src;
+	cmd_params->layout_iova = cpu_to_le64(ss_layout_iova);
+
+	/* send command to mc*/
+	return mc_send_command(mc_io, &cmd);
+}
+
+/**
+ * dpni_extract_sw_sequence_layout() - extract the software sequence layout
+ * @layout:		software sequence layout
+ * @sw_sequence_layout_buf:	Zeroed 264 bytes of memory before mapping it
+ *				to DMA
+ *
+ * This function has to be called after dpni_get_sw_sequence_layout
+ *
+ */
+void dpni_extract_sw_sequence_layout(struct dpni_sw_sequence_layout *layout,
+			     const uint8_t *sw_sequence_layout_buf)
+{
+	const struct dpni_sw_sequence_layout_entry *ext_params;
+	int i;
+	uint16_t ss_size, ss_offset;
+
+	ext_params = (const struct dpni_sw_sequence_layout_entry *)
+						sw_sequence_layout_buf;
+
+	for (i = 0; i < DPNI_SW_SEQUENCE_LAYOUT_SIZE; i++) {
+		ss_offset = le16_to_cpu(ext_params[i].ss_offset);
+		ss_size = le16_to_cpu(ext_params[i].ss_size);
+
+		if (ss_offset == 0 && ss_size == 0) {
+			layout->num_ss = i;
+			return;
+		}
+
+		layout->ss[i].ss_offset = ss_offset;
+		layout->ss[i].ss_size = ss_size;
+		layout->ss[i].param_offset = ext_params[i].param_offset;
+		layout->ss[i].param_size = ext_params[i].param_size;
+	}
+}
diff --git a/drivers/net/dpaa2/mc/fsl_dpni.h b/drivers/net/dpaa2/mc/fsl_dpni.h
index 8b1cfbac7..97fde316e 100644
--- a/drivers/net/dpaa2/mc/fsl_dpni.h
+++ b/drivers/net/dpaa2/mc/fsl_dpni.h
@@ -96,6 +96,12 @@ struct fsl_mc_io;
  */
 #define DPNI_OPT_CUSTOM_CG				0x000200
 
+
+/**
+ * Software sequence maximum layout size
+ */
+#define DPNI_SW_SEQUENCE_LAYOUT_SIZE 33
+
 int dpni_open(struct fsl_mc_io *mc_io,
 	      uint32_t cmd_flags,
 	      int dpni_id,
@@ -1424,4 +1430,131 @@ struct dpni_custom_tpid_cfg {
 int dpni_get_custom_tpid(struct fsl_mc_io *mc_io, uint32_t cmd_flags,
 		uint16_t token, struct dpni_custom_tpid_cfg *tpid);
 
+/**
+ * enum dpni_soft_sequence_dest - Enumeration of WRIOP software sequence
+ *				destinations
+ * @DPNI_SS_INGRESS: Ingress parser
+ * @DPNI_SS_EGRESS: Egress parser
+ */
+enum dpni_soft_sequence_dest {
+	DPNI_SS_INGRESS = 0,
+	DPNI_SS_EGRESS = 1,
+};
+
+/**
+ * struct dpni_load_ss_cfg - Structure for Software Sequence load configuration
+ * @dest:	Destination of the Software Sequence: ingress or egress parser
+ * @ss_size: Size of the Software Sequence
+ * @ss_offset:	The offset where to load the Software Sequence (0x20-0x7FD)
+ * @ss_iova: I/O virtual address of the Software Sequence
+ */
+struct dpni_load_ss_cfg {
+	enum dpni_soft_sequence_dest dest;
+	uint16_t ss_size;
+	uint16_t ss_offset;
+	uint64_t ss_iova;
+};
+
+/**
+ * struct dpni_enable_ss_cfg - Structure for software sequence enable
+ *				configuration
+ * @dest:	Destination of the Software Sequence: ingress or egress parser
+ * @hxs: HXS to attach the software sequence to
+ * @set_start: If the Software Sequence or HDR it is attached to is set as
+ *		parser start
+ *		If hxs=DUMMY_LAST_HXS the ss_offset is set directly as parser
+ *			start else the hdr index code is set as parser start
+ * @ss_offset: The offset of the Software Sequence to enable or set as parse
+ *		start
+ * @param_size: Size of the software sequence parameters
+ * @param_offset: Offset in the parameter zone for the software sequence
+ *			parameters
+ * @param_iova: I/O virtual address of the parameters
+ */
+struct dpni_enable_ss_cfg {
+	enum dpni_soft_sequence_dest dest;
+	uint16_t hxs;
+	uint8_t set_start;
+	uint16_t ss_offset;
+	uint8_t param_size;
+	uint8_t param_offset;
+	uint64_t param_iova;
+};
+
+/**
+ * dpni_load_sw_sequence() - Loads a software sequence in parser memory.
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPNI object
+ * @cfg:	Software sequence load configuration
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dpni_load_sw_sequence(struct fsl_mc_io *mc_io,
+	      uint32_t cmd_flags,
+	      uint16_t token,
+		  struct dpni_load_ss_cfg *cfg);
+
+/**
+ * dpni_eanble_sw_sequence() - Enables a software sequence in the parser
+ *				profile
+ * corresponding to the ingress or egress of the DPNI.
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPNI object
+ * @cfg:	Software sequence enable configuration
+ * Return:	'0' on Success; Error code otherwise.
+ */
+int dpni_enable_sw_sequence(struct fsl_mc_io *mc_io,
+			    uint32_t cmd_flags,
+			    uint16_t token,
+			    struct dpni_enable_ss_cfg *cfg);
+
+/**
+ * struct dpni_sw_sequence_layout - Structure for software sequence enable
+ *				configuration
+ * @num_ss:	Number of software sequences returned
+ * @ss: Array of software sequence entries. The number of valid entries
+ *			must match 'num_ss' value
+ */
+struct dpni_sw_sequence_layout {
+	uint8_t num_ss;
+	struct {
+		uint16_t ss_offset;
+		uint16_t ss_size;
+		uint8_t param_offset;
+		uint8_t param_size;
+	} ss[DPNI_SW_SEQUENCE_LAYOUT_SIZE];
+};
+
+/**
+ * dpni_get_sw_sequence_layout() - Get the soft sequence layout
+ * @mc_io:	Pointer to MC portal's I/O object
+ * @cmd_flags:	Command flags; one or more of 'MC_CMD_FLAG_'
+ * @token:	Token of DPNI object
+ * @src:	Source of the layout (WRIOP Rx or Tx)
+ * @ss_layout_iova:  I/O virtual address of 264 bytes DMA-able memory
+ *
+ * warning: After calling this function, call dpni_extract_sw_sequence_layout()
+ *		to get the layout
+ *
+ * Return:	'0' on Success; error code otherwise.
+ */
+int dpni_get_sw_sequence_layout(struct fsl_mc_io *mc_io,
+				uint32_t cmd_flags,
+				uint16_t token,
+				enum dpni_soft_sequence_dest src,
+				uint64_t ss_layout_iova);
+
+/**
+ * dpni_extract_sw_sequence_layout() - extract the software sequence layout
+ * @layout:		software sequence layout
+ * @sw_sequence_layout_buf:	Zeroed 264 bytes of memory before mapping it
+ *				to DMA
+ *
+ * This function has to be called after dpni_get_sw_sequence_layout
+ *
+ */
+void dpni_extract_sw_sequence_layout(struct dpni_sw_sequence_layout *layout,
+				     const uint8_t *sw_sequence_layout_buf);
+
 #endif /* __FSL_DPNI_H */
diff --git a/drivers/net/dpaa2/mc/fsl_dpni_cmd.h b/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
index 5effbb300..dfaccd91c 100644
--- a/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
+++ b/drivers/net/dpaa2/mc/fsl_dpni_cmd.h
@@ -1,7 +1,7 @@
 /* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0)
  *
  * Copyright 2013-2016 Freescale Semiconductor Inc.
- * Copyright 2016-2017 NXP
+ * Copyright 2016-2019 NXP
  *
  */
 #ifndef _FSL_DPNI_CMD_H
@@ -97,6 +97,9 @@
 #define DPNI_CMDID_SET_OFFLOAD			DPNI_CMD(0x26C)
 #define DPNI_CMDID_SET_TX_CONFIRMATION_MODE	DPNI_CMD(0x266)
 #define DPNI_CMDID_GET_TX_CONFIRMATION_MODE	DPNI_CMD(0x26D)
+#define DPNI_CMDID_LOAD_SW_SEQUENCE		DPNI_CMD(0x270)
+#define DPNI_CMDID_ENABLE_SW_SEQUENCE		DPNI_CMD(0x271)
+#define DPNI_CMDID_GET_SW_SEQUENCE_LAYOUT	DPNI_CMD(0x272)
 #define DPNI_CMDID_SET_OPR			DPNI_CMD(0x26e)
 #define DPNI_CMDID_GET_OPR			DPNI_CMD(0x26f)
 #define DPNI_CMDID_SET_RX_FS_DIST		DPNI_CMD(0x273)
@@ -798,5 +801,43 @@ struct dpni_cmd_set_rx_hash_dist {
 	uint64_t	key_cfg_iova;
 };
 
+struct dpni_load_sw_sequence {
+	uint8_t dest;
+	uint8_t pad0[7];
+	uint16_t ss_offset;
+	uint16_t pad1;
+	uint16_t ss_size;
+	uint16_t pad2;
+	uint64_t ss_iova;
+};
+
+struct dpni_enable_sw_sequence {
+	uint8_t dest;
+	uint8_t pad0[7];
+	uint16_t ss_offset;
+	uint16_t hxs;
+	uint8_t set_start;
+	uint8_t pad1[3];
+	uint8_t param_offset;
+	uint8_t pad2[3];
+	uint8_t param_size;
+	uint8_t pad3[3];
+	uint64_t param_iova;
+};
+
+struct dpni_get_sw_sequence_layout {
+	uint8_t src;
+	uint8_t pad0[7];
+	uint64_t layout_iova;
+};
+
+struct dpni_sw_sequence_layout_entry {
+	uint16_t ss_offset;
+	uint16_t ss_size;
+	uint8_t param_offset;
+	uint8_t param_size;
+	uint16_t pad;
+};
+
 #pragma pack(pop)
 #endif /* _FSL_DPNI_CMD_H */
-- 
2.17.1

[dpdk-dev] [PATCH v2 30/30] net/dpaa2: add soft parser driver

[Sachin Saxena]

From: Sunil Kumar Kori <sunil.kori@nxp.com>

Signed-off-by: Sunil Kumar Kori <sunil.kori@nxp.com>
---
 drivers/net/dpaa2/Makefile        |   1 +
 drivers/net/dpaa2/dpaa2_ethdev.c  |  24 +++
 drivers/net/dpaa2/dpaa2_ethdev.h  |   4 +
 drivers/net/dpaa2/dpaa2_sparser.c | 269 ++++++++++++++++++++++++++++++
 drivers/net/dpaa2/dpaa2_sparser.h | 206 +++++++++++++++++++++++
 drivers/net/dpaa2/meson.build     |   1 +
 6 files changed, 505 insertions(+)
 create mode 100644 drivers/net/dpaa2/dpaa2_sparser.c
 create mode 100644 drivers/net/dpaa2/dpaa2_sparser.h

diff --git a/drivers/net/dpaa2/Makefile b/drivers/net/dpaa2/Makefile
index 0cc539dc5..7924871c8 100644
--- a/drivers/net/dpaa2/Makefile
+++ b/drivers/net/dpaa2/Makefile
@@ -34,6 +34,7 @@ SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2_rxtx.c
 SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2_ethdev.c
 SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2_flow.c
 SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2_mux.c
+SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += dpaa2_sparser.c
 SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += mc/dpni.c
 SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += mc/dpkg.c
 SRCS-$(CONFIG_RTE_LIBRTE_DPAA2_PMD) += mc/dpdmux.c
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.c b/drivers/net/dpaa2/dpaa2_ethdev.c
index 2fb65685d..3ae52d605 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.c
+++ b/drivers/net/dpaa2/dpaa2_ethdev.c
@@ -26,6 +26,7 @@
 #include <dpaa2_hw_dpio.h>
 #include <mc/fsl_dpmng.h>
 #include "dpaa2_ethdev.h"
+#include "dpaa2_sparser.h"
 #include <fsl_qbman_debug.h>
 
 #define DRIVER_LOOPBACK_MODE "drv_loopback"
@@ -2499,6 +2500,29 @@ dpaa2_dev_init(struct rte_eth_dev *eth_dev)
 		goto init_err;
 	}
 
+	/*TODO To enable soft parser support DPAA2 driver needs to integrate
+	 * with external entity to receive byte code for software sequence
+	 * and same will be offload to the H/W using MC interface.
+	 * Currently it is assumed that DPAA2 driver has byte code by some
+	 * mean and same if offloaded to H/W.
+	 */
+	if (getenv("DPAA2_ENABLE_SOFT_PARSER")) {
+		WRIOP_SS_INITIALIZER(priv);
+		ret = dpaa2_eth_load_wriop_soft_parser(priv, DPNI_SS_INGRESS);
+		if (ret < 0) {
+			DPAA2_PMD_ERR(" Error(%d) in loading softparser\n",
+				      ret);
+			return ret;
+		}
+
+		ret = dpaa2_eth_enable_wriop_soft_parser(priv,
+							 DPNI_SS_INGRESS);
+		if (ret < 0) {
+			DPAA2_PMD_ERR(" Error(%d) in enabling softparser\n",
+				      ret);
+			return ret;
+		}
+	}
 	RTE_LOG(INFO, PMD, "%s: netdev created\n", eth_dev->data->name);
 	return 0;
 init_err:
diff --git a/drivers/net/dpaa2/dpaa2_ethdev.h b/drivers/net/dpaa2/dpaa2_ethdev.h
index bcb8360be..823f9e97c 100644
--- a/drivers/net/dpaa2/dpaa2_ethdev.h
+++ b/drivers/net/dpaa2/dpaa2_ethdev.h
@@ -22,6 +22,7 @@
 #define MAX_TCS			DPNI_MAX_TC
 #define MAX_RX_QUEUES		128
 #define MAX_TX_QUEUES		16
+#define MAX_DPNI		8
 
 /*default tc to be used for ,congestion, distribution etc configuration. */
 #define DPAA2_DEF_TC		0
@@ -131,6 +132,9 @@ struct dpaa2_dev_priv {
 		uint64_t fs_extract_param[MAX_TCS];
 	} extract;
 
+	uint16_t ss_offset;
+	uint64_t ss_iova;
+	uint64_t ss_param_iova;
 #if defined(RTE_LIBRTE_IEEE1588)
 	/*stores timestamp of last received packet on dev*/
 	uint64_t rx_timestamp;
diff --git a/drivers/net/dpaa2/dpaa2_sparser.c b/drivers/net/dpaa2/dpaa2_sparser.c
new file mode 100644
index 000000000..7e8fedd81
--- /dev/null
+++ b/drivers/net/dpaa2/dpaa2_sparser.c
@@ -0,0 +1,269 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2018-2019 NXP
+ */
+
+#include <rte_mbuf.h>
+#include <rte_ethdev.h>
+#include <rte_malloc.h>
+#include <rte_memcpy.h>
+#include <rte_string_fns.h>
+#include <rte_dev.h>
+
+#include <fslmc_logs.h>
+#include <fslmc_vfio.h>
+#include <dpaa2_hw_pvt.h>
+#include <dpaa2_hw_dpio.h>
+#include <dpaa2_hw_mempool.h>
+#include <dpaa2_pmd_logs.h>
+
+#include "dpaa2_ethdev.h"
+#include "dpaa2_sparser.h"
+#include "base/dpaa2_hw_dpni_annot.h"
+#define __STDC_FORMAT_MACROS
+#include <stdint.h>
+#include <inttypes.h>
+
+uint8_t wriop_bytecode[] = {
+	0x00, 0x04, 0x29, 0x42, 0x03, 0xe0, 0x12, 0x00, 0x29, 0x02,
+	0x18, 0x00, 0x87, 0x3c, 0x00, 0x02, 0x18, 0x00, 0x00, 0x00
+};
+
+struct frame_attr frame_attr_arr[] = {
+	/* Frame Attribute Flags 1 */
+	/* 000 */ {"Routing header present in IPv6 header 2 ", 0, 0x80000000},
+	/* 001 */ {"GTP Primed was detected                 ", 0, 0x40000000},
+	/* 002 */ {"VLAN with VID = 0 was detected          ", 0, 0x20000000},
+	/* 003 */ {"A PTP frame was detected                ", 0, 0x10000000},
+	/* 004 */ {"VXLAN was parsed                        ", 0, 0x08000000},
+	/* 005 */ {"A VXLAN HXS parsing error was detected  ", 0, 0x04000000},
+	/* 006 */ {"Ethernet control protocol was detected  ", 0, 0x02000000},
+	/* 007 */ {"IKE was detected at UDP port 4500       ", 0, 0x01000000},
+	/* 008 */ {"Shim Shell Soft Parsing Error           ", 0, 0x00800000},
+	/* 009 */ {"Parsing Error                           ", 0, 0x00400000},
+	/* 010 */ {"Ethernet MAC Present                    ", 0, 0x00200000},
+	/* 011 */ {"Ethernet Unicast                        ", 0, 0x00100000},
+	/* 012 */ {"Ethernet Multicast                      ", 0, 0x00080000},
+	/* 013 */ {"Ethernet Broadcast                      ", 0, 0x00040000},
+	/* 014 */ {"BPDU frame (MAC DA is 01:80:C2:00:00:00)", 0, 0x00020000},
+	/* 015 */ {"FCoE detected (Ether type is 0x8906)    ", 0, 0x00010000},
+	/* 016 */ {"FIP detected (Ether type is 0x8914)     ", 0, 0x00008000},
+	/* 017 */ {"Ethernet Parsing Error                  ", 0, 0x00004000},
+	/* 018 */ {"LLC+SNAP Present                        ", 0, 0x00002000},
+	/* 019 */ {"Unknown LLC/OUI                         ", 0, 0x00001000},
+	/* 020 */ {"LLC+SNAP Error                          ", 0, 0x00000800},
+	/* 021 */ {"VLAN 1 Present                          ", 0, 0x00000400},
+	/* 022 */ {"VLAN n Present                          ", 0, 0x00000200},
+	/* 023 */ {"CFI bit in a \"8100\" VLAN tag is set   ", 0, 0x00000100},
+	/* 024 */ {"VLAN Parsing Error                      ", 0, 0x00000080},
+	/* 025 */ {"PPPoE+PPP Present                       ", 0, 0x00000040},
+	/* 026 */ {"PPPoE+PPP Parsing Error                 ", 0, 0x00000020},
+	/* 027 */ {"MPLS 1 Present                          ", 0, 0x00000010},
+	/* 028 */ {"MPLS n Present                          ", 0, 0x00000008},
+	/* 029 */ {"MPLS Parsing Error                      ", 0, 0x00000004},
+	/* 030 */ {"ARP frame Present (Ethertype 0x0806)    ", 0, 0x00000002},
+	/* 031 */ {"ARP Parsing Error                       ", 0, 0x00000001},
+	/* Frame Attribute Flags 2 */
+	/* 032 */ {"L2 Unknown Protocol                     ", 1, 0x80000000},
+	/* 033 */ {"L2 Soft Parsing Error                   ", 1, 0x40000000},
+	/* 034 */ {"IPv4 1 Present                          ", 1, 0x20000000},
+	/* 035 */ {"IPv4 1 Unicast                          ", 1, 0x10000000},
+	/* 036 */ {"IPv4 1 Multicast                        ", 1, 0x08000000},
+	/* 037 */ {"IPv4 1 Broadcast                        ", 1, 0x04000000},
+	/* 038 */ {"IPv4 n Present                          ", 1, 0x02000000},
+	/* 039 */ {"IPv4 n Unicast                          ", 1, 0x01000000},
+	/* 040 */ {"IPv4 n Multicast                        ", 1, 0x00800000},
+	/* 041 */ {"IPv4 n Broadcast                        ", 1, 0x00400000},
+	/* 042 */ {"IPv6 1 Present                          ", 1, 0x00200000},
+	/* 043 */ {"IPv6 1 Unicast                          ", 1, 0x00100000},
+	/* 044 */ {"IPv6 1 Multicast                        ", 1, 0x00080000},
+	/* 045 */ {"IPv6 n Present                          ", 1, 0x00040000},
+	/* 046 */ {"IPv6 n Unicast                          ", 1, 0x00020000},
+	/* 047 */ {"IPv6 n Multicast                        ", 1, 0x00010000},
+	/* 048 */ {"IP 1 option present                     ", 1, 0x00008000},
+	/* 049 */ {"IP 1 Unknown Protocol                   ", 1, 0x00004000},
+	/* 050 */ {"IP 1 Packet is a fragment               ", 1, 0x00002000},
+	/* 051 */ {"IP 1 Packet is an initial fragment      ", 1, 0x00001000},
+	/* 052 */ {"IP 1 Parsing Error                      ", 1, 0x00000800},
+	/* 053 */ {"IP n option present                     ", 1, 0x00000400},
+	/* 054 */ {"IP n Unknown Protocol                   ", 1, 0x00000200},
+	/* 055 */ {"IP n Packet is a fragment               ", 1, 0x00000100},
+	/* 056 */ {"IP n Packet is an initial fragment      ", 1, 0x00000080},
+	/* 057 */ {"ICMP detected (IP proto is 1)           ", 1, 0x00000040},
+	/* 058 */ {"IGMP detected (IP proto is 2)           ", 1, 0x00000020},
+	/* 059 */ {"ICMPv6 detected (IP proto is 3a)        ", 1, 0x00000010},
+	/* 060 */ {"UDP Light detected (IP proto is 136)    ", 1, 0x00000008},
+	/* 061 */ {"IP n Parsing Error                      ", 1, 0x00000004},
+	/* 062 */ {"Min. Encap Present                      ", 1, 0x00000002},
+	/* 063 */ {"Min. Encap S flag set                   ", 1, 0x00000001},
+	/* Frame Attribute Flags 3 */
+	/* 064 */ {"Min. Encap Parsing Error                ", 2, 0x80000000},
+	/* 065 */ {"GRE Present                             ", 2, 0x40000000},
+	/* 066 */ {"GRE R bit set                           ", 2, 0x20000000},
+	/* 067 */ {"GRE Parsing Error                       ", 2, 0x10000000},
+	/* 068 */ {"L3 Unknown Protocol                     ", 2, 0x08000000},
+	/* 069 */ {"L3 Soft Parsing Error                   ", 2, 0x04000000},
+	/* 070 */ {"UDP Present                             ", 2, 0x02000000},
+	/* 071 */ {"UDP Parsing Error                       ", 2, 0x01000000},
+	/* 072 */ {"TCP Present                             ", 2, 0x00800000},
+	/* 073 */ {"TCP options present                     ", 2, 0x00400000},
+	/* 074 */ {"TCP Control bits 6-11 set               ", 2, 0x00200000},
+	/* 075 */ {"TCP Control bits 3-5 set                ", 2, 0x00100000},
+	/* 076 */ {"TCP Parsing Error                       ", 2, 0x00080000},
+	/* 077 */ {"IPSec Present                           ", 2, 0x00040000},
+	/* 078 */ {"IPSec ESP found                         ", 2, 0x00020000},
+	/* 079 */ {"IPSec AH found                          ", 2, 0x00010000},
+	/* 080 */ {"IPSec Parsing Error                     ", 2, 0x00008000},
+	/* 081 */ {"SCTP Present                            ", 2, 0x00004000},
+	/* 082 */ {"SCTP Parsing Error                      ", 2, 0x00002000},
+	/* 083 */ {"DCCP Present                            ", 2, 0x00001000},
+	/* 084 */ {"DCCP Parsing Error                      ", 2, 0x00000800},
+	/* 085 */ {"L4 Unknown Protocol                     ", 2, 0x00000400},
+	/* 086 */ {"L4 Soft Parsing Error                   ", 2, 0x00000200},
+	/* 087 */ {"GTP Present                             ", 2, 0x00000100},
+	/* 088 */ {"GTP Parsing Error                       ", 2, 0x00000080},
+	/* 089 */ {"ESP Present                             ", 2, 0x00000040},
+	/* 090 */ {"ESP Parsing Error                       ", 2, 0x00000020},
+	/* 091 */ {"iSCSI detected (Port# 860)              ", 2, 0x00000010},
+	/* 092 */ {"Capwap-control detected (Port# 5246)    ", 2, 0x00000008},
+	/* 093 */ {"Capwap-data detected (Port# 5247)       ", 2, 0x00000004},
+	/* 094 */ {"L5 Soft Parsing Error                   ", 2, 0x00000002},
+	/* 095 */ {"IPv6 Route hdr1 present                 ", 2, 0x00000001},
+	/* 096 */ {NULL,                                       0, 0x00000000}
+};
+
+struct frame_attr_ext frame_attr_ext_arr[] = {
+	/* Frame Attribute Flags Extension */
+	/* 096 */ {"User defined soft parser bit #0         ", 0, 0x8000},
+	/* 096 */ {"User defined soft parser bit #1         ", 0, 0x4000},
+	/* 096 */ {"User defined soft parser bit #2         ", 0, 0x2000},
+	/* 096 */ {"User defined soft parser bit #3         ", 0, 0x1000},
+	/* 096 */ {"User defined soft parser bit #4         ", 0, 0x0800},
+	/* 096 */ {"User defined soft parser bit #5         ", 0, 0x0400},
+	/* 096 */ {"User defined soft parser bit #6         ", 0, 0x0200},
+	/* 096 */ {"User defined soft parser bit #7         ", 0, 0x0100},
+	/* 097 */ {"Reserved                                ", 0, 0x00ff},
+	/* 112 */ {NULL,                                       0, 0x0000}
+};
+
+#define SWAP_WORD(pr)						\
+do {								\
+	for (int i = 0; i < 4 ; i++) {				\
+		pr[i] = pr[i] ^ pr[6 - i + 1];			\
+		pr[6 - i + 1] = pr[6 - i + 1] ^ pr[i];		\
+		pr[i] = pr[i] ^ pr[6 - i + 1];			\
+	}							\
+} while (0)
+
+#define fa_print_sb()						\
+do {								\
+	if (rte_cpu_to_be_32(*pdw) & frm_attr->fld_mask)	\
+		DPAA2_PMD_DP_DEBUG("t %s : Yes", frm_attr->fld_name);	\
+} while (0)
+
+#define fa_print_sb_ext()					\
+do {								\
+	if (rte_cpu_to_be_16(*pw) & frm_attr_ext->fld_mask)	\
+		DPAA2_PMD_DP_DEBUG("\t %s : Yes",			\
+			  frm_attr_ext->fld_name);		\
+} while (0)
+
+#define fa_print_mb_ext()					\
+do {								\
+	if (rte_cpu_to_be_16(*pw) & frm_attr_ext->fld_mask)	\
+		DPAA2_PMD_DP_DEBUG("\t %s : 0x%02x",			\
+			  frm_attr_ext->fld_name,		\
+			  rte_cpu_to_be_16(*pw) & frm_attr_ext->fld_mask);\
+} while (0)
+
+int dpaa2_eth_load_wriop_soft_parser(struct dpaa2_dev_priv *priv,
+				     enum dpni_soft_sequence_dest dest)
+{
+	struct fsl_mc_io *dpni = priv->hw;
+	struct dpni_load_ss_cfg     cfg;
+	struct dpni_drv_sparser_param	sp_param;
+	uint8_t *addr;
+	int ret;
+
+	memset(&sp_param, 0, sizeof(sp_param));
+	sp_param.start_pc = priv->ss_offset;
+	sp_param.byte_code = &wriop_bytecode[0];
+	sp_param.size = sizeof(wriop_bytecode);
+
+	cfg.dest = dest;
+	cfg.ss_offset = sp_param.start_pc;
+	cfg.ss_size = sp_param.size;
+
+	addr = rte_malloc(NULL, sp_param.size, 64);
+	if (!addr) {
+		DPAA2_PMD_ERR("Memory unavailable for soft parser param\n");
+		return -1;
+	}
+
+	memcpy(addr, sp_param.byte_code, sp_param.size);
+	cfg.ss_iova = (uint64_t)(DPAA2_VADDR_TO_IOVA(addr));
+
+	ret = dpni_load_sw_sequence(dpni, CMD_PRI_LOW, priv->token, &cfg);
+	if (ret) {
+		DPAA2_PMD_ERR("dpni_load_sw_sequence failed\n");
+		rte_free(addr);
+		return ret;
+	}
+
+	priv->ss_iova = (uint64_t)(DPAA2_VADDR_TO_IOVA(addr));
+	priv->ss_offset += sp_param.size;
+	RTE_LOG(INFO, PMD, "Soft parser loaded for dpni@%d\n", priv->hw_id);
+
+	rte_free(addr);
+	return 0;
+}
+
+int dpaa2_eth_enable_wriop_soft_parser(struct dpaa2_dev_priv *priv,
+				       enum dpni_soft_sequence_dest dest)
+{
+	struct fsl_mc_io *dpni = priv->hw;
+	struct dpni_enable_ss_cfg cfg;
+	uint8_t pa[3];
+	struct dpni_drv_sparser_param sp_param;
+	uint8_t *param_addr = NULL;
+	int ret;
+
+	memset(&sp_param, 0, sizeof(sp_param));
+	pa[0] = 32;	/* Custom Header Length in bytes */
+	sp_param.custom_header_first = 1;
+	sp_param.param_offset = 32;
+	sp_param.param_size = 1;
+	sp_param.start_pc = priv->ss_offset;
+	sp_param.param_array = (uint8_t *)&pa[0];
+
+	cfg.dest = dest;
+	cfg.ss_offset = sp_param.start_pc;
+	cfg.set_start = sp_param.custom_header_first;
+	cfg.hxs = (uint16_t)sp_param.link_to_hard_hxs;
+	cfg.param_offset = sp_param.param_offset;
+	cfg.param_size = sp_param.param_size;
+	if (cfg.param_size) {
+		param_addr = rte_malloc(NULL, cfg.param_size, 64);
+		if (!param_addr) {
+			DPAA2_PMD_ERR("Memory unavailable for soft parser param\n");
+			return -1;
+		}
+
+		memcpy(param_addr, sp_param.param_array, cfg.param_size);
+		cfg.param_iova = (uint64_t)(DPAA2_VADDR_TO_IOVA(param_addr));
+		priv->ss_param_iova = cfg.param_iova;
+	} else {
+		cfg.param_iova = 0;
+	}
+
+	ret = dpni_enable_sw_sequence(dpni, CMD_PRI_LOW, priv->token, &cfg);
+	if (ret) {
+		DPAA2_PMD_ERR("dpni_enable_sw_sequence failed for dpni%d\n",
+			priv->hw_id);
+		rte_free(param_addr);
+		return ret;
+	}
+
+	rte_free(param_addr);
+	RTE_LOG(INFO, PMD, "Soft parser enabled for dpni@%d\n", priv->hw_id);
+	return 0;
+}
diff --git a/drivers/net/dpaa2/dpaa2_sparser.h b/drivers/net/dpaa2/dpaa2_sparser.h
new file mode 100644
index 000000000..365b8062a
--- /dev/null
+++ b/drivers/net/dpaa2/dpaa2_sparser.h
@@ -0,0 +1,206 @@
+/* * SPDX-License-Identifier: BSD-3-Clause
+ *   Copyright 2018-2019 NXP
+ */
+
+/**
+ * @file	dpaa2_sparser.h
+ *
+ * @brief	Soft parser related macros & functions support for DPAA2 device
+ *	framework based applications.
+ *
+ */
+
+#ifndef _DPAA2_SPARSER_H
+#define _DPAA2_SPARSER_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+#define WRIOP_SS_INITIALIZER(priv)				\
+do {								\
+	/* Base offset of parse profile memory in WRIOP */	\
+	(priv)->ss_offset = 0x20;				\
+	(priv)->ss_iova	= (size_t)NULL;			\
+	(priv)->ss_param_iova = (size_t)NULL;			\
+} while (0)
+
+/**************************************************************************/
+/*
+ * @enum   parser_starting_hxs_code
+ * @Description PARSER Starting HXS code
+ */
+/***************************************************************************/
+enum parser_starting_hxs_code {
+	/** Ethernet Starting HXS coding */
+	PARSER_ETH_STARTING_HXS = 0x0000,
+	/** LLC+SNAP Starting HXS coding */
+	PARSER_LLC_SNAP_STARTING_HXS = 0x0001,
+	/** VLAN Starting HXS coding */
+	PARSER_VLAN_STARTING_HXS = 0x0002,
+	/** PPPoE+PPP Starting HXS coding */
+	PARSER_PPPOE_PPP_STARTING_HXS = 0x0003,
+	/** MPLS Starting HXS coding */
+	PARSER_MPLS_STARTING_HXS = 0x0004,
+	/** ARP Starting HXS coding */
+	PARSER_ARP_STARTING_HXS = 0x0005,
+	/** IP Starting HXS coding */
+	PARSER_IP_STARTING_HXS  = 0x0006,
+	/** IPv4 Starting HXS coding */
+	PARSER_IPV4_STARTING_HXS = 0x0007,
+	/** IPv6 Starting HXS coding */
+	PARSER_IPV6_STARTING_HXS = 0x0008,
+	/** GRE Starting HXS coding */
+	PARSER_GRE_STARTING_HXS = 0x0009,
+	/** MinEncap Starting HXS coding */
+	PARSER_MINENCAP_STARTING_HXS = 0x000A,
+	/** Other L3 Shell Starting HXS coding */
+	PARSER_OTHER_L3_SHELL_STARTING_HXS = 0x000B,
+	/** TCP Starting HXS coding */
+	PARSER_TCP_STARTING_HXS = 0x000C,
+	/** UDP Starting HXS coding */
+	PARSER_UDP_STARTING_HXS = 0x000D,
+	/** IPSec Starting HXS coding */
+	PARSER_IPSEC_STARTING_HXS = 0x000E,
+	/** SCTP Starting HXS coding */
+	PARSER_SCTP_STARTING_HXS = 0x000F,
+	/** DCCP Starting HXS coding */
+	PARSER_DCCP_STARTING_HXS = 0x0010,
+	/** Other L4 Shell Starting HXS coding */
+	PARSER_OTHER_L4_SHELL_STARTING_HXS = 0x0011,
+	/** GTP Starting HXS coding */
+	PARSER_GTP_STARTING_HXS = 0x0012,
+	/** ESP Starting HXS coding */
+	PARSER_ESP_STARTING_HXS = 0x0013,
+	/** VXLAN Starting HXS coding */
+	PARSER_VXLAN_STARTING_HXS = 0x0014,
+	/** L5 (and above) Shell Starting HXS coding */
+	PARSER_L5_SHELL_STARTING_HXS = 0x001E,
+	/** Final Shell Starting HXS coding */
+	PARSER_FINAL_SHELL_STARTING_HXS = 0x001F
+};
+
+/**************************************************************************/
+/*
+ * @Description    struct dpni_drv_sparser_param - Structure representing the
+ *			information needed to activate(enable) a Soft Parser.
+ */
+/***************************************************************************/
+
+struct dpni_drv_sparser_param {
+	/* The "custom_header_first" must be set if the custom header to parse
+	 * is the first header in the packet, otherwise "custom_header_first"
+	 * must be cleared.
+	 */
+	uint8_t             custom_header_first;
+	/* Hard HXS on which a soft parser is activated. This must be
+	 * configured.
+	 * if the header to parse is not the first header in the packet.
+	 */
+	enum parser_starting_hxs_code   link_to_hard_hxs;
+	/* Soft Sequence Start PC */
+	uint16_t            start_pc;
+	/* Soft Sequence byte-code */
+	uint8_t             *byte_code;
+	/* Soft Sequence size */
+	uint16_t            size;
+	/* Pointer to the Parameters Array of the SP */
+	uint8_t             *param_array;
+	/* Parameters offset */
+	uint8_t             param_offset;
+	/* Parameters size */
+	uint8_t             param_size;
+};
+
+struct sp_parse_result {
+	/* Next header */
+	uint16_t    nxt_hdr;
+	/* Frame Attribute Flags Extension */
+	uint16_t    frame_attribute_flags_extension;
+	/* Frame Attribute Flags (part 1) */
+	uint32_t    frame_attribute_flags_1;
+	/* Frame Attribute Flags (part 2) */
+	uint32_t    frame_attribute_flags_2;
+	/* Frame Attribute Flags (part 3) */
+	uint32_t    frame_attribute_flags_3;
+	/* Shim Offset 1 */
+	uint8_t     shim_offset_1;
+	/* Shim Offset 2 */
+	uint8_t     shim_offset_2;
+	/* Outer IP protocol field offset */
+	uint8_t     ip_1_pid_offset;
+	/* Ethernet offset */
+	uint8_t     eth_offset;
+	/* LLC+SNAP offset */
+	uint8_t     llc_snap_offset;
+	/* First VLAN's TCI field offset*/
+	uint8_t     vlan_tci1_offset;
+	/* Last VLAN's TCI field offset*/
+	uint8_t     vlan_tcin_offset;
+	/* Last Ethertype offset*/
+	uint8_t     last_etype_offset;
+	/* PPPoE offset */
+	uint8_t     pppoe_offset;
+	/* First MPLS offset */
+	uint8_t     mpls_offset_1;
+	/* Last MPLS offset */
+	uint8_t     mpls_offset_n;
+	/* Layer 3 (Outer IP, ARP, FCoE or FIP) offset */
+	uint8_t     l3_offset;
+	/* Inner IP or MinEncap offset*/
+	uint8_t     ipn_or_minencap_offset;
+	/* GRE offset */
+	uint8_t     gre_offset;
+	/* Layer 4 offset*/
+	uint8_t     l4_offset;
+	/* Layer 5 offset */
+	uint8_t     l5_offset;
+	/* Routing header offset of 1st IPv6 header */
+	uint8_t     routing_hdr_offset1;
+	/* Routing header offset of 2nd IPv6 header */
+	uint8_t     routing_hdr_offset2;
+	/* Next header offset */
+	uint8_t     nxt_hdr_offset;
+	/* IPv6 fragmentable part offset */
+	uint8_t     ipv6_frag_offset;
+	/* Frame's untouched running sum, input to parser */
+	uint16_t    gross_running_sum;
+	/* Running Sum */
+	uint16_t    running_sum;
+	/* Parse Error code */
+	uint8_t     parse_error_code;
+	/* Offset to the next header field before IPv6 fragment extension */
+	uint8_t     nxt_hdr_before_ipv6_frag_ext;
+	/* Inner IP Protocol field offset */
+	uint8_t     ip_n_pid_offset;
+	/* Reserved for Soft parsing context*/
+	uint8_t     soft_parsing_context[21];
+};
+
+struct frame_attr {
+	const char *fld_name;
+	uint8_t     faf_offset;
+	uint32_t    fld_mask;
+};
+
+struct frame_attr_ext {
+	const char *fld_name;
+	uint8_t     faf_ext_offset;
+	uint16_t    fld_mask;
+};
+
+
+struct parse_err {
+	uint16_t    code;
+	const char *err_name;
+};
+
+/* Macro definitions */
+#define IS_ONE_BIT_FIELD(_mask)                 \
+(!((_mask) & ((_mask) - 1)) || (_mask == 1))
+
+int dpaa2_eth_load_wriop_soft_parser(struct dpaa2_dev_priv *priv,
+		enum dpni_soft_sequence_dest dest);
+int dpaa2_eth_enable_wriop_soft_parser(struct dpaa2_dev_priv *priv,
+		enum dpni_soft_sequence_dest dest);
+#endif /* _DPAA2_SPARSER_H_ */
diff --git a/drivers/net/dpaa2/meson.build b/drivers/net/dpaa2/meson.build
index fc311e9f7..1a4ab212c 100644
--- a/drivers/net/dpaa2/meson.build
+++ b/drivers/net/dpaa2/meson.build
@@ -14,6 +14,7 @@ sources = files('base/dpaa2_hw_dpni.c',
 		'dpaa2_ethdev.c',
 		'dpaa2_flow.c',
 		'dpaa2_rxtx.c',
+		'dpaa2_sparser.c',
 		'mc/dpkg.c',
 		'mc/dpdmux.c',
 		'mc/dpni.c')
-- 
2.17.1

Re: [dpdk-dev] [PATCH v2 03/30] bus/dpaa: remove un-necessary thread affinity

[Hemant Agrawal]

Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>

Re: [dpdk-dev] [PATCH v2 05/30] net/dpaa: support Rx interrupt handler

[Hemant Agrawal]

Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>

Re: [dpdk-dev] [PATCH v2 06/30] net/dpaa: support for Rx interrupt enable and disable

[Hemant Agrawal]

Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>

Re: [dpdk-dev] [PATCH v2 04/30] bus/dpaa: decouple fq portal alloc and init

[Hemant Agrawal]

Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>

Re: [dpdk-dev] [PATCH v2 22/30] net/dpaa2: add timestamp support

[Hemant Agrawal]

Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>

Re: [dpdk-dev] [PATCH v2 21/30] net/dpaa2: add Tx confirmation mode support

[Hemant Agrawal]

Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>

Re: [dpdk-dev] [PATCH v2 04/30] bus/dpaa: decouple fq portal alloc and init

[Ferruh Yigit]

On 8/29/2019 11:27 AM, Sachin Saxena wrote:
> From: Nipun Gupta <nipun.gupta@nxp.com>
> 
> The decoupling of FQ portal allocation is required as a
> pre-requisite to support Rx interrupts as we need to have
> event FD's at portal allocation i.e. before the
> initialization of the Frame Queues.
> This change will help us get the event fd once the portals
> have been allocated for static FQ's.
> 
> Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>

<...>

> @@ -123,3 +123,10 @@ DPDK_19.05 {
>  
>  	local: *;
>  } DPDK_18.11;
> +
> +DPDK_19.11 {
> +	global:
> +	fsl_qman_fq_portal_create;
> +
> +	local: *;
> +} DPDK_19.05;

"local:" tag doesn't need to be in each block, having only in the first one is
enough, I can fix while merging.

Re: [dpdk-dev] [PATCH v2 30/30] net/dpaa2: add soft parser driver

[Hemant Agrawal]

Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>

Re: [dpdk-dev] [PATCH v2 24/30] net/dpaa2: add ptp driver

[Hemant Agrawal]

Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>

Re: [dpdk-dev] [PATCH v2 23/30] net/dpaa2: add dprtc sub-module

[Hemant Agrawal]

Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>

Re: [dpdk-dev] [PATCH v2 15/30] net/dpaa2: add optional non-prefetch Rx mode

[Hemant Agrawal]

Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>

Re: [dpdk-dev] [PATCH v2 07/30] net/dpaa: add SG support in Tx for non DPAA buffer

[Hemant Agrawal]

Acked-by: Hemant Agrawal <hemant.agrawal@nxp.com>

Re: [dpdk-dev] [PATCH v2 04/30] bus/dpaa: decouple fq portal alloc and init

[Nipun Gupta]

> -----Original Message-----
> From: Ferruh Yigit <ferruh.yigit@intel.com>
> Sent: Thursday, October 3, 2019 1:23 PM
> To: Sachin Saxena <sachin.saxena@nxp.com>; dev@dpdk.org
> Cc: thomas@monjalon.net; Nipun Gupta <nipun.gupta@nxp.com>
> Subject: Re: [dpdk-dev] [PATCH v2 04/30] bus/dpaa: decouple fq portal alloc and
> init
> 
> On 8/29/2019 11:27 AM, Sachin Saxena wrote:
> > From: Nipun Gupta <nipun.gupta@nxp.com>
> >
> > The decoupling of FQ portal allocation is required as a
> > pre-requisite to support Rx interrupts as we need to have
> > event FD's at portal allocation i.e. before the
> > initialization of the Frame Queues.
> > This change will help us get the event fd once the portals
> > have been allocated for static FQ's.
> >
> > Signed-off-by: Nipun Gupta <nipun.gupta@nxp.com>
> 
> <...>
> 
> > @@ -123,3 +123,10 @@ DPDK_19.05 {
> >
> >  	local: *;
> >  } DPDK_18.11;
> > +
> > +DPDK_19.11 {
> > +	global:
> > +	fsl_qman_fq_portal_create;
> > +
> > +	local: *;
> > +} DPDK_19.05;
> 
> "local:" tag doesn't need to be in each block, having only in the first one is
> enough, I can fix while merging.

Thank you !!

Re: [dpdk-dev] [PATCH v2 00/30] Enhancements and fixes in NXP dpaax drivers and fsl-mc bus

[Ferruh Yigit]

On 8/29/2019 11:27 AM, Sachin Saxena wrote:
> This patch set adds following enhancements:
> 	1. IEEE1588 support in net/dpaa2
> 	2. Interrupt support in net/dpaa
> 	3. Support multi vfio group in fsl-mc bus
> 	4. Taildrop support on frame count basis
> 	5. Soft parser driver in net/dpaa2
> 	6. Enhanced debug information
> 
> ---
> v2 Change-log:
> 	* Fixed compilation break with gcc-4.8 on x86 platform
> 
> Hemant Agrawal (14):
>   bus/dpaa: fix DPAA SEC blacklist case
>   net/dpaa: improve the Rx offload debug message
>   net/dpaa: reduce debug messages
>   net/dpaa2: improve the Rx offload debug message
>   common/dpaax: reduce debug mesages
>   mempool/dpaa: reduce debug messages
>   net/dpaa2: realign Rx offload support types
>   net/dpaa2: enable Rx offload for timestamp
>   net/dpaa2: support L2 payload based RSS distribution
>   net/dpaa2: add taildrop support on frame count basis
>   net/dpaa2: add cgr counters in xtra stats
>   net/dpaa2: add support for config max Rx length in HW
>   net/dpaa2: support dpdmux classification on eth type
>   bus/fslmc: support multi vfio group
> 
> Nipun Gupta (6):
>   bus/dpaa: remove un-necessary thread affinity
>   bus/dpaa: decouple fq portal alloc and init
>   net/dpaa: support Rx interrupt handler
>   net/dpaa: support for Rx interrupt enable and disable
>   net/dpaa: add SG support in Tx for non DPAA buffer
>   net/dpaa2: add optional non-prefetch Rx mode
> 
> Priyanka Jain (4):
>   net/dpaa2: add Tx confirmation mode support
>   net/dpaa2: add timestamp support
>   net/dpaa2: add dprtc sub-module
>   net/dpaa2: add ptp driver
> 
> Sachin Saxena (1):
>   net/dpaa2: use LFQIDs in Tx instead of qdid
> 
> Shreyansh Jain (3):
>   bus/fslmc: update PA-VA dpaax library only in PA mode
>   bus/fslmc: check for Dma map in primary process only
>   net/dpaa2: support separate MC portal per process
> 
> Sunil Kumar Kori (2):
>   net/dpaa2: add support for soft parser in MC
>   net/dpaa2: add soft parser driver

Series applied to dpdk-next-net/master, thanks.