* [dpdk-dev] [PATCH 0/8] net/ice/base: share code update secend batch.
@ 2019-09-02 3:55 Qi Zhang
2019-09-02 3:55 ` [dpdk-dev] [PATCH 1/8] net/ice/base: remove redundant empty lines Qi Zhang
` (14 more replies)
0 siblings, 15 replies; 166+ messages in thread
From: Qi Zhang @ 2019-09-02 3:55 UTC (permalink / raw)
To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang
The patchset depends on the first batch
http://patchwork.dpdk.org/project/dpdk/list/?series=6158&state=*
Key Features:
1) Add tunnel support for fdir
2) Add non-word aligned field support for fdir
Qi Zhang (8):
net/ice/base: remove redundant empty lines
net/ice/base: add support for tunnel packets
net/ice/base: add non-word aligned ip field support
net/ice/base: add non-word aligned ipv6 field support
net/ice/base: correct the mask for checking protocol header
net/ice/base: propagate errors from functions
net/ice/base: remove pointless NULL check of port info
net/ice/base: remove RSS code as iavf host
drivers/net/ice/base/ice_adminq_cmd.h | 111 -----------
drivers/net/ice/base/ice_bitops.h | 2 -
drivers/net/ice/base/ice_common.c | 25 ---
drivers/net/ice/base/ice_common.h | 2 -
drivers/net/ice/base/ice_controlq.c | 9 -
drivers/net/ice/base/ice_controlq.h | 1 -
drivers/net/ice/base/ice_devids.h | 1 -
drivers/net/ice/base/ice_fdir.c | 326 +++++++++++++++++++++++++------
drivers/net/ice/base/ice_fdir.h | 16 +-
drivers/net/ice/base/ice_flex_pipe.c | 5 -
drivers/net/ice/base/ice_flex_pipe.h | 1 -
drivers/net/ice/base/ice_flow.c | 157 ++-------------
drivers/net/ice/base/ice_hw_autogen.h | 2 -
drivers/net/ice/base/ice_lan_tx_rx.h | 9 -
drivers/net/ice/base/ice_nvm.c | 4 -
drivers/net/ice/base/ice_protocol_type.h | 2 -
drivers/net/ice/base/ice_sched.c | 7 +-
drivers/net/ice/base/ice_switch.c | 16 +-
drivers/net/ice/base/ice_switch.h | 2 -
drivers/net/ice/base/ice_type.h | 19 +-
20 files changed, 314 insertions(+), 403 deletions(-)
--
2.13.6
^ permalink raw reply [flat|nested] 166+ messages in thread* [dpdk-dev] [PATCH 1/8] net/ice/base: remove redundant empty lines 2019-09-02 3:55 [dpdk-dev] [PATCH 0/8] net/ice/base: share code update secend batch Qi Zhang @ 2019-09-02 3:55 ` Qi Zhang 2019-09-02 3:55 ` [dpdk-dev] [PATCH 2/8] net/ice/base: add support for tunnel packets Qi Zhang ` (13 subsequent siblings) 14 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-02 3:55 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr Remove redundant empty lines Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_adminq_cmd.h | 111 ------------------------------- drivers/net/ice/base/ice_bitops.h | 2 - drivers/net/ice/base/ice_common.c | 25 ------- drivers/net/ice/base/ice_common.h | 2 - drivers/net/ice/base/ice_controlq.c | 9 --- drivers/net/ice/base/ice_controlq.h | 1 - drivers/net/ice/base/ice_devids.h | 1 - drivers/net/ice/base/ice_flex_pipe.c | 5 -- drivers/net/ice/base/ice_flex_pipe.h | 1 - drivers/net/ice/base/ice_hw_autogen.h | 2 - drivers/net/ice/base/ice_lan_tx_rx.h | 9 --- drivers/net/ice/base/ice_nvm.c | 4 -- drivers/net/ice/base/ice_protocol_type.h | 2 - drivers/net/ice/base/ice_sched.c | 4 -- drivers/net/ice/base/ice_switch.c | 8 --- drivers/net/ice/base/ice_switch.h | 2 - drivers/net/ice/base/ice_type.h | 9 --- 17 files changed, 197 deletions(-) diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h index 8e1d6a07d..e6a1350ba 100644 --- a/drivers/net/ice/base/ice_adminq_cmd.h +++ b/drivers/net/ice/base/ice_adminq_cmd.h @@ -9,12 +9,10 @@ * descriptor format. It is shared between Firmware and Software. */ - #define ICE_MAX_VSI 768 #define ICE_AQC_TOPO_MAX_LEVEL_NUM 0x9 #define ICE_AQ_SET_MAC_FRAME_SIZE_MAX 9728 - struct ice_aqc_generic { __le32 param0; __le32 param1; @@ -22,7 +20,6 @@ struct ice_aqc_generic { __le32 addr_low; }; - /* Get version (direct 0x0001) */ struct ice_aqc_get_ver { __le32 rom_ver; @@ -37,7 +34,6 @@ struct ice_aqc_get_ver { u8 api_patch; }; - /* Send driver version (indirect 0x0002) */ struct ice_aqc_driver_ver { u8 major_ver; @@ -49,7 +45,6 @@ struct ice_aqc_driver_ver { __le32 addr_low; }; - /* Queue Shutdown (direct 0x0003) */ struct ice_aqc_q_shutdown { u8 driver_unloading; @@ -57,9 +52,6 @@ struct ice_aqc_q_shutdown { u8 reserved[15]; }; - - - /* Request resource ownership (direct 0x0008) * Release resource ownership (direct 0x0009) */ @@ -92,7 +84,6 @@ struct ice_aqc_req_res { u8 reserved[2]; }; - /* Get function capabilities (indirect 0x000A) * Get device capabilities (indirect 0x000B) */ @@ -105,7 +96,6 @@ struct ice_aqc_list_caps { __le32 addr_low; }; - /* Device/Function buffer entry, repeated per reported capability */ struct ice_aqc_list_caps_elem { __le16 cap; @@ -132,7 +122,6 @@ struct ice_aqc_list_caps_elem { __le64 rsvd2; }; - /* Manage MAC address, read command - indirect (0x0107) * This struct is also used for the response */ @@ -153,7 +142,6 @@ struct ice_aqc_manage_mac_read { __le32 addr_low; }; - /* Response buffer format for manage MAC read command */ struct ice_aqc_manage_mac_read_resp { u8 lport_num; @@ -163,7 +151,6 @@ struct ice_aqc_manage_mac_read_resp { u8 mac_addr[ETH_ALEN]; }; - /* Manage MAC address, write command - direct (0x0108) */ struct ice_aqc_manage_mac_write { u8 rsvd; @@ -182,7 +169,6 @@ struct ice_aqc_manage_mac_write { __le32 addr_low; }; - /* Clear PXE Command and response (direct 0x0110) */ struct ice_aqc_clear_pxe { u8 rx_cnt; @@ -190,7 +176,6 @@ struct ice_aqc_clear_pxe { u8 reserved[15]; }; - /* Configure No-Drop Policy Command (direct 0x0112) */ struct ice_aqc_config_no_drop_policy { u8 opts; @@ -215,7 +200,6 @@ struct ice_aqc_get_sw_cfg { __le32 addr_low; }; - /* Each entry in the response buffer is of the following type: */ struct ice_aqc_get_sw_cfg_resp_elem { /* VSI/Port Number */ @@ -242,7 +226,6 @@ struct ice_aqc_get_sw_cfg_resp_elem { #define ICE_AQC_GET_SW_CONF_RESP_IS_VF BIT(15) }; - /* The response buffer is as follows. Note that the length of the * elements array varies with the length of the command response. */ @@ -250,8 +233,6 @@ struct ice_aqc_get_sw_cfg_resp { struct ice_aqc_get_sw_cfg_resp_elem elements[1]; }; - - /* These resource type defines are used for all switch resource * commands where a resource type is required, such as: * Get Resource Allocation command (indirect 0x0204) @@ -324,7 +305,6 @@ struct ice_aqc_get_res_resp { struct ice_aqc_get_res_resp_elem elem[1]; }; - /* Allocate Resources command (indirect 0x0208) * Free Resources command (indirect 0x0209) */ @@ -335,7 +315,6 @@ struct ice_aqc_alloc_free_res_cmd { __le32 addr_low; }; - /* Resource descriptor */ struct ice_aqc_res_elem { union { @@ -344,7 +323,6 @@ struct ice_aqc_res_elem { } e; }; - /* Buffer for Allocate/Free Resources commands */ struct ice_aqc_alloc_free_res_elem { __le16 res_type; /* Types defined above cmd 0x0204 */ @@ -355,7 +333,6 @@ struct ice_aqc_alloc_free_res_elem { struct ice_aqc_res_elem elem[1]; }; - /* Get Allocated Resource Descriptors Command (indirect 0x020A) */ struct ice_aqc_get_allocd_res_desc { union { @@ -379,7 +356,6 @@ struct ice_aqc_get_allocd_res_desc_resp { struct ice_aqc_res_elem elem[1]; }; - /* Add VSI (indirect 0x0210) * Update VSI (indirect 0x0211) * Get VSI (indirect 0x0212) @@ -405,7 +381,6 @@ struct ice_aqc_add_get_update_free_vsi { __le32 addr_low; }; - /* Response descriptor for: * Add VSI (indirect 0x0210) * Update VSI (indirect 0x0211) @@ -420,7 +395,6 @@ struct ice_aqc_add_update_free_vsi_resp { __le32 addr_low; }; - struct ice_aqc_get_vsi_resp { __le16 vsi_num; u8 vf_id; @@ -434,7 +408,6 @@ struct ice_aqc_get_vsi_resp { __le32 addr_low; }; - struct ice_aqc_vsi_props { __le16 valid_sections; #define ICE_AQ_VSI_PROP_SW_VALID BIT(0) @@ -589,7 +562,6 @@ struct ice_aqc_vsi_props { u8 reserved[24]; }; - /* Add/update mirror rule - direct (0x0260) */ #define ICE_AQC_RULE_ID_VALID_S 7 #define ICE_AQC_RULE_ID_VALID_M (0x1 << ICE_AQC_RULE_ID_VALID_S) @@ -694,7 +666,6 @@ struct ice_aqc_storm_cfg { __le32 reserved; }; - #define ICE_MAX_NUM_RECIPES 64 /* Add/Get Recipe (indirect 0x0290/0x0292)*/ @@ -779,7 +750,6 @@ struct ice_aqc_sw_rules { __le32 addr_low; }; - #pragma pack(1) /* Add/Update/Get/Remove lookup Rx/Tx command/response entry * This structures describes the lookup rules and associated actions. "index" @@ -867,7 +837,6 @@ struct ice_sw_rule_lkup_rx_tx { }; #pragma pack() - /* Add/Update/Remove large action command/response entry * "index" is returned as part of a response to a successful Add command, and * can be used to identify the action for Update/Get/Remove commands. @@ -928,7 +897,6 @@ struct ice_sw_rule_lg_act { #define ICE_LG_ACT_STAT_COUNT_M (0x7F << ICE_LG_ACT_STAT_COUNT_S) }; - /* Add/Update/Remove VSI list command/response entry * "index" is returned as part of a response to a successful Add command, and * can be used to identify the VSI list for Update/Get/Remove commands. @@ -939,7 +907,6 @@ struct ice_sw_rule_vsi_list { __le16 vsi[1]; /* Array of number_vsi VSI numbers */ }; - #pragma pack(1) /* Query VSI list command/response entry */ struct ice_sw_rule_vsi_list_query { @@ -948,7 +915,6 @@ struct ice_sw_rule_vsi_list_query { }; #pragma pack() - #pragma pack(1) /* Add switch rule response: * Content of return buffer is same as the input buffer. The status field and @@ -974,7 +940,6 @@ struct ice_aqc_sw_rules_elem { #pragma pack() - /* PFC Ignore (direct 0x0301) * The command and response use the same descriptor structure */ @@ -1009,7 +974,6 @@ struct ice_aqc_set_dcb_params { u8 rsvd[14]; }; - /* Get Default Topology (indirect 0x0400) */ struct ice_aqc_get_topo { u8 port_num; @@ -1020,7 +984,6 @@ struct ice_aqc_get_topo { __le32 addr_low; }; - /* Update TSE (indirect 0x0403) * Get TSE (indirect 0x0404) * Add TSE (indirect 0x0401) @@ -1037,7 +1000,6 @@ struct ice_aqc_sched_elem_cmd { __le32 addr_low; }; - /* This is the buffer for: * Suspend Nodes (indirect 0x0409) * Resume Nodes (indirect 0x040A) @@ -1046,7 +1008,6 @@ struct ice_aqc_suspend_resume_elem { __le32 teid[1]; }; - struct ice_aqc_txsched_move_grp_info_hdr { __le32 src_parent_teid; __le32 dest_parent_teid; @@ -1054,19 +1015,16 @@ struct ice_aqc_txsched_move_grp_info_hdr { __le16 reserved; }; - struct ice_aqc_move_elem { struct ice_aqc_txsched_move_grp_info_hdr hdr; __le32 teid[1]; }; - struct ice_aqc_elem_info_bw { __le16 bw_profile_idx; __le16 bw_alloc; }; - struct ice_aqc_txsched_elem { u8 elem_type; /* Special field, reserved for some aq calls */ #define ICE_AQC_ELEM_TYPE_UNDEFINED 0x0 @@ -1098,50 +1056,42 @@ struct ice_aqc_txsched_elem { __le16 reserved2; }; - struct ice_aqc_txsched_elem_data { __le32 parent_teid; __le32 node_teid; struct ice_aqc_txsched_elem data; }; - struct ice_aqc_txsched_topo_grp_info_hdr { __le32 parent_teid; __le16 num_elems; __le16 reserved2; }; - struct ice_aqc_add_elem { struct ice_aqc_txsched_topo_grp_info_hdr hdr; struct ice_aqc_txsched_elem_data generic[1]; }; - struct ice_aqc_conf_elem { struct ice_aqc_txsched_elem_data generic[1]; }; - struct ice_aqc_get_elem { struct ice_aqc_txsched_elem_data generic[1]; }; - struct ice_aqc_get_topo_elem { struct ice_aqc_txsched_topo_grp_info_hdr hdr; struct ice_aqc_txsched_elem_data generic[ICE_AQC_TOPO_MAX_LEVEL_NUM]; }; - struct ice_aqc_delete_elem { struct ice_aqc_txsched_topo_grp_info_hdr hdr; __le32 teid[1]; }; - /* Query Port ETS (indirect 0x040E) * * This indirect command is used to query port TC node configuration. @@ -1168,7 +1118,6 @@ struct ice_aqc_port_ets_elem { __le32 tc_node_teid[8]; /* Used for response, reserved in command */ }; - /* Rate limiting profile for * Add RL profile (indirect 0x0410) * Query RL profile (indirect 0x0411) @@ -1184,7 +1133,6 @@ struct ice_aqc_rl_profile { __le32 addr_low; }; - struct ice_aqc_rl_profile_elem { u8 level; u8 flags; @@ -1204,13 +1152,10 @@ struct ice_aqc_rl_profile_elem { __le16 rl_encode; }; - struct ice_aqc_rl_profile_generic_elem { struct ice_aqc_rl_profile_elem generic[1]; }; - - /* Configure L2 Node CGD (indirect 0x0414) * This indirect command allows configuring a congestion domain for given L2 * node TEIDs in the scheduler topology. @@ -1222,19 +1167,16 @@ struct ice_aqc_cfg_l2_node_cgd { __le32 addr_low; }; - struct ice_aqc_cfg_l2_node_cgd_elem { __le32 node_teid; u8 cgd; u8 reserved[3]; }; - struct ice_aqc_cfg_l2_node_cgd_data { struct ice_aqc_cfg_l2_node_cgd_elem elem[1]; }; - /* Query Scheduler Resource Allocation (indirect 0x0412) * This indirect command retrieves the scheduler resources allocated by * EMP Firmware to the given PF. @@ -1245,7 +1187,6 @@ struct ice_aqc_query_txsched_res { __le32 addr_low; }; - struct ice_aqc_generic_sched_props { __le16 phys_levels; __le16 logical_levels; @@ -1257,7 +1198,6 @@ struct ice_aqc_generic_sched_props { u8 rsvd1[22]; }; - struct ice_aqc_layer_props { u8 logical_layer; u8 chunk_size; @@ -1271,13 +1211,11 @@ struct ice_aqc_layer_props { u8 rsvd1[14]; }; - struct ice_aqc_query_txsched_res_resp { struct ice_aqc_generic_sched_props sched_props; struct ice_aqc_layer_props layer_props[ICE_AQC_TOPO_MAX_LEVEL_NUM]; }; - /* Query Node to Root Topology (indirect 0x0413) * This command uses ice_aqc_get_elem as its data buffer. */ @@ -1288,7 +1226,6 @@ struct ice_aqc_query_node_to_root { __le32 addr_low; }; - /* Get PHY capabilities (indirect 0x0600) */ struct ice_aqc_get_phy_caps { u8 lport_num; @@ -1311,7 +1248,6 @@ struct ice_aqc_get_phy_caps { __le32 addr_low; }; - /* This is #define of PHY type (Extended): * The first set of defines is for phy_type_low. */ @@ -1453,7 +1389,6 @@ struct ice_aqc_get_phy_caps_data { } qual_modules[ICE_AQC_QUAL_MOD_COUNT_MAX]; }; - /* Set PHY capabilities (direct 0x0601) * NOTE: This command must be followed by setup link and restart auto-neg */ @@ -1464,7 +1399,6 @@ struct ice_aqc_set_phy_cfg { __le32 addr_low; }; - /* Set PHY config command data structure */ struct ice_aqc_set_phy_cfg_data { __le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */ @@ -1485,7 +1419,6 @@ struct ice_aqc_set_phy_cfg_data { u8 rsvd1; }; - /* Set MAC Config command data structure (direct 0x0603) */ struct ice_aqc_set_mac_cfg { __le16 max_frame_size; @@ -1505,7 +1438,6 @@ struct ice_aqc_set_mac_cfg { u8 reserved[7]; }; - /* Restart AN command data structure (direct 0x0605) * Also used for response, with only the lport_num field present. */ @@ -1518,7 +1450,6 @@ struct ice_aqc_restart_an { u8 reserved2[13]; }; - /* Get link status (indirect 0x0607), also used for Link Status Event */ struct ice_aqc_get_link_status { u8 lport_num; @@ -1535,7 +1466,6 @@ struct ice_aqc_get_link_status { __le32 addr_low; }; - /* Get link status response data structure, also used for Link Status Event */ struct ice_aqc_get_link_status_data { u8 topo_media_conflict; @@ -1621,7 +1551,6 @@ struct ice_aqc_get_link_status_data { __le64 phy_type_high; /* Use values from ICE_PHY_TYPE_HIGH_* */ }; - /* Set event mask command (direct 0x0613) */ struct ice_aqc_set_event_mask { u8 lport_num; @@ -1641,8 +1570,6 @@ struct ice_aqc_set_event_mask { u8 reserved1[6]; }; - - /* Set MAC Loopback command (direct 0x0620) */ struct ice_aqc_set_mac_lb { u8 lb_mode; @@ -1651,9 +1578,6 @@ struct ice_aqc_set_mac_lb { u8 reserved[15]; }; - - - struct ice_aqc_link_topo_addr { u8 lport_num; u8 lport_num_valid; @@ -1716,8 +1640,6 @@ struct ice_aqc_set_port_id_led { u8 rsvd[13]; }; - - /* Read/Write SFF EEPROM command (indirect 0x06EE) */ struct ice_aqc_sff_eeprom { u8 lport_num; @@ -1797,7 +1719,6 @@ struct ice_aqc_nvm { #define ICE_AQC_NVM_LLDP_STATUS_M_LEN 4 /* In Bits */ #define ICE_AQC_NVM_LLDP_STATUS_RD_LEN 4 /* In Bytes */ - /* Used for 0x0704 as well as for 0x0705 commands */ struct ice_aqc_nvm_cfg { u8 cmd_flags; @@ -1812,14 +1733,12 @@ struct ice_aqc_nvm_cfg { __le32 addr_low; }; - struct ice_aqc_nvm_cfg_data { __le16 field_id; __le16 field_options; __le16 field_value; }; - /* NVM Checksum Command (direct, 0x0706) */ struct ice_aqc_nvm_checksum { u8 flags; @@ -1831,9 +1750,6 @@ struct ice_aqc_nvm_checksum { u8 rsvd2[12]; }; - - - /* Get LLDP MIB (indirect 0x0A00) * Note: This is also used by the LLDP MIB Change Event (0x0A01) * as the format is the same. @@ -1985,7 +1901,6 @@ struct ice_aqc_lldp_stop_start_specific_agent { u8 reserved[15]; }; - /* Get/Set RSS key (indirect 0x0B04/0x0B02) */ struct ice_aqc_get_set_rss_key { #define ICE_AQC_GSET_RSS_KEY_VSI_VALID BIT(15) @@ -1997,7 +1912,6 @@ struct ice_aqc_get_set_rss_key { __le32 addr_low; }; - #define ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE 0x28 #define ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE 0xC #define ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE \ @@ -2019,7 +1933,6 @@ struct ice_aqc_get_set_rss_keys { u8 extended_hash_key[ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE]; }; - /* Get/Set RSS LUT (indirect 0x0B05/0x0B03) */ struct ice_aqc_get_set_rss_lut { #define ICE_AQC_GSET_RSS_LUT_VSI_VALID BIT(15) @@ -2055,7 +1968,6 @@ struct ice_aqc_get_set_rss_lut { __le32 addr_low; }; - /* Clear FD Table Command (direct, 0x0B06) */ struct ice_aqc_clear_fd_table { u8 clear_type; @@ -2066,9 +1978,6 @@ struct ice_aqc_clear_fd_table { u8 reserved[12]; }; - - - /* Add Tx LAN Queues (indirect 0x0C30) */ struct ice_aqc_add_txqs { u8 num_qgrps; @@ -2078,7 +1987,6 @@ struct ice_aqc_add_txqs { __le32 addr_low; }; - /* This is the descriptor of each queue entry for the Add Tx LAN Queues * command (0x0C30). Only used within struct ice_aqc_add_tx_qgrp. */ @@ -2091,7 +1999,6 @@ struct ice_aqc_add_txqs_perq { struct ice_aqc_txsched_elem info; }; - /* The format of the command buffer for Add Tx LAN Queues (0x0C30) * is an array of the following structs. Please note that the length of * each struct ice_aqc_add_tx_qgrp is variable due @@ -2104,7 +2011,6 @@ struct ice_aqc_add_tx_qgrp { struct ice_aqc_add_txqs_perq txqs[1]; }; - /* Disable Tx LAN Queues (indirect 0x0C31) */ struct ice_aqc_dis_txqs { u8 cmd_type; @@ -2127,7 +2033,6 @@ struct ice_aqc_dis_txqs { __le32 addr_low; }; - /* The buffer for Disable Tx LAN Queues (indirect 0x0C31) * contains the following structures, arrayed one after the * other. @@ -2150,12 +2055,10 @@ struct ice_aqc_dis_txq_item { (1 << ICE_AQC_Q_DIS_BUF_ELEM_TYPE_S) }; - struct ice_aqc_dis_txq { struct ice_aqc_dis_txq_item qgrps[1]; }; - /* Tx LAN Queues Cleanup Event (0x0C31) */ struct ice_aqc_txqs_cleanup { __le16 caller_opc; @@ -2163,7 +2066,6 @@ struct ice_aqc_txqs_cleanup { u8 reserved[12]; }; - /* Move / Reconfigure Tx Queues (indirect 0x0C32) */ struct ice_aqc_move_txqs { u8 cmd_type; @@ -2184,7 +2086,6 @@ struct ice_aqc_move_txqs { __le32 addr_low; }; - /* This is the descriptor of each queue entry for the move Tx LAN Queues * command (0x0C32). */ @@ -2195,15 +2096,12 @@ struct ice_aqc_move_txqs_elem { __le32 q_teid; }; - struct ice_aqc_move_txqs_data { __le32 src_teid; __le32 dest_teid; struct ice_aqc_move_txqs_elem txqs[1]; }; - - /* Download Package (indirect 0x0C40) */ /* Also used for Update Package (indirect 0x0C42) */ struct ice_aqc_download_pkg { @@ -2255,9 +2153,6 @@ struct ice_aqc_get_pkg_info_resp { struct ice_aqc_get_pkg_info pkg_info[1]; }; - - - /* Lan Queue Overflow Event (direct, 0x1001) */ struct ice_aqc_event_lan_overflow { __le32 prtdcb_ruptq; @@ -2265,9 +2160,6 @@ struct ice_aqc_event_lan_overflow { u8 reserved[8]; }; - - - /** * struct ice_aq_desc - Admin Queue (AQ) descriptor * @flags: ICE_AQ_FLAG_* flags @@ -2361,7 +2253,6 @@ struct ice_aq_desc { } params; }; - /* FW defined boundary for a large buffer, 4k >= Large buffer > 512 bytes */ #define ICE_AQ_LG_BUF 512 @@ -2572,8 +2463,6 @@ enum ice_adminq_opc { ice_aqc_opc_update_pkg = 0x0C42, ice_aqc_opc_get_pkg_info_list = 0x0C43, - - /* Standalone Commands/Events */ ice_aqc_opc_event_lan_overflow = 0x1001, }; diff --git a/drivers/net/ice/base/ice_bitops.h b/drivers/net/ice/base/ice_bitops.h index f0aa8ce88..32f64cac0 100644 --- a/drivers/net/ice/base/ice_bitops.h +++ b/drivers/net/ice/base/ice_bitops.h @@ -8,7 +8,6 @@ /* Define the size of the bitmap chunk */ typedef u32 ice_bitmap_t; - /* Number of bits per bitmap chunk */ #define BITS_PER_CHUNK (BITS_PER_BYTE * sizeof(ice_bitmap_t)) /* Determine which chunk a bit belongs in */ @@ -372,5 +371,4 @@ ice_cmp_bitmap(ice_bitmap_t *bmp1, ice_bitmap_t *bmp2, u16 size) return true; } - #endif /* _ICE_BITOPS_H_ */ diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index 11e902ea1..16b91dc12 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -11,7 +11,6 @@ #define ICE_PF_RESET_WAIT_COUNT 200 - /** * ice_set_mac_type - Sets MAC type * @hw: pointer to the HW structure @@ -41,7 +40,6 @@ static enum ice_status ice_set_mac_type(struct ice_hw *hw) return status; } - /** * ice_clear_pf_cfg - Clear PF configuration * @hw: pointer to the hardware structure @@ -113,7 +111,6 @@ ice_aq_manage_mac_read(struct ice_hw *hw, void *buf, u16 buf_size, ETH_ALEN, ICE_DMA_TO_NONDMA); break; } - return ICE_SUCCESS; } @@ -533,7 +530,6 @@ static void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw) ice_free(hw, sw); } - /** * ice_get_itr_intrl_gran * @hw: pointer to the HW struct @@ -598,7 +594,6 @@ void ice_print_rollback_msg(struct ice_hw *hw) &ver_lo); SNPRINTF(nvm_str, sizeof(nvm_str), "%x.%02x 0x%x %d.%d.%d", ver_hi, ver_lo, hw->nvm.eetrack, oem_ver, oem_build, oem_patch); - ice_warn(hw, "Firmware rollback mode detected. Current version is NVM: %s, FW: %d.%d. Device may exhibit limited functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware rollback mode", nvm_str, hw->fw_maj_ver, hw->fw_min_ver); @@ -617,7 +612,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw) ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__); - /* Set MAC type based on DeviceID */ status = ice_set_mac_type(hw); if (status) @@ -627,14 +621,12 @@ enum ice_status ice_init_hw(struct ice_hw *hw) PF_FUNC_RID_FUNCTION_NUMBER_M) >> PF_FUNC_RID_FUNCTION_NUMBER_S; - status = ice_reset(hw, ICE_RESET_PFR); if (status) return status; ice_get_itr_intrl_gran(hw); - status = ice_create_all_ctrlq(hw); if (status) goto err_unroll_cqinit; @@ -686,7 +678,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw) goto err_unroll_alloc; } - /* Initialize port_info struct with scheduler data */ status = ice_sched_init_port(hw->port_info); if (status) @@ -725,7 +716,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw) if (status) goto err_unroll_sched; - /* Get MAC information */ /* A single port can report up to two (LAN and WoL) addresses */ mac_buf = ice_calloc(hw, 2, @@ -926,7 +916,6 @@ enum ice_status ice_reset(struct ice_hw *hw, enum ice_reset_req req) wr32(hw, GLGEN_RTRIG, val); ice_flush(hw); - /* wait for the FW to be ready */ return ice_check_reset(hw); } @@ -997,8 +986,6 @@ ice_get_pfa_module_tlv(struct ice_hw *hw, u16 *module_tlv, u16 *module_tlv_len, return ICE_ERR_DOES_NOT_EXIST; } - - /** * ice_copy_rxq_ctx_to_hw * @hw: pointer to the hardware structure @@ -1321,7 +1308,6 @@ ice_clear_tx_drbell_q_ctx(struct ice_hw *hw, u32 tx_drbell_q_index) } #endif /* !NO_UNUSED_CTX_CODE || AE_DRIVER */ - /* FW Admin Queue command wrappers */ /** @@ -2142,7 +2128,6 @@ ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags, cmd->flags = flags; - /* Prep values for flags, sah, sal */ cmd->sah = HTONS(*((const u16 *)mac_addr)); cmd->sal = HTONL(*((const u32 *)(mac_addr + 2))); @@ -2179,7 +2164,6 @@ void ice_clear_pxe_mode(struct ice_hw *hw) ice_aq_clear_pxe_mode(hw); } - /** * ice_get_link_speed_based_on_phy_type - returns link speed * @phy_type_low: lower part of phy_type @@ -2848,7 +2832,6 @@ ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd) return ice_aq_send_cmd(hw, &desc, NULL, 0, cd); } - /** * ice_aq_set_port_id_led * @pi: pointer to the port information @@ -2869,7 +2852,6 @@ ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode, ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_port_id_led); - if (is_orig_mode) cmd->ident_mode = ICE_AQC_PORT_IDENT_LED_ORIG; else @@ -3357,7 +3339,6 @@ ice_aq_move_recfg_lan_txq(struct ice_hw *hw, u8 num_qs, bool is_move, return status; } - /* End of FW Admin Queue command wrappers */ /** @@ -3581,9 +3562,6 @@ ice_set_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info) return ICE_SUCCESS; } - - - /** * ice_read_byte - read context byte into struct * @src_ctx: the context structure to read from @@ -4047,8 +4025,6 @@ ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap, ICE_SCHED_NODE_OWNER_LAN); } - - /** * ice_replay_pre_init - replay pre initialization * @hw: pointer to the HW struct @@ -4246,7 +4222,6 @@ ice_stat_update_repc(struct ice_hw *hw, u16 vsi_handle, bool prev_stat_loaded, cur_stats->rx_errors += error_cnt; } - /** * ice_sched_query_elem - query element information from HW * @hw: pointer to the HW struct diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h index c42c58670..bcb0a999d 100644 --- a/drivers/net/ice/base/ice_common.h +++ b/drivers/net/ice/base/ice_common.h @@ -169,7 +169,6 @@ ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask, enum ice_status ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd); - enum ice_status ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode, struct ice_sq_cd *cd); @@ -178,7 +177,6 @@ ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr, u16 mem_addr, u8 page, u8 set_page, u8 *data, u8 length, bool write, struct ice_sq_cd *cd); - enum ice_status ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info); enum ice_status diff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c index 1ea8f3a24..8a65fae40 100644 --- a/drivers/net/ice/base/ice_controlq.c +++ b/drivers/net/ice/base/ice_controlq.c @@ -4,7 +4,6 @@ #include "ice_common.h" - #define ICE_CQ_INIT_REGS(qinfo, prefix) \ do { \ (qinfo)->sq.head = prefix##_ATQH; \ @@ -53,7 +52,6 @@ static void ice_mailbox_init_regs(struct ice_hw *hw) ICE_CQ_INIT_REGS(cq, PF_MBX); } - /** * ice_check_sq_alive * @hw: pointer to the HW struct @@ -521,7 +519,6 @@ ice_shutdown_rq(struct ice_hw *hw, struct ice_ctl_q_info *cq) return ret_code; } - /** * ice_init_check_adminq - Check version for Admin Queue to know if its alive * @hw: pointer to the hardware structure @@ -533,12 +530,10 @@ static enum ice_status ice_init_check_adminq(struct ice_hw *hw) ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__); - status = ice_aq_get_fw_ver(hw, NULL); if (status) goto init_ctrlq_free_rq; - if (!ice_aq_ver_check(hw)) { status = ICE_ERR_FW_API_VER; goto init_ctrlq_free_rq; @@ -633,7 +628,6 @@ enum ice_status ice_init_all_ctrlq(struct ice_hw *hw) ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__); - /* Init FW admin queue */ ret_code = ice_init_ctrlq(hw, ICE_CTL_Q_ADMIN); if (ret_code) @@ -972,7 +966,6 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq, ice_debug_cq(hw, (void *)desc_on_ring, buf, buf_size); - (cq->sq.next_to_use)++; if (cq->sq.next_to_use == cq->sq.count) cq->sq.next_to_use = 0; @@ -1025,7 +1018,6 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq, ice_debug_cq(hw, (void *)desc, buf, buf_size); - /* save writeback AQ if requested */ if (details->wb_desc) ice_memcpy(details->wb_desc, desc_on_ring, @@ -1158,7 +1150,6 @@ ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq, ice_debug_cq(hw, (void *)desc, e->msg_buf, cq->rq_buf_size); - /* Restore the original datalen and buffer address in the desc, * FW updates datalen to indicate the event message size */ diff --git a/drivers/net/ice/base/ice_controlq.h b/drivers/net/ice/base/ice_controlq.h index b1214f670..8ad7857c8 100644 --- a/drivers/net/ice/base/ice_controlq.h +++ b/drivers/net/ice/base/ice_controlq.h @@ -7,7 +7,6 @@ #include "ice_adminq_cmd.h" - /* Maximum buffer lengths for all control queue types */ #define ICE_AQ_MAX_BUF_LEN 4096 #define ICE_MBXQ_MAX_BUF_LEN 4096 diff --git a/drivers/net/ice/base/ice_devids.h b/drivers/net/ice/base/ice_devids.h index c9a567fb1..0ff3b9b34 100644 --- a/drivers/net/ice/base/ice_devids.h +++ b/drivers/net/ice/base/ice_devids.h @@ -5,7 +5,6 @@ #ifndef _ICE_DEVIDS_H_ #define _ICE_DEVIDS_H_ - /* Device IDs */ /* Intel(R) Ethernet Controller E810-C for backplane */ #define ICE_DEV_ID_E810C_BACKPLANE 0x1591 diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 4ad816874..05cd39b17 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -808,7 +808,6 @@ ice_aq_download_pkg(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf, return status; } - /** * ice_aq_update_pkg * @hw: pointer to the hardware structure @@ -1180,7 +1179,6 @@ static enum ice_status ice_get_pkg_info(struct ice_hw *hw) return status; } - /** * ice_verify_pkg - verify package * @pkg: pointer to the package buffer @@ -2084,7 +2082,6 @@ ice_find_prot_off(struct ice_hw *hw, enum ice_block blk, u8 prof, u8 fv_idx, /* PTG Management */ - /** * ice_ptg_find_ptype - Search for packet type group using packet type (ptype) * @hw: pointer to the hardware structure @@ -2121,7 +2118,6 @@ void ice_ptg_alloc_val(struct ice_hw *hw, enum ice_block blk, u8 ptg) hw->blk[blk].xlt1.ptg_tbl[ptg].in_use = true; } - /** * ice_ptg_remove_ptype - Removes ptype from a particular packet type group * @hw: pointer to the hardware structure @@ -2315,7 +2311,6 @@ ice_match_prop_lst(struct LIST_HEAD_TYPE *list1, struct LIST_HEAD_TYPE *list2) /* VSIG Management */ - /** * ice_vsig_find_vsi - find a VSIG that contains a specified VSI * @hw: pointer to the hardware structure diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h index 3b5c1c39a..137eaa7f8 100644 --- a/drivers/net/ice/base/ice_flex_pipe.h +++ b/drivers/net/ice/base/ice_flex_pipe.h @@ -46,7 +46,6 @@ bool ice_tunnel_port_in_use(struct ice_hw *hw, u16 port, u16 *index); bool ice_tunnel_get_type(struct ice_hw *hw, u16 port, enum ice_tunnel_type *type); - /* XLT2/VSI group functions */ enum ice_status ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig); diff --git a/drivers/net/ice/base/ice_hw_autogen.h b/drivers/net/ice/base/ice_hw_autogen.h index 6f227adb8..92d432044 100644 --- a/drivers/net/ice/base/ice_hw_autogen.h +++ b/drivers/net/ice/base/ice_hw_autogen.h @@ -6,8 +6,6 @@ #ifndef _ICE_HW_AUTOGEN_H_ #define _ICE_HW_AUTOGEN_H_ - - #define GL_RDPU_CNTRL 0x00052054 /* Reset Source: CORER */ #define GL_RDPU_CNTRL_RX_PAD_EN_S 0 #define GL_RDPU_CNTRL_RX_PAD_EN_M BIT(0) diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h index e77d4bf50..a97c63cc9 100644 --- a/drivers/net/ice/base/ice_lan_tx_rx.h +++ b/drivers/net/ice/base/ice_lan_tx_rx.h @@ -173,7 +173,6 @@ struct ice_fltr_desc { (0xFFFFFFFFULL << ICE_FXD_FLTR_QW1_FDID_S) #define ICE_FXD_FLTR_QW1_FDID_ZERO 0x0ULL - enum ice_rx_desc_status_bits { /* Note: These are predefined bit offsets */ ICE_RX_DESC_STATUS_DD_S = 0, @@ -204,7 +203,6 @@ enum ice_rx_desc_status_bits { #define ICE_RXD_QW1_STATUS_TSYNVALID_S ICE_RX_DESC_STATUS_TSYNVALID_S #define ICE_RXD_QW1_STATUS_TSYNVALID_M BIT_ULL(ICE_RXD_QW1_STATUS_TSYNVALID_S) - enum ice_rx_desc_fltstat_values { ICE_RX_DESC_FLTSTAT_NO_DATA = 0, ICE_RX_DESC_FLTSTAT_RSV_FD_ID = 1, /* 16byte desc? FD_ID : RSV */ @@ -212,7 +210,6 @@ enum ice_rx_desc_fltstat_values { ICE_RX_DESC_FLTSTAT_RSS_HASH = 3, }; - #define ICE_RXD_QW1_ERROR_S 19 #define ICE_RXD_QW1_ERROR_M (0xFFUL << ICE_RXD_QW1_ERROR_S) @@ -310,7 +307,6 @@ enum ice_rx_ptype_payload_layer { ICE_RX_PTYPE_PAYLOAD_LAYER_PAY4 = 3, }; - #define ICE_RXD_QW1_LEN_PBUF_S 38 #define ICE_RXD_QW1_LEN_PBUF_M (0x3FFFULL << ICE_RXD_QW1_LEN_PBUF_S) @@ -320,7 +316,6 @@ enum ice_rx_ptype_payload_layer { #define ICE_RXD_QW1_LEN_SPH_S 63 #define ICE_RXD_QW1_LEN_SPH_M BIT_ULL(ICE_RXD_QW1_LEN_SPH_S) - enum ice_rx_desc_ext_status_bits { /* Note: These are predefined bit offsets */ ICE_RX_DESC_EXT_STATUS_L2TAG2P_S = 0, @@ -331,7 +326,6 @@ enum ice_rx_desc_ext_status_bits { ICE_RX_DESC_EXT_STATUS_PELONGB_S = 11, }; - enum ice_rx_desc_pe_status_bits { /* Note: These are predefined bit offsets */ ICE_RX_DESC_PE_STATUS_QPID_S = 0, /* 18 BITS */ @@ -352,7 +346,6 @@ enum ice_rx_desc_pe_status_bits { #define ICE_RX_PROG_STATUS_DESC_QW1_PROGID_M \ (0x7UL << ICE_RX_PROG_STATUS_DESC_QW1_PROGID_S) - #define ICE_RX_PROG_STATUS_DESC_QW1_ERROR_S 19 #define ICE_RX_PROG_STATUS_DESC_QW1_ERROR_M \ (0x3FUL << ICE_RX_PROG_STATUS_DESC_QW1_ERROR_S) @@ -840,7 +833,6 @@ enum ice_rx_flex_desc_exstat_bits { ICE_RX_FLEX_DESC_EXSTAT_OVERSIZE_S = 3, }; - #define ICE_RXQ_CTX_SIZE_DWORDS 8 #define ICE_RXQ_CTX_SZ (ICE_RXQ_CTX_SIZE_DWORDS * sizeof(u32)) #define ICE_TX_CMPLTNQ_CTX_SIZE_DWORDS 22 @@ -1056,7 +1048,6 @@ enum ice_tx_ctx_desc_eipt_offload { #define ICE_TXD_CTX_QW0_L4T_CS_S 23 #define ICE_TXD_CTX_QW0_L4T_CS_M BIT_ULL(ICE_TXD_CTX_QW0_L4T_CS_S) - #define ICE_LAN_TXQ_MAX_QGRPS 127 #define ICE_LAN_TXQ_MAX_QDIS 1023 diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c index 66cfec641..e00942528 100644 --- a/drivers/net/ice/base/ice_nvm.c +++ b/drivers/net/ice/base/ice_nvm.c @@ -4,7 +4,6 @@ #include "ice_common.h" - /** * ice_aq_read_nvm * @hw: pointer to the HW struct @@ -138,7 +137,6 @@ ice_read_sr_word_aq(struct ice_hw *hw, u16 offset, u16 *data) return status; } - /** * ice_read_sr_buf_aq - Reads Shadow RAM buf via AQ * @hw: pointer to the HW structure @@ -354,7 +352,6 @@ enum ice_status ice_init_nvm(struct ice_hw *hw) return ICE_SUCCESS; } - /** * ice_read_sr_buf - Reads Shadow RAM buf and acquire lock if necessary * @hw: pointer to the HW structure @@ -380,7 +377,6 @@ ice_read_sr_buf(struct ice_hw *hw, u16 offset, u16 *words, u16 *data) return status; } - /** * ice_nvm_validate_checksum * @hw: pointer to the HW struct diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h index 91f56f3fa..cdb691523 100644 --- a/drivers/net/ice/base/ice_protocol_type.h +++ b/drivers/net/ice/base/ice_protocol_type.h @@ -114,7 +114,6 @@ enum ice_prot_id { #define ICE_VNI_OFFSET 12 /* offset of VNI from ICE_PROT_UDP_OF */ - #define ICE_MAC_OFOS_HW 1 #define ICE_MAC_IL_HW 4 #define ICE_ETYPE_OL_HW 9 @@ -148,7 +147,6 @@ struct ice_protocol_entry { u8 protocol_id; }; - struct ice_ether_hdr { u8 dst_addr[ETH_ALEN]; u8 src_addr[ETH_ALEN]; diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c index 1cfc3bc20..6732e291a 100644 --- a/drivers/net/ice/base/ice_sched.c +++ b/drivers/net/ice/base/ice_sched.c @@ -4,7 +4,6 @@ #include "ice_sched.h" - /** * ice_sched_add_root_node - Insert the Tx scheduler root node in SW DB * @pi: port information structure @@ -876,7 +875,6 @@ ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_l2_nodes, return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd); } - /** * ice_sched_add_elems - add nodes to HW and SW DB * @pi: port information structure @@ -1366,7 +1364,6 @@ enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw) goto sched_query_out; } - sched_query_out: ice_free(hw, buf); return status; @@ -2021,7 +2018,6 @@ enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle) return ice_sched_rm_vsi_cfg(pi, vsi_handle, ICE_SCHED_NODE_OWNER_LAN); } - /** * ice_sched_is_tree_balanced - Check tree nodes are identical or not * @hw: pointer to the HW struct diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 2437faead..00358e4db 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -6,7 +6,6 @@ #include "ice_flex_type.h" #include "ice_flow.h" - #define ICE_ETH_DA_OFFSET 0 #define ICE_ETH_ETHTYPE_OFFSET 12 #define ICE_ETH_VLAN_TCI_OFFSET 14 @@ -743,7 +742,6 @@ ice_aq_get_sw_cfg(struct ice_hw *hw, struct ice_aqc_get_sw_cfg_resp *buf, return status; } - /** * ice_alloc_sw - allocate resources specific to switch * @hw: pointer to the HW struct @@ -1787,13 +1785,11 @@ enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw) } } while (req_desc && !status); - out: ice_free(hw, (void *)rbuf); return status; } - /** * ice_fill_sw_info - Helper function to populate lb_en and lan_en * @hw: pointer to the hardware structure @@ -3424,7 +3420,6 @@ ice_remove_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list) return ICE_SUCCESS; } - /** * ice_rem_sw_rule_info * @hw: pointer to the hardware structure @@ -3823,7 +3818,6 @@ ice_add_to_vsi_fltr_list(struct ice_hw *hw, u16 vsi_handle, return status; } - /** * ice_determine_promisc_mask * @fi: filter info to parse @@ -4811,8 +4805,6 @@ ice_fill_valid_words(struct ice_adv_lkup_elem *rule, return ret_val; } - - /** * ice_create_first_fit_recp_def - Create a recipe grouping * @hw: pointer to the hardware structure diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h index 515ad3bb6..0f0a1e98e 100644 --- a/drivers/net/ice/base/ice_switch.h +++ b/drivers/net/ice/base/ice_switch.h @@ -15,7 +15,6 @@ #define ICE_FLTR_TX BIT(1) #define ICE_FLTR_TX_RX (ICE_FLTR_RX | ICE_FLTR_TX) - /* Worst case buffer length for ice_aqc_opc_get_res_alloc */ #define ICE_MAX_RES_TYPES 0x80 #define ICE_AQ_GET_RES_ALLOC_BUF_LEN \ @@ -391,7 +390,6 @@ enum ice_status ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info); void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle); - /* Promisc/defport setup for VSIs */ enum ice_status ice_cfg_dflt_vsi(struct ice_port_info *pi, u16 vsi_handle, bool set, diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index deb614e37..150b4c5c5 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -134,10 +134,6 @@ static inline u32 ice_round_to_num(u32 N, u32 R) #define __ALWAYS_UNUSED #endif - - - - #define IS_ETHER_ADDR_EQUAL(addr1, addr2) \ (((bool)((((u16 *)(addr1))[0] == ((u16 *)(addr2))[0]))) && \ ((bool)((((u16 *)(addr1))[1] == ((u16 *)(addr2))[1]))) && \ @@ -384,7 +380,6 @@ struct ice_hw_common_caps { u8 proxy_support; }; - /* Function specific capabilities */ struct ice_hw_func_caps { struct ice_hw_common_caps common_cap; @@ -401,7 +396,6 @@ struct ice_hw_dev_caps { u32 num_funcs; }; - /* Information about MAC such as address, etc... */ struct ice_mac_info { u8 lan_addr[ETH_ALEN]; @@ -567,7 +561,6 @@ enum ice_rl_type { #define ICE_TXSCHED_GET_RL_WAKEUP_MV(p) LE16_TO_CPU((p)->info.wake_up_calc) #define ICE_TXSCHED_GET_RL_ENCODE(p) LE16_TO_CPU((p)->info.rl_encode) - /* The following tree example shows the naming conventions followed under * ice_port_info struct for default scheduler tree topology. * @@ -729,7 +722,6 @@ struct ice_switch_info { struct ice_sw_recipe *recp_list; }; - /* Port hardware description */ struct ice_hw { u8 *hw_addr; @@ -787,7 +779,6 @@ struct ice_hw { u8 fw_patch; /* firmware patch version */ u32 fw_build; /* firmware build number */ - /* Device max aggregate bandwidths corresponding to the GL_PWR_MODE_CTL * register. Used for determining the ITR/INTRL granularity during * initialization. -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH 2/8] net/ice/base: add support for tunnel packets 2019-09-02 3:55 [dpdk-dev] [PATCH 0/8] net/ice/base: share code update secend batch Qi Zhang 2019-09-02 3:55 ` [dpdk-dev] [PATCH 1/8] net/ice/base: remove redundant empty lines Qi Zhang @ 2019-09-02 3:55 ` Qi Zhang 2019-09-02 3:55 ` [dpdk-dev] [PATCH 3/8] net/ice/base: add non-word aligned ip field support Qi Zhang ` (12 subsequent siblings) 14 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-02 3:55 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Henry Tieman, Paul M Stillwell Jr Add VXLAN tunnel training packets to flow director and change the interface to support tunnel packets. Signed-off-by: Henry Tieman <henry.w.tieman@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 266 ++++++++++++++++++++++++++++++++-------- drivers/net/ice/base/ice_fdir.h | 8 +- drivers/net/ice/base/ice_type.h | 10 +- 3 files changed, 228 insertions(+), 56 deletions(-) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index 9ef91b3b8..b92603e10 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -5,7 +5,7 @@ #include "ice_common.h" #include "ice_fdir.h" -/* These are dummy packet headers used to program flow director filters. */ +/* These are training packet headers used to program flow director filters. */ static const u8 ice_fdir_tcpv4_pkt[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, @@ -88,47 +88,177 @@ static const u8 ice_fdir_ipv6_pkt[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, }; -/* Flow Director dummy packet table */ +static const u8 ice_fdir_tcp4_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x5a, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + 0x45, 0x00, 0x00, 0x28, 0x00, 0x00, 0x40, 0x00, + 0x40, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x50, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_udp4_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x4e, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + 0x45, 0x00, 0x00, 0x1c, 0x00, 0x00, 0x40, 0x00, + 0x40, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_sctp4_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x52, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + 0x45, 0x00, 0x00, 0x20, 0x00, 0x01, 0x00, 0x00, + 0x40, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_ip4_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x46, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + 0x45, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x00, + 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_tcp6_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x6e, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, + 0x60, 0x00, 0x00, 0x00, 0x00, 0x14, 0x06, 0x40, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x50, 0x00, 0x20, 0x00, + 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_udp6_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x62, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, + 0x60, 0x00, 0x00, 0x00, 0x00, 0x08, 0x11, 0x40, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_sctp6_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x66, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, + 0x60, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x84, 0x40, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_ip6_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x5a, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, + 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3b, 0x40, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + +/* Flow Director no-op training packet table */ static const struct ice_fdir_base_pkt ice_fdir_pkt[] = { { ICE_FLTR_PTYPE_NONF_IPV4_TCP, - sizeof(ice_fdir_tcpv4_pkt), - ice_fdir_tcpv4_pkt, + sizeof(ice_fdir_tcpv4_pkt), ice_fdir_tcpv4_pkt, + sizeof(ice_fdir_tcp4_tun_pkt), ice_fdir_tcp4_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV4_UDP, - sizeof(ice_fdir_udpv4_pkt), - ice_fdir_udpv4_pkt, + sizeof(ice_fdir_udpv4_pkt), ice_fdir_udpv4_pkt, + sizeof(ice_fdir_udp4_tun_pkt), ice_fdir_udp4_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV4_SCTP, - sizeof(ice_fdir_sctpv4_pkt), - ice_fdir_sctpv4_pkt, + sizeof(ice_fdir_sctpv4_pkt), ice_fdir_sctpv4_pkt, + sizeof(ice_fdir_sctp4_tun_pkt), ice_fdir_sctp4_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV4_OTHER, - sizeof(ice_fdir_ipv4_pkt), - ice_fdir_ipv4_pkt, + sizeof(ice_fdir_ipv4_pkt), ice_fdir_ipv4_pkt, + sizeof(ice_fdir_ip4_tun_pkt), ice_fdir_ip4_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV6_TCP, - sizeof(ice_fdir_tcpv6_pkt), - ice_fdir_tcpv6_pkt, + sizeof(ice_fdir_tcpv6_pkt), ice_fdir_tcpv6_pkt, + sizeof(ice_fdir_tcp6_tun_pkt), ice_fdir_tcp6_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV6_UDP, - sizeof(ice_fdir_udpv6_pkt), - ice_fdir_udpv6_pkt, + sizeof(ice_fdir_udpv6_pkt), ice_fdir_udpv6_pkt, + sizeof(ice_fdir_udp6_tun_pkt), ice_fdir_udp6_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV6_SCTP, - sizeof(ice_fdir_sctpv6_pkt), - ice_fdir_sctpv6_pkt, + sizeof(ice_fdir_sctpv6_pkt), ice_fdir_sctpv6_pkt, + sizeof(ice_fdir_sctp6_tun_pkt), ice_fdir_sctp6_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV6_OTHER, - sizeof(ice_fdir_ipv6_pkt), - ice_fdir_ipv6_pkt, + sizeof(ice_fdir_ipv6_pkt), ice_fdir_ipv6_pkt, + sizeof(ice_fdir_ip6_tun_pkt), ice_fdir_ip6_tun_pkt, }, }; @@ -377,15 +507,20 @@ static void ice_pkt_insert_u32(u8 *pkt, int offset, __be32 data) } /** - * ice_fdir_get_prgm_pkt - generate a dummy packet + * ice_fdir_get_gen_prgm_pkt - generate a training packet + * @hw: pointer to the hardware structure * @input: flow director filter data structure * @pkt: pointer to return filter packet * @frag: generate a fragment packet + * @tun: true implies generate a tunnel packet */ enum ice_status -ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag) +ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, + u8 *pkt, bool frag, bool tun) { enum ice_fltr_ptype flow; + u16 tnl_port; + u8 *loc; u16 idx; if (input->flow_type == ICE_FLTR_PTYPE_NONF_IPV4_OTHER) { @@ -431,83 +566,96 @@ ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag) break; if (idx == ICE_FDIR_NUM_PKT) return ICE_ERR_PARAM; - ice_memcpy(pkt, ice_fdir_pkt[idx].pkt, ice_fdir_pkt[idx].pkt_len, - ICE_NONDMA_TO_NONDMA); + if (!tun) { + ice_memcpy(pkt, ice_fdir_pkt[idx].pkt, + ice_fdir_pkt[idx].pkt_len, ICE_NONDMA_TO_NONDMA); + loc = pkt; + } else { + if (!ice_get_open_tunnel_port(hw, TNL_ALL, &tnl_port)) + return ICE_ERR_DOES_NOT_EXIST; + if (!ice_fdir_pkt[idx].tun_pkt) + return ICE_ERR_PARAM; + ice_memcpy(pkt, ice_fdir_pkt[idx].tun_pkt, + ice_fdir_pkt[idx].tun_pkt_len, ICE_NONDMA_TO_NONDMA); + ice_pkt_insert_u16(pkt, ICE_IPV4_UDP_DST_PORT_OFFSET, + HTONS(tnl_port)); + loc = &pkt[ICE_FDIR_TUN_PKT_OFF]; + } switch (flow) { case ICE_FLTR_PTYPE_NONF_IPV4_TCP: - ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, input->ip.v4.dst_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_TCP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_TCP_DST_PORT_OFFSET, input->ip.v4.dst_port); - ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET, input->ip.v4.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_TCP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_TCP_SRC_PORT_OFFSET, input->ip.v4.src_port); if (frag) - pkt[20] = ICE_FDIR_IPV4_PKT_FLAG_DF; + loc[20] = ICE_FDIR_IPV4_PKT_FLAG_DF; break; case ICE_FLTR_PTYPE_NONF_IPV4_UDP: - ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, input->ip.v4.dst_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_UDP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_UDP_DST_PORT_OFFSET, input->ip.v4.dst_port); - ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET, input->ip.v4.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_UDP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_UDP_SRC_PORT_OFFSET, input->ip.v4.src_port); break; case ICE_FLTR_PTYPE_NONF_IPV4_SCTP: - ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, input->ip.v4.dst_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_SCTP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_SCTP_DST_PORT_OFFSET, input->ip.v4.dst_port); - ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET, input->ip.v4.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_SCTP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_SCTP_SRC_PORT_OFFSET, input->ip.v4.src_port); break; case ICE_FLTR_PTYPE_NONF_IPV4_OTHER: - ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, input->ip.v4.dst_ip); - ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET, input->ip.v4.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_PROTO_OFFSET, 0); + ice_pkt_insert_u16(loc, ICE_IPV4_PROTO_OFFSET, 0); break; case ICE_FLTR_PTYPE_NONF_IPV6_TCP: - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, input->ip.v6.dst_ip); - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET, input->ip.v6.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV6_TCP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_TCP_DST_PORT_OFFSET, input->ip.v6.dst_port); - ice_pkt_insert_u16(pkt, ICE_IPV6_TCP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_TCP_SRC_PORT_OFFSET, input->ip.v6.src_port); break; case ICE_FLTR_PTYPE_NONF_IPV6_UDP: - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, input->ip.v6.dst_ip); - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET, input->ip.v6.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV6_UDP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_UDP_DST_PORT_OFFSET, input->ip.v6.dst_port); - ice_pkt_insert_u16(pkt, ICE_IPV6_UDP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_UDP_SRC_PORT_OFFSET, input->ip.v6.src_port); break; case ICE_FLTR_PTYPE_NONF_IPV6_SCTP: - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, input->ip.v6.dst_ip); - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET, input->ip.v6.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV6_SCTP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_SCTP_DST_PORT_OFFSET, input->ip.v6.dst_port); - ice_pkt_insert_u16(pkt, ICE_IPV6_SCTP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_SCTP_SRC_PORT_OFFSET, input->ip.v6.src_port); break; case ICE_FLTR_PTYPE_NONF_IPV6_OTHER: - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, input->ip.v6.dst_ip); - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET, input->ip.v6.src_ip); break; default: @@ -515,12 +663,24 @@ ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag) } if (input->flex_fltr) - ice_pkt_insert_u16(pkt, input->flex_offset, input->flex_word); + ice_pkt_insert_u16(loc, input->flex_offset, input->flex_word); return ICE_SUCCESS; } /** + * ice_fdir_get_prgm_pkt - generate a training packet + * @input: flow director filter data structure + * @pkt: pointer to return filter packet + * @frag: generate a fragment packet + */ +enum ice_status +ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag) +{ + return ice_fdir_get_gen_prgm_pkt(NULL, input, pkt, frag, false); +} + +/** * ice_fdir_has_frag - does flow type have 2 ptypes * @flow: flow ptype * diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index 8490fac61..9e7e22033 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -58,7 +58,8 @@ enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw); #define ICE_IP_PROTO_IP 0 #define ICE_IP_PROTO_ESP 50 -#define ICE_FDIR_MAX_RAW_PKT_SIZE 512 +#define ICE_FDIR_TUN_PKT_OFF 50 +#define ICE_FDIR_MAX_RAW_PKT_SIZE (512 + ICE_FDIR_TUN_PKT_OFF) #define ICE_FDIR_BUF_FULL_MARGIN 10 #define ICE_FDIR_BUF_HEAD_ROOM 32 @@ -175,12 +176,17 @@ struct ice_fdir_base_pkt { enum ice_fltr_ptype flow; u16 pkt_len; const u8 *pkt; + u16 tun_pkt_len; + const u8 *tun_pkt; }; void ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input, struct ice_fltr_desc *fdesc, bool add); enum ice_status +ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, + u8 *pkt, bool frag, bool tun); +enum ice_status ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag); enum ice_status ice_add_del_fdir(struct ice_hw *hw, struct ice_fdir_fltr *input, bool add); diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index 150b4c5c5..7d0a4f63f 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -296,13 +296,19 @@ enum ice_fltr_ptype { ICE_FLTR_PTYPE_MAX, }; +enum ice_fd_hw_seg { + ICE_FD_HW_SEG_NON_TUN = 0, + ICE_FD_HW_SEG_TUN, + ICE_FD_HW_SEG_MAX, +}; + /* 2 VSI = 1 ICE_VSI_PF + 1 ICE_VSI_CTRL */ #define ICE_MAX_FDIR_VSI_PER_FILTER 2 struct ice_fd_hw_prof { - struct ice_flow_seg_info *fdir_seg; + struct ice_flow_seg_info *fdir_seg[ICE_FD_HW_SEG_MAX]; int cnt; - u64 entry_h[ICE_MAX_FDIR_VSI_PER_FILTER]; + u64 entry_h[ICE_MAX_FDIR_VSI_PER_FILTER][ICE_FD_HW_SEG_MAX]; u16 vsi_h[ICE_MAX_FDIR_VSI_PER_FILTER]; }; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH 3/8] net/ice/base: add non-word aligned ip field support 2019-09-02 3:55 [dpdk-dev] [PATCH 0/8] net/ice/base: share code update secend batch Qi Zhang 2019-09-02 3:55 ` [dpdk-dev] [PATCH 1/8] net/ice/base: remove redundant empty lines Qi Zhang 2019-09-02 3:55 ` [dpdk-dev] [PATCH 2/8] net/ice/base: add support for tunnel packets Qi Zhang @ 2019-09-02 3:55 ` Qi Zhang 2019-09-02 3:55 ` [dpdk-dev] [PATCH 4/8] net/ice/base: add non-word aligned ipv6 " Qi Zhang ` (11 subsequent siblings) 14 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-02 3:55 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Add non-word aligned field support for ipv4 with ttl, tos and proto. All these fields are one byte within one word. In order to match bytes within the IPv4 header for flow director we need to use a mask. Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 30 +++++++++++++++++++++++------- drivers/net/ice/base/ice_fdir.h | 4 ++++ 2 files changed, 27 insertions(+), 7 deletions(-) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index b92603e10..db5bbc6ad 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -485,6 +485,17 @@ static void ice_pkt_insert_ipv6_addr(u8 *pkt, int offset, __be32 *addr) } /** + * ice_pkt_insert_u8 - insert a u8 value into a memory buffer. + * @pkt: packet buffer + * @offset: offset into buffer + * @data: 8 bit value to convert and insert into pkt at offset + */ +static void ice_pkt_insert_u8(u8 *pkt, int offset, u8 data) +{ + ice_memcpy(pkt + offset, &data, sizeof(data), ICE_NONDMA_TO_NONDMA); +} + +/** * ice_pkt_insert_u16 - insert a be16 value into a memory buffer. * @pkt: packet buffer * @offset: offset into buffer @@ -534,11 +545,9 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, case ICE_IP_PROTO_SCTP: flow = ICE_FLTR_PTYPE_NONF_IPV4_SCTP; break; - case ICE_IP_PROTO_IP: + default: flow = ICE_FLTR_PTYPE_NONF_IPV4_OTHER; break; - default: - return ICE_ERR_PARAM; } } else if (input->flow_type == ICE_FLTR_PTYPE_NONF_IPV6_OTHER) { switch (input->ip.v6.proto) { @@ -551,11 +560,9 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, case ICE_IP_PROTO_SCTP: flow = ICE_FLTR_PTYPE_NONF_IPV6_SCTP; break; - case ICE_IP_PROTO_IP: + default: flow = ICE_FLTR_PTYPE_NONF_IPV6_OTHER; break; - default: - return ICE_ERR_PARAM; } } else { flow = input->flow_type; @@ -592,6 +599,8 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.src_ip); ice_pkt_insert_u16(loc, ICE_IPV4_TCP_SRC_PORT_OFFSET, input->ip.v4.src_port); + ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); + ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); if (frag) loc[20] = ICE_FDIR_IPV4_PKT_FLAG_DF; break; @@ -604,6 +613,8 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.src_ip); ice_pkt_insert_u16(loc, ICE_IPV4_UDP_SRC_PORT_OFFSET, input->ip.v4.src_port); + ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); + ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); break; case ICE_FLTR_PTYPE_NONF_IPV4_SCTP: ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, @@ -614,13 +625,18 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.src_ip); ice_pkt_insert_u16(loc, ICE_IPV4_SCTP_SRC_PORT_OFFSET, input->ip.v4.src_port); + ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); + ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); break; case ICE_FLTR_PTYPE_NONF_IPV4_OTHER: ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, input->ip.v4.dst_ip); ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET, input->ip.v4.src_ip); - ice_pkt_insert_u16(loc, ICE_IPV4_PROTO_OFFSET, 0); + ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); + ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); + ice_pkt_insert_u8(loc, ICE_IPV4_PROTO_OFFSET, + input->ip.v4.proto); break; case ICE_FLTR_PTYPE_NONF_IPV6_TCP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index 9e7e22033..e817057c8 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -82,6 +82,9 @@ enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw); #define ICE_IPV6_SCTP_SRC_PORT_OFFSET 54 #define ICE_IPV6_SCTP_DST_PORT_OFFSET 56 +#define ICE_IPV4_TOS_OFFSET 15 +#define ICE_IPV4_TTL_OFFSET 22 + #define ICE_FDIR_MAX_FLTRS 16384 /* IP v4 has 2 flag bits that enable fragment processing: DF and MF. DF @@ -123,6 +126,7 @@ struct ice_fdir_v4 { u8 tos; u8 ip_ver; u8 proto; + u8 ttl; }; #define ICE_IPV6_ADDR_LEN_AS_U32 4 -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH 4/8] net/ice/base: add non-word aligned ipv6 field support 2019-09-02 3:55 [dpdk-dev] [PATCH 0/8] net/ice/base: share code update secend batch Qi Zhang ` (2 preceding siblings ...) 2019-09-02 3:55 ` [dpdk-dev] [PATCH 3/8] net/ice/base: add non-word aligned ip field support Qi Zhang @ 2019-09-02 3:55 ` Qi Zhang 2019-09-02 3:55 ` [dpdk-dev] [PATCH 5/8] net/ice/base: correct the mask for checking protocol header Qi Zhang ` (10 subsequent siblings) 14 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-02 3:55 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Add non-word aligned field support for IPv6 with hlim, tc and proto. All these fields are one byte within one word. In order to match bytes within the IPv6 header for flow director we need to use a mask. Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 32 ++++++++++++++++++++++++++++++++ drivers/net/ice/base/ice_fdir.h | 4 ++++ 2 files changed, 36 insertions(+) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index db5bbc6ad..e35506006 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -496,6 +496,28 @@ static void ice_pkt_insert_u8(u8 *pkt, int offset, u8 data) } /** + * ice_pkt_insert_u8_tc - insert a u8 value into a memory buffer for tc ipv6. + * @pkt: packet buffer + * @offset: offset into buffer + * @data: 8 bit value to convert and insert into pkt at offset + * + * This function is designed for inserting Traffic Class (tc) for IPv6, + * since that tc is not aligned in number of bytes. Here we split it out + * into two part and fill each byte with data copy from pkt, then insert + * the two bytes data one by one. + */ +static void ice_pkt_insert_u8_tc(u8 *pkt, int offset, u8 data) +{ + u8 high, low; + + high = (data >> 4) + (*(pkt + offset) & 0xF0); + ice_memcpy(pkt + offset, &high, sizeof(high), ICE_NONDMA_TO_NONDMA); + + low = (*(pkt + offset + 1) & 0x0F) + ((data & 0x0F) << 4); + ice_memcpy(pkt + offset + 1, &low, sizeof(low), ICE_NONDMA_TO_NONDMA); +} + +/** * ice_pkt_insert_u16 - insert a be16 value into a memory buffer. * @pkt: packet buffer * @offset: offset into buffer @@ -647,6 +669,8 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v6.dst_port); ice_pkt_insert_u16(loc, ICE_IPV6_TCP_SRC_PORT_OFFSET, input->ip.v6.src_port); + ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); + ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); break; case ICE_FLTR_PTYPE_NONF_IPV6_UDP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, @@ -657,6 +681,8 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v6.dst_port); ice_pkt_insert_u16(loc, ICE_IPV6_UDP_SRC_PORT_OFFSET, input->ip.v6.src_port); + ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); + ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); break; case ICE_FLTR_PTYPE_NONF_IPV6_SCTP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, @@ -667,12 +693,18 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v6.dst_port); ice_pkt_insert_u16(loc, ICE_IPV6_SCTP_SRC_PORT_OFFSET, input->ip.v6.src_port); + ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); + ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); break; case ICE_FLTR_PTYPE_NONF_IPV6_OTHER: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, input->ip.v6.dst_ip); ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET, input->ip.v6.src_ip); + ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); + ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); + ice_pkt_insert_u8(loc, ICE_IPV6_PROTO_OFFSET, + input->ip.v6.proto); break; default: return ICE_ERR_PARAM; diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index e817057c8..e0f3cd481 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -84,6 +84,9 @@ enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw); #define ICE_IPV4_TOS_OFFSET 15 #define ICE_IPV4_TTL_OFFSET 22 +#define ICE_IPV6_TC_OFFSET 14 +#define ICE_IPV6_HLIM_OFFSET 21 +#define ICE_IPV6_PROTO_OFFSET 20 #define ICE_FDIR_MAX_FLTRS 16384 @@ -140,6 +143,7 @@ struct ice_fdir_v6 { __be32 sec_parm_idx; /* security parameter index */ u8 tc; u8 proto; + u8 hlim; }; struct ice_fdir_extra { -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH 5/8] net/ice/base: correct the mask for checking protocol header 2019-09-02 3:55 [dpdk-dev] [PATCH 0/8] net/ice/base: share code update secend batch Qi Zhang ` (3 preceding siblings ...) 2019-09-02 3:55 ` [dpdk-dev] [PATCH 4/8] net/ice/base: add non-word aligned ipv6 " Qi Zhang @ 2019-09-02 3:55 ` Qi Zhang 2019-09-02 3:55 ` [dpdk-dev] [PATCH 6/8] net/ice/base: propagate errors from functions Qi Zhang ` (9 subsequent siblings) 14 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-02 3:55 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Zhirun Yan, Paul M Stillwell Jr Before this patch, the logic of protocol header checking only support non-tunneled packet. This patch remove the inner protocol in L3/L4 RSS seg hdr mask and change the protocol header validation to reflect this. So, for ice_add_rss_cfg(), the last parameter addl_hdrs could specify the protocol header for tunnel. Signed-off-by: Zhirun Yan <zhirun.yan@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 769fd2da7..682f26ce6 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -372,15 +372,18 @@ struct ice_flow_prof_params { ice_declare_bitmap(ptypes, ICE_FLOW_PTYPE_MAX); }; +#define ICE_FLOW_RSS_HDRS_INNER_MASK \ + (ICE_FLOW_SEG_HDR_PPPOE | ICE_FLOW_SEG_HDR_GTPC | \ + ICE_FLOW_SEG_HDR_GTPC_TEID | ICE_FLOW_SEG_HDR_GTPU) + #define ICE_FLOW_SEG_HDRS_L2_MASK \ (ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_VLAN) #define ICE_FLOW_SEG_HDRS_L3_MASK \ (ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV6 | \ - ICE_FLOW_SEG_HDR_ARP | ICE_FLOW_SEG_HDR_PPPOE) + ICE_FLOW_SEG_HDR_ARP) #define ICE_FLOW_SEG_HDRS_L4_MASK \ (ICE_FLOW_SEG_HDR_ICMP | ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_UDP | \ - ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_GTPC | \ - ICE_FLOW_SEG_HDR_GTPC_TEID | ICE_FLOW_SEG_HDR_GTPU) + ICE_FLOW_SEG_HDR_SCTP) /** * ice_flow_val_hdrs - validates packet segments for valid protocol headers @@ -1686,13 +1689,11 @@ ice_flow_add_fld_raw(struct ice_flow_seg_info *seg, u16 off, u8 len, (ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_VLAN) #define ICE_FLOW_RSS_SEG_HDR_L3_MASKS \ - (ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_PPPOE) + (ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV6) #define ICE_FLOW_RSS_SEG_HDR_L4_MASKS \ (ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_UDP | \ - ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_GTPC_TEID | \ - ICE_FLOW_SEG_HDR_GTPU) - + ICE_FLOW_SEG_HDR_SCTP) #define ICE_FLOW_RSS_SEG_HDR_VAL_MASKS \ (ICE_FLOW_RSS_SEG_HDR_L2_MASKS | \ @@ -1729,11 +1730,12 @@ ice_flow_set_rss_seg_info(struct ice_flow_seg_info *segs, u64 hash_fields, } ICE_FLOW_SET_HDRS(segs, flow_hdr); - if (segs->hdrs & ~ICE_FLOW_RSS_SEG_HDR_VAL_MASKS) + if (segs->hdrs & ~ICE_FLOW_RSS_SEG_HDR_VAL_MASKS & + ~ICE_FLOW_RSS_HDRS_INNER_MASK) return ICE_ERR_PARAM; val = (u64)(segs->hdrs & ICE_FLOW_RSS_SEG_HDR_L3_MASKS); - if (!ice_is_pow2(val)) + if (val && !ice_is_pow2(val)) return ICE_ERR_CFG; val = (u64)(segs->hdrs & ICE_FLOW_RSS_SEG_HDR_L4_MASKS); -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH 6/8] net/ice/base: propagate errors from functions 2019-09-02 3:55 [dpdk-dev] [PATCH 0/8] net/ice/base: share code update secend batch Qi Zhang ` (4 preceding siblings ...) 2019-09-02 3:55 ` [dpdk-dev] [PATCH 5/8] net/ice/base: correct the mask for checking protocol header Qi Zhang @ 2019-09-02 3:55 ` Qi Zhang 2019-09-02 3:55 ` [dpdk-dev] [PATCH 7/8] net/ice/base: remove pointless NULL check of port info Qi Zhang ` (8 subsequent siblings) 14 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-02 3:55 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr There could be an error returned from ice_fill_adv_dummy_packet() so we need to propagate that to the caller. Additionally, the call to ice_flow_xtract_pkt_flags() could also return an error so we need to propagate it as well. Also add in the correct offsets for GENEVE and VXLAN_GPE to the dummy packets. Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 9 ++++++--- drivers/net/ice/base/ice_switch.c | 8 ++++++-- 2 files changed, 12 insertions(+), 5 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 682f26ce6..7dae53270 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -869,9 +869,12 @@ ice_flow_create_xtrct_seq(struct ice_hw *hw, /* For ACL, we also need to extract the direction bit (Rx,Tx) data from * packet flags */ - if (params->blk == ICE_BLK_ACL) - ice_flow_xtract_pkt_flags(hw, params, - ICE_RX_MDID_PKT_FLAGS_15_0); + if (params->blk == ICE_BLK_ACL) { + status = ice_flow_xtract_pkt_flags(hw, params, + ICE_RX_MDID_PKT_FLAGS_15_0); + if (status) + return status; + } for (i = 0; i < params->prof->segs_cnt; i++) { u64 match = params->prof->segs[i].match; diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 00358e4db..fa023169d 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -156,6 +156,7 @@ struct ice_dummy_pkt_offsets dummy_udp_tun_tcp_packet_offsets[] = { { ICE_UDP_OF, 34 }, { ICE_VXLAN, 42 }, { ICE_GENEVE, 42 }, + { ICE_VXLAN_GPE, 42 }, { ICE_MAC_IL, 50 }, { ICE_IPV4_IL, 64 }, { ICE_TCP_IL, 84 }, @@ -208,6 +209,7 @@ struct ice_dummy_pkt_offsets dummy_udp_tun_udp_packet_offsets[] = { { ICE_UDP_OF, 34 }, { ICE_VXLAN, 42 }, { ICE_GENEVE, 42 }, + { ICE_VXLAN_GPE, 42 }, { ICE_MAC_IL, 50 }, { ICE_IPV4_IL, 64 }, { ICE_UDP_ILOS, 84 }, @@ -6189,8 +6191,10 @@ ice_add_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, s_rule->pdata.lkup_tx_rx.recipe_id = CPU_TO_LE16(rid); s_rule->pdata.lkup_tx_rx.act = CPU_TO_LE32(act); - ice_fill_adv_dummy_packet(lkups, lkups_cnt, s_rule, pkt, pkt_len, - pkt_offsets); + status = ice_fill_adv_dummy_packet(lkups, lkups_cnt, s_rule, pkt, + pkt_len, pkt_offsets); + if (status) + goto err_ice_add_adv_rule; if (rinfo->tun_type != ICE_NON_TUN) { status = ice_fill_adv_packet_tun(hw, rinfo->tun_type, -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH 7/8] net/ice/base: remove pointless NULL check of port info 2019-09-02 3:55 [dpdk-dev] [PATCH 0/8] net/ice/base: share code update secend batch Qi Zhang ` (5 preceding siblings ...) 2019-09-02 3:55 ` [dpdk-dev] [PATCH 6/8] net/ice/base: propagate errors from functions Qi Zhang @ 2019-09-02 3:55 ` Qi Zhang 2019-09-02 3:55 ` [dpdk-dev] [PATCH 8/8] net/ice/base: remove RSS code as iavf host Qi Zhang ` (7 subsequent siblings) 14 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-02 3:55 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Jacob Keller, Paul M Stillwell Jr The code in ice_sched_cleanup_all checks whether the port info is NULL prior to calling ice_sched_clear_port. More importantly, it also checks whether the port structure has been initialized by checking its port_state field as well. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_sched.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c index 6732e291a..553fc28ff 100644 --- a/drivers/net/ice/base/ice_sched.c +++ b/drivers/net/ice/base/ice_sched.c @@ -840,8 +840,7 @@ void ice_sched_cleanup_all(struct ice_hw *hw) hw->layer_info = NULL; } - if (hw->port_info) - ice_sched_clear_port(hw->port_info); + ice_sched_clear_port(hw->port_info); hw->num_tx_sched_layers = 0; hw->num_tx_sched_phys_layers = 0; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH 8/8] net/ice/base: remove RSS code as iavf host 2019-09-02 3:55 [dpdk-dev] [PATCH 0/8] net/ice/base: share code update secend batch Qi Zhang ` (6 preceding siblings ...) 2019-09-02 3:55 ` [dpdk-dev] [PATCH 7/8] net/ice/base: remove pointless NULL check of port info Qi Zhang @ 2019-09-02 3:55 ` Qi Zhang 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 00/16] net/ice/base: share code update secend batch Qi Zhang ` (6 subsequent siblings) 14 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-02 3:55 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr The DPDK PF doesn't support SRIOV so remove the related iavf host code. Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 128 ---------------------------------------- 1 file changed, 128 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 7dae53270..5d1b12d43 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -2128,134 +2128,6 @@ ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, return status; } -/* Mapping of AVF hash bit fields to an L3-L4 hash combination. - * As the ice_flow_avf_hdr_field represent individual bit shifts in a hash, - * convert its values to their appropriate flow L3, L4 values. - */ -#define ICE_FLOW_AVF_RSS_IPV4_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_OTHER) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV4)) -#define ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP)) -#define ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_UDP)) -#define ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS \ - (ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS | ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS | \ - ICE_FLOW_AVF_RSS_IPV4_MASKS | BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP)) - -#define ICE_FLOW_AVF_RSS_IPV6_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_OTHER) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV6)) -#define ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_UDP)) -#define ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP)) -#define ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS \ - (ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS | ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS | \ - ICE_FLOW_AVF_RSS_IPV6_MASKS | BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP)) - -#define ICE_FLOW_MAX_CFG 10 - -/** - * ice_add_avf_rss_cfg - add an RSS configuration for AVF driver - * @hw: pointer to the hardware structure - * @vsi_handle: software VSI handle - * @avf_hash: hash bit fields (ICE_AVF_FLOW_FIELD_*) to configure - * - * This function will take the hash bitmap provided by the AVF driver via a - * message, convert it to ICE-compatible values, and configure RSS flow - * profiles. - */ -enum ice_status -ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 avf_hash) -{ - enum ice_status status = ICE_SUCCESS; - u64 hash_flds; - - if (avf_hash == ICE_AVF_FLOW_FIELD_INVALID || - !ice_is_vsi_valid(hw, vsi_handle)) - return ICE_ERR_PARAM; - - /* Make sure no unsupported bits are specified */ - if (avf_hash & ~(ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS | - ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS)) - return ICE_ERR_CFG; - - hash_flds = avf_hash; - - /* Always create an L3 RSS configuration for any L4 RSS configuration */ - if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS) - hash_flds |= ICE_FLOW_AVF_RSS_IPV4_MASKS; - - if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS) - hash_flds |= ICE_FLOW_AVF_RSS_IPV6_MASKS; - - /* Create the corresponding RSS configuration for each valid hash bit */ - while (hash_flds) { - u64 rss_hash = ICE_HASH_INVALID; - - if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS) { - if (hash_flds & ICE_FLOW_AVF_RSS_IPV4_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV4; - hash_flds &= ~ICE_FLOW_AVF_RSS_IPV4_MASKS; - } else if (hash_flds & - ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV4 | - ICE_FLOW_HASH_TCP_PORT; - hash_flds &= ~ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS; - } else if (hash_flds & - ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV4 | - ICE_FLOW_HASH_UDP_PORT; - hash_flds &= ~ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS; - } else if (hash_flds & - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP)) { - rss_hash = ICE_FLOW_HASH_IPV4 | - ICE_FLOW_HASH_SCTP_PORT; - hash_flds &= - ~BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP); - } - } else if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS) { - if (hash_flds & ICE_FLOW_AVF_RSS_IPV6_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV6; - hash_flds &= ~ICE_FLOW_AVF_RSS_IPV6_MASKS; - } else if (hash_flds & - ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV6 | - ICE_FLOW_HASH_TCP_PORT; - hash_flds &= ~ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS; - } else if (hash_flds & - ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV6 | - ICE_FLOW_HASH_UDP_PORT; - hash_flds &= ~ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS; - } else if (hash_flds & - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP)) { - rss_hash = ICE_FLOW_HASH_IPV6 | - ICE_FLOW_HASH_SCTP_PORT; - hash_flds &= - ~BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP); - } - } - - if (rss_hash == ICE_HASH_INVALID) - return ICE_ERR_OUT_OF_RANGE; - - status = ice_add_rss_cfg(hw, vsi_handle, rss_hash, - ICE_FLOW_SEG_HDR_NONE); - if (status) - break; - } - - return status; -} - /** * ice_replay_rss_cfg - replay RSS configurations associated with VSI * @hw: pointer to the hardware structure -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 00/16] net/ice/base: share code update secend batch. 2019-09-02 3:55 [dpdk-dev] [PATCH 0/8] net/ice/base: share code update secend batch Qi Zhang ` (7 preceding siblings ...) 2019-09-02 3:55 ` [dpdk-dev] [PATCH 8/8] net/ice/base: remove RSS code as iavf host Qi Zhang @ 2019-09-05 3:48 ` Qi Zhang 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 01/16] net/ice/base: remove redundant empty lines Qi Zhang ` (16 more replies) 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 00/22] " Qi Zhang ` (5 subsequent siblings) 14 siblings, 17 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-05 3:48 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang The patchset depends on the first batch http://patchwork.dpdk.org/project/dpdk/list/?series=6158&state=* Key Features: 1) Add tunnel support for fdir 2) Add non-word aligned field support for fdir 3) Add dest mac field support for fdir 4) Add flow count support for fdir 5) Add queue region support for fdir 6) Add vlan pppoe support for switch Qi Zhang (16): net/ice/base: remove redundant empty lines net/ice/base: add support for tunnel packets net/ice/base: add non-word aligned ip field support net/ice/base: add non-word aligned ipv6 field support net/ice/base: correct the mask for checking protocol header net/ice/base: propagate errors from functions net/ice/base: remove pointless NULL check of port info net/ice/base: remove RSS code as iavf host net/ice/base: add support for switch rule about VLAN PPPoE net/ice/base: minor structure refactor net/ice/base: associate switch recipe to profiles net/ice/base: enable RSS for PPPoE with SCTP net/ice/base: enable fdir queue region net/ice/base: enable setting up FDIR counters net/ice/base: add dest MAC field support for FDIR net/ice/base: update FW API minor version drivers/net/ice/base/ice_adminq_cmd.h | 111 ---------- drivers/net/ice/base/ice_bitops.h | 2 - drivers/net/ice/base/ice_common.c | 25 --- drivers/net/ice/base/ice_common.h | 2 - drivers/net/ice/base/ice_controlq.c | 9 - drivers/net/ice/base/ice_controlq.h | 3 +- drivers/net/ice/base/ice_devids.h | 1 - drivers/net/ice/base/ice_fdir.c | 350 +++++++++++++++++++++++++------ drivers/net/ice/base/ice_fdir.h | 19 +- drivers/net/ice/base/ice_flex_pipe.c | 5 - drivers/net/ice/base/ice_flex_pipe.h | 1 - drivers/net/ice/base/ice_flow.c | 159 ++------------ drivers/net/ice/base/ice_hw_autogen.h | 2 - drivers/net/ice/base/ice_lan_tx_rx.h | 9 - drivers/net/ice/base/ice_nvm.c | 4 - drivers/net/ice/base/ice_protocol_type.h | 10 +- drivers/net/ice/base/ice_sched.c | 7 +- drivers/net/ice/base/ice_switch.c | 52 ++--- drivers/net/ice/base/ice_switch.h | 2 - drivers/net/ice/base/ice_type.h | 19 +- 20 files changed, 371 insertions(+), 421 deletions(-) -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 01/16] net/ice/base: remove redundant empty lines 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 00/16] net/ice/base: share code update secend batch Qi Zhang @ 2019-09-05 3:48 ` Qi Zhang 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 02/16] net/ice/base: add support for tunnel packets Qi Zhang ` (15 subsequent siblings) 16 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-05 3:48 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr Remove redundant empty lines Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_adminq_cmd.h | 111 ------------------------------- drivers/net/ice/base/ice_bitops.h | 2 - drivers/net/ice/base/ice_common.c | 25 ------- drivers/net/ice/base/ice_common.h | 2 - drivers/net/ice/base/ice_controlq.c | 9 --- drivers/net/ice/base/ice_controlq.h | 1 - drivers/net/ice/base/ice_devids.h | 1 - drivers/net/ice/base/ice_flex_pipe.c | 5 -- drivers/net/ice/base/ice_flex_pipe.h | 1 - drivers/net/ice/base/ice_hw_autogen.h | 2 - drivers/net/ice/base/ice_lan_tx_rx.h | 9 --- drivers/net/ice/base/ice_nvm.c | 4 -- drivers/net/ice/base/ice_protocol_type.h | 2 - drivers/net/ice/base/ice_sched.c | 4 -- drivers/net/ice/base/ice_switch.c | 8 --- drivers/net/ice/base/ice_switch.h | 2 - drivers/net/ice/base/ice_type.h | 9 --- 17 files changed, 197 deletions(-) diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h index 8e1d6a07d..e6a1350ba 100644 --- a/drivers/net/ice/base/ice_adminq_cmd.h +++ b/drivers/net/ice/base/ice_adminq_cmd.h @@ -9,12 +9,10 @@ * descriptor format. It is shared between Firmware and Software. */ - #define ICE_MAX_VSI 768 #define ICE_AQC_TOPO_MAX_LEVEL_NUM 0x9 #define ICE_AQ_SET_MAC_FRAME_SIZE_MAX 9728 - struct ice_aqc_generic { __le32 param0; __le32 param1; @@ -22,7 +20,6 @@ struct ice_aqc_generic { __le32 addr_low; }; - /* Get version (direct 0x0001) */ struct ice_aqc_get_ver { __le32 rom_ver; @@ -37,7 +34,6 @@ struct ice_aqc_get_ver { u8 api_patch; }; - /* Send driver version (indirect 0x0002) */ struct ice_aqc_driver_ver { u8 major_ver; @@ -49,7 +45,6 @@ struct ice_aqc_driver_ver { __le32 addr_low; }; - /* Queue Shutdown (direct 0x0003) */ struct ice_aqc_q_shutdown { u8 driver_unloading; @@ -57,9 +52,6 @@ struct ice_aqc_q_shutdown { u8 reserved[15]; }; - - - /* Request resource ownership (direct 0x0008) * Release resource ownership (direct 0x0009) */ @@ -92,7 +84,6 @@ struct ice_aqc_req_res { u8 reserved[2]; }; - /* Get function capabilities (indirect 0x000A) * Get device capabilities (indirect 0x000B) */ @@ -105,7 +96,6 @@ struct ice_aqc_list_caps { __le32 addr_low; }; - /* Device/Function buffer entry, repeated per reported capability */ struct ice_aqc_list_caps_elem { __le16 cap; @@ -132,7 +122,6 @@ struct ice_aqc_list_caps_elem { __le64 rsvd2; }; - /* Manage MAC address, read command - indirect (0x0107) * This struct is also used for the response */ @@ -153,7 +142,6 @@ struct ice_aqc_manage_mac_read { __le32 addr_low; }; - /* Response buffer format for manage MAC read command */ struct ice_aqc_manage_mac_read_resp { u8 lport_num; @@ -163,7 +151,6 @@ struct ice_aqc_manage_mac_read_resp { u8 mac_addr[ETH_ALEN]; }; - /* Manage MAC address, write command - direct (0x0108) */ struct ice_aqc_manage_mac_write { u8 rsvd; @@ -182,7 +169,6 @@ struct ice_aqc_manage_mac_write { __le32 addr_low; }; - /* Clear PXE Command and response (direct 0x0110) */ struct ice_aqc_clear_pxe { u8 rx_cnt; @@ -190,7 +176,6 @@ struct ice_aqc_clear_pxe { u8 reserved[15]; }; - /* Configure No-Drop Policy Command (direct 0x0112) */ struct ice_aqc_config_no_drop_policy { u8 opts; @@ -215,7 +200,6 @@ struct ice_aqc_get_sw_cfg { __le32 addr_low; }; - /* Each entry in the response buffer is of the following type: */ struct ice_aqc_get_sw_cfg_resp_elem { /* VSI/Port Number */ @@ -242,7 +226,6 @@ struct ice_aqc_get_sw_cfg_resp_elem { #define ICE_AQC_GET_SW_CONF_RESP_IS_VF BIT(15) }; - /* The response buffer is as follows. Note that the length of the * elements array varies with the length of the command response. */ @@ -250,8 +233,6 @@ struct ice_aqc_get_sw_cfg_resp { struct ice_aqc_get_sw_cfg_resp_elem elements[1]; }; - - /* These resource type defines are used for all switch resource * commands where a resource type is required, such as: * Get Resource Allocation command (indirect 0x0204) @@ -324,7 +305,6 @@ struct ice_aqc_get_res_resp { struct ice_aqc_get_res_resp_elem elem[1]; }; - /* Allocate Resources command (indirect 0x0208) * Free Resources command (indirect 0x0209) */ @@ -335,7 +315,6 @@ struct ice_aqc_alloc_free_res_cmd { __le32 addr_low; }; - /* Resource descriptor */ struct ice_aqc_res_elem { union { @@ -344,7 +323,6 @@ struct ice_aqc_res_elem { } e; }; - /* Buffer for Allocate/Free Resources commands */ struct ice_aqc_alloc_free_res_elem { __le16 res_type; /* Types defined above cmd 0x0204 */ @@ -355,7 +333,6 @@ struct ice_aqc_alloc_free_res_elem { struct ice_aqc_res_elem elem[1]; }; - /* Get Allocated Resource Descriptors Command (indirect 0x020A) */ struct ice_aqc_get_allocd_res_desc { union { @@ -379,7 +356,6 @@ struct ice_aqc_get_allocd_res_desc_resp { struct ice_aqc_res_elem elem[1]; }; - /* Add VSI (indirect 0x0210) * Update VSI (indirect 0x0211) * Get VSI (indirect 0x0212) @@ -405,7 +381,6 @@ struct ice_aqc_add_get_update_free_vsi { __le32 addr_low; }; - /* Response descriptor for: * Add VSI (indirect 0x0210) * Update VSI (indirect 0x0211) @@ -420,7 +395,6 @@ struct ice_aqc_add_update_free_vsi_resp { __le32 addr_low; }; - struct ice_aqc_get_vsi_resp { __le16 vsi_num; u8 vf_id; @@ -434,7 +408,6 @@ struct ice_aqc_get_vsi_resp { __le32 addr_low; }; - struct ice_aqc_vsi_props { __le16 valid_sections; #define ICE_AQ_VSI_PROP_SW_VALID BIT(0) @@ -589,7 +562,6 @@ struct ice_aqc_vsi_props { u8 reserved[24]; }; - /* Add/update mirror rule - direct (0x0260) */ #define ICE_AQC_RULE_ID_VALID_S 7 #define ICE_AQC_RULE_ID_VALID_M (0x1 << ICE_AQC_RULE_ID_VALID_S) @@ -694,7 +666,6 @@ struct ice_aqc_storm_cfg { __le32 reserved; }; - #define ICE_MAX_NUM_RECIPES 64 /* Add/Get Recipe (indirect 0x0290/0x0292)*/ @@ -779,7 +750,6 @@ struct ice_aqc_sw_rules { __le32 addr_low; }; - #pragma pack(1) /* Add/Update/Get/Remove lookup Rx/Tx command/response entry * This structures describes the lookup rules and associated actions. "index" @@ -867,7 +837,6 @@ struct ice_sw_rule_lkup_rx_tx { }; #pragma pack() - /* Add/Update/Remove large action command/response entry * "index" is returned as part of a response to a successful Add command, and * can be used to identify the action for Update/Get/Remove commands. @@ -928,7 +897,6 @@ struct ice_sw_rule_lg_act { #define ICE_LG_ACT_STAT_COUNT_M (0x7F << ICE_LG_ACT_STAT_COUNT_S) }; - /* Add/Update/Remove VSI list command/response entry * "index" is returned as part of a response to a successful Add command, and * can be used to identify the VSI list for Update/Get/Remove commands. @@ -939,7 +907,6 @@ struct ice_sw_rule_vsi_list { __le16 vsi[1]; /* Array of number_vsi VSI numbers */ }; - #pragma pack(1) /* Query VSI list command/response entry */ struct ice_sw_rule_vsi_list_query { @@ -948,7 +915,6 @@ struct ice_sw_rule_vsi_list_query { }; #pragma pack() - #pragma pack(1) /* Add switch rule response: * Content of return buffer is same as the input buffer. The status field and @@ -974,7 +940,6 @@ struct ice_aqc_sw_rules_elem { #pragma pack() - /* PFC Ignore (direct 0x0301) * The command and response use the same descriptor structure */ @@ -1009,7 +974,6 @@ struct ice_aqc_set_dcb_params { u8 rsvd[14]; }; - /* Get Default Topology (indirect 0x0400) */ struct ice_aqc_get_topo { u8 port_num; @@ -1020,7 +984,6 @@ struct ice_aqc_get_topo { __le32 addr_low; }; - /* Update TSE (indirect 0x0403) * Get TSE (indirect 0x0404) * Add TSE (indirect 0x0401) @@ -1037,7 +1000,6 @@ struct ice_aqc_sched_elem_cmd { __le32 addr_low; }; - /* This is the buffer for: * Suspend Nodes (indirect 0x0409) * Resume Nodes (indirect 0x040A) @@ -1046,7 +1008,6 @@ struct ice_aqc_suspend_resume_elem { __le32 teid[1]; }; - struct ice_aqc_txsched_move_grp_info_hdr { __le32 src_parent_teid; __le32 dest_parent_teid; @@ -1054,19 +1015,16 @@ struct ice_aqc_txsched_move_grp_info_hdr { __le16 reserved; }; - struct ice_aqc_move_elem { struct ice_aqc_txsched_move_grp_info_hdr hdr; __le32 teid[1]; }; - struct ice_aqc_elem_info_bw { __le16 bw_profile_idx; __le16 bw_alloc; }; - struct ice_aqc_txsched_elem { u8 elem_type; /* Special field, reserved for some aq calls */ #define ICE_AQC_ELEM_TYPE_UNDEFINED 0x0 @@ -1098,50 +1056,42 @@ struct ice_aqc_txsched_elem { __le16 reserved2; }; - struct ice_aqc_txsched_elem_data { __le32 parent_teid; __le32 node_teid; struct ice_aqc_txsched_elem data; }; - struct ice_aqc_txsched_topo_grp_info_hdr { __le32 parent_teid; __le16 num_elems; __le16 reserved2; }; - struct ice_aqc_add_elem { struct ice_aqc_txsched_topo_grp_info_hdr hdr; struct ice_aqc_txsched_elem_data generic[1]; }; - struct ice_aqc_conf_elem { struct ice_aqc_txsched_elem_data generic[1]; }; - struct ice_aqc_get_elem { struct ice_aqc_txsched_elem_data generic[1]; }; - struct ice_aqc_get_topo_elem { struct ice_aqc_txsched_topo_grp_info_hdr hdr; struct ice_aqc_txsched_elem_data generic[ICE_AQC_TOPO_MAX_LEVEL_NUM]; }; - struct ice_aqc_delete_elem { struct ice_aqc_txsched_topo_grp_info_hdr hdr; __le32 teid[1]; }; - /* Query Port ETS (indirect 0x040E) * * This indirect command is used to query port TC node configuration. @@ -1168,7 +1118,6 @@ struct ice_aqc_port_ets_elem { __le32 tc_node_teid[8]; /* Used for response, reserved in command */ }; - /* Rate limiting profile for * Add RL profile (indirect 0x0410) * Query RL profile (indirect 0x0411) @@ -1184,7 +1133,6 @@ struct ice_aqc_rl_profile { __le32 addr_low; }; - struct ice_aqc_rl_profile_elem { u8 level; u8 flags; @@ -1204,13 +1152,10 @@ struct ice_aqc_rl_profile_elem { __le16 rl_encode; }; - struct ice_aqc_rl_profile_generic_elem { struct ice_aqc_rl_profile_elem generic[1]; }; - - /* Configure L2 Node CGD (indirect 0x0414) * This indirect command allows configuring a congestion domain for given L2 * node TEIDs in the scheduler topology. @@ -1222,19 +1167,16 @@ struct ice_aqc_cfg_l2_node_cgd { __le32 addr_low; }; - struct ice_aqc_cfg_l2_node_cgd_elem { __le32 node_teid; u8 cgd; u8 reserved[3]; }; - struct ice_aqc_cfg_l2_node_cgd_data { struct ice_aqc_cfg_l2_node_cgd_elem elem[1]; }; - /* Query Scheduler Resource Allocation (indirect 0x0412) * This indirect command retrieves the scheduler resources allocated by * EMP Firmware to the given PF. @@ -1245,7 +1187,6 @@ struct ice_aqc_query_txsched_res { __le32 addr_low; }; - struct ice_aqc_generic_sched_props { __le16 phys_levels; __le16 logical_levels; @@ -1257,7 +1198,6 @@ struct ice_aqc_generic_sched_props { u8 rsvd1[22]; }; - struct ice_aqc_layer_props { u8 logical_layer; u8 chunk_size; @@ -1271,13 +1211,11 @@ struct ice_aqc_layer_props { u8 rsvd1[14]; }; - struct ice_aqc_query_txsched_res_resp { struct ice_aqc_generic_sched_props sched_props; struct ice_aqc_layer_props layer_props[ICE_AQC_TOPO_MAX_LEVEL_NUM]; }; - /* Query Node to Root Topology (indirect 0x0413) * This command uses ice_aqc_get_elem as its data buffer. */ @@ -1288,7 +1226,6 @@ struct ice_aqc_query_node_to_root { __le32 addr_low; }; - /* Get PHY capabilities (indirect 0x0600) */ struct ice_aqc_get_phy_caps { u8 lport_num; @@ -1311,7 +1248,6 @@ struct ice_aqc_get_phy_caps { __le32 addr_low; }; - /* This is #define of PHY type (Extended): * The first set of defines is for phy_type_low. */ @@ -1453,7 +1389,6 @@ struct ice_aqc_get_phy_caps_data { } qual_modules[ICE_AQC_QUAL_MOD_COUNT_MAX]; }; - /* Set PHY capabilities (direct 0x0601) * NOTE: This command must be followed by setup link and restart auto-neg */ @@ -1464,7 +1399,6 @@ struct ice_aqc_set_phy_cfg { __le32 addr_low; }; - /* Set PHY config command data structure */ struct ice_aqc_set_phy_cfg_data { __le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */ @@ -1485,7 +1419,6 @@ struct ice_aqc_set_phy_cfg_data { u8 rsvd1; }; - /* Set MAC Config command data structure (direct 0x0603) */ struct ice_aqc_set_mac_cfg { __le16 max_frame_size; @@ -1505,7 +1438,6 @@ struct ice_aqc_set_mac_cfg { u8 reserved[7]; }; - /* Restart AN command data structure (direct 0x0605) * Also used for response, with only the lport_num field present. */ @@ -1518,7 +1450,6 @@ struct ice_aqc_restart_an { u8 reserved2[13]; }; - /* Get link status (indirect 0x0607), also used for Link Status Event */ struct ice_aqc_get_link_status { u8 lport_num; @@ -1535,7 +1466,6 @@ struct ice_aqc_get_link_status { __le32 addr_low; }; - /* Get link status response data structure, also used for Link Status Event */ struct ice_aqc_get_link_status_data { u8 topo_media_conflict; @@ -1621,7 +1551,6 @@ struct ice_aqc_get_link_status_data { __le64 phy_type_high; /* Use values from ICE_PHY_TYPE_HIGH_* */ }; - /* Set event mask command (direct 0x0613) */ struct ice_aqc_set_event_mask { u8 lport_num; @@ -1641,8 +1570,6 @@ struct ice_aqc_set_event_mask { u8 reserved1[6]; }; - - /* Set MAC Loopback command (direct 0x0620) */ struct ice_aqc_set_mac_lb { u8 lb_mode; @@ -1651,9 +1578,6 @@ struct ice_aqc_set_mac_lb { u8 reserved[15]; }; - - - struct ice_aqc_link_topo_addr { u8 lport_num; u8 lport_num_valid; @@ -1716,8 +1640,6 @@ struct ice_aqc_set_port_id_led { u8 rsvd[13]; }; - - /* Read/Write SFF EEPROM command (indirect 0x06EE) */ struct ice_aqc_sff_eeprom { u8 lport_num; @@ -1797,7 +1719,6 @@ struct ice_aqc_nvm { #define ICE_AQC_NVM_LLDP_STATUS_M_LEN 4 /* In Bits */ #define ICE_AQC_NVM_LLDP_STATUS_RD_LEN 4 /* In Bytes */ - /* Used for 0x0704 as well as for 0x0705 commands */ struct ice_aqc_nvm_cfg { u8 cmd_flags; @@ -1812,14 +1733,12 @@ struct ice_aqc_nvm_cfg { __le32 addr_low; }; - struct ice_aqc_nvm_cfg_data { __le16 field_id; __le16 field_options; __le16 field_value; }; - /* NVM Checksum Command (direct, 0x0706) */ struct ice_aqc_nvm_checksum { u8 flags; @@ -1831,9 +1750,6 @@ struct ice_aqc_nvm_checksum { u8 rsvd2[12]; }; - - - /* Get LLDP MIB (indirect 0x0A00) * Note: This is also used by the LLDP MIB Change Event (0x0A01) * as the format is the same. @@ -1985,7 +1901,6 @@ struct ice_aqc_lldp_stop_start_specific_agent { u8 reserved[15]; }; - /* Get/Set RSS key (indirect 0x0B04/0x0B02) */ struct ice_aqc_get_set_rss_key { #define ICE_AQC_GSET_RSS_KEY_VSI_VALID BIT(15) @@ -1997,7 +1912,6 @@ struct ice_aqc_get_set_rss_key { __le32 addr_low; }; - #define ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE 0x28 #define ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE 0xC #define ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE \ @@ -2019,7 +1933,6 @@ struct ice_aqc_get_set_rss_keys { u8 extended_hash_key[ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE]; }; - /* Get/Set RSS LUT (indirect 0x0B05/0x0B03) */ struct ice_aqc_get_set_rss_lut { #define ICE_AQC_GSET_RSS_LUT_VSI_VALID BIT(15) @@ -2055,7 +1968,6 @@ struct ice_aqc_get_set_rss_lut { __le32 addr_low; }; - /* Clear FD Table Command (direct, 0x0B06) */ struct ice_aqc_clear_fd_table { u8 clear_type; @@ -2066,9 +1978,6 @@ struct ice_aqc_clear_fd_table { u8 reserved[12]; }; - - - /* Add Tx LAN Queues (indirect 0x0C30) */ struct ice_aqc_add_txqs { u8 num_qgrps; @@ -2078,7 +1987,6 @@ struct ice_aqc_add_txqs { __le32 addr_low; }; - /* This is the descriptor of each queue entry for the Add Tx LAN Queues * command (0x0C30). Only used within struct ice_aqc_add_tx_qgrp. */ @@ -2091,7 +1999,6 @@ struct ice_aqc_add_txqs_perq { struct ice_aqc_txsched_elem info; }; - /* The format of the command buffer for Add Tx LAN Queues (0x0C30) * is an array of the following structs. Please note that the length of * each struct ice_aqc_add_tx_qgrp is variable due @@ -2104,7 +2011,6 @@ struct ice_aqc_add_tx_qgrp { struct ice_aqc_add_txqs_perq txqs[1]; }; - /* Disable Tx LAN Queues (indirect 0x0C31) */ struct ice_aqc_dis_txqs { u8 cmd_type; @@ -2127,7 +2033,6 @@ struct ice_aqc_dis_txqs { __le32 addr_low; }; - /* The buffer for Disable Tx LAN Queues (indirect 0x0C31) * contains the following structures, arrayed one after the * other. @@ -2150,12 +2055,10 @@ struct ice_aqc_dis_txq_item { (1 << ICE_AQC_Q_DIS_BUF_ELEM_TYPE_S) }; - struct ice_aqc_dis_txq { struct ice_aqc_dis_txq_item qgrps[1]; }; - /* Tx LAN Queues Cleanup Event (0x0C31) */ struct ice_aqc_txqs_cleanup { __le16 caller_opc; @@ -2163,7 +2066,6 @@ struct ice_aqc_txqs_cleanup { u8 reserved[12]; }; - /* Move / Reconfigure Tx Queues (indirect 0x0C32) */ struct ice_aqc_move_txqs { u8 cmd_type; @@ -2184,7 +2086,6 @@ struct ice_aqc_move_txqs { __le32 addr_low; }; - /* This is the descriptor of each queue entry for the move Tx LAN Queues * command (0x0C32). */ @@ -2195,15 +2096,12 @@ struct ice_aqc_move_txqs_elem { __le32 q_teid; }; - struct ice_aqc_move_txqs_data { __le32 src_teid; __le32 dest_teid; struct ice_aqc_move_txqs_elem txqs[1]; }; - - /* Download Package (indirect 0x0C40) */ /* Also used for Update Package (indirect 0x0C42) */ struct ice_aqc_download_pkg { @@ -2255,9 +2153,6 @@ struct ice_aqc_get_pkg_info_resp { struct ice_aqc_get_pkg_info pkg_info[1]; }; - - - /* Lan Queue Overflow Event (direct, 0x1001) */ struct ice_aqc_event_lan_overflow { __le32 prtdcb_ruptq; @@ -2265,9 +2160,6 @@ struct ice_aqc_event_lan_overflow { u8 reserved[8]; }; - - - /** * struct ice_aq_desc - Admin Queue (AQ) descriptor * @flags: ICE_AQ_FLAG_* flags @@ -2361,7 +2253,6 @@ struct ice_aq_desc { } params; }; - /* FW defined boundary for a large buffer, 4k >= Large buffer > 512 bytes */ #define ICE_AQ_LG_BUF 512 @@ -2572,8 +2463,6 @@ enum ice_adminq_opc { ice_aqc_opc_update_pkg = 0x0C42, ice_aqc_opc_get_pkg_info_list = 0x0C43, - - /* Standalone Commands/Events */ ice_aqc_opc_event_lan_overflow = 0x1001, }; diff --git a/drivers/net/ice/base/ice_bitops.h b/drivers/net/ice/base/ice_bitops.h index f0aa8ce88..32f64cac0 100644 --- a/drivers/net/ice/base/ice_bitops.h +++ b/drivers/net/ice/base/ice_bitops.h @@ -8,7 +8,6 @@ /* Define the size of the bitmap chunk */ typedef u32 ice_bitmap_t; - /* Number of bits per bitmap chunk */ #define BITS_PER_CHUNK (BITS_PER_BYTE * sizeof(ice_bitmap_t)) /* Determine which chunk a bit belongs in */ @@ -372,5 +371,4 @@ ice_cmp_bitmap(ice_bitmap_t *bmp1, ice_bitmap_t *bmp2, u16 size) return true; } - #endif /* _ICE_BITOPS_H_ */ diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index 11e902ea1..16b91dc12 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -11,7 +11,6 @@ #define ICE_PF_RESET_WAIT_COUNT 200 - /** * ice_set_mac_type - Sets MAC type * @hw: pointer to the HW structure @@ -41,7 +40,6 @@ static enum ice_status ice_set_mac_type(struct ice_hw *hw) return status; } - /** * ice_clear_pf_cfg - Clear PF configuration * @hw: pointer to the hardware structure @@ -113,7 +111,6 @@ ice_aq_manage_mac_read(struct ice_hw *hw, void *buf, u16 buf_size, ETH_ALEN, ICE_DMA_TO_NONDMA); break; } - return ICE_SUCCESS; } @@ -533,7 +530,6 @@ static void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw) ice_free(hw, sw); } - /** * ice_get_itr_intrl_gran * @hw: pointer to the HW struct @@ -598,7 +594,6 @@ void ice_print_rollback_msg(struct ice_hw *hw) &ver_lo); SNPRINTF(nvm_str, sizeof(nvm_str), "%x.%02x 0x%x %d.%d.%d", ver_hi, ver_lo, hw->nvm.eetrack, oem_ver, oem_build, oem_patch); - ice_warn(hw, "Firmware rollback mode detected. Current version is NVM: %s, FW: %d.%d. Device may exhibit limited functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware rollback mode", nvm_str, hw->fw_maj_ver, hw->fw_min_ver); @@ -617,7 +612,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw) ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__); - /* Set MAC type based on DeviceID */ status = ice_set_mac_type(hw); if (status) @@ -627,14 +621,12 @@ enum ice_status ice_init_hw(struct ice_hw *hw) PF_FUNC_RID_FUNCTION_NUMBER_M) >> PF_FUNC_RID_FUNCTION_NUMBER_S; - status = ice_reset(hw, ICE_RESET_PFR); if (status) return status; ice_get_itr_intrl_gran(hw); - status = ice_create_all_ctrlq(hw); if (status) goto err_unroll_cqinit; @@ -686,7 +678,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw) goto err_unroll_alloc; } - /* Initialize port_info struct with scheduler data */ status = ice_sched_init_port(hw->port_info); if (status) @@ -725,7 +716,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw) if (status) goto err_unroll_sched; - /* Get MAC information */ /* A single port can report up to two (LAN and WoL) addresses */ mac_buf = ice_calloc(hw, 2, @@ -926,7 +916,6 @@ enum ice_status ice_reset(struct ice_hw *hw, enum ice_reset_req req) wr32(hw, GLGEN_RTRIG, val); ice_flush(hw); - /* wait for the FW to be ready */ return ice_check_reset(hw); } @@ -997,8 +986,6 @@ ice_get_pfa_module_tlv(struct ice_hw *hw, u16 *module_tlv, u16 *module_tlv_len, return ICE_ERR_DOES_NOT_EXIST; } - - /** * ice_copy_rxq_ctx_to_hw * @hw: pointer to the hardware structure @@ -1321,7 +1308,6 @@ ice_clear_tx_drbell_q_ctx(struct ice_hw *hw, u32 tx_drbell_q_index) } #endif /* !NO_UNUSED_CTX_CODE || AE_DRIVER */ - /* FW Admin Queue command wrappers */ /** @@ -2142,7 +2128,6 @@ ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags, cmd->flags = flags; - /* Prep values for flags, sah, sal */ cmd->sah = HTONS(*((const u16 *)mac_addr)); cmd->sal = HTONL(*((const u32 *)(mac_addr + 2))); @@ -2179,7 +2164,6 @@ void ice_clear_pxe_mode(struct ice_hw *hw) ice_aq_clear_pxe_mode(hw); } - /** * ice_get_link_speed_based_on_phy_type - returns link speed * @phy_type_low: lower part of phy_type @@ -2848,7 +2832,6 @@ ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd) return ice_aq_send_cmd(hw, &desc, NULL, 0, cd); } - /** * ice_aq_set_port_id_led * @pi: pointer to the port information @@ -2869,7 +2852,6 @@ ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode, ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_port_id_led); - if (is_orig_mode) cmd->ident_mode = ICE_AQC_PORT_IDENT_LED_ORIG; else @@ -3357,7 +3339,6 @@ ice_aq_move_recfg_lan_txq(struct ice_hw *hw, u8 num_qs, bool is_move, return status; } - /* End of FW Admin Queue command wrappers */ /** @@ -3581,9 +3562,6 @@ ice_set_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info) return ICE_SUCCESS; } - - - /** * ice_read_byte - read context byte into struct * @src_ctx: the context structure to read from @@ -4047,8 +4025,6 @@ ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap, ICE_SCHED_NODE_OWNER_LAN); } - - /** * ice_replay_pre_init - replay pre initialization * @hw: pointer to the HW struct @@ -4246,7 +4222,6 @@ ice_stat_update_repc(struct ice_hw *hw, u16 vsi_handle, bool prev_stat_loaded, cur_stats->rx_errors += error_cnt; } - /** * ice_sched_query_elem - query element information from HW * @hw: pointer to the HW struct diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h index c42c58670..bcb0a999d 100644 --- a/drivers/net/ice/base/ice_common.h +++ b/drivers/net/ice/base/ice_common.h @@ -169,7 +169,6 @@ ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask, enum ice_status ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd); - enum ice_status ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode, struct ice_sq_cd *cd); @@ -178,7 +177,6 @@ ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr, u16 mem_addr, u8 page, u8 set_page, u8 *data, u8 length, bool write, struct ice_sq_cd *cd); - enum ice_status ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info); enum ice_status diff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c index 1ea8f3a24..8a65fae40 100644 --- a/drivers/net/ice/base/ice_controlq.c +++ b/drivers/net/ice/base/ice_controlq.c @@ -4,7 +4,6 @@ #include "ice_common.h" - #define ICE_CQ_INIT_REGS(qinfo, prefix) \ do { \ (qinfo)->sq.head = prefix##_ATQH; \ @@ -53,7 +52,6 @@ static void ice_mailbox_init_regs(struct ice_hw *hw) ICE_CQ_INIT_REGS(cq, PF_MBX); } - /** * ice_check_sq_alive * @hw: pointer to the HW struct @@ -521,7 +519,6 @@ ice_shutdown_rq(struct ice_hw *hw, struct ice_ctl_q_info *cq) return ret_code; } - /** * ice_init_check_adminq - Check version for Admin Queue to know if its alive * @hw: pointer to the hardware structure @@ -533,12 +530,10 @@ static enum ice_status ice_init_check_adminq(struct ice_hw *hw) ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__); - status = ice_aq_get_fw_ver(hw, NULL); if (status) goto init_ctrlq_free_rq; - if (!ice_aq_ver_check(hw)) { status = ICE_ERR_FW_API_VER; goto init_ctrlq_free_rq; @@ -633,7 +628,6 @@ enum ice_status ice_init_all_ctrlq(struct ice_hw *hw) ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__); - /* Init FW admin queue */ ret_code = ice_init_ctrlq(hw, ICE_CTL_Q_ADMIN); if (ret_code) @@ -972,7 +966,6 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq, ice_debug_cq(hw, (void *)desc_on_ring, buf, buf_size); - (cq->sq.next_to_use)++; if (cq->sq.next_to_use == cq->sq.count) cq->sq.next_to_use = 0; @@ -1025,7 +1018,6 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq, ice_debug_cq(hw, (void *)desc, buf, buf_size); - /* save writeback AQ if requested */ if (details->wb_desc) ice_memcpy(details->wb_desc, desc_on_ring, @@ -1158,7 +1150,6 @@ ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq, ice_debug_cq(hw, (void *)desc, e->msg_buf, cq->rq_buf_size); - /* Restore the original datalen and buffer address in the desc, * FW updates datalen to indicate the event message size */ diff --git a/drivers/net/ice/base/ice_controlq.h b/drivers/net/ice/base/ice_controlq.h index b1214f670..8ad7857c8 100644 --- a/drivers/net/ice/base/ice_controlq.h +++ b/drivers/net/ice/base/ice_controlq.h @@ -7,7 +7,6 @@ #include "ice_adminq_cmd.h" - /* Maximum buffer lengths for all control queue types */ #define ICE_AQ_MAX_BUF_LEN 4096 #define ICE_MBXQ_MAX_BUF_LEN 4096 diff --git a/drivers/net/ice/base/ice_devids.h b/drivers/net/ice/base/ice_devids.h index c9a567fb1..0ff3b9b34 100644 --- a/drivers/net/ice/base/ice_devids.h +++ b/drivers/net/ice/base/ice_devids.h @@ -5,7 +5,6 @@ #ifndef _ICE_DEVIDS_H_ #define _ICE_DEVIDS_H_ - /* Device IDs */ /* Intel(R) Ethernet Controller E810-C for backplane */ #define ICE_DEV_ID_E810C_BACKPLANE 0x1591 diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 4ad816874..05cd39b17 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -808,7 +808,6 @@ ice_aq_download_pkg(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf, return status; } - /** * ice_aq_update_pkg * @hw: pointer to the hardware structure @@ -1180,7 +1179,6 @@ static enum ice_status ice_get_pkg_info(struct ice_hw *hw) return status; } - /** * ice_verify_pkg - verify package * @pkg: pointer to the package buffer @@ -2084,7 +2082,6 @@ ice_find_prot_off(struct ice_hw *hw, enum ice_block blk, u8 prof, u8 fv_idx, /* PTG Management */ - /** * ice_ptg_find_ptype - Search for packet type group using packet type (ptype) * @hw: pointer to the hardware structure @@ -2121,7 +2118,6 @@ void ice_ptg_alloc_val(struct ice_hw *hw, enum ice_block blk, u8 ptg) hw->blk[blk].xlt1.ptg_tbl[ptg].in_use = true; } - /** * ice_ptg_remove_ptype - Removes ptype from a particular packet type group * @hw: pointer to the hardware structure @@ -2315,7 +2311,6 @@ ice_match_prop_lst(struct LIST_HEAD_TYPE *list1, struct LIST_HEAD_TYPE *list2) /* VSIG Management */ - /** * ice_vsig_find_vsi - find a VSIG that contains a specified VSI * @hw: pointer to the hardware structure diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h index 3b5c1c39a..137eaa7f8 100644 --- a/drivers/net/ice/base/ice_flex_pipe.h +++ b/drivers/net/ice/base/ice_flex_pipe.h @@ -46,7 +46,6 @@ bool ice_tunnel_port_in_use(struct ice_hw *hw, u16 port, u16 *index); bool ice_tunnel_get_type(struct ice_hw *hw, u16 port, enum ice_tunnel_type *type); - /* XLT2/VSI group functions */ enum ice_status ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig); diff --git a/drivers/net/ice/base/ice_hw_autogen.h b/drivers/net/ice/base/ice_hw_autogen.h index 6f227adb8..92d432044 100644 --- a/drivers/net/ice/base/ice_hw_autogen.h +++ b/drivers/net/ice/base/ice_hw_autogen.h @@ -6,8 +6,6 @@ #ifndef _ICE_HW_AUTOGEN_H_ #define _ICE_HW_AUTOGEN_H_ - - #define GL_RDPU_CNTRL 0x00052054 /* Reset Source: CORER */ #define GL_RDPU_CNTRL_RX_PAD_EN_S 0 #define GL_RDPU_CNTRL_RX_PAD_EN_M BIT(0) diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h index e77d4bf50..a97c63cc9 100644 --- a/drivers/net/ice/base/ice_lan_tx_rx.h +++ b/drivers/net/ice/base/ice_lan_tx_rx.h @@ -173,7 +173,6 @@ struct ice_fltr_desc { (0xFFFFFFFFULL << ICE_FXD_FLTR_QW1_FDID_S) #define ICE_FXD_FLTR_QW1_FDID_ZERO 0x0ULL - enum ice_rx_desc_status_bits { /* Note: These are predefined bit offsets */ ICE_RX_DESC_STATUS_DD_S = 0, @@ -204,7 +203,6 @@ enum ice_rx_desc_status_bits { #define ICE_RXD_QW1_STATUS_TSYNVALID_S ICE_RX_DESC_STATUS_TSYNVALID_S #define ICE_RXD_QW1_STATUS_TSYNVALID_M BIT_ULL(ICE_RXD_QW1_STATUS_TSYNVALID_S) - enum ice_rx_desc_fltstat_values { ICE_RX_DESC_FLTSTAT_NO_DATA = 0, ICE_RX_DESC_FLTSTAT_RSV_FD_ID = 1, /* 16byte desc? FD_ID : RSV */ @@ -212,7 +210,6 @@ enum ice_rx_desc_fltstat_values { ICE_RX_DESC_FLTSTAT_RSS_HASH = 3, }; - #define ICE_RXD_QW1_ERROR_S 19 #define ICE_RXD_QW1_ERROR_M (0xFFUL << ICE_RXD_QW1_ERROR_S) @@ -310,7 +307,6 @@ enum ice_rx_ptype_payload_layer { ICE_RX_PTYPE_PAYLOAD_LAYER_PAY4 = 3, }; - #define ICE_RXD_QW1_LEN_PBUF_S 38 #define ICE_RXD_QW1_LEN_PBUF_M (0x3FFFULL << ICE_RXD_QW1_LEN_PBUF_S) @@ -320,7 +316,6 @@ enum ice_rx_ptype_payload_layer { #define ICE_RXD_QW1_LEN_SPH_S 63 #define ICE_RXD_QW1_LEN_SPH_M BIT_ULL(ICE_RXD_QW1_LEN_SPH_S) - enum ice_rx_desc_ext_status_bits { /* Note: These are predefined bit offsets */ ICE_RX_DESC_EXT_STATUS_L2TAG2P_S = 0, @@ -331,7 +326,6 @@ enum ice_rx_desc_ext_status_bits { ICE_RX_DESC_EXT_STATUS_PELONGB_S = 11, }; - enum ice_rx_desc_pe_status_bits { /* Note: These are predefined bit offsets */ ICE_RX_DESC_PE_STATUS_QPID_S = 0, /* 18 BITS */ @@ -352,7 +346,6 @@ enum ice_rx_desc_pe_status_bits { #define ICE_RX_PROG_STATUS_DESC_QW1_PROGID_M \ (0x7UL << ICE_RX_PROG_STATUS_DESC_QW1_PROGID_S) - #define ICE_RX_PROG_STATUS_DESC_QW1_ERROR_S 19 #define ICE_RX_PROG_STATUS_DESC_QW1_ERROR_M \ (0x3FUL << ICE_RX_PROG_STATUS_DESC_QW1_ERROR_S) @@ -840,7 +833,6 @@ enum ice_rx_flex_desc_exstat_bits { ICE_RX_FLEX_DESC_EXSTAT_OVERSIZE_S = 3, }; - #define ICE_RXQ_CTX_SIZE_DWORDS 8 #define ICE_RXQ_CTX_SZ (ICE_RXQ_CTX_SIZE_DWORDS * sizeof(u32)) #define ICE_TX_CMPLTNQ_CTX_SIZE_DWORDS 22 @@ -1056,7 +1048,6 @@ enum ice_tx_ctx_desc_eipt_offload { #define ICE_TXD_CTX_QW0_L4T_CS_S 23 #define ICE_TXD_CTX_QW0_L4T_CS_M BIT_ULL(ICE_TXD_CTX_QW0_L4T_CS_S) - #define ICE_LAN_TXQ_MAX_QGRPS 127 #define ICE_LAN_TXQ_MAX_QDIS 1023 diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c index 66cfec641..e00942528 100644 --- a/drivers/net/ice/base/ice_nvm.c +++ b/drivers/net/ice/base/ice_nvm.c @@ -4,7 +4,6 @@ #include "ice_common.h" - /** * ice_aq_read_nvm * @hw: pointer to the HW struct @@ -138,7 +137,6 @@ ice_read_sr_word_aq(struct ice_hw *hw, u16 offset, u16 *data) return status; } - /** * ice_read_sr_buf_aq - Reads Shadow RAM buf via AQ * @hw: pointer to the HW structure @@ -354,7 +352,6 @@ enum ice_status ice_init_nvm(struct ice_hw *hw) return ICE_SUCCESS; } - /** * ice_read_sr_buf - Reads Shadow RAM buf and acquire lock if necessary * @hw: pointer to the HW structure @@ -380,7 +377,6 @@ ice_read_sr_buf(struct ice_hw *hw, u16 offset, u16 *words, u16 *data) return status; } - /** * ice_nvm_validate_checksum * @hw: pointer to the HW struct diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h index 91f56f3fa..cdb691523 100644 --- a/drivers/net/ice/base/ice_protocol_type.h +++ b/drivers/net/ice/base/ice_protocol_type.h @@ -114,7 +114,6 @@ enum ice_prot_id { #define ICE_VNI_OFFSET 12 /* offset of VNI from ICE_PROT_UDP_OF */ - #define ICE_MAC_OFOS_HW 1 #define ICE_MAC_IL_HW 4 #define ICE_ETYPE_OL_HW 9 @@ -148,7 +147,6 @@ struct ice_protocol_entry { u8 protocol_id; }; - struct ice_ether_hdr { u8 dst_addr[ETH_ALEN]; u8 src_addr[ETH_ALEN]; diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c index 1cfc3bc20..6732e291a 100644 --- a/drivers/net/ice/base/ice_sched.c +++ b/drivers/net/ice/base/ice_sched.c @@ -4,7 +4,6 @@ #include "ice_sched.h" - /** * ice_sched_add_root_node - Insert the Tx scheduler root node in SW DB * @pi: port information structure @@ -876,7 +875,6 @@ ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_l2_nodes, return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd); } - /** * ice_sched_add_elems - add nodes to HW and SW DB * @pi: port information structure @@ -1366,7 +1364,6 @@ enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw) goto sched_query_out; } - sched_query_out: ice_free(hw, buf); return status; @@ -2021,7 +2018,6 @@ enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle) return ice_sched_rm_vsi_cfg(pi, vsi_handle, ICE_SCHED_NODE_OWNER_LAN); } - /** * ice_sched_is_tree_balanced - Check tree nodes are identical or not * @hw: pointer to the HW struct diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 2437faead..00358e4db 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -6,7 +6,6 @@ #include "ice_flex_type.h" #include "ice_flow.h" - #define ICE_ETH_DA_OFFSET 0 #define ICE_ETH_ETHTYPE_OFFSET 12 #define ICE_ETH_VLAN_TCI_OFFSET 14 @@ -743,7 +742,6 @@ ice_aq_get_sw_cfg(struct ice_hw *hw, struct ice_aqc_get_sw_cfg_resp *buf, return status; } - /** * ice_alloc_sw - allocate resources specific to switch * @hw: pointer to the HW struct @@ -1787,13 +1785,11 @@ enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw) } } while (req_desc && !status); - out: ice_free(hw, (void *)rbuf); return status; } - /** * ice_fill_sw_info - Helper function to populate lb_en and lan_en * @hw: pointer to the hardware structure @@ -3424,7 +3420,6 @@ ice_remove_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list) return ICE_SUCCESS; } - /** * ice_rem_sw_rule_info * @hw: pointer to the hardware structure @@ -3823,7 +3818,6 @@ ice_add_to_vsi_fltr_list(struct ice_hw *hw, u16 vsi_handle, return status; } - /** * ice_determine_promisc_mask * @fi: filter info to parse @@ -4811,8 +4805,6 @@ ice_fill_valid_words(struct ice_adv_lkup_elem *rule, return ret_val; } - - /** * ice_create_first_fit_recp_def - Create a recipe grouping * @hw: pointer to the hardware structure diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h index 515ad3bb6..0f0a1e98e 100644 --- a/drivers/net/ice/base/ice_switch.h +++ b/drivers/net/ice/base/ice_switch.h @@ -15,7 +15,6 @@ #define ICE_FLTR_TX BIT(1) #define ICE_FLTR_TX_RX (ICE_FLTR_RX | ICE_FLTR_TX) - /* Worst case buffer length for ice_aqc_opc_get_res_alloc */ #define ICE_MAX_RES_TYPES 0x80 #define ICE_AQ_GET_RES_ALLOC_BUF_LEN \ @@ -391,7 +390,6 @@ enum ice_status ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info); void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle); - /* Promisc/defport setup for VSIs */ enum ice_status ice_cfg_dflt_vsi(struct ice_port_info *pi, u16 vsi_handle, bool set, diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index deb614e37..150b4c5c5 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -134,10 +134,6 @@ static inline u32 ice_round_to_num(u32 N, u32 R) #define __ALWAYS_UNUSED #endif - - - - #define IS_ETHER_ADDR_EQUAL(addr1, addr2) \ (((bool)((((u16 *)(addr1))[0] == ((u16 *)(addr2))[0]))) && \ ((bool)((((u16 *)(addr1))[1] == ((u16 *)(addr2))[1]))) && \ @@ -384,7 +380,6 @@ struct ice_hw_common_caps { u8 proxy_support; }; - /* Function specific capabilities */ struct ice_hw_func_caps { struct ice_hw_common_caps common_cap; @@ -401,7 +396,6 @@ struct ice_hw_dev_caps { u32 num_funcs; }; - /* Information about MAC such as address, etc... */ struct ice_mac_info { u8 lan_addr[ETH_ALEN]; @@ -567,7 +561,6 @@ enum ice_rl_type { #define ICE_TXSCHED_GET_RL_WAKEUP_MV(p) LE16_TO_CPU((p)->info.wake_up_calc) #define ICE_TXSCHED_GET_RL_ENCODE(p) LE16_TO_CPU((p)->info.rl_encode) - /* The following tree example shows the naming conventions followed under * ice_port_info struct for default scheduler tree topology. * @@ -729,7 +722,6 @@ struct ice_switch_info { struct ice_sw_recipe *recp_list; }; - /* Port hardware description */ struct ice_hw { u8 *hw_addr; @@ -787,7 +779,6 @@ struct ice_hw { u8 fw_patch; /* firmware patch version */ u32 fw_build; /* firmware build number */ - /* Device max aggregate bandwidths corresponding to the GL_PWR_MODE_CTL * register. Used for determining the ITR/INTRL granularity during * initialization. -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 02/16] net/ice/base: add support for tunnel packets 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 00/16] net/ice/base: share code update secend batch Qi Zhang 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 01/16] net/ice/base: remove redundant empty lines Qi Zhang @ 2019-09-05 3:48 ` Qi Zhang 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 03/16] net/ice/base: add non-word aligned ip field support Qi Zhang ` (14 subsequent siblings) 16 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-05 3:48 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Henry Tieman, Paul M Stillwell Jr Add VXLAN tunnel training packets to flow director and change the interface to support tunnel packets. Signed-off-by: Henry Tieman <henry.w.tieman@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 266 ++++++++++++++++++++++++++++++++-------- drivers/net/ice/base/ice_fdir.h | 8 +- drivers/net/ice/base/ice_type.h | 10 +- 3 files changed, 228 insertions(+), 56 deletions(-) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index 9ef91b3b8..b92603e10 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -5,7 +5,7 @@ #include "ice_common.h" #include "ice_fdir.h" -/* These are dummy packet headers used to program flow director filters. */ +/* These are training packet headers used to program flow director filters. */ static const u8 ice_fdir_tcpv4_pkt[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, @@ -88,47 +88,177 @@ static const u8 ice_fdir_ipv6_pkt[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, }; -/* Flow Director dummy packet table */ +static const u8 ice_fdir_tcp4_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x5a, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + 0x45, 0x00, 0x00, 0x28, 0x00, 0x00, 0x40, 0x00, + 0x40, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x50, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_udp4_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x4e, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + 0x45, 0x00, 0x00, 0x1c, 0x00, 0x00, 0x40, 0x00, + 0x40, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_sctp4_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x52, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + 0x45, 0x00, 0x00, 0x20, 0x00, 0x01, 0x00, 0x00, + 0x40, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_ip4_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x46, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + 0x45, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x00, + 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_tcp6_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x6e, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, + 0x60, 0x00, 0x00, 0x00, 0x00, 0x14, 0x06, 0x40, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x50, 0x00, 0x20, 0x00, + 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_udp6_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x62, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, + 0x60, 0x00, 0x00, 0x00, 0x00, 0x08, 0x11, 0x40, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_sctp6_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x66, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, + 0x60, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x84, 0x40, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_ip6_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x5a, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, + 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3b, 0x40, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + +/* Flow Director no-op training packet table */ static const struct ice_fdir_base_pkt ice_fdir_pkt[] = { { ICE_FLTR_PTYPE_NONF_IPV4_TCP, - sizeof(ice_fdir_tcpv4_pkt), - ice_fdir_tcpv4_pkt, + sizeof(ice_fdir_tcpv4_pkt), ice_fdir_tcpv4_pkt, + sizeof(ice_fdir_tcp4_tun_pkt), ice_fdir_tcp4_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV4_UDP, - sizeof(ice_fdir_udpv4_pkt), - ice_fdir_udpv4_pkt, + sizeof(ice_fdir_udpv4_pkt), ice_fdir_udpv4_pkt, + sizeof(ice_fdir_udp4_tun_pkt), ice_fdir_udp4_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV4_SCTP, - sizeof(ice_fdir_sctpv4_pkt), - ice_fdir_sctpv4_pkt, + sizeof(ice_fdir_sctpv4_pkt), ice_fdir_sctpv4_pkt, + sizeof(ice_fdir_sctp4_tun_pkt), ice_fdir_sctp4_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV4_OTHER, - sizeof(ice_fdir_ipv4_pkt), - ice_fdir_ipv4_pkt, + sizeof(ice_fdir_ipv4_pkt), ice_fdir_ipv4_pkt, + sizeof(ice_fdir_ip4_tun_pkt), ice_fdir_ip4_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV6_TCP, - sizeof(ice_fdir_tcpv6_pkt), - ice_fdir_tcpv6_pkt, + sizeof(ice_fdir_tcpv6_pkt), ice_fdir_tcpv6_pkt, + sizeof(ice_fdir_tcp6_tun_pkt), ice_fdir_tcp6_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV6_UDP, - sizeof(ice_fdir_udpv6_pkt), - ice_fdir_udpv6_pkt, + sizeof(ice_fdir_udpv6_pkt), ice_fdir_udpv6_pkt, + sizeof(ice_fdir_udp6_tun_pkt), ice_fdir_udp6_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV6_SCTP, - sizeof(ice_fdir_sctpv6_pkt), - ice_fdir_sctpv6_pkt, + sizeof(ice_fdir_sctpv6_pkt), ice_fdir_sctpv6_pkt, + sizeof(ice_fdir_sctp6_tun_pkt), ice_fdir_sctp6_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV6_OTHER, - sizeof(ice_fdir_ipv6_pkt), - ice_fdir_ipv6_pkt, + sizeof(ice_fdir_ipv6_pkt), ice_fdir_ipv6_pkt, + sizeof(ice_fdir_ip6_tun_pkt), ice_fdir_ip6_tun_pkt, }, }; @@ -377,15 +507,20 @@ static void ice_pkt_insert_u32(u8 *pkt, int offset, __be32 data) } /** - * ice_fdir_get_prgm_pkt - generate a dummy packet + * ice_fdir_get_gen_prgm_pkt - generate a training packet + * @hw: pointer to the hardware structure * @input: flow director filter data structure * @pkt: pointer to return filter packet * @frag: generate a fragment packet + * @tun: true implies generate a tunnel packet */ enum ice_status -ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag) +ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, + u8 *pkt, bool frag, bool tun) { enum ice_fltr_ptype flow; + u16 tnl_port; + u8 *loc; u16 idx; if (input->flow_type == ICE_FLTR_PTYPE_NONF_IPV4_OTHER) { @@ -431,83 +566,96 @@ ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag) break; if (idx == ICE_FDIR_NUM_PKT) return ICE_ERR_PARAM; - ice_memcpy(pkt, ice_fdir_pkt[idx].pkt, ice_fdir_pkt[idx].pkt_len, - ICE_NONDMA_TO_NONDMA); + if (!tun) { + ice_memcpy(pkt, ice_fdir_pkt[idx].pkt, + ice_fdir_pkt[idx].pkt_len, ICE_NONDMA_TO_NONDMA); + loc = pkt; + } else { + if (!ice_get_open_tunnel_port(hw, TNL_ALL, &tnl_port)) + return ICE_ERR_DOES_NOT_EXIST; + if (!ice_fdir_pkt[idx].tun_pkt) + return ICE_ERR_PARAM; + ice_memcpy(pkt, ice_fdir_pkt[idx].tun_pkt, + ice_fdir_pkt[idx].tun_pkt_len, ICE_NONDMA_TO_NONDMA); + ice_pkt_insert_u16(pkt, ICE_IPV4_UDP_DST_PORT_OFFSET, + HTONS(tnl_port)); + loc = &pkt[ICE_FDIR_TUN_PKT_OFF]; + } switch (flow) { case ICE_FLTR_PTYPE_NONF_IPV4_TCP: - ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, input->ip.v4.dst_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_TCP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_TCP_DST_PORT_OFFSET, input->ip.v4.dst_port); - ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET, input->ip.v4.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_TCP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_TCP_SRC_PORT_OFFSET, input->ip.v4.src_port); if (frag) - pkt[20] = ICE_FDIR_IPV4_PKT_FLAG_DF; + loc[20] = ICE_FDIR_IPV4_PKT_FLAG_DF; break; case ICE_FLTR_PTYPE_NONF_IPV4_UDP: - ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, input->ip.v4.dst_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_UDP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_UDP_DST_PORT_OFFSET, input->ip.v4.dst_port); - ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET, input->ip.v4.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_UDP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_UDP_SRC_PORT_OFFSET, input->ip.v4.src_port); break; case ICE_FLTR_PTYPE_NONF_IPV4_SCTP: - ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, input->ip.v4.dst_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_SCTP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_SCTP_DST_PORT_OFFSET, input->ip.v4.dst_port); - ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET, input->ip.v4.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_SCTP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_SCTP_SRC_PORT_OFFSET, input->ip.v4.src_port); break; case ICE_FLTR_PTYPE_NONF_IPV4_OTHER: - ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, input->ip.v4.dst_ip); - ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET, input->ip.v4.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_PROTO_OFFSET, 0); + ice_pkt_insert_u16(loc, ICE_IPV4_PROTO_OFFSET, 0); break; case ICE_FLTR_PTYPE_NONF_IPV6_TCP: - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, input->ip.v6.dst_ip); - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET, input->ip.v6.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV6_TCP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_TCP_DST_PORT_OFFSET, input->ip.v6.dst_port); - ice_pkt_insert_u16(pkt, ICE_IPV6_TCP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_TCP_SRC_PORT_OFFSET, input->ip.v6.src_port); break; case ICE_FLTR_PTYPE_NONF_IPV6_UDP: - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, input->ip.v6.dst_ip); - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET, input->ip.v6.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV6_UDP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_UDP_DST_PORT_OFFSET, input->ip.v6.dst_port); - ice_pkt_insert_u16(pkt, ICE_IPV6_UDP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_UDP_SRC_PORT_OFFSET, input->ip.v6.src_port); break; case ICE_FLTR_PTYPE_NONF_IPV6_SCTP: - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, input->ip.v6.dst_ip); - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET, input->ip.v6.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV6_SCTP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_SCTP_DST_PORT_OFFSET, input->ip.v6.dst_port); - ice_pkt_insert_u16(pkt, ICE_IPV6_SCTP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_SCTP_SRC_PORT_OFFSET, input->ip.v6.src_port); break; case ICE_FLTR_PTYPE_NONF_IPV6_OTHER: - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, input->ip.v6.dst_ip); - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET, input->ip.v6.src_ip); break; default: @@ -515,12 +663,24 @@ ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag) } if (input->flex_fltr) - ice_pkt_insert_u16(pkt, input->flex_offset, input->flex_word); + ice_pkt_insert_u16(loc, input->flex_offset, input->flex_word); return ICE_SUCCESS; } /** + * ice_fdir_get_prgm_pkt - generate a training packet + * @input: flow director filter data structure + * @pkt: pointer to return filter packet + * @frag: generate a fragment packet + */ +enum ice_status +ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag) +{ + return ice_fdir_get_gen_prgm_pkt(NULL, input, pkt, frag, false); +} + +/** * ice_fdir_has_frag - does flow type have 2 ptypes * @flow: flow ptype * diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index 8490fac61..9e7e22033 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -58,7 +58,8 @@ enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw); #define ICE_IP_PROTO_IP 0 #define ICE_IP_PROTO_ESP 50 -#define ICE_FDIR_MAX_RAW_PKT_SIZE 512 +#define ICE_FDIR_TUN_PKT_OFF 50 +#define ICE_FDIR_MAX_RAW_PKT_SIZE (512 + ICE_FDIR_TUN_PKT_OFF) #define ICE_FDIR_BUF_FULL_MARGIN 10 #define ICE_FDIR_BUF_HEAD_ROOM 32 @@ -175,12 +176,17 @@ struct ice_fdir_base_pkt { enum ice_fltr_ptype flow; u16 pkt_len; const u8 *pkt; + u16 tun_pkt_len; + const u8 *tun_pkt; }; void ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input, struct ice_fltr_desc *fdesc, bool add); enum ice_status +ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, + u8 *pkt, bool frag, bool tun); +enum ice_status ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag); enum ice_status ice_add_del_fdir(struct ice_hw *hw, struct ice_fdir_fltr *input, bool add); diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index 150b4c5c5..7d0a4f63f 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -296,13 +296,19 @@ enum ice_fltr_ptype { ICE_FLTR_PTYPE_MAX, }; +enum ice_fd_hw_seg { + ICE_FD_HW_SEG_NON_TUN = 0, + ICE_FD_HW_SEG_TUN, + ICE_FD_HW_SEG_MAX, +}; + /* 2 VSI = 1 ICE_VSI_PF + 1 ICE_VSI_CTRL */ #define ICE_MAX_FDIR_VSI_PER_FILTER 2 struct ice_fd_hw_prof { - struct ice_flow_seg_info *fdir_seg; + struct ice_flow_seg_info *fdir_seg[ICE_FD_HW_SEG_MAX]; int cnt; - u64 entry_h[ICE_MAX_FDIR_VSI_PER_FILTER]; + u64 entry_h[ICE_MAX_FDIR_VSI_PER_FILTER][ICE_FD_HW_SEG_MAX]; u16 vsi_h[ICE_MAX_FDIR_VSI_PER_FILTER]; }; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 03/16] net/ice/base: add non-word aligned ip field support 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 00/16] net/ice/base: share code update secend batch Qi Zhang 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 01/16] net/ice/base: remove redundant empty lines Qi Zhang 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 02/16] net/ice/base: add support for tunnel packets Qi Zhang @ 2019-09-05 3:48 ` Qi Zhang 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 04/16] net/ice/base: add non-word aligned ipv6 " Qi Zhang ` (13 subsequent siblings) 16 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-05 3:48 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Add non-word aligned field support for ipv4 with ttl, tos and proto. All these fields are one byte within one word. In order to match bytes within the IPv4 header for flow director we need to use a mask. Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 30 +++++++++++++++++++++++------- drivers/net/ice/base/ice_fdir.h | 4 ++++ 2 files changed, 27 insertions(+), 7 deletions(-) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index b92603e10..db5bbc6ad 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -485,6 +485,17 @@ static void ice_pkt_insert_ipv6_addr(u8 *pkt, int offset, __be32 *addr) } /** + * ice_pkt_insert_u8 - insert a u8 value into a memory buffer. + * @pkt: packet buffer + * @offset: offset into buffer + * @data: 8 bit value to convert and insert into pkt at offset + */ +static void ice_pkt_insert_u8(u8 *pkt, int offset, u8 data) +{ + ice_memcpy(pkt + offset, &data, sizeof(data), ICE_NONDMA_TO_NONDMA); +} + +/** * ice_pkt_insert_u16 - insert a be16 value into a memory buffer. * @pkt: packet buffer * @offset: offset into buffer @@ -534,11 +545,9 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, case ICE_IP_PROTO_SCTP: flow = ICE_FLTR_PTYPE_NONF_IPV4_SCTP; break; - case ICE_IP_PROTO_IP: + default: flow = ICE_FLTR_PTYPE_NONF_IPV4_OTHER; break; - default: - return ICE_ERR_PARAM; } } else if (input->flow_type == ICE_FLTR_PTYPE_NONF_IPV6_OTHER) { switch (input->ip.v6.proto) { @@ -551,11 +560,9 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, case ICE_IP_PROTO_SCTP: flow = ICE_FLTR_PTYPE_NONF_IPV6_SCTP; break; - case ICE_IP_PROTO_IP: + default: flow = ICE_FLTR_PTYPE_NONF_IPV6_OTHER; break; - default: - return ICE_ERR_PARAM; } } else { flow = input->flow_type; @@ -592,6 +599,8 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.src_ip); ice_pkt_insert_u16(loc, ICE_IPV4_TCP_SRC_PORT_OFFSET, input->ip.v4.src_port); + ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); + ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); if (frag) loc[20] = ICE_FDIR_IPV4_PKT_FLAG_DF; break; @@ -604,6 +613,8 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.src_ip); ice_pkt_insert_u16(loc, ICE_IPV4_UDP_SRC_PORT_OFFSET, input->ip.v4.src_port); + ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); + ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); break; case ICE_FLTR_PTYPE_NONF_IPV4_SCTP: ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, @@ -614,13 +625,18 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.src_ip); ice_pkt_insert_u16(loc, ICE_IPV4_SCTP_SRC_PORT_OFFSET, input->ip.v4.src_port); + ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); + ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); break; case ICE_FLTR_PTYPE_NONF_IPV4_OTHER: ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, input->ip.v4.dst_ip); ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET, input->ip.v4.src_ip); - ice_pkt_insert_u16(loc, ICE_IPV4_PROTO_OFFSET, 0); + ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); + ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); + ice_pkt_insert_u8(loc, ICE_IPV4_PROTO_OFFSET, + input->ip.v4.proto); break; case ICE_FLTR_PTYPE_NONF_IPV6_TCP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index 9e7e22033..e817057c8 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -82,6 +82,9 @@ enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw); #define ICE_IPV6_SCTP_SRC_PORT_OFFSET 54 #define ICE_IPV6_SCTP_DST_PORT_OFFSET 56 +#define ICE_IPV4_TOS_OFFSET 15 +#define ICE_IPV4_TTL_OFFSET 22 + #define ICE_FDIR_MAX_FLTRS 16384 /* IP v4 has 2 flag bits that enable fragment processing: DF and MF. DF @@ -123,6 +126,7 @@ struct ice_fdir_v4 { u8 tos; u8 ip_ver; u8 proto; + u8 ttl; }; #define ICE_IPV6_ADDR_LEN_AS_U32 4 -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 04/16] net/ice/base: add non-word aligned ipv6 field support 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 00/16] net/ice/base: share code update secend batch Qi Zhang ` (2 preceding siblings ...) 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 03/16] net/ice/base: add non-word aligned ip field support Qi Zhang @ 2019-09-05 3:48 ` Qi Zhang 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 05/16] net/ice/base: correct the mask for checking protocol header Qi Zhang ` (12 subsequent siblings) 16 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-05 3:48 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Add non-word aligned field support for IPv6 with hlim, tc and proto. All these fields are one byte within one word. In order to match bytes within the IPv6 header for flow director we need to use a mask. Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 32 ++++++++++++++++++++++++++++++++ drivers/net/ice/base/ice_fdir.h | 4 ++++ 2 files changed, 36 insertions(+) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index db5bbc6ad..e35506006 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -496,6 +496,28 @@ static void ice_pkt_insert_u8(u8 *pkt, int offset, u8 data) } /** + * ice_pkt_insert_u8_tc - insert a u8 value into a memory buffer for tc ipv6. + * @pkt: packet buffer + * @offset: offset into buffer + * @data: 8 bit value to convert and insert into pkt at offset + * + * This function is designed for inserting Traffic Class (tc) for IPv6, + * since that tc is not aligned in number of bytes. Here we split it out + * into two part and fill each byte with data copy from pkt, then insert + * the two bytes data one by one. + */ +static void ice_pkt_insert_u8_tc(u8 *pkt, int offset, u8 data) +{ + u8 high, low; + + high = (data >> 4) + (*(pkt + offset) & 0xF0); + ice_memcpy(pkt + offset, &high, sizeof(high), ICE_NONDMA_TO_NONDMA); + + low = (*(pkt + offset + 1) & 0x0F) + ((data & 0x0F) << 4); + ice_memcpy(pkt + offset + 1, &low, sizeof(low), ICE_NONDMA_TO_NONDMA); +} + +/** * ice_pkt_insert_u16 - insert a be16 value into a memory buffer. * @pkt: packet buffer * @offset: offset into buffer @@ -647,6 +669,8 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v6.dst_port); ice_pkt_insert_u16(loc, ICE_IPV6_TCP_SRC_PORT_OFFSET, input->ip.v6.src_port); + ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); + ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); break; case ICE_FLTR_PTYPE_NONF_IPV6_UDP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, @@ -657,6 +681,8 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v6.dst_port); ice_pkt_insert_u16(loc, ICE_IPV6_UDP_SRC_PORT_OFFSET, input->ip.v6.src_port); + ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); + ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); break; case ICE_FLTR_PTYPE_NONF_IPV6_SCTP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, @@ -667,12 +693,18 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v6.dst_port); ice_pkt_insert_u16(loc, ICE_IPV6_SCTP_SRC_PORT_OFFSET, input->ip.v6.src_port); + ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); + ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); break; case ICE_FLTR_PTYPE_NONF_IPV6_OTHER: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, input->ip.v6.dst_ip); ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET, input->ip.v6.src_ip); + ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); + ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); + ice_pkt_insert_u8(loc, ICE_IPV6_PROTO_OFFSET, + input->ip.v6.proto); break; default: return ICE_ERR_PARAM; diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index e817057c8..e0f3cd481 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -84,6 +84,9 @@ enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw); #define ICE_IPV4_TOS_OFFSET 15 #define ICE_IPV4_TTL_OFFSET 22 +#define ICE_IPV6_TC_OFFSET 14 +#define ICE_IPV6_HLIM_OFFSET 21 +#define ICE_IPV6_PROTO_OFFSET 20 #define ICE_FDIR_MAX_FLTRS 16384 @@ -140,6 +143,7 @@ struct ice_fdir_v6 { __be32 sec_parm_idx; /* security parameter index */ u8 tc; u8 proto; + u8 hlim; }; struct ice_fdir_extra { -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 05/16] net/ice/base: correct the mask for checking protocol header 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 00/16] net/ice/base: share code update secend batch Qi Zhang ` (3 preceding siblings ...) 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 04/16] net/ice/base: add non-word aligned ipv6 " Qi Zhang @ 2019-09-05 3:48 ` Qi Zhang 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 06/16] net/ice/base: propagate errors from functions Qi Zhang ` (11 subsequent siblings) 16 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-05 3:48 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Zhirun Yan, Paul M Stillwell Jr Before this patch, the logic of protocol header checking only support non-tunneled packet. This patch remove the inner protocol in L3/L4 RSS seg hdr mask and change the protocol header validation to reflect this. So, for ice_add_rss_cfg(), the last parameter addl_hdrs could specify the protocol header for tunnel. Signed-off-by: Zhirun Yan <zhirun.yan@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 769fd2da7..682f26ce6 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -372,15 +372,18 @@ struct ice_flow_prof_params { ice_declare_bitmap(ptypes, ICE_FLOW_PTYPE_MAX); }; +#define ICE_FLOW_RSS_HDRS_INNER_MASK \ + (ICE_FLOW_SEG_HDR_PPPOE | ICE_FLOW_SEG_HDR_GTPC | \ + ICE_FLOW_SEG_HDR_GTPC_TEID | ICE_FLOW_SEG_HDR_GTPU) + #define ICE_FLOW_SEG_HDRS_L2_MASK \ (ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_VLAN) #define ICE_FLOW_SEG_HDRS_L3_MASK \ (ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV6 | \ - ICE_FLOW_SEG_HDR_ARP | ICE_FLOW_SEG_HDR_PPPOE) + ICE_FLOW_SEG_HDR_ARP) #define ICE_FLOW_SEG_HDRS_L4_MASK \ (ICE_FLOW_SEG_HDR_ICMP | ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_UDP | \ - ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_GTPC | \ - ICE_FLOW_SEG_HDR_GTPC_TEID | ICE_FLOW_SEG_HDR_GTPU) + ICE_FLOW_SEG_HDR_SCTP) /** * ice_flow_val_hdrs - validates packet segments for valid protocol headers @@ -1686,13 +1689,11 @@ ice_flow_add_fld_raw(struct ice_flow_seg_info *seg, u16 off, u8 len, (ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_VLAN) #define ICE_FLOW_RSS_SEG_HDR_L3_MASKS \ - (ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_PPPOE) + (ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV6) #define ICE_FLOW_RSS_SEG_HDR_L4_MASKS \ (ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_UDP | \ - ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_GTPC_TEID | \ - ICE_FLOW_SEG_HDR_GTPU) - + ICE_FLOW_SEG_HDR_SCTP) #define ICE_FLOW_RSS_SEG_HDR_VAL_MASKS \ (ICE_FLOW_RSS_SEG_HDR_L2_MASKS | \ @@ -1729,11 +1730,12 @@ ice_flow_set_rss_seg_info(struct ice_flow_seg_info *segs, u64 hash_fields, } ICE_FLOW_SET_HDRS(segs, flow_hdr); - if (segs->hdrs & ~ICE_FLOW_RSS_SEG_HDR_VAL_MASKS) + if (segs->hdrs & ~ICE_FLOW_RSS_SEG_HDR_VAL_MASKS & + ~ICE_FLOW_RSS_HDRS_INNER_MASK) return ICE_ERR_PARAM; val = (u64)(segs->hdrs & ICE_FLOW_RSS_SEG_HDR_L3_MASKS); - if (!ice_is_pow2(val)) + if (val && !ice_is_pow2(val)) return ICE_ERR_CFG; val = (u64)(segs->hdrs & ICE_FLOW_RSS_SEG_HDR_L4_MASKS); -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 06/16] net/ice/base: propagate errors from functions 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 00/16] net/ice/base: share code update secend batch Qi Zhang ` (4 preceding siblings ...) 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 05/16] net/ice/base: correct the mask for checking protocol header Qi Zhang @ 2019-09-05 3:48 ` Qi Zhang 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 07/16] net/ice/base: remove pointless NULL check of port info Qi Zhang ` (10 subsequent siblings) 16 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-05 3:48 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr There could be an error returned from ice_fill_adv_dummy_packet() so we need to propagate that to the caller. Additionally, the call to ice_flow_xtract_pkt_flags() could also return an error so we need to propagate it as well. Also add in the correct offsets for GENEVE and VXLAN_GPE to the dummy packets. Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 9 ++++++--- drivers/net/ice/base/ice_switch.c | 8 ++++++-- 2 files changed, 12 insertions(+), 5 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 682f26ce6..7dae53270 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -869,9 +869,12 @@ ice_flow_create_xtrct_seq(struct ice_hw *hw, /* For ACL, we also need to extract the direction bit (Rx,Tx) data from * packet flags */ - if (params->blk == ICE_BLK_ACL) - ice_flow_xtract_pkt_flags(hw, params, - ICE_RX_MDID_PKT_FLAGS_15_0); + if (params->blk == ICE_BLK_ACL) { + status = ice_flow_xtract_pkt_flags(hw, params, + ICE_RX_MDID_PKT_FLAGS_15_0); + if (status) + return status; + } for (i = 0; i < params->prof->segs_cnt; i++) { u64 match = params->prof->segs[i].match; diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 00358e4db..fa023169d 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -156,6 +156,7 @@ struct ice_dummy_pkt_offsets dummy_udp_tun_tcp_packet_offsets[] = { { ICE_UDP_OF, 34 }, { ICE_VXLAN, 42 }, { ICE_GENEVE, 42 }, + { ICE_VXLAN_GPE, 42 }, { ICE_MAC_IL, 50 }, { ICE_IPV4_IL, 64 }, { ICE_TCP_IL, 84 }, @@ -208,6 +209,7 @@ struct ice_dummy_pkt_offsets dummy_udp_tun_udp_packet_offsets[] = { { ICE_UDP_OF, 34 }, { ICE_VXLAN, 42 }, { ICE_GENEVE, 42 }, + { ICE_VXLAN_GPE, 42 }, { ICE_MAC_IL, 50 }, { ICE_IPV4_IL, 64 }, { ICE_UDP_ILOS, 84 }, @@ -6189,8 +6191,10 @@ ice_add_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, s_rule->pdata.lkup_tx_rx.recipe_id = CPU_TO_LE16(rid); s_rule->pdata.lkup_tx_rx.act = CPU_TO_LE32(act); - ice_fill_adv_dummy_packet(lkups, lkups_cnt, s_rule, pkt, pkt_len, - pkt_offsets); + status = ice_fill_adv_dummy_packet(lkups, lkups_cnt, s_rule, pkt, + pkt_len, pkt_offsets); + if (status) + goto err_ice_add_adv_rule; if (rinfo->tun_type != ICE_NON_TUN) { status = ice_fill_adv_packet_tun(hw, rinfo->tun_type, -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 07/16] net/ice/base: remove pointless NULL check of port info 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 00/16] net/ice/base: share code update secend batch Qi Zhang ` (5 preceding siblings ...) 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 06/16] net/ice/base: propagate errors from functions Qi Zhang @ 2019-09-05 3:49 ` Qi Zhang 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 08/16] net/ice/base: remove RSS code as iavf host Qi Zhang ` (9 subsequent siblings) 16 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-05 3:49 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Jacob Keller, Paul M Stillwell Jr The code in ice_sched_cleanup_all checks whether the port info is NULL prior to calling ice_sched_clear_port. More importantly, it also checks whether the port structure has been initialized by checking its port_state field as well. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_sched.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c index 6732e291a..553fc28ff 100644 --- a/drivers/net/ice/base/ice_sched.c +++ b/drivers/net/ice/base/ice_sched.c @@ -840,8 +840,7 @@ void ice_sched_cleanup_all(struct ice_hw *hw) hw->layer_info = NULL; } - if (hw->port_info) - ice_sched_clear_port(hw->port_info); + ice_sched_clear_port(hw->port_info); hw->num_tx_sched_layers = 0; hw->num_tx_sched_phys_layers = 0; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 08/16] net/ice/base: remove RSS code as iavf host 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 00/16] net/ice/base: share code update secend batch Qi Zhang ` (6 preceding siblings ...) 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 07/16] net/ice/base: remove pointless NULL check of port info Qi Zhang @ 2019-09-05 3:49 ` Qi Zhang 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 09/16] net/ice/base: add support for switch rule about VLAN PPPoE Qi Zhang ` (8 subsequent siblings) 16 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-05 3:49 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr The DPDK PF doesn't support SRIOV so remove the related iavf host code. Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 128 ---------------------------------------- 1 file changed, 128 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 7dae53270..5d1b12d43 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -2128,134 +2128,6 @@ ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, return status; } -/* Mapping of AVF hash bit fields to an L3-L4 hash combination. - * As the ice_flow_avf_hdr_field represent individual bit shifts in a hash, - * convert its values to their appropriate flow L3, L4 values. - */ -#define ICE_FLOW_AVF_RSS_IPV4_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_OTHER) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV4)) -#define ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP)) -#define ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_UDP)) -#define ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS \ - (ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS | ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS | \ - ICE_FLOW_AVF_RSS_IPV4_MASKS | BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP)) - -#define ICE_FLOW_AVF_RSS_IPV6_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_OTHER) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV6)) -#define ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_UDP)) -#define ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP)) -#define ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS \ - (ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS | ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS | \ - ICE_FLOW_AVF_RSS_IPV6_MASKS | BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP)) - -#define ICE_FLOW_MAX_CFG 10 - -/** - * ice_add_avf_rss_cfg - add an RSS configuration for AVF driver - * @hw: pointer to the hardware structure - * @vsi_handle: software VSI handle - * @avf_hash: hash bit fields (ICE_AVF_FLOW_FIELD_*) to configure - * - * This function will take the hash bitmap provided by the AVF driver via a - * message, convert it to ICE-compatible values, and configure RSS flow - * profiles. - */ -enum ice_status -ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 avf_hash) -{ - enum ice_status status = ICE_SUCCESS; - u64 hash_flds; - - if (avf_hash == ICE_AVF_FLOW_FIELD_INVALID || - !ice_is_vsi_valid(hw, vsi_handle)) - return ICE_ERR_PARAM; - - /* Make sure no unsupported bits are specified */ - if (avf_hash & ~(ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS | - ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS)) - return ICE_ERR_CFG; - - hash_flds = avf_hash; - - /* Always create an L3 RSS configuration for any L4 RSS configuration */ - if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS) - hash_flds |= ICE_FLOW_AVF_RSS_IPV4_MASKS; - - if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS) - hash_flds |= ICE_FLOW_AVF_RSS_IPV6_MASKS; - - /* Create the corresponding RSS configuration for each valid hash bit */ - while (hash_flds) { - u64 rss_hash = ICE_HASH_INVALID; - - if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS) { - if (hash_flds & ICE_FLOW_AVF_RSS_IPV4_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV4; - hash_flds &= ~ICE_FLOW_AVF_RSS_IPV4_MASKS; - } else if (hash_flds & - ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV4 | - ICE_FLOW_HASH_TCP_PORT; - hash_flds &= ~ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS; - } else if (hash_flds & - ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV4 | - ICE_FLOW_HASH_UDP_PORT; - hash_flds &= ~ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS; - } else if (hash_flds & - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP)) { - rss_hash = ICE_FLOW_HASH_IPV4 | - ICE_FLOW_HASH_SCTP_PORT; - hash_flds &= - ~BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP); - } - } else if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS) { - if (hash_flds & ICE_FLOW_AVF_RSS_IPV6_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV6; - hash_flds &= ~ICE_FLOW_AVF_RSS_IPV6_MASKS; - } else if (hash_flds & - ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV6 | - ICE_FLOW_HASH_TCP_PORT; - hash_flds &= ~ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS; - } else if (hash_flds & - ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV6 | - ICE_FLOW_HASH_UDP_PORT; - hash_flds &= ~ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS; - } else if (hash_flds & - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP)) { - rss_hash = ICE_FLOW_HASH_IPV6 | - ICE_FLOW_HASH_SCTP_PORT; - hash_flds &= - ~BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP); - } - } - - if (rss_hash == ICE_HASH_INVALID) - return ICE_ERR_OUT_OF_RANGE; - - status = ice_add_rss_cfg(hw, vsi_handle, rss_hash, - ICE_FLOW_SEG_HDR_NONE); - if (status) - break; - } - - return status; -} - /** * ice_replay_rss_cfg - replay RSS configurations associated with VSI * @hw: pointer to the hardware structure -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 09/16] net/ice/base: add support for switch rule about VLAN PPPoE 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 00/16] net/ice/base: share code update secend batch Qi Zhang ` (7 preceding siblings ...) 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 08/16] net/ice/base: remove RSS code as iavf host Qi Zhang @ 2019-09-05 3:49 ` Qi Zhang 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 10/16] net/ice/base: minor structure refactor Qi Zhang ` (7 subsequent siblings) 16 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-05 3:49 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Add support for switch rule about single-VLAN-PPPoE. Note that double VLAN is not supported by the hardware at this point, therefore only single-VLAN support for PPPoE is added. Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_protocol_type.h | 8 ++++++++ drivers/net/ice/base/ice_switch.c | 16 ++++++++++++---- 2 files changed, 20 insertions(+), 4 deletions(-) diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h index cdb691523..c6caa8562 100644 --- a/drivers/net/ice/base/ice_protocol_type.h +++ b/drivers/net/ice/base/ice_protocol_type.h @@ -31,6 +31,7 @@ enum ice_protocol_type { ICE_MAC_OFOS = 0, ICE_MAC_IL, ICE_ETYPE_OL, + ICE_VLAN_OFOS, ICE_IPV4_OFOS, ICE_IPV4_IL, ICE_IPV6_OFOS, @@ -117,6 +118,7 @@ enum ice_prot_id { #define ICE_MAC_OFOS_HW 1 #define ICE_MAC_IL_HW 4 #define ICE_ETYPE_OL_HW 9 +#define ICE_VLAN_OL_HW 16 #define ICE_IPV4_OFOS_HW 32 #define ICE_IPV4_IL_HW 33 #define ICE_IPV6_OFOS_HW 40 @@ -162,6 +164,11 @@ struct ice_ether_vlan_hdr { u32 vlan_id; }; +struct ice_vlan_hdr { + u16 vlan; + u16 type; +}; + struct ice_ipv4_hdr { u8 version; u8 tos; @@ -239,6 +246,7 @@ struct ice_nvgre { union ice_prot_hdr { struct ice_ether_hdr eth_hdr; struct ice_ethtype_hdr ethertype; + struct ice_vlan_hdr vlan_hdr; struct ice_ipv4_hdr ipv4_hdr; struct ice_ipv6_hdr ipv6_hdr; struct ice_l4_hdr l4_hdr; diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index fa023169d..477500ce5 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -418,8 +418,9 @@ dummy_udp_gtp_packet[] = { static const struct ice_dummy_pkt_offsets dummy_pppoe_packet_offsets[] = { - { ICE_MAC_OFOS, 0 }, - { ICE_PPPOE, 14 }, + { ICE_MAC_OFOS, 0 }, + { ICE_VLAN_OFOS, 14}, + { ICE_PPPOE, 18 }, { ICE_PROTOCOL_LAST, 0 }, }; @@ -428,9 +429,11 @@ dummy_pppoe_packet[] = { 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x88, 0x64, + 0x81, 0x00, + + 0x00, 0x00, 0x88, 0x64, /* ICE_VLAN_OFOS 14 */ - 0x11, 0x00, 0x00, 0x01, /* ICE_PPPOE 14 */ + 0x11, 0x00, 0x00, 0x01, /* ICE_PPPOE 18 */ 0x00, 0x4e, 0x00, 0x21, 0x45, 0x00, 0x00, 0x30, /* PDU */ @@ -4632,6 +4635,7 @@ static const struct ice_prot_ext_tbl_entry ice_prot_ext[] = { { ICE_MAC_OFOS, { 0, 2, 4, 6, 8, 10, 12 } }, { ICE_MAC_IL, { 0, 2, 4, 6, 8, 10, 12 } }, { ICE_ETYPE_OL, { 0 } }, + { ICE_VLAN_OFOS, { 0, 2 } }, { ICE_IPV4_OFOS, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18 } }, { ICE_IPV4_IL, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18 } }, { ICE_IPV6_IL, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, @@ -4661,6 +4665,7 @@ static const struct ice_protocol_entry ice_prot_id_tbl[] = { { ICE_MAC_OFOS, ICE_MAC_OFOS_HW }, { ICE_MAC_IL, ICE_MAC_IL_HW }, { ICE_ETYPE_OL, ICE_ETYPE_OL_HW }, + { ICE_VLAN_OFOS, ICE_VLAN_OL_HW }, { ICE_IPV4_OFOS, ICE_IPV4_OFOS_HW }, { ICE_IPV4_IL, ICE_IPV4_IL_HW }, { ICE_IPV6_OFOS, ICE_IPV6_OFOS_HW }, @@ -5784,6 +5789,9 @@ ice_fill_adv_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt, case ICE_ETYPE_OL: len = sizeof(struct ice_ethtype_hdr); break; + case ICE_VLAN_OFOS: + len = sizeof(struct ice_vlan_hdr); + break; case ICE_IPV4_OFOS: case ICE_IPV4_IL: len = sizeof(struct ice_ipv4_hdr); -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 10/16] net/ice/base: minor structure refactor 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 00/16] net/ice/base: share code update secend batch Qi Zhang ` (8 preceding siblings ...) 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 09/16] net/ice/base: add support for switch rule about VLAN PPPoE Qi Zhang @ 2019-09-05 3:49 ` Qi Zhang 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 11/16] net/ice/base: associate switch recipe to profiles Qi Zhang ` (6 subsequent siblings) 16 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-05 3:49 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Jesse Brandeburg, Paul M Stillwell Jr When declaring the ice_prot_ext, and ice_prot_id_tbl structure, we can use a fixed length array instead of a variable length one which helps us catch future code changes that might desynchronize the enum ice_protocol_type and the structs. This change also necessitates removing the last member of the structs which was just there to be a placeholder. Also reorder the ice_prot_ext struct to match the ordering in the associated enum ice_protocol_type. Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_switch.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 477500ce5..aab0ff07f 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -4631,17 +4631,17 @@ ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info) * matching entry describing its field. This needs to be updated if new * structure is added to that union. */ -static const struct ice_prot_ext_tbl_entry ice_prot_ext[] = { +static const struct ice_prot_ext_tbl_entry ice_prot_ext[ICE_PROTOCOL_LAST] = { { ICE_MAC_OFOS, { 0, 2, 4, 6, 8, 10, 12 } }, { ICE_MAC_IL, { 0, 2, 4, 6, 8, 10, 12 } }, { ICE_ETYPE_OL, { 0 } }, { ICE_VLAN_OFOS, { 0, 2 } }, { ICE_IPV4_OFOS, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18 } }, { ICE_IPV4_IL, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18 } }, - { ICE_IPV6_IL, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, - 26, 28, 30, 32, 34, 36, 38 } }, { ICE_IPV6_OFOS, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38 } }, + { ICE_IPV6_IL, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, + 26, 28, 30, 32, 34, 36, 38 } }, { ICE_TCP_IL, { 0, 2 } }, { ICE_UDP_OF, { 0, 2 } }, { ICE_UDP_ILOS, { 0, 2 } }, @@ -4652,7 +4652,6 @@ static const struct ice_prot_ext_tbl_entry ice_prot_ext[] = { { ICE_NVGRE, { 0, 2, 4, 6 } }, { ICE_GTP, { 8, 10, 12, 14, 16, 18, 20 } }, { ICE_PPPOE, { 0, 2, 4, 6 } }, - { ICE_PROTOCOL_LAST, { 0 } } }; /* The following table describes preferred grouping of recipes. @@ -4661,7 +4660,7 @@ static const struct ice_prot_ext_tbl_entry ice_prot_ext[] = { * following policy. */ -static const struct ice_protocol_entry ice_prot_id_tbl[] = { +static const struct ice_protocol_entry ice_prot_id_tbl[ICE_PROTOCOL_LAST] = { { ICE_MAC_OFOS, ICE_MAC_OFOS_HW }, { ICE_MAC_IL, ICE_MAC_IL_HW }, { ICE_ETYPE_OL, ICE_ETYPE_OL_HW }, @@ -4680,7 +4679,6 @@ static const struct ice_protocol_entry ice_prot_id_tbl[] = { { ICE_NVGRE, ICE_GRE_OF_HW }, { ICE_GTP, ICE_UDP_OF_HW }, { ICE_PPPOE, ICE_PPPOE_HW }, - { ICE_PROTOCOL_LAST, 0 } }; /** -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 11/16] net/ice/base: associate switch recipe to profiles 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 00/16] net/ice/base: share code update secend batch Qi Zhang ` (9 preceding siblings ...) 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 10/16] net/ice/base: minor structure refactor Qi Zhang @ 2019-09-05 3:49 ` Qi Zhang 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 12/16] net/ice/base: enable RSS for PPPoE with SCTP Qi Zhang ` (5 subsequent siblings) 16 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-05 3:49 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Paul M Stillwell Jr Properly associate switch recipes to profiles. Previous code was using the wrong bitfield for updating the associations, which was causing other PFs to not properly identify and use existing recipes. This sometimes resulted in rules not being added when it should have been possible. Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_switch.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index aab0ff07f..9e7e93af5 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -5581,14 +5581,14 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, if (status) goto err_unroll; - ice_or_bitmap(rm->r_bitmap, r_bitmap, rm->r_bitmap, + ice_or_bitmap(r_bitmap, r_bitmap, rm->r_bitmap, ICE_MAX_NUM_RECIPES); status = ice_acquire_change_lock(hw, ICE_RES_WRITE); if (status) goto err_unroll; status = ice_aq_map_recipe_to_profile(hw, fvit->profile_id, - (u8 *)rm->r_bitmap, + (u8 *)r_bitmap, NULL); ice_release_change_lock(hw); @@ -5596,12 +5596,12 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, goto err_unroll; /* Update profile to recipe bitmap array */ - ice_memcpy(profile_to_recipe[fvit->profile_id], rm->r_bitmap, - sizeof(rm->r_bitmap), ICE_NONDMA_TO_NONDMA); + ice_memcpy(profile_to_recipe[fvit->profile_id], r_bitmap, + sizeof(r_bitmap), ICE_NONDMA_TO_NONDMA); /* Update recipe to profile bitmap array */ for (j = 0; j < ICE_MAX_NUM_RECIPES; j++) - if (ice_is_bit_set(rm->r_bitmap, j)) + if (ice_is_bit_set(r_bitmap, j)) ice_set_bit((u16)fvit->profile_id, recipe_to_profile[j]); } -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 12/16] net/ice/base: enable RSS for PPPoE with SCTP 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 00/16] net/ice/base: share code update secend batch Qi Zhang ` (10 preceding siblings ...) 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 11/16] net/ice/base: associate switch recipe to profiles Qi Zhang @ 2019-09-05 3:49 ` Qi Zhang 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 13/16] net/ice/base: enable fdir queue region Qi Zhang ` (4 subsequent siblings) 16 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-05 3:49 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Zhirun Yan, Paul M Stillwell Jr Add two ptypes(MAC_PPPOE_IPV4_SCTP and MAC_PPPOE_IPV6_SCTP) in sctp ptype bitmap to enable rss. Signed-off-by: Zhirun Yan <zhirun.yan@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 5d1b12d43..d91922527 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -253,7 +253,7 @@ static const u32 ice_ptypes_tcp_il[] = { static const u32 ice_ptypes_sctp_il[] = { 0x08000000, 0x01020204, 0x20408081, 0x04080810, 0x01020204, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x01040000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 13/16] net/ice/base: enable fdir queue region 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 00/16] net/ice/base: share code update secend batch Qi Zhang ` (11 preceding siblings ...) 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 12/16] net/ice/base: enable RSS for PPPoE with SCTP Qi Zhang @ 2019-09-05 3:49 ` Qi Zhang 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 14/16] net/ice/base: enable setting up FDIR counters Qi Zhang ` (3 subsequent siblings) 16 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-05 3:49 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr Add fdir queue region support. Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> --- drivers/net/ice/base/ice_fdir.c | 3 +++ drivers/net/ice/base/ice_fdir.h | 2 ++ 2 files changed, 5 insertions(+) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index e35506006..4632f1a53 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -343,6 +343,9 @@ ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input, fdir_fltr_ctx.drop = ICE_FXD_FLTR_QW0_DROP_YES; fdir_fltr_ctx.qindex = 0; } else { + if (input->dest_ctl == + ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QGROUP) + fdir_fltr_ctx.toq = input->q_region; fdir_fltr_ctx.drop = ICE_FXD_FLTR_QW0_DROP_NO; fdir_fltr_ctx.qindex = input->q_index; } diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index e0f3cd481..ccfc30c85 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -167,6 +167,8 @@ struct ice_fdir_fltr { /* flex byte filter data */ __be16 flex_word; + /* queue region size (=2^q_region) */ + u8 q_region; u16 flex_offset; u16 flex_fltr; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 14/16] net/ice/base: enable setting up FDIR counters 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 00/16] net/ice/base: share code update secend batch Qi Zhang ` (12 preceding siblings ...) 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 13/16] net/ice/base: enable fdir queue region Qi Zhang @ 2019-09-05 3:49 ` Qi Zhang 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 15/16] net/ice/base: add dest MAC field support for FDIR Qi Zhang ` (2 subsequent siblings) 16 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-05 3:49 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Enable getting value from input to set up flow director counters, so that the FDIR counters can count none, packets only, bytes only or both packets and bytes as demanded. Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 2 +- drivers/net/ice/base/ice_fdir.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index 4632f1a53..1c455ffe4 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -349,7 +349,7 @@ ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input, fdir_fltr_ctx.drop = ICE_FXD_FLTR_QW0_DROP_NO; fdir_fltr_ctx.qindex = input->q_index; } - fdir_fltr_ctx.cnt_ena = ICE_FXD_FLTR_QW0_STAT_ENA_PKTS; + fdir_fltr_ctx.cnt_ena = input->cnt_ena; fdir_fltr_ctx.cnt_index = input->cnt_index; fdir_fltr_ctx.fd_vsi = ice_get_hw_vsi_num(hw, input->dest_vsi); fdir_fltr_ctx.evict_ena = ICE_FXD_FLTR_QW0_EVICT_ENA_FALSE; diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index ccfc30c85..007f6dd8f 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -176,6 +176,7 @@ struct ice_fdir_fltr { u16 q_index; u16 dest_vsi; u8 dest_ctl; + u8 cnt_ena; u8 fltr_status; u16 cnt_index; u32 fltr_id; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 15/16] net/ice/base: add dest MAC field support for FDIR 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 00/16] net/ice/base: share code update secend batch Qi Zhang ` (13 preceding siblings ...) 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 14/16] net/ice/base: enable setting up FDIR counters Qi Zhang @ 2019-09-05 3:49 ` Qi Zhang 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 16/16] net/ice/base: update FW API minor version Qi Zhang 2019-09-05 6:55 ` [dpdk-dev] [PATCH v2 00/16] net/ice/base: share code update secend batch Yang, Qiming 16 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-05 3:49 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Add dest MAC address support so that this field can be matched when we set Flow Director filter with dst addr for MAC. Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index 1c455ffe4..3a2175b30 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -543,6 +543,17 @@ static void ice_pkt_insert_u32(u8 *pkt, int offset, __be32 data) } /** + * ice_pkt_insert_mac_addr - insert a MAC addr into a memory buffer. + * @pkt: packet buffer + * @offset: offset into buffer + * @addr: MAC address to convert and insert into pkt at offset + */ +static void ice_pkt_insert_mac_addr(u8 *pkt, u8 *addr) +{ + ice_memcpy(pkt, addr, ETH_ALEN, ICE_NONDMA_TO_NONDMA); +} + +/** * ice_fdir_get_gen_prgm_pkt - generate a training packet * @hw: pointer to the hardware structure * @input: flow director filter data structure @@ -626,6 +637,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.src_port); ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); if (frag) loc[20] = ICE_FDIR_IPV4_PKT_FLAG_DF; break; @@ -640,6 +652,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.src_port); ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; case ICE_FLTR_PTYPE_NONF_IPV4_SCTP: ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, @@ -652,6 +665,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.src_port); ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; case ICE_FLTR_PTYPE_NONF_IPV4_OTHER: ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, @@ -662,6 +676,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); ice_pkt_insert_u8(loc, ICE_IPV4_PROTO_OFFSET, input->ip.v4.proto); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; case ICE_FLTR_PTYPE_NONF_IPV6_TCP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, @@ -674,6 +689,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v6.src_port); ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; case ICE_FLTR_PTYPE_NONF_IPV6_UDP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, @@ -686,6 +702,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v6.src_port); ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; case ICE_FLTR_PTYPE_NONF_IPV6_SCTP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, @@ -698,6 +715,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v6.src_port); ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; case ICE_FLTR_PTYPE_NONF_IPV6_OTHER: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, @@ -708,6 +726,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); ice_pkt_insert_u8(loc, ICE_IPV6_PROTO_OFFSET, input->ip.v6.proto); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; default: return ICE_ERR_PARAM; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 16/16] net/ice/base: update FW API minor version 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 00/16] net/ice/base: share code update secend batch Qi Zhang ` (14 preceding siblings ...) 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 15/16] net/ice/base: add dest MAC field support for FDIR Qi Zhang @ 2019-09-05 3:49 ` Qi Zhang 2019-09-05 6:55 ` [dpdk-dev] [PATCH v2 00/16] net/ice/base: share code update secend batch Yang, Qiming 16 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-05 3:49 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Kevin Scott, Paul M Stillwell Jr Update FW API minor version to align to current value advertised by FW in NVM images. Signed-off-by: Kevin Scott <kevin.c.scott@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_controlq.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_controlq.h b/drivers/net/ice/base/ice_controlq.h index 8ad7857c8..8b6046547 100644 --- a/drivers/net/ice/base/ice_controlq.h +++ b/drivers/net/ice/base/ice_controlq.h @@ -23,7 +23,7 @@ */ #define EXP_FW_API_VER_BRANCH 0x00 #define EXP_FW_API_VER_MAJOR 0x01 -#define EXP_FW_API_VER_MINOR 0x03 +#define EXP_FW_API_VER_MINOR 0x05 /* Different control queue types: These are mainly for SW consumption. */ enum ice_ctl_q { -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* Re: [dpdk-dev] [PATCH v2 00/16] net/ice/base: share code update secend batch. 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 00/16] net/ice/base: share code update secend batch Qi Zhang ` (15 preceding siblings ...) 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 16/16] net/ice/base: update FW API minor version Qi Zhang @ 2019-09-05 6:55 ` Yang, Qiming 16 siblings, 0 replies; 166+ messages in thread From: Yang, Qiming @ 2019-09-05 6:55 UTC (permalink / raw) To: Zhang, Qi Z, Lu, Wenzhuo; +Cc: dev, Ye, Xiaolong > -----Original Message----- > From: Zhang, Qi Z > Sent: Thursday, September 5, 2019 11:49 AM > To: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming > <qiming.yang@intel.com> > Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Zhang, Qi Z > <qi.z.zhang@intel.com> > Subject: [PATCH v2 00/16] net/ice/base: share code update secend batch. > > The patchset depends on the first batch > http://patchwork.dpdk.org/project/dpdk/list/?series=6158&state=* > > Key Features: > > 1) Add tunnel support for fdir > 2) Add non-word aligned field support for fdir > 3) Add dest mac field support for fdir > 4) Add flow count support for fdir > 5) Add queue region support for fdir > 6) Add vlan pppoe support for switch > > Qi Zhang (16): > net/ice/base: remove redundant empty lines > net/ice/base: add support for tunnel packets > net/ice/base: add non-word aligned ip field support > net/ice/base: add non-word aligned ipv6 field support > net/ice/base: correct the mask for checking protocol header > net/ice/base: propagate errors from functions > net/ice/base: remove pointless NULL check of port info > net/ice/base: remove RSS code as iavf host > net/ice/base: add support for switch rule about VLAN PPPoE > net/ice/base: minor structure refactor > net/ice/base: associate switch recipe to profiles > net/ice/base: enable RSS for PPPoE with SCTP > net/ice/base: enable fdir queue region > net/ice/base: enable setting up FDIR counters > net/ice/base: add dest MAC field support for FDIR > net/ice/base: update FW API minor version > > drivers/net/ice/base/ice_adminq_cmd.h | 111 ---------- > drivers/net/ice/base/ice_bitops.h | 2 - > drivers/net/ice/base/ice_common.c | 25 --- > drivers/net/ice/base/ice_common.h | 2 - > drivers/net/ice/base/ice_controlq.c | 9 - > drivers/net/ice/base/ice_controlq.h | 3 +- > drivers/net/ice/base/ice_devids.h | 1 - > drivers/net/ice/base/ice_fdir.c | 350 +++++++++++++++++++++++++------ > drivers/net/ice/base/ice_fdir.h | 19 +- > drivers/net/ice/base/ice_flex_pipe.c | 5 - > drivers/net/ice/base/ice_flex_pipe.h | 1 - > drivers/net/ice/base/ice_flow.c | 159 ++------------ > drivers/net/ice/base/ice_hw_autogen.h | 2 - > drivers/net/ice/base/ice_lan_tx_rx.h | 9 - > drivers/net/ice/base/ice_nvm.c | 4 - > drivers/net/ice/base/ice_protocol_type.h | 10 +- > drivers/net/ice/base/ice_sched.c | 7 +- > drivers/net/ice/base/ice_switch.c | 52 ++--- > drivers/net/ice/base/ice_switch.h | 2 - > drivers/net/ice/base/ice_type.h | 19 +- > 20 files changed, 371 insertions(+), 421 deletions(-) > > -- > 2.13.6 Acked-by: Qiming Yang <qiming.yang@intel.com> ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 00/22] net/ice/base: share code update secend batch. 2019-09-02 3:55 [dpdk-dev] [PATCH 0/8] net/ice/base: share code update secend batch Qi Zhang ` (8 preceding siblings ...) 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 00/16] net/ice/base: share code update secend batch Qi Zhang @ 2019-09-07 3:16 ` Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 01/22] net/ice/base: remove redundant empty lines Qi Zhang ` (21 more replies) 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (4 subsequent siblings) 14 siblings, 22 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-07 3:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang The patchset depends on the first batch http://patchwork.dpdk.org/project/dpdk/list/?series=6158&state=* Key Features: 1) Add tunnel support for fdir 2) Add non-word aligned field support for fdir 3) Add dest mac field support for fdir 4) Add flow count support for fdir 5) Add queue region support for fdir 6) Add vlan pppoe support for switch 7) Add GTPU qif support for fdir 8) Add symmetric hash support 9) Couple RSS fixes v3: - add features 7, 8, 9. v2: - add features 3, 4, 5, 6. Qi Zhang (22): net/ice/base: remove redundant empty lines net/ice/base: add support for tunnel packets net/ice/base: add non-word aligned ip field support net/ice/base: add non-word aligned ipv6 field support net/ice/base: correct the mask for checking protocol header net/ice/base: propagate errors from functions net/ice/base: remove pointless NULL check of port info net/ice/base: remove RSS code as iavf host net/ice/base: add support for switch rule about VLAN PPPoE net/ice/base: minor structure refactor net/ice/base: associate switch recipe to profiles net/ice/base: enable RSS for PPPoE with SCTP net/ice/base: enable fdir queue region net/ice/base: enable setting up FDIR counters net/ice/base: add dest MAC field support for FDIR net/ice/base: update FW API minor version net/ice/base: enable symmetric hash for RSS net/ice/base: replace alloc-followed-by-copy with memdup net/ice/base: add FDIR support for GTPU qfi field net/ice/base: fix the bitmap for TCP in RSS net/ice/base: fix segment in remove existing RSS rule net/ice/base: remove unused DDP package macros drivers/net/ice/base/ice_adminq_cmd.h | 111 -------- drivers/net/ice/base/ice_bitops.h | 2 - drivers/net/ice/base/ice_common.c | 25 -- drivers/net/ice/base/ice_common.h | 2 - drivers/net/ice/base/ice_controlq.c | 9 - drivers/net/ice/base/ice_controlq.h | 3 +- drivers/net/ice/base/ice_devids.h | 1 - drivers/net/ice/base/ice_fdir.c | 461 +++++++++++++++++++++++++++---- drivers/net/ice/base/ice_fdir.h | 41 ++- drivers/net/ice/base/ice_flex_pipe.c | 10 +- drivers/net/ice/base/ice_flex_pipe.h | 1 - drivers/net/ice/base/ice_flow.c | 316 ++++++++++----------- drivers/net/ice/base/ice_flow.h | 5 +- drivers/net/ice/base/ice_hw_autogen.h | 2 - drivers/net/ice/base/ice_lan_tx_rx.h | 9 - drivers/net/ice/base/ice_nvm.c | 4 - drivers/net/ice/base/ice_protocol_type.h | 10 +- drivers/net/ice/base/ice_sched.c | 7 +- drivers/net/ice/base/ice_switch.c | 59 ++-- drivers/net/ice/base/ice_switch.h | 2 - drivers/net/ice/base/ice_type.h | 28 +- drivers/net/ice/ice_ethdev.c | 16 +- 22 files changed, 667 insertions(+), 457 deletions(-) -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 01/22] net/ice/base: remove redundant empty lines 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 00/22] " Qi Zhang @ 2019-09-07 3:16 ` Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 02/22] net/ice/base: add support for tunnel packets Qi Zhang ` (20 subsequent siblings) 21 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-07 3:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr Remove redundant empty lines Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_adminq_cmd.h | 111 ------------------------------- drivers/net/ice/base/ice_bitops.h | 2 - drivers/net/ice/base/ice_common.c | 25 ------- drivers/net/ice/base/ice_common.h | 2 - drivers/net/ice/base/ice_controlq.c | 9 --- drivers/net/ice/base/ice_controlq.h | 1 - drivers/net/ice/base/ice_devids.h | 1 - drivers/net/ice/base/ice_flex_pipe.c | 5 -- drivers/net/ice/base/ice_flex_pipe.h | 1 - drivers/net/ice/base/ice_hw_autogen.h | 2 - drivers/net/ice/base/ice_lan_tx_rx.h | 9 --- drivers/net/ice/base/ice_nvm.c | 4 -- drivers/net/ice/base/ice_protocol_type.h | 2 - drivers/net/ice/base/ice_sched.c | 4 -- drivers/net/ice/base/ice_switch.c | 8 --- drivers/net/ice/base/ice_switch.h | 2 - drivers/net/ice/base/ice_type.h | 9 --- 17 files changed, 197 deletions(-) diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h index 8e1d6a07d..e6a1350ba 100644 --- a/drivers/net/ice/base/ice_adminq_cmd.h +++ b/drivers/net/ice/base/ice_adminq_cmd.h @@ -9,12 +9,10 @@ * descriptor format. It is shared between Firmware and Software. */ - #define ICE_MAX_VSI 768 #define ICE_AQC_TOPO_MAX_LEVEL_NUM 0x9 #define ICE_AQ_SET_MAC_FRAME_SIZE_MAX 9728 - struct ice_aqc_generic { __le32 param0; __le32 param1; @@ -22,7 +20,6 @@ struct ice_aqc_generic { __le32 addr_low; }; - /* Get version (direct 0x0001) */ struct ice_aqc_get_ver { __le32 rom_ver; @@ -37,7 +34,6 @@ struct ice_aqc_get_ver { u8 api_patch; }; - /* Send driver version (indirect 0x0002) */ struct ice_aqc_driver_ver { u8 major_ver; @@ -49,7 +45,6 @@ struct ice_aqc_driver_ver { __le32 addr_low; }; - /* Queue Shutdown (direct 0x0003) */ struct ice_aqc_q_shutdown { u8 driver_unloading; @@ -57,9 +52,6 @@ struct ice_aqc_q_shutdown { u8 reserved[15]; }; - - - /* Request resource ownership (direct 0x0008) * Release resource ownership (direct 0x0009) */ @@ -92,7 +84,6 @@ struct ice_aqc_req_res { u8 reserved[2]; }; - /* Get function capabilities (indirect 0x000A) * Get device capabilities (indirect 0x000B) */ @@ -105,7 +96,6 @@ struct ice_aqc_list_caps { __le32 addr_low; }; - /* Device/Function buffer entry, repeated per reported capability */ struct ice_aqc_list_caps_elem { __le16 cap; @@ -132,7 +122,6 @@ struct ice_aqc_list_caps_elem { __le64 rsvd2; }; - /* Manage MAC address, read command - indirect (0x0107) * This struct is also used for the response */ @@ -153,7 +142,6 @@ struct ice_aqc_manage_mac_read { __le32 addr_low; }; - /* Response buffer format for manage MAC read command */ struct ice_aqc_manage_mac_read_resp { u8 lport_num; @@ -163,7 +151,6 @@ struct ice_aqc_manage_mac_read_resp { u8 mac_addr[ETH_ALEN]; }; - /* Manage MAC address, write command - direct (0x0108) */ struct ice_aqc_manage_mac_write { u8 rsvd; @@ -182,7 +169,6 @@ struct ice_aqc_manage_mac_write { __le32 addr_low; }; - /* Clear PXE Command and response (direct 0x0110) */ struct ice_aqc_clear_pxe { u8 rx_cnt; @@ -190,7 +176,6 @@ struct ice_aqc_clear_pxe { u8 reserved[15]; }; - /* Configure No-Drop Policy Command (direct 0x0112) */ struct ice_aqc_config_no_drop_policy { u8 opts; @@ -215,7 +200,6 @@ struct ice_aqc_get_sw_cfg { __le32 addr_low; }; - /* Each entry in the response buffer is of the following type: */ struct ice_aqc_get_sw_cfg_resp_elem { /* VSI/Port Number */ @@ -242,7 +226,6 @@ struct ice_aqc_get_sw_cfg_resp_elem { #define ICE_AQC_GET_SW_CONF_RESP_IS_VF BIT(15) }; - /* The response buffer is as follows. Note that the length of the * elements array varies with the length of the command response. */ @@ -250,8 +233,6 @@ struct ice_aqc_get_sw_cfg_resp { struct ice_aqc_get_sw_cfg_resp_elem elements[1]; }; - - /* These resource type defines are used for all switch resource * commands where a resource type is required, such as: * Get Resource Allocation command (indirect 0x0204) @@ -324,7 +305,6 @@ struct ice_aqc_get_res_resp { struct ice_aqc_get_res_resp_elem elem[1]; }; - /* Allocate Resources command (indirect 0x0208) * Free Resources command (indirect 0x0209) */ @@ -335,7 +315,6 @@ struct ice_aqc_alloc_free_res_cmd { __le32 addr_low; }; - /* Resource descriptor */ struct ice_aqc_res_elem { union { @@ -344,7 +323,6 @@ struct ice_aqc_res_elem { } e; }; - /* Buffer for Allocate/Free Resources commands */ struct ice_aqc_alloc_free_res_elem { __le16 res_type; /* Types defined above cmd 0x0204 */ @@ -355,7 +333,6 @@ struct ice_aqc_alloc_free_res_elem { struct ice_aqc_res_elem elem[1]; }; - /* Get Allocated Resource Descriptors Command (indirect 0x020A) */ struct ice_aqc_get_allocd_res_desc { union { @@ -379,7 +356,6 @@ struct ice_aqc_get_allocd_res_desc_resp { struct ice_aqc_res_elem elem[1]; }; - /* Add VSI (indirect 0x0210) * Update VSI (indirect 0x0211) * Get VSI (indirect 0x0212) @@ -405,7 +381,6 @@ struct ice_aqc_add_get_update_free_vsi { __le32 addr_low; }; - /* Response descriptor for: * Add VSI (indirect 0x0210) * Update VSI (indirect 0x0211) @@ -420,7 +395,6 @@ struct ice_aqc_add_update_free_vsi_resp { __le32 addr_low; }; - struct ice_aqc_get_vsi_resp { __le16 vsi_num; u8 vf_id; @@ -434,7 +408,6 @@ struct ice_aqc_get_vsi_resp { __le32 addr_low; }; - struct ice_aqc_vsi_props { __le16 valid_sections; #define ICE_AQ_VSI_PROP_SW_VALID BIT(0) @@ -589,7 +562,6 @@ struct ice_aqc_vsi_props { u8 reserved[24]; }; - /* Add/update mirror rule - direct (0x0260) */ #define ICE_AQC_RULE_ID_VALID_S 7 #define ICE_AQC_RULE_ID_VALID_M (0x1 << ICE_AQC_RULE_ID_VALID_S) @@ -694,7 +666,6 @@ struct ice_aqc_storm_cfg { __le32 reserved; }; - #define ICE_MAX_NUM_RECIPES 64 /* Add/Get Recipe (indirect 0x0290/0x0292)*/ @@ -779,7 +750,6 @@ struct ice_aqc_sw_rules { __le32 addr_low; }; - #pragma pack(1) /* Add/Update/Get/Remove lookup Rx/Tx command/response entry * This structures describes the lookup rules and associated actions. "index" @@ -867,7 +837,6 @@ struct ice_sw_rule_lkup_rx_tx { }; #pragma pack() - /* Add/Update/Remove large action command/response entry * "index" is returned as part of a response to a successful Add command, and * can be used to identify the action for Update/Get/Remove commands. @@ -928,7 +897,6 @@ struct ice_sw_rule_lg_act { #define ICE_LG_ACT_STAT_COUNT_M (0x7F << ICE_LG_ACT_STAT_COUNT_S) }; - /* Add/Update/Remove VSI list command/response entry * "index" is returned as part of a response to a successful Add command, and * can be used to identify the VSI list for Update/Get/Remove commands. @@ -939,7 +907,6 @@ struct ice_sw_rule_vsi_list { __le16 vsi[1]; /* Array of number_vsi VSI numbers */ }; - #pragma pack(1) /* Query VSI list command/response entry */ struct ice_sw_rule_vsi_list_query { @@ -948,7 +915,6 @@ struct ice_sw_rule_vsi_list_query { }; #pragma pack() - #pragma pack(1) /* Add switch rule response: * Content of return buffer is same as the input buffer. The status field and @@ -974,7 +940,6 @@ struct ice_aqc_sw_rules_elem { #pragma pack() - /* PFC Ignore (direct 0x0301) * The command and response use the same descriptor structure */ @@ -1009,7 +974,6 @@ struct ice_aqc_set_dcb_params { u8 rsvd[14]; }; - /* Get Default Topology (indirect 0x0400) */ struct ice_aqc_get_topo { u8 port_num; @@ -1020,7 +984,6 @@ struct ice_aqc_get_topo { __le32 addr_low; }; - /* Update TSE (indirect 0x0403) * Get TSE (indirect 0x0404) * Add TSE (indirect 0x0401) @@ -1037,7 +1000,6 @@ struct ice_aqc_sched_elem_cmd { __le32 addr_low; }; - /* This is the buffer for: * Suspend Nodes (indirect 0x0409) * Resume Nodes (indirect 0x040A) @@ -1046,7 +1008,6 @@ struct ice_aqc_suspend_resume_elem { __le32 teid[1]; }; - struct ice_aqc_txsched_move_grp_info_hdr { __le32 src_parent_teid; __le32 dest_parent_teid; @@ -1054,19 +1015,16 @@ struct ice_aqc_txsched_move_grp_info_hdr { __le16 reserved; }; - struct ice_aqc_move_elem { struct ice_aqc_txsched_move_grp_info_hdr hdr; __le32 teid[1]; }; - struct ice_aqc_elem_info_bw { __le16 bw_profile_idx; __le16 bw_alloc; }; - struct ice_aqc_txsched_elem { u8 elem_type; /* Special field, reserved for some aq calls */ #define ICE_AQC_ELEM_TYPE_UNDEFINED 0x0 @@ -1098,50 +1056,42 @@ struct ice_aqc_txsched_elem { __le16 reserved2; }; - struct ice_aqc_txsched_elem_data { __le32 parent_teid; __le32 node_teid; struct ice_aqc_txsched_elem data; }; - struct ice_aqc_txsched_topo_grp_info_hdr { __le32 parent_teid; __le16 num_elems; __le16 reserved2; }; - struct ice_aqc_add_elem { struct ice_aqc_txsched_topo_grp_info_hdr hdr; struct ice_aqc_txsched_elem_data generic[1]; }; - struct ice_aqc_conf_elem { struct ice_aqc_txsched_elem_data generic[1]; }; - struct ice_aqc_get_elem { struct ice_aqc_txsched_elem_data generic[1]; }; - struct ice_aqc_get_topo_elem { struct ice_aqc_txsched_topo_grp_info_hdr hdr; struct ice_aqc_txsched_elem_data generic[ICE_AQC_TOPO_MAX_LEVEL_NUM]; }; - struct ice_aqc_delete_elem { struct ice_aqc_txsched_topo_grp_info_hdr hdr; __le32 teid[1]; }; - /* Query Port ETS (indirect 0x040E) * * This indirect command is used to query port TC node configuration. @@ -1168,7 +1118,6 @@ struct ice_aqc_port_ets_elem { __le32 tc_node_teid[8]; /* Used for response, reserved in command */ }; - /* Rate limiting profile for * Add RL profile (indirect 0x0410) * Query RL profile (indirect 0x0411) @@ -1184,7 +1133,6 @@ struct ice_aqc_rl_profile { __le32 addr_low; }; - struct ice_aqc_rl_profile_elem { u8 level; u8 flags; @@ -1204,13 +1152,10 @@ struct ice_aqc_rl_profile_elem { __le16 rl_encode; }; - struct ice_aqc_rl_profile_generic_elem { struct ice_aqc_rl_profile_elem generic[1]; }; - - /* Configure L2 Node CGD (indirect 0x0414) * This indirect command allows configuring a congestion domain for given L2 * node TEIDs in the scheduler topology. @@ -1222,19 +1167,16 @@ struct ice_aqc_cfg_l2_node_cgd { __le32 addr_low; }; - struct ice_aqc_cfg_l2_node_cgd_elem { __le32 node_teid; u8 cgd; u8 reserved[3]; }; - struct ice_aqc_cfg_l2_node_cgd_data { struct ice_aqc_cfg_l2_node_cgd_elem elem[1]; }; - /* Query Scheduler Resource Allocation (indirect 0x0412) * This indirect command retrieves the scheduler resources allocated by * EMP Firmware to the given PF. @@ -1245,7 +1187,6 @@ struct ice_aqc_query_txsched_res { __le32 addr_low; }; - struct ice_aqc_generic_sched_props { __le16 phys_levels; __le16 logical_levels; @@ -1257,7 +1198,6 @@ struct ice_aqc_generic_sched_props { u8 rsvd1[22]; }; - struct ice_aqc_layer_props { u8 logical_layer; u8 chunk_size; @@ -1271,13 +1211,11 @@ struct ice_aqc_layer_props { u8 rsvd1[14]; }; - struct ice_aqc_query_txsched_res_resp { struct ice_aqc_generic_sched_props sched_props; struct ice_aqc_layer_props layer_props[ICE_AQC_TOPO_MAX_LEVEL_NUM]; }; - /* Query Node to Root Topology (indirect 0x0413) * This command uses ice_aqc_get_elem as its data buffer. */ @@ -1288,7 +1226,6 @@ struct ice_aqc_query_node_to_root { __le32 addr_low; }; - /* Get PHY capabilities (indirect 0x0600) */ struct ice_aqc_get_phy_caps { u8 lport_num; @@ -1311,7 +1248,6 @@ struct ice_aqc_get_phy_caps { __le32 addr_low; }; - /* This is #define of PHY type (Extended): * The first set of defines is for phy_type_low. */ @@ -1453,7 +1389,6 @@ struct ice_aqc_get_phy_caps_data { } qual_modules[ICE_AQC_QUAL_MOD_COUNT_MAX]; }; - /* Set PHY capabilities (direct 0x0601) * NOTE: This command must be followed by setup link and restart auto-neg */ @@ -1464,7 +1399,6 @@ struct ice_aqc_set_phy_cfg { __le32 addr_low; }; - /* Set PHY config command data structure */ struct ice_aqc_set_phy_cfg_data { __le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */ @@ -1485,7 +1419,6 @@ struct ice_aqc_set_phy_cfg_data { u8 rsvd1; }; - /* Set MAC Config command data structure (direct 0x0603) */ struct ice_aqc_set_mac_cfg { __le16 max_frame_size; @@ -1505,7 +1438,6 @@ struct ice_aqc_set_mac_cfg { u8 reserved[7]; }; - /* Restart AN command data structure (direct 0x0605) * Also used for response, with only the lport_num field present. */ @@ -1518,7 +1450,6 @@ struct ice_aqc_restart_an { u8 reserved2[13]; }; - /* Get link status (indirect 0x0607), also used for Link Status Event */ struct ice_aqc_get_link_status { u8 lport_num; @@ -1535,7 +1466,6 @@ struct ice_aqc_get_link_status { __le32 addr_low; }; - /* Get link status response data structure, also used for Link Status Event */ struct ice_aqc_get_link_status_data { u8 topo_media_conflict; @@ -1621,7 +1551,6 @@ struct ice_aqc_get_link_status_data { __le64 phy_type_high; /* Use values from ICE_PHY_TYPE_HIGH_* */ }; - /* Set event mask command (direct 0x0613) */ struct ice_aqc_set_event_mask { u8 lport_num; @@ -1641,8 +1570,6 @@ struct ice_aqc_set_event_mask { u8 reserved1[6]; }; - - /* Set MAC Loopback command (direct 0x0620) */ struct ice_aqc_set_mac_lb { u8 lb_mode; @@ -1651,9 +1578,6 @@ struct ice_aqc_set_mac_lb { u8 reserved[15]; }; - - - struct ice_aqc_link_topo_addr { u8 lport_num; u8 lport_num_valid; @@ -1716,8 +1640,6 @@ struct ice_aqc_set_port_id_led { u8 rsvd[13]; }; - - /* Read/Write SFF EEPROM command (indirect 0x06EE) */ struct ice_aqc_sff_eeprom { u8 lport_num; @@ -1797,7 +1719,6 @@ struct ice_aqc_nvm { #define ICE_AQC_NVM_LLDP_STATUS_M_LEN 4 /* In Bits */ #define ICE_AQC_NVM_LLDP_STATUS_RD_LEN 4 /* In Bytes */ - /* Used for 0x0704 as well as for 0x0705 commands */ struct ice_aqc_nvm_cfg { u8 cmd_flags; @@ -1812,14 +1733,12 @@ struct ice_aqc_nvm_cfg { __le32 addr_low; }; - struct ice_aqc_nvm_cfg_data { __le16 field_id; __le16 field_options; __le16 field_value; }; - /* NVM Checksum Command (direct, 0x0706) */ struct ice_aqc_nvm_checksum { u8 flags; @@ -1831,9 +1750,6 @@ struct ice_aqc_nvm_checksum { u8 rsvd2[12]; }; - - - /* Get LLDP MIB (indirect 0x0A00) * Note: This is also used by the LLDP MIB Change Event (0x0A01) * as the format is the same. @@ -1985,7 +1901,6 @@ struct ice_aqc_lldp_stop_start_specific_agent { u8 reserved[15]; }; - /* Get/Set RSS key (indirect 0x0B04/0x0B02) */ struct ice_aqc_get_set_rss_key { #define ICE_AQC_GSET_RSS_KEY_VSI_VALID BIT(15) @@ -1997,7 +1912,6 @@ struct ice_aqc_get_set_rss_key { __le32 addr_low; }; - #define ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE 0x28 #define ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE 0xC #define ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE \ @@ -2019,7 +1933,6 @@ struct ice_aqc_get_set_rss_keys { u8 extended_hash_key[ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE]; }; - /* Get/Set RSS LUT (indirect 0x0B05/0x0B03) */ struct ice_aqc_get_set_rss_lut { #define ICE_AQC_GSET_RSS_LUT_VSI_VALID BIT(15) @@ -2055,7 +1968,6 @@ struct ice_aqc_get_set_rss_lut { __le32 addr_low; }; - /* Clear FD Table Command (direct, 0x0B06) */ struct ice_aqc_clear_fd_table { u8 clear_type; @@ -2066,9 +1978,6 @@ struct ice_aqc_clear_fd_table { u8 reserved[12]; }; - - - /* Add Tx LAN Queues (indirect 0x0C30) */ struct ice_aqc_add_txqs { u8 num_qgrps; @@ -2078,7 +1987,6 @@ struct ice_aqc_add_txqs { __le32 addr_low; }; - /* This is the descriptor of each queue entry for the Add Tx LAN Queues * command (0x0C30). Only used within struct ice_aqc_add_tx_qgrp. */ @@ -2091,7 +1999,6 @@ struct ice_aqc_add_txqs_perq { struct ice_aqc_txsched_elem info; }; - /* The format of the command buffer for Add Tx LAN Queues (0x0C30) * is an array of the following structs. Please note that the length of * each struct ice_aqc_add_tx_qgrp is variable due @@ -2104,7 +2011,6 @@ struct ice_aqc_add_tx_qgrp { struct ice_aqc_add_txqs_perq txqs[1]; }; - /* Disable Tx LAN Queues (indirect 0x0C31) */ struct ice_aqc_dis_txqs { u8 cmd_type; @@ -2127,7 +2033,6 @@ struct ice_aqc_dis_txqs { __le32 addr_low; }; - /* The buffer for Disable Tx LAN Queues (indirect 0x0C31) * contains the following structures, arrayed one after the * other. @@ -2150,12 +2055,10 @@ struct ice_aqc_dis_txq_item { (1 << ICE_AQC_Q_DIS_BUF_ELEM_TYPE_S) }; - struct ice_aqc_dis_txq { struct ice_aqc_dis_txq_item qgrps[1]; }; - /* Tx LAN Queues Cleanup Event (0x0C31) */ struct ice_aqc_txqs_cleanup { __le16 caller_opc; @@ -2163,7 +2066,6 @@ struct ice_aqc_txqs_cleanup { u8 reserved[12]; }; - /* Move / Reconfigure Tx Queues (indirect 0x0C32) */ struct ice_aqc_move_txqs { u8 cmd_type; @@ -2184,7 +2086,6 @@ struct ice_aqc_move_txqs { __le32 addr_low; }; - /* This is the descriptor of each queue entry for the move Tx LAN Queues * command (0x0C32). */ @@ -2195,15 +2096,12 @@ struct ice_aqc_move_txqs_elem { __le32 q_teid; }; - struct ice_aqc_move_txqs_data { __le32 src_teid; __le32 dest_teid; struct ice_aqc_move_txqs_elem txqs[1]; }; - - /* Download Package (indirect 0x0C40) */ /* Also used for Update Package (indirect 0x0C42) */ struct ice_aqc_download_pkg { @@ -2255,9 +2153,6 @@ struct ice_aqc_get_pkg_info_resp { struct ice_aqc_get_pkg_info pkg_info[1]; }; - - - /* Lan Queue Overflow Event (direct, 0x1001) */ struct ice_aqc_event_lan_overflow { __le32 prtdcb_ruptq; @@ -2265,9 +2160,6 @@ struct ice_aqc_event_lan_overflow { u8 reserved[8]; }; - - - /** * struct ice_aq_desc - Admin Queue (AQ) descriptor * @flags: ICE_AQ_FLAG_* flags @@ -2361,7 +2253,6 @@ struct ice_aq_desc { } params; }; - /* FW defined boundary for a large buffer, 4k >= Large buffer > 512 bytes */ #define ICE_AQ_LG_BUF 512 @@ -2572,8 +2463,6 @@ enum ice_adminq_opc { ice_aqc_opc_update_pkg = 0x0C42, ice_aqc_opc_get_pkg_info_list = 0x0C43, - - /* Standalone Commands/Events */ ice_aqc_opc_event_lan_overflow = 0x1001, }; diff --git a/drivers/net/ice/base/ice_bitops.h b/drivers/net/ice/base/ice_bitops.h index f0aa8ce88..32f64cac0 100644 --- a/drivers/net/ice/base/ice_bitops.h +++ b/drivers/net/ice/base/ice_bitops.h @@ -8,7 +8,6 @@ /* Define the size of the bitmap chunk */ typedef u32 ice_bitmap_t; - /* Number of bits per bitmap chunk */ #define BITS_PER_CHUNK (BITS_PER_BYTE * sizeof(ice_bitmap_t)) /* Determine which chunk a bit belongs in */ @@ -372,5 +371,4 @@ ice_cmp_bitmap(ice_bitmap_t *bmp1, ice_bitmap_t *bmp2, u16 size) return true; } - #endif /* _ICE_BITOPS_H_ */ diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index 11e902ea1..16b91dc12 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -11,7 +11,6 @@ #define ICE_PF_RESET_WAIT_COUNT 200 - /** * ice_set_mac_type - Sets MAC type * @hw: pointer to the HW structure @@ -41,7 +40,6 @@ static enum ice_status ice_set_mac_type(struct ice_hw *hw) return status; } - /** * ice_clear_pf_cfg - Clear PF configuration * @hw: pointer to the hardware structure @@ -113,7 +111,6 @@ ice_aq_manage_mac_read(struct ice_hw *hw, void *buf, u16 buf_size, ETH_ALEN, ICE_DMA_TO_NONDMA); break; } - return ICE_SUCCESS; } @@ -533,7 +530,6 @@ static void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw) ice_free(hw, sw); } - /** * ice_get_itr_intrl_gran * @hw: pointer to the HW struct @@ -598,7 +594,6 @@ void ice_print_rollback_msg(struct ice_hw *hw) &ver_lo); SNPRINTF(nvm_str, sizeof(nvm_str), "%x.%02x 0x%x %d.%d.%d", ver_hi, ver_lo, hw->nvm.eetrack, oem_ver, oem_build, oem_patch); - ice_warn(hw, "Firmware rollback mode detected. Current version is NVM: %s, FW: %d.%d. Device may exhibit limited functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware rollback mode", nvm_str, hw->fw_maj_ver, hw->fw_min_ver); @@ -617,7 +612,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw) ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__); - /* Set MAC type based on DeviceID */ status = ice_set_mac_type(hw); if (status) @@ -627,14 +621,12 @@ enum ice_status ice_init_hw(struct ice_hw *hw) PF_FUNC_RID_FUNCTION_NUMBER_M) >> PF_FUNC_RID_FUNCTION_NUMBER_S; - status = ice_reset(hw, ICE_RESET_PFR); if (status) return status; ice_get_itr_intrl_gran(hw); - status = ice_create_all_ctrlq(hw); if (status) goto err_unroll_cqinit; @@ -686,7 +678,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw) goto err_unroll_alloc; } - /* Initialize port_info struct with scheduler data */ status = ice_sched_init_port(hw->port_info); if (status) @@ -725,7 +716,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw) if (status) goto err_unroll_sched; - /* Get MAC information */ /* A single port can report up to two (LAN and WoL) addresses */ mac_buf = ice_calloc(hw, 2, @@ -926,7 +916,6 @@ enum ice_status ice_reset(struct ice_hw *hw, enum ice_reset_req req) wr32(hw, GLGEN_RTRIG, val); ice_flush(hw); - /* wait for the FW to be ready */ return ice_check_reset(hw); } @@ -997,8 +986,6 @@ ice_get_pfa_module_tlv(struct ice_hw *hw, u16 *module_tlv, u16 *module_tlv_len, return ICE_ERR_DOES_NOT_EXIST; } - - /** * ice_copy_rxq_ctx_to_hw * @hw: pointer to the hardware structure @@ -1321,7 +1308,6 @@ ice_clear_tx_drbell_q_ctx(struct ice_hw *hw, u32 tx_drbell_q_index) } #endif /* !NO_UNUSED_CTX_CODE || AE_DRIVER */ - /* FW Admin Queue command wrappers */ /** @@ -2142,7 +2128,6 @@ ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags, cmd->flags = flags; - /* Prep values for flags, sah, sal */ cmd->sah = HTONS(*((const u16 *)mac_addr)); cmd->sal = HTONL(*((const u32 *)(mac_addr + 2))); @@ -2179,7 +2164,6 @@ void ice_clear_pxe_mode(struct ice_hw *hw) ice_aq_clear_pxe_mode(hw); } - /** * ice_get_link_speed_based_on_phy_type - returns link speed * @phy_type_low: lower part of phy_type @@ -2848,7 +2832,6 @@ ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd) return ice_aq_send_cmd(hw, &desc, NULL, 0, cd); } - /** * ice_aq_set_port_id_led * @pi: pointer to the port information @@ -2869,7 +2852,6 @@ ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode, ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_port_id_led); - if (is_orig_mode) cmd->ident_mode = ICE_AQC_PORT_IDENT_LED_ORIG; else @@ -3357,7 +3339,6 @@ ice_aq_move_recfg_lan_txq(struct ice_hw *hw, u8 num_qs, bool is_move, return status; } - /* End of FW Admin Queue command wrappers */ /** @@ -3581,9 +3562,6 @@ ice_set_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info) return ICE_SUCCESS; } - - - /** * ice_read_byte - read context byte into struct * @src_ctx: the context structure to read from @@ -4047,8 +4025,6 @@ ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap, ICE_SCHED_NODE_OWNER_LAN); } - - /** * ice_replay_pre_init - replay pre initialization * @hw: pointer to the HW struct @@ -4246,7 +4222,6 @@ ice_stat_update_repc(struct ice_hw *hw, u16 vsi_handle, bool prev_stat_loaded, cur_stats->rx_errors += error_cnt; } - /** * ice_sched_query_elem - query element information from HW * @hw: pointer to the HW struct diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h index c42c58670..bcb0a999d 100644 --- a/drivers/net/ice/base/ice_common.h +++ b/drivers/net/ice/base/ice_common.h @@ -169,7 +169,6 @@ ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask, enum ice_status ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd); - enum ice_status ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode, struct ice_sq_cd *cd); @@ -178,7 +177,6 @@ ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr, u16 mem_addr, u8 page, u8 set_page, u8 *data, u8 length, bool write, struct ice_sq_cd *cd); - enum ice_status ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info); enum ice_status diff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c index 1ea8f3a24..8a65fae40 100644 --- a/drivers/net/ice/base/ice_controlq.c +++ b/drivers/net/ice/base/ice_controlq.c @@ -4,7 +4,6 @@ #include "ice_common.h" - #define ICE_CQ_INIT_REGS(qinfo, prefix) \ do { \ (qinfo)->sq.head = prefix##_ATQH; \ @@ -53,7 +52,6 @@ static void ice_mailbox_init_regs(struct ice_hw *hw) ICE_CQ_INIT_REGS(cq, PF_MBX); } - /** * ice_check_sq_alive * @hw: pointer to the HW struct @@ -521,7 +519,6 @@ ice_shutdown_rq(struct ice_hw *hw, struct ice_ctl_q_info *cq) return ret_code; } - /** * ice_init_check_adminq - Check version for Admin Queue to know if its alive * @hw: pointer to the hardware structure @@ -533,12 +530,10 @@ static enum ice_status ice_init_check_adminq(struct ice_hw *hw) ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__); - status = ice_aq_get_fw_ver(hw, NULL); if (status) goto init_ctrlq_free_rq; - if (!ice_aq_ver_check(hw)) { status = ICE_ERR_FW_API_VER; goto init_ctrlq_free_rq; @@ -633,7 +628,6 @@ enum ice_status ice_init_all_ctrlq(struct ice_hw *hw) ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__); - /* Init FW admin queue */ ret_code = ice_init_ctrlq(hw, ICE_CTL_Q_ADMIN); if (ret_code) @@ -972,7 +966,6 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq, ice_debug_cq(hw, (void *)desc_on_ring, buf, buf_size); - (cq->sq.next_to_use)++; if (cq->sq.next_to_use == cq->sq.count) cq->sq.next_to_use = 0; @@ -1025,7 +1018,6 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq, ice_debug_cq(hw, (void *)desc, buf, buf_size); - /* save writeback AQ if requested */ if (details->wb_desc) ice_memcpy(details->wb_desc, desc_on_ring, @@ -1158,7 +1150,6 @@ ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq, ice_debug_cq(hw, (void *)desc, e->msg_buf, cq->rq_buf_size); - /* Restore the original datalen and buffer address in the desc, * FW updates datalen to indicate the event message size */ diff --git a/drivers/net/ice/base/ice_controlq.h b/drivers/net/ice/base/ice_controlq.h index b1214f670..8ad7857c8 100644 --- a/drivers/net/ice/base/ice_controlq.h +++ b/drivers/net/ice/base/ice_controlq.h @@ -7,7 +7,6 @@ #include "ice_adminq_cmd.h" - /* Maximum buffer lengths for all control queue types */ #define ICE_AQ_MAX_BUF_LEN 4096 #define ICE_MBXQ_MAX_BUF_LEN 4096 diff --git a/drivers/net/ice/base/ice_devids.h b/drivers/net/ice/base/ice_devids.h index c9a567fb1..0ff3b9b34 100644 --- a/drivers/net/ice/base/ice_devids.h +++ b/drivers/net/ice/base/ice_devids.h @@ -5,7 +5,6 @@ #ifndef _ICE_DEVIDS_H_ #define _ICE_DEVIDS_H_ - /* Device IDs */ /* Intel(R) Ethernet Controller E810-C for backplane */ #define ICE_DEV_ID_E810C_BACKPLANE 0x1591 diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 4ad816874..05cd39b17 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -808,7 +808,6 @@ ice_aq_download_pkg(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf, return status; } - /** * ice_aq_update_pkg * @hw: pointer to the hardware structure @@ -1180,7 +1179,6 @@ static enum ice_status ice_get_pkg_info(struct ice_hw *hw) return status; } - /** * ice_verify_pkg - verify package * @pkg: pointer to the package buffer @@ -2084,7 +2082,6 @@ ice_find_prot_off(struct ice_hw *hw, enum ice_block blk, u8 prof, u8 fv_idx, /* PTG Management */ - /** * ice_ptg_find_ptype - Search for packet type group using packet type (ptype) * @hw: pointer to the hardware structure @@ -2121,7 +2118,6 @@ void ice_ptg_alloc_val(struct ice_hw *hw, enum ice_block blk, u8 ptg) hw->blk[blk].xlt1.ptg_tbl[ptg].in_use = true; } - /** * ice_ptg_remove_ptype - Removes ptype from a particular packet type group * @hw: pointer to the hardware structure @@ -2315,7 +2311,6 @@ ice_match_prop_lst(struct LIST_HEAD_TYPE *list1, struct LIST_HEAD_TYPE *list2) /* VSIG Management */ - /** * ice_vsig_find_vsi - find a VSIG that contains a specified VSI * @hw: pointer to the hardware structure diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h index 3b5c1c39a..137eaa7f8 100644 --- a/drivers/net/ice/base/ice_flex_pipe.h +++ b/drivers/net/ice/base/ice_flex_pipe.h @@ -46,7 +46,6 @@ bool ice_tunnel_port_in_use(struct ice_hw *hw, u16 port, u16 *index); bool ice_tunnel_get_type(struct ice_hw *hw, u16 port, enum ice_tunnel_type *type); - /* XLT2/VSI group functions */ enum ice_status ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig); diff --git a/drivers/net/ice/base/ice_hw_autogen.h b/drivers/net/ice/base/ice_hw_autogen.h index 6f227adb8..92d432044 100644 --- a/drivers/net/ice/base/ice_hw_autogen.h +++ b/drivers/net/ice/base/ice_hw_autogen.h @@ -6,8 +6,6 @@ #ifndef _ICE_HW_AUTOGEN_H_ #define _ICE_HW_AUTOGEN_H_ - - #define GL_RDPU_CNTRL 0x00052054 /* Reset Source: CORER */ #define GL_RDPU_CNTRL_RX_PAD_EN_S 0 #define GL_RDPU_CNTRL_RX_PAD_EN_M BIT(0) diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h index e77d4bf50..a97c63cc9 100644 --- a/drivers/net/ice/base/ice_lan_tx_rx.h +++ b/drivers/net/ice/base/ice_lan_tx_rx.h @@ -173,7 +173,6 @@ struct ice_fltr_desc { (0xFFFFFFFFULL << ICE_FXD_FLTR_QW1_FDID_S) #define ICE_FXD_FLTR_QW1_FDID_ZERO 0x0ULL - enum ice_rx_desc_status_bits { /* Note: These are predefined bit offsets */ ICE_RX_DESC_STATUS_DD_S = 0, @@ -204,7 +203,6 @@ enum ice_rx_desc_status_bits { #define ICE_RXD_QW1_STATUS_TSYNVALID_S ICE_RX_DESC_STATUS_TSYNVALID_S #define ICE_RXD_QW1_STATUS_TSYNVALID_M BIT_ULL(ICE_RXD_QW1_STATUS_TSYNVALID_S) - enum ice_rx_desc_fltstat_values { ICE_RX_DESC_FLTSTAT_NO_DATA = 0, ICE_RX_DESC_FLTSTAT_RSV_FD_ID = 1, /* 16byte desc? FD_ID : RSV */ @@ -212,7 +210,6 @@ enum ice_rx_desc_fltstat_values { ICE_RX_DESC_FLTSTAT_RSS_HASH = 3, }; - #define ICE_RXD_QW1_ERROR_S 19 #define ICE_RXD_QW1_ERROR_M (0xFFUL << ICE_RXD_QW1_ERROR_S) @@ -310,7 +307,6 @@ enum ice_rx_ptype_payload_layer { ICE_RX_PTYPE_PAYLOAD_LAYER_PAY4 = 3, }; - #define ICE_RXD_QW1_LEN_PBUF_S 38 #define ICE_RXD_QW1_LEN_PBUF_M (0x3FFFULL << ICE_RXD_QW1_LEN_PBUF_S) @@ -320,7 +316,6 @@ enum ice_rx_ptype_payload_layer { #define ICE_RXD_QW1_LEN_SPH_S 63 #define ICE_RXD_QW1_LEN_SPH_M BIT_ULL(ICE_RXD_QW1_LEN_SPH_S) - enum ice_rx_desc_ext_status_bits { /* Note: These are predefined bit offsets */ ICE_RX_DESC_EXT_STATUS_L2TAG2P_S = 0, @@ -331,7 +326,6 @@ enum ice_rx_desc_ext_status_bits { ICE_RX_DESC_EXT_STATUS_PELONGB_S = 11, }; - enum ice_rx_desc_pe_status_bits { /* Note: These are predefined bit offsets */ ICE_RX_DESC_PE_STATUS_QPID_S = 0, /* 18 BITS */ @@ -352,7 +346,6 @@ enum ice_rx_desc_pe_status_bits { #define ICE_RX_PROG_STATUS_DESC_QW1_PROGID_M \ (0x7UL << ICE_RX_PROG_STATUS_DESC_QW1_PROGID_S) - #define ICE_RX_PROG_STATUS_DESC_QW1_ERROR_S 19 #define ICE_RX_PROG_STATUS_DESC_QW1_ERROR_M \ (0x3FUL << ICE_RX_PROG_STATUS_DESC_QW1_ERROR_S) @@ -840,7 +833,6 @@ enum ice_rx_flex_desc_exstat_bits { ICE_RX_FLEX_DESC_EXSTAT_OVERSIZE_S = 3, }; - #define ICE_RXQ_CTX_SIZE_DWORDS 8 #define ICE_RXQ_CTX_SZ (ICE_RXQ_CTX_SIZE_DWORDS * sizeof(u32)) #define ICE_TX_CMPLTNQ_CTX_SIZE_DWORDS 22 @@ -1056,7 +1048,6 @@ enum ice_tx_ctx_desc_eipt_offload { #define ICE_TXD_CTX_QW0_L4T_CS_S 23 #define ICE_TXD_CTX_QW0_L4T_CS_M BIT_ULL(ICE_TXD_CTX_QW0_L4T_CS_S) - #define ICE_LAN_TXQ_MAX_QGRPS 127 #define ICE_LAN_TXQ_MAX_QDIS 1023 diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c index 66cfec641..e00942528 100644 --- a/drivers/net/ice/base/ice_nvm.c +++ b/drivers/net/ice/base/ice_nvm.c @@ -4,7 +4,6 @@ #include "ice_common.h" - /** * ice_aq_read_nvm * @hw: pointer to the HW struct @@ -138,7 +137,6 @@ ice_read_sr_word_aq(struct ice_hw *hw, u16 offset, u16 *data) return status; } - /** * ice_read_sr_buf_aq - Reads Shadow RAM buf via AQ * @hw: pointer to the HW structure @@ -354,7 +352,6 @@ enum ice_status ice_init_nvm(struct ice_hw *hw) return ICE_SUCCESS; } - /** * ice_read_sr_buf - Reads Shadow RAM buf and acquire lock if necessary * @hw: pointer to the HW structure @@ -380,7 +377,6 @@ ice_read_sr_buf(struct ice_hw *hw, u16 offset, u16 *words, u16 *data) return status; } - /** * ice_nvm_validate_checksum * @hw: pointer to the HW struct diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h index 91f56f3fa..cdb691523 100644 --- a/drivers/net/ice/base/ice_protocol_type.h +++ b/drivers/net/ice/base/ice_protocol_type.h @@ -114,7 +114,6 @@ enum ice_prot_id { #define ICE_VNI_OFFSET 12 /* offset of VNI from ICE_PROT_UDP_OF */ - #define ICE_MAC_OFOS_HW 1 #define ICE_MAC_IL_HW 4 #define ICE_ETYPE_OL_HW 9 @@ -148,7 +147,6 @@ struct ice_protocol_entry { u8 protocol_id; }; - struct ice_ether_hdr { u8 dst_addr[ETH_ALEN]; u8 src_addr[ETH_ALEN]; diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c index 1cfc3bc20..6732e291a 100644 --- a/drivers/net/ice/base/ice_sched.c +++ b/drivers/net/ice/base/ice_sched.c @@ -4,7 +4,6 @@ #include "ice_sched.h" - /** * ice_sched_add_root_node - Insert the Tx scheduler root node in SW DB * @pi: port information structure @@ -876,7 +875,6 @@ ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_l2_nodes, return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd); } - /** * ice_sched_add_elems - add nodes to HW and SW DB * @pi: port information structure @@ -1366,7 +1364,6 @@ enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw) goto sched_query_out; } - sched_query_out: ice_free(hw, buf); return status; @@ -2021,7 +2018,6 @@ enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle) return ice_sched_rm_vsi_cfg(pi, vsi_handle, ICE_SCHED_NODE_OWNER_LAN); } - /** * ice_sched_is_tree_balanced - Check tree nodes are identical or not * @hw: pointer to the HW struct diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 2437faead..00358e4db 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -6,7 +6,6 @@ #include "ice_flex_type.h" #include "ice_flow.h" - #define ICE_ETH_DA_OFFSET 0 #define ICE_ETH_ETHTYPE_OFFSET 12 #define ICE_ETH_VLAN_TCI_OFFSET 14 @@ -743,7 +742,6 @@ ice_aq_get_sw_cfg(struct ice_hw *hw, struct ice_aqc_get_sw_cfg_resp *buf, return status; } - /** * ice_alloc_sw - allocate resources specific to switch * @hw: pointer to the HW struct @@ -1787,13 +1785,11 @@ enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw) } } while (req_desc && !status); - out: ice_free(hw, (void *)rbuf); return status; } - /** * ice_fill_sw_info - Helper function to populate lb_en and lan_en * @hw: pointer to the hardware structure @@ -3424,7 +3420,6 @@ ice_remove_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list) return ICE_SUCCESS; } - /** * ice_rem_sw_rule_info * @hw: pointer to the hardware structure @@ -3823,7 +3818,6 @@ ice_add_to_vsi_fltr_list(struct ice_hw *hw, u16 vsi_handle, return status; } - /** * ice_determine_promisc_mask * @fi: filter info to parse @@ -4811,8 +4805,6 @@ ice_fill_valid_words(struct ice_adv_lkup_elem *rule, return ret_val; } - - /** * ice_create_first_fit_recp_def - Create a recipe grouping * @hw: pointer to the hardware structure diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h index 515ad3bb6..0f0a1e98e 100644 --- a/drivers/net/ice/base/ice_switch.h +++ b/drivers/net/ice/base/ice_switch.h @@ -15,7 +15,6 @@ #define ICE_FLTR_TX BIT(1) #define ICE_FLTR_TX_RX (ICE_FLTR_RX | ICE_FLTR_TX) - /* Worst case buffer length for ice_aqc_opc_get_res_alloc */ #define ICE_MAX_RES_TYPES 0x80 #define ICE_AQ_GET_RES_ALLOC_BUF_LEN \ @@ -391,7 +390,6 @@ enum ice_status ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info); void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle); - /* Promisc/defport setup for VSIs */ enum ice_status ice_cfg_dflt_vsi(struct ice_port_info *pi, u16 vsi_handle, bool set, diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index deb614e37..150b4c5c5 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -134,10 +134,6 @@ static inline u32 ice_round_to_num(u32 N, u32 R) #define __ALWAYS_UNUSED #endif - - - - #define IS_ETHER_ADDR_EQUAL(addr1, addr2) \ (((bool)((((u16 *)(addr1))[0] == ((u16 *)(addr2))[0]))) && \ ((bool)((((u16 *)(addr1))[1] == ((u16 *)(addr2))[1]))) && \ @@ -384,7 +380,6 @@ struct ice_hw_common_caps { u8 proxy_support; }; - /* Function specific capabilities */ struct ice_hw_func_caps { struct ice_hw_common_caps common_cap; @@ -401,7 +396,6 @@ struct ice_hw_dev_caps { u32 num_funcs; }; - /* Information about MAC such as address, etc... */ struct ice_mac_info { u8 lan_addr[ETH_ALEN]; @@ -567,7 +561,6 @@ enum ice_rl_type { #define ICE_TXSCHED_GET_RL_WAKEUP_MV(p) LE16_TO_CPU((p)->info.wake_up_calc) #define ICE_TXSCHED_GET_RL_ENCODE(p) LE16_TO_CPU((p)->info.rl_encode) - /* The following tree example shows the naming conventions followed under * ice_port_info struct for default scheduler tree topology. * @@ -729,7 +722,6 @@ struct ice_switch_info { struct ice_sw_recipe *recp_list; }; - /* Port hardware description */ struct ice_hw { u8 *hw_addr; @@ -787,7 +779,6 @@ struct ice_hw { u8 fw_patch; /* firmware patch version */ u32 fw_build; /* firmware build number */ - /* Device max aggregate bandwidths corresponding to the GL_PWR_MODE_CTL * register. Used for determining the ITR/INTRL granularity during * initialization. -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 02/22] net/ice/base: add support for tunnel packets 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 00/22] " Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 01/22] net/ice/base: remove redundant empty lines Qi Zhang @ 2019-09-07 3:16 ` Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 03/22] net/ice/base: add non-word aligned ip field support Qi Zhang ` (19 subsequent siblings) 21 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-07 3:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Henry Tieman, Paul M Stillwell Jr Add VXLAN tunnel training packets to flow director and change the interface to support tunnel packets. Signed-off-by: Henry Tieman <henry.w.tieman@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 266 ++++++++++++++++++++++++++++++++-------- drivers/net/ice/base/ice_fdir.h | 8 +- drivers/net/ice/base/ice_type.h | 10 +- 3 files changed, 228 insertions(+), 56 deletions(-) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index 9ef91b3b8..b92603e10 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -5,7 +5,7 @@ #include "ice_common.h" #include "ice_fdir.h" -/* These are dummy packet headers used to program flow director filters. */ +/* These are training packet headers used to program flow director filters. */ static const u8 ice_fdir_tcpv4_pkt[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, @@ -88,47 +88,177 @@ static const u8 ice_fdir_ipv6_pkt[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, }; -/* Flow Director dummy packet table */ +static const u8 ice_fdir_tcp4_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x5a, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + 0x45, 0x00, 0x00, 0x28, 0x00, 0x00, 0x40, 0x00, + 0x40, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x50, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_udp4_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x4e, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + 0x45, 0x00, 0x00, 0x1c, 0x00, 0x00, 0x40, 0x00, + 0x40, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_sctp4_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x52, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + 0x45, 0x00, 0x00, 0x20, 0x00, 0x01, 0x00, 0x00, + 0x40, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_ip4_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x46, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + 0x45, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x00, + 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_tcp6_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x6e, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, + 0x60, 0x00, 0x00, 0x00, 0x00, 0x14, 0x06, 0x40, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x50, 0x00, 0x20, 0x00, + 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_udp6_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x62, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, + 0x60, 0x00, 0x00, 0x00, 0x00, 0x08, 0x11, 0x40, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_sctp6_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x66, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, + 0x60, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x84, 0x40, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_ip6_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x5a, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, + 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3b, 0x40, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + +/* Flow Director no-op training packet table */ static const struct ice_fdir_base_pkt ice_fdir_pkt[] = { { ICE_FLTR_PTYPE_NONF_IPV4_TCP, - sizeof(ice_fdir_tcpv4_pkt), - ice_fdir_tcpv4_pkt, + sizeof(ice_fdir_tcpv4_pkt), ice_fdir_tcpv4_pkt, + sizeof(ice_fdir_tcp4_tun_pkt), ice_fdir_tcp4_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV4_UDP, - sizeof(ice_fdir_udpv4_pkt), - ice_fdir_udpv4_pkt, + sizeof(ice_fdir_udpv4_pkt), ice_fdir_udpv4_pkt, + sizeof(ice_fdir_udp4_tun_pkt), ice_fdir_udp4_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV4_SCTP, - sizeof(ice_fdir_sctpv4_pkt), - ice_fdir_sctpv4_pkt, + sizeof(ice_fdir_sctpv4_pkt), ice_fdir_sctpv4_pkt, + sizeof(ice_fdir_sctp4_tun_pkt), ice_fdir_sctp4_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV4_OTHER, - sizeof(ice_fdir_ipv4_pkt), - ice_fdir_ipv4_pkt, + sizeof(ice_fdir_ipv4_pkt), ice_fdir_ipv4_pkt, + sizeof(ice_fdir_ip4_tun_pkt), ice_fdir_ip4_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV6_TCP, - sizeof(ice_fdir_tcpv6_pkt), - ice_fdir_tcpv6_pkt, + sizeof(ice_fdir_tcpv6_pkt), ice_fdir_tcpv6_pkt, + sizeof(ice_fdir_tcp6_tun_pkt), ice_fdir_tcp6_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV6_UDP, - sizeof(ice_fdir_udpv6_pkt), - ice_fdir_udpv6_pkt, + sizeof(ice_fdir_udpv6_pkt), ice_fdir_udpv6_pkt, + sizeof(ice_fdir_udp6_tun_pkt), ice_fdir_udp6_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV6_SCTP, - sizeof(ice_fdir_sctpv6_pkt), - ice_fdir_sctpv6_pkt, + sizeof(ice_fdir_sctpv6_pkt), ice_fdir_sctpv6_pkt, + sizeof(ice_fdir_sctp6_tun_pkt), ice_fdir_sctp6_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV6_OTHER, - sizeof(ice_fdir_ipv6_pkt), - ice_fdir_ipv6_pkt, + sizeof(ice_fdir_ipv6_pkt), ice_fdir_ipv6_pkt, + sizeof(ice_fdir_ip6_tun_pkt), ice_fdir_ip6_tun_pkt, }, }; @@ -377,15 +507,20 @@ static void ice_pkt_insert_u32(u8 *pkt, int offset, __be32 data) } /** - * ice_fdir_get_prgm_pkt - generate a dummy packet + * ice_fdir_get_gen_prgm_pkt - generate a training packet + * @hw: pointer to the hardware structure * @input: flow director filter data structure * @pkt: pointer to return filter packet * @frag: generate a fragment packet + * @tun: true implies generate a tunnel packet */ enum ice_status -ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag) +ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, + u8 *pkt, bool frag, bool tun) { enum ice_fltr_ptype flow; + u16 tnl_port; + u8 *loc; u16 idx; if (input->flow_type == ICE_FLTR_PTYPE_NONF_IPV4_OTHER) { @@ -431,83 +566,96 @@ ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag) break; if (idx == ICE_FDIR_NUM_PKT) return ICE_ERR_PARAM; - ice_memcpy(pkt, ice_fdir_pkt[idx].pkt, ice_fdir_pkt[idx].pkt_len, - ICE_NONDMA_TO_NONDMA); + if (!tun) { + ice_memcpy(pkt, ice_fdir_pkt[idx].pkt, + ice_fdir_pkt[idx].pkt_len, ICE_NONDMA_TO_NONDMA); + loc = pkt; + } else { + if (!ice_get_open_tunnel_port(hw, TNL_ALL, &tnl_port)) + return ICE_ERR_DOES_NOT_EXIST; + if (!ice_fdir_pkt[idx].tun_pkt) + return ICE_ERR_PARAM; + ice_memcpy(pkt, ice_fdir_pkt[idx].tun_pkt, + ice_fdir_pkt[idx].tun_pkt_len, ICE_NONDMA_TO_NONDMA); + ice_pkt_insert_u16(pkt, ICE_IPV4_UDP_DST_PORT_OFFSET, + HTONS(tnl_port)); + loc = &pkt[ICE_FDIR_TUN_PKT_OFF]; + } switch (flow) { case ICE_FLTR_PTYPE_NONF_IPV4_TCP: - ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, input->ip.v4.dst_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_TCP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_TCP_DST_PORT_OFFSET, input->ip.v4.dst_port); - ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET, input->ip.v4.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_TCP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_TCP_SRC_PORT_OFFSET, input->ip.v4.src_port); if (frag) - pkt[20] = ICE_FDIR_IPV4_PKT_FLAG_DF; + loc[20] = ICE_FDIR_IPV4_PKT_FLAG_DF; break; case ICE_FLTR_PTYPE_NONF_IPV4_UDP: - ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, input->ip.v4.dst_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_UDP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_UDP_DST_PORT_OFFSET, input->ip.v4.dst_port); - ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET, input->ip.v4.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_UDP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_UDP_SRC_PORT_OFFSET, input->ip.v4.src_port); break; case ICE_FLTR_PTYPE_NONF_IPV4_SCTP: - ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, input->ip.v4.dst_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_SCTP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_SCTP_DST_PORT_OFFSET, input->ip.v4.dst_port); - ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET, input->ip.v4.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_SCTP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_SCTP_SRC_PORT_OFFSET, input->ip.v4.src_port); break; case ICE_FLTR_PTYPE_NONF_IPV4_OTHER: - ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, input->ip.v4.dst_ip); - ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET, input->ip.v4.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_PROTO_OFFSET, 0); + ice_pkt_insert_u16(loc, ICE_IPV4_PROTO_OFFSET, 0); break; case ICE_FLTR_PTYPE_NONF_IPV6_TCP: - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, input->ip.v6.dst_ip); - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET, input->ip.v6.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV6_TCP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_TCP_DST_PORT_OFFSET, input->ip.v6.dst_port); - ice_pkt_insert_u16(pkt, ICE_IPV6_TCP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_TCP_SRC_PORT_OFFSET, input->ip.v6.src_port); break; case ICE_FLTR_PTYPE_NONF_IPV6_UDP: - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, input->ip.v6.dst_ip); - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET, input->ip.v6.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV6_UDP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_UDP_DST_PORT_OFFSET, input->ip.v6.dst_port); - ice_pkt_insert_u16(pkt, ICE_IPV6_UDP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_UDP_SRC_PORT_OFFSET, input->ip.v6.src_port); break; case ICE_FLTR_PTYPE_NONF_IPV6_SCTP: - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, input->ip.v6.dst_ip); - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET, input->ip.v6.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV6_SCTP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_SCTP_DST_PORT_OFFSET, input->ip.v6.dst_port); - ice_pkt_insert_u16(pkt, ICE_IPV6_SCTP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_SCTP_SRC_PORT_OFFSET, input->ip.v6.src_port); break; case ICE_FLTR_PTYPE_NONF_IPV6_OTHER: - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, input->ip.v6.dst_ip); - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET, input->ip.v6.src_ip); break; default: @@ -515,12 +663,24 @@ ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag) } if (input->flex_fltr) - ice_pkt_insert_u16(pkt, input->flex_offset, input->flex_word); + ice_pkt_insert_u16(loc, input->flex_offset, input->flex_word); return ICE_SUCCESS; } /** + * ice_fdir_get_prgm_pkt - generate a training packet + * @input: flow director filter data structure + * @pkt: pointer to return filter packet + * @frag: generate a fragment packet + */ +enum ice_status +ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag) +{ + return ice_fdir_get_gen_prgm_pkt(NULL, input, pkt, frag, false); +} + +/** * ice_fdir_has_frag - does flow type have 2 ptypes * @flow: flow ptype * diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index 8490fac61..9e7e22033 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -58,7 +58,8 @@ enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw); #define ICE_IP_PROTO_IP 0 #define ICE_IP_PROTO_ESP 50 -#define ICE_FDIR_MAX_RAW_PKT_SIZE 512 +#define ICE_FDIR_TUN_PKT_OFF 50 +#define ICE_FDIR_MAX_RAW_PKT_SIZE (512 + ICE_FDIR_TUN_PKT_OFF) #define ICE_FDIR_BUF_FULL_MARGIN 10 #define ICE_FDIR_BUF_HEAD_ROOM 32 @@ -175,12 +176,17 @@ struct ice_fdir_base_pkt { enum ice_fltr_ptype flow; u16 pkt_len; const u8 *pkt; + u16 tun_pkt_len; + const u8 *tun_pkt; }; void ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input, struct ice_fltr_desc *fdesc, bool add); enum ice_status +ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, + u8 *pkt, bool frag, bool tun); +enum ice_status ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag); enum ice_status ice_add_del_fdir(struct ice_hw *hw, struct ice_fdir_fltr *input, bool add); diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index 150b4c5c5..7d0a4f63f 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -296,13 +296,19 @@ enum ice_fltr_ptype { ICE_FLTR_PTYPE_MAX, }; +enum ice_fd_hw_seg { + ICE_FD_HW_SEG_NON_TUN = 0, + ICE_FD_HW_SEG_TUN, + ICE_FD_HW_SEG_MAX, +}; + /* 2 VSI = 1 ICE_VSI_PF + 1 ICE_VSI_CTRL */ #define ICE_MAX_FDIR_VSI_PER_FILTER 2 struct ice_fd_hw_prof { - struct ice_flow_seg_info *fdir_seg; + struct ice_flow_seg_info *fdir_seg[ICE_FD_HW_SEG_MAX]; int cnt; - u64 entry_h[ICE_MAX_FDIR_VSI_PER_FILTER]; + u64 entry_h[ICE_MAX_FDIR_VSI_PER_FILTER][ICE_FD_HW_SEG_MAX]; u16 vsi_h[ICE_MAX_FDIR_VSI_PER_FILTER]; }; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 03/22] net/ice/base: add non-word aligned ip field support 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 00/22] " Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 01/22] net/ice/base: remove redundant empty lines Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 02/22] net/ice/base: add support for tunnel packets Qi Zhang @ 2019-09-07 3:16 ` Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 04/22] net/ice/base: add non-word aligned ipv6 " Qi Zhang ` (18 subsequent siblings) 21 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-07 3:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Add non-word aligned field support for ipv4 with ttl, tos and proto. All these fields are one byte within one word. In order to match bytes within the IPv4 header for flow director we need to use a mask. Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 30 +++++++++++++++++++++++------- drivers/net/ice/base/ice_fdir.h | 4 ++++ 2 files changed, 27 insertions(+), 7 deletions(-) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index b92603e10..db5bbc6ad 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -485,6 +485,17 @@ static void ice_pkt_insert_ipv6_addr(u8 *pkt, int offset, __be32 *addr) } /** + * ice_pkt_insert_u8 - insert a u8 value into a memory buffer. + * @pkt: packet buffer + * @offset: offset into buffer + * @data: 8 bit value to convert and insert into pkt at offset + */ +static void ice_pkt_insert_u8(u8 *pkt, int offset, u8 data) +{ + ice_memcpy(pkt + offset, &data, sizeof(data), ICE_NONDMA_TO_NONDMA); +} + +/** * ice_pkt_insert_u16 - insert a be16 value into a memory buffer. * @pkt: packet buffer * @offset: offset into buffer @@ -534,11 +545,9 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, case ICE_IP_PROTO_SCTP: flow = ICE_FLTR_PTYPE_NONF_IPV4_SCTP; break; - case ICE_IP_PROTO_IP: + default: flow = ICE_FLTR_PTYPE_NONF_IPV4_OTHER; break; - default: - return ICE_ERR_PARAM; } } else if (input->flow_type == ICE_FLTR_PTYPE_NONF_IPV6_OTHER) { switch (input->ip.v6.proto) { @@ -551,11 +560,9 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, case ICE_IP_PROTO_SCTP: flow = ICE_FLTR_PTYPE_NONF_IPV6_SCTP; break; - case ICE_IP_PROTO_IP: + default: flow = ICE_FLTR_PTYPE_NONF_IPV6_OTHER; break; - default: - return ICE_ERR_PARAM; } } else { flow = input->flow_type; @@ -592,6 +599,8 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.src_ip); ice_pkt_insert_u16(loc, ICE_IPV4_TCP_SRC_PORT_OFFSET, input->ip.v4.src_port); + ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); + ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); if (frag) loc[20] = ICE_FDIR_IPV4_PKT_FLAG_DF; break; @@ -604,6 +613,8 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.src_ip); ice_pkt_insert_u16(loc, ICE_IPV4_UDP_SRC_PORT_OFFSET, input->ip.v4.src_port); + ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); + ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); break; case ICE_FLTR_PTYPE_NONF_IPV4_SCTP: ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, @@ -614,13 +625,18 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.src_ip); ice_pkt_insert_u16(loc, ICE_IPV4_SCTP_SRC_PORT_OFFSET, input->ip.v4.src_port); + ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); + ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); break; case ICE_FLTR_PTYPE_NONF_IPV4_OTHER: ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, input->ip.v4.dst_ip); ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET, input->ip.v4.src_ip); - ice_pkt_insert_u16(loc, ICE_IPV4_PROTO_OFFSET, 0); + ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); + ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); + ice_pkt_insert_u8(loc, ICE_IPV4_PROTO_OFFSET, + input->ip.v4.proto); break; case ICE_FLTR_PTYPE_NONF_IPV6_TCP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index 9e7e22033..e817057c8 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -82,6 +82,9 @@ enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw); #define ICE_IPV6_SCTP_SRC_PORT_OFFSET 54 #define ICE_IPV6_SCTP_DST_PORT_OFFSET 56 +#define ICE_IPV4_TOS_OFFSET 15 +#define ICE_IPV4_TTL_OFFSET 22 + #define ICE_FDIR_MAX_FLTRS 16384 /* IP v4 has 2 flag bits that enable fragment processing: DF and MF. DF @@ -123,6 +126,7 @@ struct ice_fdir_v4 { u8 tos; u8 ip_ver; u8 proto; + u8 ttl; }; #define ICE_IPV6_ADDR_LEN_AS_U32 4 -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 04/22] net/ice/base: add non-word aligned ipv6 field support 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 00/22] " Qi Zhang ` (2 preceding siblings ...) 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 03/22] net/ice/base: add non-word aligned ip field support Qi Zhang @ 2019-09-07 3:16 ` Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 05/22] net/ice/base: correct the mask for checking protocol header Qi Zhang ` (17 subsequent siblings) 21 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-07 3:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Add non-word aligned field support for IPv6 with hlim, tc and proto. All these fields are one byte within one word. In order to match bytes within the IPv6 header for flow director we need to use a mask. Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 32 ++++++++++++++++++++++++++++++++ drivers/net/ice/base/ice_fdir.h | 4 ++++ 2 files changed, 36 insertions(+) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index db5bbc6ad..e35506006 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -496,6 +496,28 @@ static void ice_pkt_insert_u8(u8 *pkt, int offset, u8 data) } /** + * ice_pkt_insert_u8_tc - insert a u8 value into a memory buffer for tc ipv6. + * @pkt: packet buffer + * @offset: offset into buffer + * @data: 8 bit value to convert and insert into pkt at offset + * + * This function is designed for inserting Traffic Class (tc) for IPv6, + * since that tc is not aligned in number of bytes. Here we split it out + * into two part and fill each byte with data copy from pkt, then insert + * the two bytes data one by one. + */ +static void ice_pkt_insert_u8_tc(u8 *pkt, int offset, u8 data) +{ + u8 high, low; + + high = (data >> 4) + (*(pkt + offset) & 0xF0); + ice_memcpy(pkt + offset, &high, sizeof(high), ICE_NONDMA_TO_NONDMA); + + low = (*(pkt + offset + 1) & 0x0F) + ((data & 0x0F) << 4); + ice_memcpy(pkt + offset + 1, &low, sizeof(low), ICE_NONDMA_TO_NONDMA); +} + +/** * ice_pkt_insert_u16 - insert a be16 value into a memory buffer. * @pkt: packet buffer * @offset: offset into buffer @@ -647,6 +669,8 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v6.dst_port); ice_pkt_insert_u16(loc, ICE_IPV6_TCP_SRC_PORT_OFFSET, input->ip.v6.src_port); + ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); + ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); break; case ICE_FLTR_PTYPE_NONF_IPV6_UDP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, @@ -657,6 +681,8 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v6.dst_port); ice_pkt_insert_u16(loc, ICE_IPV6_UDP_SRC_PORT_OFFSET, input->ip.v6.src_port); + ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); + ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); break; case ICE_FLTR_PTYPE_NONF_IPV6_SCTP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, @@ -667,12 +693,18 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v6.dst_port); ice_pkt_insert_u16(loc, ICE_IPV6_SCTP_SRC_PORT_OFFSET, input->ip.v6.src_port); + ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); + ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); break; case ICE_FLTR_PTYPE_NONF_IPV6_OTHER: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, input->ip.v6.dst_ip); ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET, input->ip.v6.src_ip); + ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); + ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); + ice_pkt_insert_u8(loc, ICE_IPV6_PROTO_OFFSET, + input->ip.v6.proto); break; default: return ICE_ERR_PARAM; diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index e817057c8..e0f3cd481 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -84,6 +84,9 @@ enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw); #define ICE_IPV4_TOS_OFFSET 15 #define ICE_IPV4_TTL_OFFSET 22 +#define ICE_IPV6_TC_OFFSET 14 +#define ICE_IPV6_HLIM_OFFSET 21 +#define ICE_IPV6_PROTO_OFFSET 20 #define ICE_FDIR_MAX_FLTRS 16384 @@ -140,6 +143,7 @@ struct ice_fdir_v6 { __be32 sec_parm_idx; /* security parameter index */ u8 tc; u8 proto; + u8 hlim; }; struct ice_fdir_extra { -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 05/22] net/ice/base: correct the mask for checking protocol header 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 00/22] " Qi Zhang ` (3 preceding siblings ...) 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 04/22] net/ice/base: add non-word aligned ipv6 " Qi Zhang @ 2019-09-07 3:16 ` Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 06/22] net/ice/base: propagate errors from functions Qi Zhang ` (16 subsequent siblings) 21 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-07 3:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Zhirun Yan, Paul M Stillwell Jr Before this patch, the logic of protocol header checking only support non-tunneled packet. This patch remove the inner protocol in L3/L4 RSS seg hdr mask and change the protocol header validation to reflect this. So, for ice_add_rss_cfg(), the last parameter addl_hdrs could specify the protocol header for tunnel. Signed-off-by: Zhirun Yan <zhirun.yan@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 769fd2da7..682f26ce6 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -372,15 +372,18 @@ struct ice_flow_prof_params { ice_declare_bitmap(ptypes, ICE_FLOW_PTYPE_MAX); }; +#define ICE_FLOW_RSS_HDRS_INNER_MASK \ + (ICE_FLOW_SEG_HDR_PPPOE | ICE_FLOW_SEG_HDR_GTPC | \ + ICE_FLOW_SEG_HDR_GTPC_TEID | ICE_FLOW_SEG_HDR_GTPU) + #define ICE_FLOW_SEG_HDRS_L2_MASK \ (ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_VLAN) #define ICE_FLOW_SEG_HDRS_L3_MASK \ (ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV6 | \ - ICE_FLOW_SEG_HDR_ARP | ICE_FLOW_SEG_HDR_PPPOE) + ICE_FLOW_SEG_HDR_ARP) #define ICE_FLOW_SEG_HDRS_L4_MASK \ (ICE_FLOW_SEG_HDR_ICMP | ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_UDP | \ - ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_GTPC | \ - ICE_FLOW_SEG_HDR_GTPC_TEID | ICE_FLOW_SEG_HDR_GTPU) + ICE_FLOW_SEG_HDR_SCTP) /** * ice_flow_val_hdrs - validates packet segments for valid protocol headers @@ -1686,13 +1689,11 @@ ice_flow_add_fld_raw(struct ice_flow_seg_info *seg, u16 off, u8 len, (ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_VLAN) #define ICE_FLOW_RSS_SEG_HDR_L3_MASKS \ - (ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_PPPOE) + (ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV6) #define ICE_FLOW_RSS_SEG_HDR_L4_MASKS \ (ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_UDP | \ - ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_GTPC_TEID | \ - ICE_FLOW_SEG_HDR_GTPU) - + ICE_FLOW_SEG_HDR_SCTP) #define ICE_FLOW_RSS_SEG_HDR_VAL_MASKS \ (ICE_FLOW_RSS_SEG_HDR_L2_MASKS | \ @@ -1729,11 +1730,12 @@ ice_flow_set_rss_seg_info(struct ice_flow_seg_info *segs, u64 hash_fields, } ICE_FLOW_SET_HDRS(segs, flow_hdr); - if (segs->hdrs & ~ICE_FLOW_RSS_SEG_HDR_VAL_MASKS) + if (segs->hdrs & ~ICE_FLOW_RSS_SEG_HDR_VAL_MASKS & + ~ICE_FLOW_RSS_HDRS_INNER_MASK) return ICE_ERR_PARAM; val = (u64)(segs->hdrs & ICE_FLOW_RSS_SEG_HDR_L3_MASKS); - if (!ice_is_pow2(val)) + if (val && !ice_is_pow2(val)) return ICE_ERR_CFG; val = (u64)(segs->hdrs & ICE_FLOW_RSS_SEG_HDR_L4_MASKS); -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 06/22] net/ice/base: propagate errors from functions 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 00/22] " Qi Zhang ` (4 preceding siblings ...) 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 05/22] net/ice/base: correct the mask for checking protocol header Qi Zhang @ 2019-09-07 3:16 ` Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 07/22] net/ice/base: remove pointless NULL check of port info Qi Zhang ` (15 subsequent siblings) 21 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-07 3:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr There could be an error returned from ice_fill_adv_dummy_packet() so we need to propagate that to the caller. Additionally, the call to ice_flow_xtract_pkt_flags() could also return an error so we need to propagate it as well. Also add in the correct offsets for GENEVE and VXLAN_GPE to the dummy packets. Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 9 ++++++--- drivers/net/ice/base/ice_switch.c | 8 ++++++-- 2 files changed, 12 insertions(+), 5 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 682f26ce6..7dae53270 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -869,9 +869,12 @@ ice_flow_create_xtrct_seq(struct ice_hw *hw, /* For ACL, we also need to extract the direction bit (Rx,Tx) data from * packet flags */ - if (params->blk == ICE_BLK_ACL) - ice_flow_xtract_pkt_flags(hw, params, - ICE_RX_MDID_PKT_FLAGS_15_0); + if (params->blk == ICE_BLK_ACL) { + status = ice_flow_xtract_pkt_flags(hw, params, + ICE_RX_MDID_PKT_FLAGS_15_0); + if (status) + return status; + } for (i = 0; i < params->prof->segs_cnt; i++) { u64 match = params->prof->segs[i].match; diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 00358e4db..fa023169d 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -156,6 +156,7 @@ struct ice_dummy_pkt_offsets dummy_udp_tun_tcp_packet_offsets[] = { { ICE_UDP_OF, 34 }, { ICE_VXLAN, 42 }, { ICE_GENEVE, 42 }, + { ICE_VXLAN_GPE, 42 }, { ICE_MAC_IL, 50 }, { ICE_IPV4_IL, 64 }, { ICE_TCP_IL, 84 }, @@ -208,6 +209,7 @@ struct ice_dummy_pkt_offsets dummy_udp_tun_udp_packet_offsets[] = { { ICE_UDP_OF, 34 }, { ICE_VXLAN, 42 }, { ICE_GENEVE, 42 }, + { ICE_VXLAN_GPE, 42 }, { ICE_MAC_IL, 50 }, { ICE_IPV4_IL, 64 }, { ICE_UDP_ILOS, 84 }, @@ -6189,8 +6191,10 @@ ice_add_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, s_rule->pdata.lkup_tx_rx.recipe_id = CPU_TO_LE16(rid); s_rule->pdata.lkup_tx_rx.act = CPU_TO_LE32(act); - ice_fill_adv_dummy_packet(lkups, lkups_cnt, s_rule, pkt, pkt_len, - pkt_offsets); + status = ice_fill_adv_dummy_packet(lkups, lkups_cnt, s_rule, pkt, + pkt_len, pkt_offsets); + if (status) + goto err_ice_add_adv_rule; if (rinfo->tun_type != ICE_NON_TUN) { status = ice_fill_adv_packet_tun(hw, rinfo->tun_type, -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 07/22] net/ice/base: remove pointless NULL check of port info 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 00/22] " Qi Zhang ` (5 preceding siblings ...) 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 06/22] net/ice/base: propagate errors from functions Qi Zhang @ 2019-09-07 3:16 ` Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 08/22] net/ice/base: remove RSS code as iavf host Qi Zhang ` (14 subsequent siblings) 21 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-07 3:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Jacob Keller, Paul M Stillwell Jr The code in ice_sched_cleanup_all checks whether the port info is NULL prior to calling ice_sched_clear_port. More importantly, it also checks whether the port structure has been initialized by checking its port_state field as well. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_sched.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c index 6732e291a..553fc28ff 100644 --- a/drivers/net/ice/base/ice_sched.c +++ b/drivers/net/ice/base/ice_sched.c @@ -840,8 +840,7 @@ void ice_sched_cleanup_all(struct ice_hw *hw) hw->layer_info = NULL; } - if (hw->port_info) - ice_sched_clear_port(hw->port_info); + ice_sched_clear_port(hw->port_info); hw->num_tx_sched_layers = 0; hw->num_tx_sched_phys_layers = 0; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 08/22] net/ice/base: remove RSS code as iavf host 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 00/22] " Qi Zhang ` (6 preceding siblings ...) 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 07/22] net/ice/base: remove pointless NULL check of port info Qi Zhang @ 2019-09-07 3:16 ` Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 09/22] net/ice/base: add support for switch rule about VLAN PPPoE Qi Zhang ` (13 subsequent siblings) 21 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-07 3:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr The DPDK PF doesn't support SRIOV so remove the related iavf host code. Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 128 ---------------------------------------- 1 file changed, 128 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 7dae53270..5d1b12d43 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -2128,134 +2128,6 @@ ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, return status; } -/* Mapping of AVF hash bit fields to an L3-L4 hash combination. - * As the ice_flow_avf_hdr_field represent individual bit shifts in a hash, - * convert its values to their appropriate flow L3, L4 values. - */ -#define ICE_FLOW_AVF_RSS_IPV4_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_OTHER) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV4)) -#define ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP)) -#define ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_UDP)) -#define ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS \ - (ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS | ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS | \ - ICE_FLOW_AVF_RSS_IPV4_MASKS | BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP)) - -#define ICE_FLOW_AVF_RSS_IPV6_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_OTHER) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV6)) -#define ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_UDP)) -#define ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP)) -#define ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS \ - (ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS | ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS | \ - ICE_FLOW_AVF_RSS_IPV6_MASKS | BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP)) - -#define ICE_FLOW_MAX_CFG 10 - -/** - * ice_add_avf_rss_cfg - add an RSS configuration for AVF driver - * @hw: pointer to the hardware structure - * @vsi_handle: software VSI handle - * @avf_hash: hash bit fields (ICE_AVF_FLOW_FIELD_*) to configure - * - * This function will take the hash bitmap provided by the AVF driver via a - * message, convert it to ICE-compatible values, and configure RSS flow - * profiles. - */ -enum ice_status -ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 avf_hash) -{ - enum ice_status status = ICE_SUCCESS; - u64 hash_flds; - - if (avf_hash == ICE_AVF_FLOW_FIELD_INVALID || - !ice_is_vsi_valid(hw, vsi_handle)) - return ICE_ERR_PARAM; - - /* Make sure no unsupported bits are specified */ - if (avf_hash & ~(ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS | - ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS)) - return ICE_ERR_CFG; - - hash_flds = avf_hash; - - /* Always create an L3 RSS configuration for any L4 RSS configuration */ - if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS) - hash_flds |= ICE_FLOW_AVF_RSS_IPV4_MASKS; - - if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS) - hash_flds |= ICE_FLOW_AVF_RSS_IPV6_MASKS; - - /* Create the corresponding RSS configuration for each valid hash bit */ - while (hash_flds) { - u64 rss_hash = ICE_HASH_INVALID; - - if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS) { - if (hash_flds & ICE_FLOW_AVF_RSS_IPV4_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV4; - hash_flds &= ~ICE_FLOW_AVF_RSS_IPV4_MASKS; - } else if (hash_flds & - ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV4 | - ICE_FLOW_HASH_TCP_PORT; - hash_flds &= ~ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS; - } else if (hash_flds & - ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV4 | - ICE_FLOW_HASH_UDP_PORT; - hash_flds &= ~ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS; - } else if (hash_flds & - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP)) { - rss_hash = ICE_FLOW_HASH_IPV4 | - ICE_FLOW_HASH_SCTP_PORT; - hash_flds &= - ~BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP); - } - } else if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS) { - if (hash_flds & ICE_FLOW_AVF_RSS_IPV6_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV6; - hash_flds &= ~ICE_FLOW_AVF_RSS_IPV6_MASKS; - } else if (hash_flds & - ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV6 | - ICE_FLOW_HASH_TCP_PORT; - hash_flds &= ~ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS; - } else if (hash_flds & - ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV6 | - ICE_FLOW_HASH_UDP_PORT; - hash_flds &= ~ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS; - } else if (hash_flds & - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP)) { - rss_hash = ICE_FLOW_HASH_IPV6 | - ICE_FLOW_HASH_SCTP_PORT; - hash_flds &= - ~BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP); - } - } - - if (rss_hash == ICE_HASH_INVALID) - return ICE_ERR_OUT_OF_RANGE; - - status = ice_add_rss_cfg(hw, vsi_handle, rss_hash, - ICE_FLOW_SEG_HDR_NONE); - if (status) - break; - } - - return status; -} - /** * ice_replay_rss_cfg - replay RSS configurations associated with VSI * @hw: pointer to the hardware structure -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 09/22] net/ice/base: add support for switch rule about VLAN PPPoE 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 00/22] " Qi Zhang ` (7 preceding siblings ...) 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 08/22] net/ice/base: remove RSS code as iavf host Qi Zhang @ 2019-09-07 3:16 ` Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 10/22] net/ice/base: minor structure refactor Qi Zhang ` (12 subsequent siblings) 21 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-07 3:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Add support for switch rule about single-VLAN-PPPoE. Note that double VLAN is not supported by the hardware at this point, therefore only single-VLAN support for PPPoE is added. Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_protocol_type.h | 8 ++++++++ drivers/net/ice/base/ice_switch.c | 16 ++++++++++++---- 2 files changed, 20 insertions(+), 4 deletions(-) diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h index cdb691523..c6caa8562 100644 --- a/drivers/net/ice/base/ice_protocol_type.h +++ b/drivers/net/ice/base/ice_protocol_type.h @@ -31,6 +31,7 @@ enum ice_protocol_type { ICE_MAC_OFOS = 0, ICE_MAC_IL, ICE_ETYPE_OL, + ICE_VLAN_OFOS, ICE_IPV4_OFOS, ICE_IPV4_IL, ICE_IPV6_OFOS, @@ -117,6 +118,7 @@ enum ice_prot_id { #define ICE_MAC_OFOS_HW 1 #define ICE_MAC_IL_HW 4 #define ICE_ETYPE_OL_HW 9 +#define ICE_VLAN_OL_HW 16 #define ICE_IPV4_OFOS_HW 32 #define ICE_IPV4_IL_HW 33 #define ICE_IPV6_OFOS_HW 40 @@ -162,6 +164,11 @@ struct ice_ether_vlan_hdr { u32 vlan_id; }; +struct ice_vlan_hdr { + u16 vlan; + u16 type; +}; + struct ice_ipv4_hdr { u8 version; u8 tos; @@ -239,6 +246,7 @@ struct ice_nvgre { union ice_prot_hdr { struct ice_ether_hdr eth_hdr; struct ice_ethtype_hdr ethertype; + struct ice_vlan_hdr vlan_hdr; struct ice_ipv4_hdr ipv4_hdr; struct ice_ipv6_hdr ipv6_hdr; struct ice_l4_hdr l4_hdr; diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index fa023169d..477500ce5 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -418,8 +418,9 @@ dummy_udp_gtp_packet[] = { static const struct ice_dummy_pkt_offsets dummy_pppoe_packet_offsets[] = { - { ICE_MAC_OFOS, 0 }, - { ICE_PPPOE, 14 }, + { ICE_MAC_OFOS, 0 }, + { ICE_VLAN_OFOS, 14}, + { ICE_PPPOE, 18 }, { ICE_PROTOCOL_LAST, 0 }, }; @@ -428,9 +429,11 @@ dummy_pppoe_packet[] = { 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x88, 0x64, + 0x81, 0x00, + + 0x00, 0x00, 0x88, 0x64, /* ICE_VLAN_OFOS 14 */ - 0x11, 0x00, 0x00, 0x01, /* ICE_PPPOE 14 */ + 0x11, 0x00, 0x00, 0x01, /* ICE_PPPOE 18 */ 0x00, 0x4e, 0x00, 0x21, 0x45, 0x00, 0x00, 0x30, /* PDU */ @@ -4632,6 +4635,7 @@ static const struct ice_prot_ext_tbl_entry ice_prot_ext[] = { { ICE_MAC_OFOS, { 0, 2, 4, 6, 8, 10, 12 } }, { ICE_MAC_IL, { 0, 2, 4, 6, 8, 10, 12 } }, { ICE_ETYPE_OL, { 0 } }, + { ICE_VLAN_OFOS, { 0, 2 } }, { ICE_IPV4_OFOS, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18 } }, { ICE_IPV4_IL, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18 } }, { ICE_IPV6_IL, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, @@ -4661,6 +4665,7 @@ static const struct ice_protocol_entry ice_prot_id_tbl[] = { { ICE_MAC_OFOS, ICE_MAC_OFOS_HW }, { ICE_MAC_IL, ICE_MAC_IL_HW }, { ICE_ETYPE_OL, ICE_ETYPE_OL_HW }, + { ICE_VLAN_OFOS, ICE_VLAN_OL_HW }, { ICE_IPV4_OFOS, ICE_IPV4_OFOS_HW }, { ICE_IPV4_IL, ICE_IPV4_IL_HW }, { ICE_IPV6_OFOS, ICE_IPV6_OFOS_HW }, @@ -5784,6 +5789,9 @@ ice_fill_adv_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt, case ICE_ETYPE_OL: len = sizeof(struct ice_ethtype_hdr); break; + case ICE_VLAN_OFOS: + len = sizeof(struct ice_vlan_hdr); + break; case ICE_IPV4_OFOS: case ICE_IPV4_IL: len = sizeof(struct ice_ipv4_hdr); -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 10/22] net/ice/base: minor structure refactor 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 00/22] " Qi Zhang ` (8 preceding siblings ...) 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 09/22] net/ice/base: add support for switch rule about VLAN PPPoE Qi Zhang @ 2019-09-07 3:16 ` Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 11/22] net/ice/base: associate switch recipe to profiles Qi Zhang ` (11 subsequent siblings) 21 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-07 3:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Jesse Brandeburg, Paul M Stillwell Jr When declaring the ice_prot_ext, and ice_prot_id_tbl structure, we can use a fixed length array instead of a variable length one which helps us catch future code changes that might desynchronize the enum ice_protocol_type and the structs. This change also necessitates removing the last member of the structs which was just there to be a placeholder. Also reorder the ice_prot_ext struct to match the ordering in the associated enum ice_protocol_type. Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_switch.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 477500ce5..aab0ff07f 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -4631,17 +4631,17 @@ ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info) * matching entry describing its field. This needs to be updated if new * structure is added to that union. */ -static const struct ice_prot_ext_tbl_entry ice_prot_ext[] = { +static const struct ice_prot_ext_tbl_entry ice_prot_ext[ICE_PROTOCOL_LAST] = { { ICE_MAC_OFOS, { 0, 2, 4, 6, 8, 10, 12 } }, { ICE_MAC_IL, { 0, 2, 4, 6, 8, 10, 12 } }, { ICE_ETYPE_OL, { 0 } }, { ICE_VLAN_OFOS, { 0, 2 } }, { ICE_IPV4_OFOS, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18 } }, { ICE_IPV4_IL, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18 } }, - { ICE_IPV6_IL, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, - 26, 28, 30, 32, 34, 36, 38 } }, { ICE_IPV6_OFOS, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38 } }, + { ICE_IPV6_IL, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, + 26, 28, 30, 32, 34, 36, 38 } }, { ICE_TCP_IL, { 0, 2 } }, { ICE_UDP_OF, { 0, 2 } }, { ICE_UDP_ILOS, { 0, 2 } }, @@ -4652,7 +4652,6 @@ static const struct ice_prot_ext_tbl_entry ice_prot_ext[] = { { ICE_NVGRE, { 0, 2, 4, 6 } }, { ICE_GTP, { 8, 10, 12, 14, 16, 18, 20 } }, { ICE_PPPOE, { 0, 2, 4, 6 } }, - { ICE_PROTOCOL_LAST, { 0 } } }; /* The following table describes preferred grouping of recipes. @@ -4661,7 +4660,7 @@ static const struct ice_prot_ext_tbl_entry ice_prot_ext[] = { * following policy. */ -static const struct ice_protocol_entry ice_prot_id_tbl[] = { +static const struct ice_protocol_entry ice_prot_id_tbl[ICE_PROTOCOL_LAST] = { { ICE_MAC_OFOS, ICE_MAC_OFOS_HW }, { ICE_MAC_IL, ICE_MAC_IL_HW }, { ICE_ETYPE_OL, ICE_ETYPE_OL_HW }, @@ -4680,7 +4679,6 @@ static const struct ice_protocol_entry ice_prot_id_tbl[] = { { ICE_NVGRE, ICE_GRE_OF_HW }, { ICE_GTP, ICE_UDP_OF_HW }, { ICE_PPPOE, ICE_PPPOE_HW }, - { ICE_PROTOCOL_LAST, 0 } }; /** -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 11/22] net/ice/base: associate switch recipe to profiles 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 00/22] " Qi Zhang ` (9 preceding siblings ...) 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 10/22] net/ice/base: minor structure refactor Qi Zhang @ 2019-09-07 3:16 ` Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 12/22] net/ice/base: enable RSS for PPPoE with SCTP Qi Zhang ` (10 subsequent siblings) 21 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-07 3:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Paul M Stillwell Jr Properly associate switch recipes to profiles. Previous code was using the wrong bitfield for updating the associations, which was causing other PFs to not properly identify and use existing recipes. This sometimes resulted in rules not being added when it should have been possible. Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_switch.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index aab0ff07f..9e7e93af5 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -5581,14 +5581,14 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, if (status) goto err_unroll; - ice_or_bitmap(rm->r_bitmap, r_bitmap, rm->r_bitmap, + ice_or_bitmap(r_bitmap, r_bitmap, rm->r_bitmap, ICE_MAX_NUM_RECIPES); status = ice_acquire_change_lock(hw, ICE_RES_WRITE); if (status) goto err_unroll; status = ice_aq_map_recipe_to_profile(hw, fvit->profile_id, - (u8 *)rm->r_bitmap, + (u8 *)r_bitmap, NULL); ice_release_change_lock(hw); @@ -5596,12 +5596,12 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, goto err_unroll; /* Update profile to recipe bitmap array */ - ice_memcpy(profile_to_recipe[fvit->profile_id], rm->r_bitmap, - sizeof(rm->r_bitmap), ICE_NONDMA_TO_NONDMA); + ice_memcpy(profile_to_recipe[fvit->profile_id], r_bitmap, + sizeof(r_bitmap), ICE_NONDMA_TO_NONDMA); /* Update recipe to profile bitmap array */ for (j = 0; j < ICE_MAX_NUM_RECIPES; j++) - if (ice_is_bit_set(rm->r_bitmap, j)) + if (ice_is_bit_set(r_bitmap, j)) ice_set_bit((u16)fvit->profile_id, recipe_to_profile[j]); } -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 12/22] net/ice/base: enable RSS for PPPoE with SCTP 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 00/22] " Qi Zhang ` (10 preceding siblings ...) 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 11/22] net/ice/base: associate switch recipe to profiles Qi Zhang @ 2019-09-07 3:16 ` Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 13/22] net/ice/base: enable fdir queue region Qi Zhang ` (9 subsequent siblings) 21 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-07 3:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Zhirun Yan, Paul M Stillwell Jr Add two ptypes(MAC_PPPOE_IPV4_SCTP and MAC_PPPOE_IPV6_SCTP) in sctp ptype bitmap to enable rss. Signed-off-by: Zhirun Yan <zhirun.yan@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 5d1b12d43..d91922527 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -253,7 +253,7 @@ static const u32 ice_ptypes_tcp_il[] = { static const u32 ice_ptypes_sctp_il[] = { 0x08000000, 0x01020204, 0x20408081, 0x04080810, 0x01020204, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x01040000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 13/22] net/ice/base: enable fdir queue region 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 00/22] " Qi Zhang ` (11 preceding siblings ...) 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 12/22] net/ice/base: enable RSS for PPPoE with SCTP Qi Zhang @ 2019-09-07 3:16 ` Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 14/22] net/ice/base: enable setting up FDIR counters Qi Zhang ` (8 subsequent siblings) 21 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-07 3:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr Add fdir queue region support. Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> --- drivers/net/ice/base/ice_fdir.c | 3 +++ drivers/net/ice/base/ice_fdir.h | 2 ++ 2 files changed, 5 insertions(+) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index e35506006..4632f1a53 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -343,6 +343,9 @@ ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input, fdir_fltr_ctx.drop = ICE_FXD_FLTR_QW0_DROP_YES; fdir_fltr_ctx.qindex = 0; } else { + if (input->dest_ctl == + ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QGROUP) + fdir_fltr_ctx.toq = input->q_region; fdir_fltr_ctx.drop = ICE_FXD_FLTR_QW0_DROP_NO; fdir_fltr_ctx.qindex = input->q_index; } diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index e0f3cd481..ccfc30c85 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -167,6 +167,8 @@ struct ice_fdir_fltr { /* flex byte filter data */ __be16 flex_word; + /* queue region size (=2^q_region) */ + u8 q_region; u16 flex_offset; u16 flex_fltr; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 14/22] net/ice/base: enable setting up FDIR counters 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 00/22] " Qi Zhang ` (12 preceding siblings ...) 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 13/22] net/ice/base: enable fdir queue region Qi Zhang @ 2019-09-07 3:16 ` Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 15/22] net/ice/base: add dest MAC field support for FDIR Qi Zhang ` (7 subsequent siblings) 21 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-07 3:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Enable getting value from input to set up flow director counters, so that the FDIR counters can count none, packets only, bytes only or both packets and bytes as demanded. Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 2 +- drivers/net/ice/base/ice_fdir.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index 4632f1a53..1c455ffe4 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -349,7 +349,7 @@ ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input, fdir_fltr_ctx.drop = ICE_FXD_FLTR_QW0_DROP_NO; fdir_fltr_ctx.qindex = input->q_index; } - fdir_fltr_ctx.cnt_ena = ICE_FXD_FLTR_QW0_STAT_ENA_PKTS; + fdir_fltr_ctx.cnt_ena = input->cnt_ena; fdir_fltr_ctx.cnt_index = input->cnt_index; fdir_fltr_ctx.fd_vsi = ice_get_hw_vsi_num(hw, input->dest_vsi); fdir_fltr_ctx.evict_ena = ICE_FXD_FLTR_QW0_EVICT_ENA_FALSE; diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index ccfc30c85..007f6dd8f 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -176,6 +176,7 @@ struct ice_fdir_fltr { u16 q_index; u16 dest_vsi; u8 dest_ctl; + u8 cnt_ena; u8 fltr_status; u16 cnt_index; u32 fltr_id; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 15/22] net/ice/base: add dest MAC field support for FDIR 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 00/22] " Qi Zhang ` (13 preceding siblings ...) 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 14/22] net/ice/base: enable setting up FDIR counters Qi Zhang @ 2019-09-07 3:16 ` Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 16/22] net/ice/base: update FW API minor version Qi Zhang ` (6 subsequent siblings) 21 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-07 3:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Add dest MAC address support so that this field can be matched when we set Flow Director filter with dst addr for MAC. Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index 1c455ffe4..3a2175b30 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -543,6 +543,17 @@ static void ice_pkt_insert_u32(u8 *pkt, int offset, __be32 data) } /** + * ice_pkt_insert_mac_addr - insert a MAC addr into a memory buffer. + * @pkt: packet buffer + * @offset: offset into buffer + * @addr: MAC address to convert and insert into pkt at offset + */ +static void ice_pkt_insert_mac_addr(u8 *pkt, u8 *addr) +{ + ice_memcpy(pkt, addr, ETH_ALEN, ICE_NONDMA_TO_NONDMA); +} + +/** * ice_fdir_get_gen_prgm_pkt - generate a training packet * @hw: pointer to the hardware structure * @input: flow director filter data structure @@ -626,6 +637,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.src_port); ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); if (frag) loc[20] = ICE_FDIR_IPV4_PKT_FLAG_DF; break; @@ -640,6 +652,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.src_port); ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; case ICE_FLTR_PTYPE_NONF_IPV4_SCTP: ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, @@ -652,6 +665,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.src_port); ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; case ICE_FLTR_PTYPE_NONF_IPV4_OTHER: ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, @@ -662,6 +676,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); ice_pkt_insert_u8(loc, ICE_IPV4_PROTO_OFFSET, input->ip.v4.proto); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; case ICE_FLTR_PTYPE_NONF_IPV6_TCP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, @@ -674,6 +689,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v6.src_port); ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; case ICE_FLTR_PTYPE_NONF_IPV6_UDP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, @@ -686,6 +702,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v6.src_port); ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; case ICE_FLTR_PTYPE_NONF_IPV6_SCTP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, @@ -698,6 +715,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v6.src_port); ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; case ICE_FLTR_PTYPE_NONF_IPV6_OTHER: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, @@ -708,6 +726,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); ice_pkt_insert_u8(loc, ICE_IPV6_PROTO_OFFSET, input->ip.v6.proto); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; default: return ICE_ERR_PARAM; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 16/22] net/ice/base: update FW API minor version 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 00/22] " Qi Zhang ` (14 preceding siblings ...) 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 15/22] net/ice/base: add dest MAC field support for FDIR Qi Zhang @ 2019-09-07 3:16 ` Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 17/22] net/ice/base: enable symmetric hash for RSS Qi Zhang ` (5 subsequent siblings) 21 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-07 3:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Kevin Scott, Paul M Stillwell Jr Update FW API minor version to align to current value advertised by FW in NVM images. Signed-off-by: Kevin Scott <kevin.c.scott@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_controlq.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_controlq.h b/drivers/net/ice/base/ice_controlq.h index 8ad7857c8..8b6046547 100644 --- a/drivers/net/ice/base/ice_controlq.h +++ b/drivers/net/ice/base/ice_controlq.h @@ -23,7 +23,7 @@ */ #define EXP_FW_API_VER_BRANCH 0x00 #define EXP_FW_API_VER_MAJOR 0x01 -#define EXP_FW_API_VER_MINOR 0x03 +#define EXP_FW_API_VER_MINOR 0x05 /* Different control queue types: These are mainly for SW consumption. */ enum ice_ctl_q { -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 17/22] net/ice/base: enable symmetric hash for RSS 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 00/22] " Qi Zhang ` (15 preceding siblings ...) 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 16/22] net/ice/base: update FW API minor version Qi Zhang @ 2019-09-07 3:16 ` Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 18/22] net/ice/base: replace alloc-followed-by-copy with memdup Qi Zhang ` (4 subsequent siblings) 21 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-07 3:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr Add parameter "symm" to rss configuration APIs. When symm is 1, Symmetric Teoplitz Hash can be enabled by configuring GLQF_HSYMM properly. NOTE: Symmetric Teoplitz hash will work only if hash schema of VSIQF_HASH_CTL be configured to 01b and it is assumed be enabled in PMD. Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> --- drivers/net/ice/base/ice_flow.c | 149 +++++++++++++++++++++++++++++++++++++--- drivers/net/ice/base/ice_flow.h | 5 +- drivers/net/ice/ice_ethdev.c | 16 ++--- 3 files changed, 150 insertions(+), 20 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index d91922527..87faf5103 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -1876,6 +1876,7 @@ ice_add_rss_list(struct ice_hw *hw, u16 vsi_handle, struct ice_flow_prof *prof) rss_cfg->hashed_flds = prof->segs[prof->segs_cnt - 1].match; rss_cfg->packet_hdr = prof->segs[prof->segs_cnt - 1].hdrs; + rss_cfg->symm = prof->cfg.symm; ice_set_bit(vsi_handle, rss_cfg->vsis); LIST_ADD_TAIL(&rss_cfg->l_entry, &hw->rss_list_head); @@ -1903,6 +1904,107 @@ ice_add_rss_list(struct ice_hw *hw, u16 vsi_handle, struct ice_flow_prof *prof) (((u64)(hdr) << ICE_FLOW_PROF_HDR_S) & ICE_FLOW_PROF_HDR_M) | \ ((u8)((segs_cnt) - 1) ? ICE_FLOW_PROF_ENCAP_M : 0)) +static void +ice_rss_config_xor_word(struct ice_hw *hw, u8 prof_id, u8 src, u8 dst) +{ + u32 s = ((src % 4) << 3); /* byte shift */ + u32 v = dst | 0x80; /* value to program */ + u8 i = src / 4; /* register index */ + u32 reg; + + reg = rd32(hw, GLQF_HSYMM(prof_id, i)); + reg = (reg & ~(0xff << s)) | (v << s); + wr32(hw, GLQF_HSYMM(prof_id, i), reg); +} + +static void +ice_rss_config_xor(struct ice_hw *hw, u8 prof_id, u8 src, u8 dst, u8 len) +{ + int fv_last_word = + ICE_FLOW_SW_FIELD_VECTOR_MAX / ICE_FLOW_FV_EXTRACT_SZ - 1; + int i; + + for (i = 0; i < len; i++) { + ice_rss_config_xor_word(hw, prof_id, + /* Yes, field vector in GLQF_HSYMM and + * GLQF_HINSET is inversed! + */ + fv_last_word - (src + i), + fv_last_word - (dst + i)); + ice_rss_config_xor_word(hw, prof_id, + fv_last_word - (dst + i), + fv_last_word - (src + i)); + } +} + +static void +ice_rss_update_symm(struct ice_hw *hw, + struct ice_flow_prof *prof) +{ + struct ice_prof_map *map; + u8 prof_id, m; + + map = ice_search_prof_id(hw, ICE_BLK_RSS, prof->id); + prof_id = map->prof_id; + + /* clear to default */ + for (m = 0; m < 6; m++) + wr32(hw, GLQF_HSYMM(prof_id, m), 0); + if (prof->cfg.symm) { + struct ice_flow_seg_info *seg = + &prof->segs[prof->segs_cnt - 1]; + + struct ice_flow_seg_xtrct *ipv4_src = + &seg->fields[ICE_FLOW_FIELD_IDX_IPV4_SA].xtrct; + struct ice_flow_seg_xtrct *ipv4_dst = + &seg->fields[ICE_FLOW_FIELD_IDX_IPV4_DA].xtrct; + struct ice_flow_seg_xtrct *ipv6_src = + &seg->fields[ICE_FLOW_FIELD_IDX_IPV6_SA].xtrct; + struct ice_flow_seg_xtrct *ipv6_dst = + &seg->fields[ICE_FLOW_FIELD_IDX_IPV6_DA].xtrct; + + struct ice_flow_seg_xtrct *tcp_src = + &seg->fields[ICE_FLOW_FIELD_IDX_TCP_SRC_PORT].xtrct; + struct ice_flow_seg_xtrct *tcp_dst = + &seg->fields[ICE_FLOW_FIELD_IDX_TCP_SRC_PORT].xtrct; + + struct ice_flow_seg_xtrct *udp_src = + &seg->fields[ICE_FLOW_FIELD_IDX_UDP_SRC_PORT].xtrct; + struct ice_flow_seg_xtrct *udp_dst = + &seg->fields[ICE_FLOW_FIELD_IDX_UDP_SRC_PORT].xtrct; + + struct ice_flow_seg_xtrct *sctp_src = + &seg->fields[ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT].xtrct; + struct ice_flow_seg_xtrct *sctp_dst = + &seg->fields[ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT].xtrct; + + /* xor IPv4 */ + if (ipv4_src->prot_id != 0 && ipv4_dst->prot_id != 0) + ice_rss_config_xor(hw, prof_id, + ipv4_src->idx, ipv4_dst->idx, 2); + + /* xor IPv6 */ + if (ipv6_src->prot_id != 0 && ipv6_dst->prot_id != 0) + ice_rss_config_xor(hw, prof_id, + ipv6_src->idx, ipv6_dst->idx, 8); + + /* xor TCP */ + if (tcp_src->prot_id != 0 && tcp_dst->prot_id != 0) + ice_rss_config_xor(hw, prof_id, + tcp_src->idx, tcp_dst->idx, 1); + + /* xor UDP */ + if (udp_src->prot_id != 0 && udp_dst->prot_id != 0) + ice_rss_config_xor(hw, prof_id, + udp_src->idx, udp_dst->idx, 1); + + /* xor SCTP */ + if (sctp_src->prot_id != 0 && sctp_dst->prot_id != 0) + ice_rss_config_xor(hw, prof_id, + sctp_src->idx, sctp_dst->idx, 1); + } +} + /** * ice_add_rss_cfg_sync - add an RSS configuration * @hw: pointer to the hardware structure @@ -1910,12 +2012,13 @@ ice_add_rss_list(struct ice_hw *hw, u16 vsi_handle, struct ice_flow_prof *prof) * @hashed_flds: hash bit fields (ICE_FLOW_HASH_*) to configure * @addl_hdrs: protocol header fields * @segs_cnt: packet segment count + * @symm: symmetric hash enable/disable * * Assumption: lock has already been acquired for RSS list */ static enum ice_status ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, - u32 addl_hdrs, u8 segs_cnt) + u32 addl_hdrs, u8 segs_cnt, bool symm) { const enum ice_block blk = ICE_BLK_RSS; struct ice_flow_prof *prof = NULL; @@ -1944,8 +2047,12 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, vsi_handle, ICE_FLOW_FIND_PROF_CHK_FLDS | ICE_FLOW_FIND_PROF_CHK_VSI); - if (prof) - goto exit; + if (prof) { + if (prof->cfg.symm == symm) + goto exit; + prof->cfg.symm = symm; + goto update_symm; + } /* Check if a flow profile exists with the same protocol headers and * associated with the input VSI. If so disasscociate the VSI from @@ -1976,9 +2083,18 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, vsi_handle, ICE_FLOW_FIND_PROF_CHK_FLDS); if (prof) { - status = ice_flow_assoc_prof(hw, blk, prof, vsi_handle); - if (!status) - status = ice_add_rss_list(hw, vsi_handle, prof); + if (prof->cfg.symm == symm) { + status = ice_flow_assoc_prof(hw, blk, prof, + vsi_handle); + if (!status) + status = ice_add_rss_list(hw, vsi_handle, + prof); + } else { + /* if a profile exist but with different symmetric + * requirement, just return error. + */ + status = ICE_ERR_NOT_SUPPORTED; + } goto exit; } @@ -2004,6 +2120,13 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, status = ice_add_rss_list(hw, vsi_handle, prof); + prof->cfg.symm = symm; + if (!symm) + goto exit; + +update_symm: + ice_rss_update_symm(hw, prof); + exit: ice_free(hw, segs); return status; @@ -2015,6 +2138,7 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, * @vsi_handle: software VSI handle * @hashed_flds: hash bit fields (ICE_FLOW_HASH_*) to configure * @addl_hdrs: protocol header fields + * @symm: symmetric hash enable/disable * * This function will generate a flow profile based on fields associated with * the input fields to hash on, the flow type and use the VSI number to add @@ -2022,7 +2146,7 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, */ enum ice_status ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, - u32 addl_hdrs) + u32 addl_hdrs, bool symm) { enum ice_status status; @@ -2032,10 +2156,11 @@ ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, ice_acquire_lock(&hw->rss_locks); status = ice_add_rss_cfg_sync(hw, vsi_handle, hashed_flds, addl_hdrs, - ICE_RSS_OUTER_HEADERS); + ICE_RSS_OUTER_HEADERS, symm); if (!status) status = ice_add_rss_cfg_sync(hw, vsi_handle, hashed_flds, - addl_hdrs, ICE_RSS_INNER_HEADERS); + addl_hdrs, ICE_RSS_INNER_HEADERS, + symm); ice_release_lock(&hw->rss_locks); return status; @@ -2148,13 +2273,15 @@ enum ice_status ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle) status = ice_add_rss_cfg_sync(hw, vsi_handle, r->hashed_flds, r->packet_hdr, - ICE_RSS_OUTER_HEADERS); + ICE_RSS_OUTER_HEADERS, + r->symm); if (status) break; status = ice_add_rss_cfg_sync(hw, vsi_handle, r->hashed_flds, r->packet_hdr, - ICE_RSS_INNER_HEADERS); + ICE_RSS_INNER_HEADERS, + r->symm); if (status) break; } diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h index 3afd201c4..6f26f3935 100644 --- a/drivers/net/ice/base/ice_flow.h +++ b/drivers/net/ice/base/ice_flow.h @@ -315,6 +315,8 @@ struct ice_flow_prof { /* struct sw_recipe */ /* struct fd */ u32 data; + /* Symmetric Hash for RSS */ + bool symm; } cfg; /* Default actions */ @@ -327,6 +329,7 @@ struct ice_rss_cfg { ice_declare_bitmap(vsis, ICE_MAX_VSI); u64 hashed_flds; u32 packet_hdr; + bool symm; }; enum ice_flow_action_type { @@ -402,7 +405,7 @@ ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds); enum ice_status ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle); enum ice_status ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, - u32 addl_hdrs); + u32 addl_hdrs, bool symm); enum ice_status ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, u32 addl_hdrs); diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c index 44a14cb8a..d5e0281c5 100644 --- a/drivers/net/ice/ice_ethdev.c +++ b/drivers/net/ice/ice_ethdev.c @@ -1778,50 +1778,50 @@ static int ice_init_rss(struct ice_pf *pf) /* configure RSS for IPv4 with input set IPv4 src/dst */ ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV4, - ICE_FLOW_SEG_HDR_IPV4); + ICE_FLOW_SEG_HDR_IPV4, 0); if (ret) PMD_DRV_LOG(ERR, "%s IPV4 rss flow fail %d", __func__, ret); /* configure RSS for IPv6 with input set IPv6 src/dst */ ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV6, - ICE_FLOW_SEG_HDR_IPV6); + ICE_FLOW_SEG_HDR_IPV6, 0); if (ret) PMD_DRV_LOG(ERR, "%s IPV6 rss flow fail %d", __func__, ret); /* configure RSS for tcp6 with input set IPv6 src/dst, TCP src/dst */ ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_TCP_IPV6, - ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV6); + ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV6, 0); if (ret) PMD_DRV_LOG(ERR, "%s TCP_IPV6 rss flow fail %d", __func__, ret); /* configure RSS for udp6 with input set IPv6 src/dst, UDP src/dst */ ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_UDP_IPV6, - ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV6); + ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV6, 0); if (ret) PMD_DRV_LOG(ERR, "%s UDP_IPV6 rss flow fail %d", __func__, ret); /* configure RSS for sctp6 with input set IPv6 src/dst */ ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV6, - ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV6); + ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV6, 0); if (ret) PMD_DRV_LOG(ERR, "%s SCTP_IPV6 rss flow fail %d", __func__, ret); /* configure RSS for tcp4 with input set IP src/dst, TCP src/dst */ ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_TCP_IPV4, - ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV4); + ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV4, 0); if (ret) PMD_DRV_LOG(ERR, "%s TCP_IPV4 rss flow fail %d", __func__, ret); /* configure RSS for udp4 with input set IP src/dst, UDP src/dst */ ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_UDP_IPV4, - ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV4); + ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV4, 0); if (ret) PMD_DRV_LOG(ERR, "%s UDP_IPV4 rss flow fail %d", __func__, ret); /* configure RSS for sctp4 with input set IP src/dst */ ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV4, - ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV4); + ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV4, 0); if (ret) PMD_DRV_LOG(ERR, "%s SCTP_IPV4 rss flow fail %d", __func__, ret); -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 18/22] net/ice/base: replace alloc-followed-by-copy with memdup 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 00/22] " Qi Zhang ` (16 preceding siblings ...) 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 17/22] net/ice/base: enable symmetric hash for RSS Qi Zhang @ 2019-09-07 3:16 ` Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 19/22] net/ice/base: add FDIR support for GTPU qfi field Qi Zhang ` (3 subsequent siblings) 21 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-07 3:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Bruce Allan, Paul M Stillwell Jr ice_memdup() is preferred over an alloc immediately followed by a copy. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flex_pipe.c | 5 ++--- drivers/net/ice/base/ice_switch.c | 7 ++----- 2 files changed, 4 insertions(+), 8 deletions(-) diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 05cd39b17..76c26fd4e 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -4939,12 +4939,11 @@ ice_get_profs_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, struct ice_vsig_prof *p; /* copy to the input list */ - p = (struct ice_vsig_prof *)ice_malloc(hw, sizeof(*p)); + p = (struct ice_vsig_prof *)ice_memdup(hw, ent1, sizeof(*p), + ICE_NONDMA_TO_NONDMA); if (!p) goto err_ice_get_profs_vsig; - ice_memcpy(p, ent1, sizeof(*p), ICE_NONDMA_TO_NONDMA); - LIST_ADD_TAIL(&p->list, lst); } diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 9e7e93af5..16917410c 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -623,14 +623,11 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid, recps[rid].big_recp = (num_recps > 1); recps[rid].n_grp_count = num_recps; recps[rid].root_buf = (struct ice_aqc_recipe_data_elem *) - ice_calloc(hw, recps[rid].n_grp_count, - sizeof(struct ice_aqc_recipe_data_elem)); + ice_memdup(hw, tmp, recps[rid].n_grp_count * + sizeof(*recps[rid].root_buf), ICE_NONDMA_TO_NONDMA); if (!recps[rid].root_buf) goto err_unroll; - ice_memcpy(recps[rid].root_buf, tmp, recps[rid].n_grp_count * - sizeof(*recps[rid].root_buf), ICE_NONDMA_TO_NONDMA); - /* Copy result indexes */ ice_memcpy(recps[rid].res_idxs, result_bm, sizeof(recps[rid].res_idxs), ICE_NONDMA_TO_NONDMA); -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 19/22] net/ice/base: add FDIR support for GTPU qfi field 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 00/22] " Qi Zhang ` (17 preceding siblings ...) 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 18/22] net/ice/base: replace alloc-followed-by-copy with memdup Qi Zhang @ 2019-09-07 3:16 ` Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 20/22] net/ice/base: fix the bitmap for TCP in RSS Qi Zhang ` (2 subsequent siblings) 21 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-07 3:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Add GTPU qfi field support for flow director. Note that for GTPU pkt, only qfi field (6 bits) can be set for FD. The supported GTPU pkts are defined as: ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP, ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP, ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP, ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER (FRAG and PAY belong to this) Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 111 ++++++++++++++++++++++++++++++++++++++++ drivers/net/ice/base/ice_fdir.h | 22 ++++++++ drivers/net/ice/base/ice_type.h | 4 ++ 3 files changed, 137 insertions(+) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index 3a2175b30..219588c46 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -42,6 +42,66 @@ static const u8 ice_fdir_ipv4_pkt[] = { 0x00, 0x00 }; +static const u8 ice_fdir_udp4_gtpu4_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x4c, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x08, 0x68, 0x08, 0x68, 0x00, 0x00, + 0x00, 0x00, 0x34, 0xff, 0x00, 0x28, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x02, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x45, 0x00, + 0x00, 0x1c, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, +}; + +static const u8 ice_fdir_tcp4_gtpu4_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x58, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x08, 0x68, 0x08, 0x68, 0x00, 0x00, + 0x00, 0x00, 0x34, 0xff, 0x00, 0x28, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x02, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x45, 0x00, + 0x00, 0x28, 0x00, 0x00, 0x40, 0x00, 0x40, 0x06, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_icmp4_gtpu4_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x4c, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x08, 0x68, 0x08, 0x68, 0x00, 0x00, + 0x00, 0x00, 0x34, 0xff, 0x00, 0x28, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x02, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x45, 0x00, + 0x00, 0x1c, 0x00, 0x00, 0x40, 0x00, 0x40, 0x01, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, +}; + +static const u8 ice_fdir_ipv4_gtpu4_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x44, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x08, 0x68, 0x08, 0x68, 0x00, 0x00, + 0x00, 0x00, 0x34, 0xff, 0x00, 0x28, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x02, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x45, 0x00, + 0x00, 0x14, 0x00, 0x00, 0x40, 0x00, 0x40, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, +}; + static const u8 ice_fdir_tcpv6_pkt[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00, @@ -241,6 +301,34 @@ static const struct ice_fdir_base_pkt ice_fdir_pkt[] = { sizeof(ice_fdir_ip4_tun_pkt), ice_fdir_ip4_tun_pkt, }, { + ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP, + sizeof(ice_fdir_udp4_gtpu4_pkt), + ice_fdir_udp4_gtpu4_pkt, + sizeof(ice_fdir_udp4_gtpu4_pkt), + ice_fdir_udp4_gtpu4_pkt, + }, + { + ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP, + sizeof(ice_fdir_tcp4_gtpu4_pkt), + ice_fdir_tcp4_gtpu4_pkt, + sizeof(ice_fdir_tcp4_gtpu4_pkt), + ice_fdir_tcp4_gtpu4_pkt, + }, + { + ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP, + sizeof(ice_fdir_icmp4_gtpu4_pkt), + ice_fdir_icmp4_gtpu4_pkt, + sizeof(ice_fdir_icmp4_gtpu4_pkt), + ice_fdir_icmp4_gtpu4_pkt, + }, + { + ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER, + sizeof(ice_fdir_ipv4_gtpu4_pkt), + ice_fdir_ipv4_gtpu4_pkt, + sizeof(ice_fdir_ipv4_gtpu4_pkt), + ice_fdir_ipv4_gtpu4_pkt, + }, + { ICE_FLTR_PTYPE_NONF_IPV6_TCP, sizeof(ice_fdir_tcpv6_pkt), ice_fdir_tcpv6_pkt, sizeof(ice_fdir_tcp6_tun_pkt), ice_fdir_tcp6_tun_pkt, @@ -488,6 +576,22 @@ static void ice_pkt_insert_ipv6_addr(u8 *pkt, int offset, __be32 *addr) } /** + * ice_pkt_insert_u6_qfi - insert a u6 value qfi into a memory buffer for gtpu + * @pkt: packet buffer + * @offset: offset into buffer + * @data: 8 bit value to convert and insert into pkt at offset + * + * This function is designed for inserting qfi (6 bits) for gtpu. + */ +static void ice_pkt_insert_u6_qfi(u8 *pkt, int offset, u8 data) +{ + u8 ret; + + ret = (data & 0x3F) + (*(pkt + offset) & 0xC0); + ice_memcpy(pkt + offset, &ret, sizeof(ret), ICE_NONDMA_TO_NONDMA); +} + +/** * ice_pkt_insert_u8 - insert a u8 value into a memory buffer. * @pkt: packet buffer * @offset: offset into buffer @@ -678,6 +782,13 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.proto); ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; + case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP: + case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP: + case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP: + case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER: + ice_pkt_insert_u6_qfi(loc, ICE_IPV4_GTPU_QFI_OFFSET, + input->gtpu_data.qfi); + break; case ICE_FLTR_PTYPE_NONF_IPV6_TCP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, input->ip.v6.dst_ip); diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index 007f6dd8f..22e5bcf8c 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -87,6 +87,7 @@ enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw); #define ICE_IPV6_TC_OFFSET 14 #define ICE_IPV6_HLIM_OFFSET 21 #define ICE_IPV6_PROTO_OFFSET 20 +#define ICE_IPV4_GTPU_QFI_OFFSET 56 #define ICE_FDIR_MAX_FLTRS 16384 @@ -146,6 +147,24 @@ struct ice_fdir_v6 { u8 hlim; }; +struct ice_fdir_udp_gtp { + u8 flags; + u8 msg_type; + u16 rsrvd_len; + u32 teid; + u16 rsrvd_seq_nbr; + u8 rsrvd_n_pdu_nbr; + u8 rsrvd_next_ext_type; + u8 rsvrd_ext_len; + u8 pdu_type:4, + spare:4; + u8 ppp:1, + rqi:1, + qfi:6; + u32 rsvrd; + u8 next_ext; +}; + struct ice_fdir_extra { u8 dst_mac[ETH_ALEN]; /* dest MAC address */ u32 usr_def[2]; /* user data */ @@ -162,6 +181,9 @@ struct ice_fdir_fltr { struct ice_fdir_v6 v6; } ip, mask; + struct ice_fdir_udp_gtp gtpu_data; + struct ice_fdir_udp_gtp gtpu_mask; + struct ice_fdir_extra ext_data; struct ice_fdir_extra ext_mask; diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index 7d0a4f63f..500b88461 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -288,6 +288,10 @@ enum ice_fltr_ptype { ICE_FLTR_PTYPE_NONF_IPV4_TCP, ICE_FLTR_PTYPE_NONF_IPV4_SCTP, ICE_FLTR_PTYPE_NONF_IPV4_OTHER, + ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP, + ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP, + ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP, + ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER, ICE_FLTR_PTYPE_FRAG_IPV4, ICE_FLTR_PTYPE_NONF_IPV6_UDP, ICE_FLTR_PTYPE_NONF_IPV6_TCP, -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 20/22] net/ice/base: fix the bitmap for TCP in RSS 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 00/22] " Qi Zhang ` (18 preceding siblings ...) 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 19/22] net/ice/base: add FDIR support for GTPU qfi field Qi Zhang @ 2019-09-07 3:16 ` Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 21/22] net/ice/base: fix segment in remove existing RSS rule Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 22/22] net/ice/base: remove unused DDP package macros Qi Zhang 21 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-07 3:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, stable, Zhirun Yan, Paul M Stillwell Jr Before this patch, if set rule for IPv4 first and then set rule for TCP with IPv4. The first rule for inner IP will be overwritten by TCP rule. This is because MAC_IPV6_TUN_MAC_IPV4_PAY using the same ptgs PTG_TUN_INNER_IPV4_OTHER with MAC_IPV4_TUN_MAC_IPV4_PAY, this ptype should not in TCP bitmap. Remove this bit in TCP bitmap. Fixes: aa1cd410fa64 ("net/ice/base: add flow module") Cc: stable@dpdk.org Signed-off-by: Zhirun Yan <zhirun.yan@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 87faf5103..b6ed5e549 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -239,7 +239,7 @@ static const u32 ice_ptypes_udp_il[] = { /* Packet types for packets with an Innermost/Last TCP header */ static const u32 ice_ptypes_tcp_il[] = { - 0x04000000, 0x80810102, 0x10204040, 0x42040408, + 0x04000000, 0x80810102, 0x10204040, 0x02040408, 0x00810102, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00820000, 0x21084000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 21/22] net/ice/base: fix segment in remove existing RSS rule 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 00/22] " Qi Zhang ` (19 preceding siblings ...) 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 20/22] net/ice/base: fix the bitmap for TCP in RSS Qi Zhang @ 2019-09-07 3:16 ` Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 22/22] net/ice/base: remove unused DDP package macros Qi Zhang 21 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-07 3:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Zhirun Yan, Paul M Stillwell Jr Before this patch, RSS tunneled rules can not be destroyed at runtime. This is because it can not find the existing matching profile for tunnels. segs[0] should always be zero and all matched, segs[1] for inner part. It only construct one segment. This patch modifies construct segment in ice_rem_rss_cfg_sync() to match ice_add_rss_cfg_sync(). Fixes: 75bc2ea04af4 ("net/ice/base: packet encapsulation for RSS") Signed-off-by: Zhirun Yan <zhirun.yan@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index b6ed5e549..5a24e096d 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -2185,12 +2185,14 @@ ice_rem_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, struct ice_flow_prof *prof; enum ice_status status; - segs = (struct ice_flow_seg_info *)ice_malloc(hw, sizeof(*segs)); + segs = (struct ice_flow_seg_info *)ice_calloc(hw, segs_cnt, + sizeof(*segs)); if (!segs) return ICE_ERR_NO_MEMORY; /* Construct the packet segment info from the hashed fields */ - status = ice_flow_set_rss_seg_info(segs, hashed_flds, addl_hdrs); + status = ice_flow_set_rss_seg_info(&segs[segs_cnt - 1], hashed_flds, + addl_hdrs); if (status) goto out; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 22/22] net/ice/base: remove unused DDP package macros 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 00/22] " Qi Zhang ` (20 preceding siblings ...) 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 21/22] net/ice/base: fix segment in remove existing RSS rule Qi Zhang @ 2019-09-07 3:16 ` Qi Zhang 21 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-07 3:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Bruce Allan, Paul M Stillwell Jr Macros no longer be used and can be removed Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_type.h | 5 ----- 1 file changed, 5 deletions(-) diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index 500b88461..8322d88a0 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -835,11 +835,6 @@ struct ice_hw { /* tunneling info */ struct ice_tunnel_table tnl; -#define ICE_PKG_FILENAME "package_file" -#define ICE_PKG_FILENAME_EXT "pkg" -#define ICE_PKG_FILE_MAJ_VER 1 -#define ICE_PKG_FILE_MIN_VER 0 - /* HW block tables */ struct ice_blk_info blk[ICE_BLK_COUNT]; struct ice_lock fl_profs_locks[ICE_BLK_COUNT]; /* lock fltr profiles */ -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch. 2019-09-02 3:55 [dpdk-dev] [PATCH 0/8] net/ice/base: share code update secend batch Qi Zhang ` (9 preceding siblings ...) 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 00/22] " Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 01/30] net/ice/base: remove redundant empty lines Qi Zhang ` (30 more replies) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (3 subsequent siblings) 14 siblings, 31 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang The patchset depends on the first batch http://patchwork.dpdk.org/project/dpdk/list/?series=6158&state=* Key Features: 1) Add tunnel support for fdir 2) Add non-word aligned field support for fdir 3) Add dest mac field support for fdir 4) Add flow count support for fdir 5) Add queue region support for fdir 6) Add vlan pppoe support for switch 7) Add GTPU qif support for fdir 8) Add symmetric hash support 9) Couple RSS fixes v4: - couple bug fix and code clean. v3: - add features 7, 8, 9. v2: - add features 3, 4, 5, 6. Qi Zhang (30): net/ice/base: remove redundant empty lines net/ice/base: add support for tunnel packets net/ice/base: add non-word aligned ip field support net/ice/base: add non-word aligned ipv6 field support net/ice/base: correct the mask for checking protocol header net/ice/base: propagate errors from functions net/ice/base: remove pointless NULL check of port info net/ice/base: remove RSS code as iavf host net/ice/base: add support for switch rule about VLAN PPPoE net/ice/base: minor structure refactor net/ice/base: associate switch recipe to profiles net/ice/base: enable RSS for PPPoE with SCTP net/ice/base: enable fdir queue region net/ice/base: enable setting up FDIR counters net/ice/base: add dest MAC field support for FDIR net/ice/base: update FW API minor version net/ice/base: enable symmetric hash for RSS net/ice/base: replace alloc-followed-by-copy with memdup net/ice/base: add FDIR support for GTPU qfi field net/ice/base: fix the bitmap for TCP in RSS net/ice/base: fix segment in remove existing RSS rule net/ice/base: remove unused DDP package macros net/ice/base: search field vector indices for result slots net/ice/base: fix 4 byte alignment for pppoe dummy packet net/ice/base: remove unnecessary error log net/ice/base: use bitmap copy where appropriate net/ice/base: fix alignment isue net/ice/base: fix PTYPE bitmap net/ice/base: add switch support for IPv6 tc field net/ice/base: remove unused code drivers/net/ice/base/ice_adminq_cmd.h | 111 -------- drivers/net/ice/base/ice_bitops.h | 2 - drivers/net/ice/base/ice_common.c | 29 -- drivers/net/ice/base/ice_common.h | 4 - drivers/net/ice/base/ice_controlq.c | 9 - drivers/net/ice/base/ice_controlq.h | 3 +- drivers/net/ice/base/ice_devids.h | 1 - drivers/net/ice/base/ice_fdir.c | 461 +++++++++++++++++++++++++++---- drivers/net/ice/base/ice_fdir.h | 41 ++- drivers/net/ice/base/ice_flex_pipe.c | 73 +++-- drivers/net/ice/base/ice_flex_pipe.h | 3 +- drivers/net/ice/base/ice_flex_type.h | 2 + drivers/net/ice/base/ice_flow.c | 328 +++++++++++----------- drivers/net/ice/base/ice_flow.h | 8 +- drivers/net/ice/base/ice_hw_autogen.h | 2 - drivers/net/ice/base/ice_lan_tx_rx.h | 9 - drivers/net/ice/base/ice_nvm.c | 4 - drivers/net/ice/base/ice_protocol_type.h | 18 +- drivers/net/ice/base/ice_sched.c | 7 +- drivers/net/ice/base/ice_switch.c | 145 +++++----- drivers/net/ice/base/ice_switch.h | 3 - drivers/net/ice/base/ice_type.h | 31 +-- drivers/net/ice/ice_ethdev.c | 16 +- 23 files changed, 782 insertions(+), 528 deletions(-) -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 01/30] net/ice/base: remove redundant empty lines 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 02/30] net/ice/base: add support for tunnel packets Qi Zhang ` (29 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr Remove redundant empty lines Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_adminq_cmd.h | 111 ------------------------------- drivers/net/ice/base/ice_bitops.h | 2 - drivers/net/ice/base/ice_common.c | 25 ------- drivers/net/ice/base/ice_common.h | 2 - drivers/net/ice/base/ice_controlq.c | 9 --- drivers/net/ice/base/ice_controlq.h | 1 - drivers/net/ice/base/ice_devids.h | 1 - drivers/net/ice/base/ice_flex_pipe.c | 5 -- drivers/net/ice/base/ice_flex_pipe.h | 1 - drivers/net/ice/base/ice_hw_autogen.h | 2 - drivers/net/ice/base/ice_lan_tx_rx.h | 9 --- drivers/net/ice/base/ice_nvm.c | 4 -- drivers/net/ice/base/ice_protocol_type.h | 2 - drivers/net/ice/base/ice_sched.c | 4 -- drivers/net/ice/base/ice_switch.c | 8 --- drivers/net/ice/base/ice_switch.h | 2 - drivers/net/ice/base/ice_type.h | 9 --- 17 files changed, 197 deletions(-) diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h index 8e1d6a07d..e6a1350ba 100644 --- a/drivers/net/ice/base/ice_adminq_cmd.h +++ b/drivers/net/ice/base/ice_adminq_cmd.h @@ -9,12 +9,10 @@ * descriptor format. It is shared between Firmware and Software. */ - #define ICE_MAX_VSI 768 #define ICE_AQC_TOPO_MAX_LEVEL_NUM 0x9 #define ICE_AQ_SET_MAC_FRAME_SIZE_MAX 9728 - struct ice_aqc_generic { __le32 param0; __le32 param1; @@ -22,7 +20,6 @@ struct ice_aqc_generic { __le32 addr_low; }; - /* Get version (direct 0x0001) */ struct ice_aqc_get_ver { __le32 rom_ver; @@ -37,7 +34,6 @@ struct ice_aqc_get_ver { u8 api_patch; }; - /* Send driver version (indirect 0x0002) */ struct ice_aqc_driver_ver { u8 major_ver; @@ -49,7 +45,6 @@ struct ice_aqc_driver_ver { __le32 addr_low; }; - /* Queue Shutdown (direct 0x0003) */ struct ice_aqc_q_shutdown { u8 driver_unloading; @@ -57,9 +52,6 @@ struct ice_aqc_q_shutdown { u8 reserved[15]; }; - - - /* Request resource ownership (direct 0x0008) * Release resource ownership (direct 0x0009) */ @@ -92,7 +84,6 @@ struct ice_aqc_req_res { u8 reserved[2]; }; - /* Get function capabilities (indirect 0x000A) * Get device capabilities (indirect 0x000B) */ @@ -105,7 +96,6 @@ struct ice_aqc_list_caps { __le32 addr_low; }; - /* Device/Function buffer entry, repeated per reported capability */ struct ice_aqc_list_caps_elem { __le16 cap; @@ -132,7 +122,6 @@ struct ice_aqc_list_caps_elem { __le64 rsvd2; }; - /* Manage MAC address, read command - indirect (0x0107) * This struct is also used for the response */ @@ -153,7 +142,6 @@ struct ice_aqc_manage_mac_read { __le32 addr_low; }; - /* Response buffer format for manage MAC read command */ struct ice_aqc_manage_mac_read_resp { u8 lport_num; @@ -163,7 +151,6 @@ struct ice_aqc_manage_mac_read_resp { u8 mac_addr[ETH_ALEN]; }; - /* Manage MAC address, write command - direct (0x0108) */ struct ice_aqc_manage_mac_write { u8 rsvd; @@ -182,7 +169,6 @@ struct ice_aqc_manage_mac_write { __le32 addr_low; }; - /* Clear PXE Command and response (direct 0x0110) */ struct ice_aqc_clear_pxe { u8 rx_cnt; @@ -190,7 +176,6 @@ struct ice_aqc_clear_pxe { u8 reserved[15]; }; - /* Configure No-Drop Policy Command (direct 0x0112) */ struct ice_aqc_config_no_drop_policy { u8 opts; @@ -215,7 +200,6 @@ struct ice_aqc_get_sw_cfg { __le32 addr_low; }; - /* Each entry in the response buffer is of the following type: */ struct ice_aqc_get_sw_cfg_resp_elem { /* VSI/Port Number */ @@ -242,7 +226,6 @@ struct ice_aqc_get_sw_cfg_resp_elem { #define ICE_AQC_GET_SW_CONF_RESP_IS_VF BIT(15) }; - /* The response buffer is as follows. Note that the length of the * elements array varies with the length of the command response. */ @@ -250,8 +233,6 @@ struct ice_aqc_get_sw_cfg_resp { struct ice_aqc_get_sw_cfg_resp_elem elements[1]; }; - - /* These resource type defines are used for all switch resource * commands where a resource type is required, such as: * Get Resource Allocation command (indirect 0x0204) @@ -324,7 +305,6 @@ struct ice_aqc_get_res_resp { struct ice_aqc_get_res_resp_elem elem[1]; }; - /* Allocate Resources command (indirect 0x0208) * Free Resources command (indirect 0x0209) */ @@ -335,7 +315,6 @@ struct ice_aqc_alloc_free_res_cmd { __le32 addr_low; }; - /* Resource descriptor */ struct ice_aqc_res_elem { union { @@ -344,7 +323,6 @@ struct ice_aqc_res_elem { } e; }; - /* Buffer for Allocate/Free Resources commands */ struct ice_aqc_alloc_free_res_elem { __le16 res_type; /* Types defined above cmd 0x0204 */ @@ -355,7 +333,6 @@ struct ice_aqc_alloc_free_res_elem { struct ice_aqc_res_elem elem[1]; }; - /* Get Allocated Resource Descriptors Command (indirect 0x020A) */ struct ice_aqc_get_allocd_res_desc { union { @@ -379,7 +356,6 @@ struct ice_aqc_get_allocd_res_desc_resp { struct ice_aqc_res_elem elem[1]; }; - /* Add VSI (indirect 0x0210) * Update VSI (indirect 0x0211) * Get VSI (indirect 0x0212) @@ -405,7 +381,6 @@ struct ice_aqc_add_get_update_free_vsi { __le32 addr_low; }; - /* Response descriptor for: * Add VSI (indirect 0x0210) * Update VSI (indirect 0x0211) @@ -420,7 +395,6 @@ struct ice_aqc_add_update_free_vsi_resp { __le32 addr_low; }; - struct ice_aqc_get_vsi_resp { __le16 vsi_num; u8 vf_id; @@ -434,7 +408,6 @@ struct ice_aqc_get_vsi_resp { __le32 addr_low; }; - struct ice_aqc_vsi_props { __le16 valid_sections; #define ICE_AQ_VSI_PROP_SW_VALID BIT(0) @@ -589,7 +562,6 @@ struct ice_aqc_vsi_props { u8 reserved[24]; }; - /* Add/update mirror rule - direct (0x0260) */ #define ICE_AQC_RULE_ID_VALID_S 7 #define ICE_AQC_RULE_ID_VALID_M (0x1 << ICE_AQC_RULE_ID_VALID_S) @@ -694,7 +666,6 @@ struct ice_aqc_storm_cfg { __le32 reserved; }; - #define ICE_MAX_NUM_RECIPES 64 /* Add/Get Recipe (indirect 0x0290/0x0292)*/ @@ -779,7 +750,6 @@ struct ice_aqc_sw_rules { __le32 addr_low; }; - #pragma pack(1) /* Add/Update/Get/Remove lookup Rx/Tx command/response entry * This structures describes the lookup rules and associated actions. "index" @@ -867,7 +837,6 @@ struct ice_sw_rule_lkup_rx_tx { }; #pragma pack() - /* Add/Update/Remove large action command/response entry * "index" is returned as part of a response to a successful Add command, and * can be used to identify the action for Update/Get/Remove commands. @@ -928,7 +897,6 @@ struct ice_sw_rule_lg_act { #define ICE_LG_ACT_STAT_COUNT_M (0x7F << ICE_LG_ACT_STAT_COUNT_S) }; - /* Add/Update/Remove VSI list command/response entry * "index" is returned as part of a response to a successful Add command, and * can be used to identify the VSI list for Update/Get/Remove commands. @@ -939,7 +907,6 @@ struct ice_sw_rule_vsi_list { __le16 vsi[1]; /* Array of number_vsi VSI numbers */ }; - #pragma pack(1) /* Query VSI list command/response entry */ struct ice_sw_rule_vsi_list_query { @@ -948,7 +915,6 @@ struct ice_sw_rule_vsi_list_query { }; #pragma pack() - #pragma pack(1) /* Add switch rule response: * Content of return buffer is same as the input buffer. The status field and @@ -974,7 +940,6 @@ struct ice_aqc_sw_rules_elem { #pragma pack() - /* PFC Ignore (direct 0x0301) * The command and response use the same descriptor structure */ @@ -1009,7 +974,6 @@ struct ice_aqc_set_dcb_params { u8 rsvd[14]; }; - /* Get Default Topology (indirect 0x0400) */ struct ice_aqc_get_topo { u8 port_num; @@ -1020,7 +984,6 @@ struct ice_aqc_get_topo { __le32 addr_low; }; - /* Update TSE (indirect 0x0403) * Get TSE (indirect 0x0404) * Add TSE (indirect 0x0401) @@ -1037,7 +1000,6 @@ struct ice_aqc_sched_elem_cmd { __le32 addr_low; }; - /* This is the buffer for: * Suspend Nodes (indirect 0x0409) * Resume Nodes (indirect 0x040A) @@ -1046,7 +1008,6 @@ struct ice_aqc_suspend_resume_elem { __le32 teid[1]; }; - struct ice_aqc_txsched_move_grp_info_hdr { __le32 src_parent_teid; __le32 dest_parent_teid; @@ -1054,19 +1015,16 @@ struct ice_aqc_txsched_move_grp_info_hdr { __le16 reserved; }; - struct ice_aqc_move_elem { struct ice_aqc_txsched_move_grp_info_hdr hdr; __le32 teid[1]; }; - struct ice_aqc_elem_info_bw { __le16 bw_profile_idx; __le16 bw_alloc; }; - struct ice_aqc_txsched_elem { u8 elem_type; /* Special field, reserved for some aq calls */ #define ICE_AQC_ELEM_TYPE_UNDEFINED 0x0 @@ -1098,50 +1056,42 @@ struct ice_aqc_txsched_elem { __le16 reserved2; }; - struct ice_aqc_txsched_elem_data { __le32 parent_teid; __le32 node_teid; struct ice_aqc_txsched_elem data; }; - struct ice_aqc_txsched_topo_grp_info_hdr { __le32 parent_teid; __le16 num_elems; __le16 reserved2; }; - struct ice_aqc_add_elem { struct ice_aqc_txsched_topo_grp_info_hdr hdr; struct ice_aqc_txsched_elem_data generic[1]; }; - struct ice_aqc_conf_elem { struct ice_aqc_txsched_elem_data generic[1]; }; - struct ice_aqc_get_elem { struct ice_aqc_txsched_elem_data generic[1]; }; - struct ice_aqc_get_topo_elem { struct ice_aqc_txsched_topo_grp_info_hdr hdr; struct ice_aqc_txsched_elem_data generic[ICE_AQC_TOPO_MAX_LEVEL_NUM]; }; - struct ice_aqc_delete_elem { struct ice_aqc_txsched_topo_grp_info_hdr hdr; __le32 teid[1]; }; - /* Query Port ETS (indirect 0x040E) * * This indirect command is used to query port TC node configuration. @@ -1168,7 +1118,6 @@ struct ice_aqc_port_ets_elem { __le32 tc_node_teid[8]; /* Used for response, reserved in command */ }; - /* Rate limiting profile for * Add RL profile (indirect 0x0410) * Query RL profile (indirect 0x0411) @@ -1184,7 +1133,6 @@ struct ice_aqc_rl_profile { __le32 addr_low; }; - struct ice_aqc_rl_profile_elem { u8 level; u8 flags; @@ -1204,13 +1152,10 @@ struct ice_aqc_rl_profile_elem { __le16 rl_encode; }; - struct ice_aqc_rl_profile_generic_elem { struct ice_aqc_rl_profile_elem generic[1]; }; - - /* Configure L2 Node CGD (indirect 0x0414) * This indirect command allows configuring a congestion domain for given L2 * node TEIDs in the scheduler topology. @@ -1222,19 +1167,16 @@ struct ice_aqc_cfg_l2_node_cgd { __le32 addr_low; }; - struct ice_aqc_cfg_l2_node_cgd_elem { __le32 node_teid; u8 cgd; u8 reserved[3]; }; - struct ice_aqc_cfg_l2_node_cgd_data { struct ice_aqc_cfg_l2_node_cgd_elem elem[1]; }; - /* Query Scheduler Resource Allocation (indirect 0x0412) * This indirect command retrieves the scheduler resources allocated by * EMP Firmware to the given PF. @@ -1245,7 +1187,6 @@ struct ice_aqc_query_txsched_res { __le32 addr_low; }; - struct ice_aqc_generic_sched_props { __le16 phys_levels; __le16 logical_levels; @@ -1257,7 +1198,6 @@ struct ice_aqc_generic_sched_props { u8 rsvd1[22]; }; - struct ice_aqc_layer_props { u8 logical_layer; u8 chunk_size; @@ -1271,13 +1211,11 @@ struct ice_aqc_layer_props { u8 rsvd1[14]; }; - struct ice_aqc_query_txsched_res_resp { struct ice_aqc_generic_sched_props sched_props; struct ice_aqc_layer_props layer_props[ICE_AQC_TOPO_MAX_LEVEL_NUM]; }; - /* Query Node to Root Topology (indirect 0x0413) * This command uses ice_aqc_get_elem as its data buffer. */ @@ -1288,7 +1226,6 @@ struct ice_aqc_query_node_to_root { __le32 addr_low; }; - /* Get PHY capabilities (indirect 0x0600) */ struct ice_aqc_get_phy_caps { u8 lport_num; @@ -1311,7 +1248,6 @@ struct ice_aqc_get_phy_caps { __le32 addr_low; }; - /* This is #define of PHY type (Extended): * The first set of defines is for phy_type_low. */ @@ -1453,7 +1389,6 @@ struct ice_aqc_get_phy_caps_data { } qual_modules[ICE_AQC_QUAL_MOD_COUNT_MAX]; }; - /* Set PHY capabilities (direct 0x0601) * NOTE: This command must be followed by setup link and restart auto-neg */ @@ -1464,7 +1399,6 @@ struct ice_aqc_set_phy_cfg { __le32 addr_low; }; - /* Set PHY config command data structure */ struct ice_aqc_set_phy_cfg_data { __le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */ @@ -1485,7 +1419,6 @@ struct ice_aqc_set_phy_cfg_data { u8 rsvd1; }; - /* Set MAC Config command data structure (direct 0x0603) */ struct ice_aqc_set_mac_cfg { __le16 max_frame_size; @@ -1505,7 +1438,6 @@ struct ice_aqc_set_mac_cfg { u8 reserved[7]; }; - /* Restart AN command data structure (direct 0x0605) * Also used for response, with only the lport_num field present. */ @@ -1518,7 +1450,6 @@ struct ice_aqc_restart_an { u8 reserved2[13]; }; - /* Get link status (indirect 0x0607), also used for Link Status Event */ struct ice_aqc_get_link_status { u8 lport_num; @@ -1535,7 +1466,6 @@ struct ice_aqc_get_link_status { __le32 addr_low; }; - /* Get link status response data structure, also used for Link Status Event */ struct ice_aqc_get_link_status_data { u8 topo_media_conflict; @@ -1621,7 +1551,6 @@ struct ice_aqc_get_link_status_data { __le64 phy_type_high; /* Use values from ICE_PHY_TYPE_HIGH_* */ }; - /* Set event mask command (direct 0x0613) */ struct ice_aqc_set_event_mask { u8 lport_num; @@ -1641,8 +1570,6 @@ struct ice_aqc_set_event_mask { u8 reserved1[6]; }; - - /* Set MAC Loopback command (direct 0x0620) */ struct ice_aqc_set_mac_lb { u8 lb_mode; @@ -1651,9 +1578,6 @@ struct ice_aqc_set_mac_lb { u8 reserved[15]; }; - - - struct ice_aqc_link_topo_addr { u8 lport_num; u8 lport_num_valid; @@ -1716,8 +1640,6 @@ struct ice_aqc_set_port_id_led { u8 rsvd[13]; }; - - /* Read/Write SFF EEPROM command (indirect 0x06EE) */ struct ice_aqc_sff_eeprom { u8 lport_num; @@ -1797,7 +1719,6 @@ struct ice_aqc_nvm { #define ICE_AQC_NVM_LLDP_STATUS_M_LEN 4 /* In Bits */ #define ICE_AQC_NVM_LLDP_STATUS_RD_LEN 4 /* In Bytes */ - /* Used for 0x0704 as well as for 0x0705 commands */ struct ice_aqc_nvm_cfg { u8 cmd_flags; @@ -1812,14 +1733,12 @@ struct ice_aqc_nvm_cfg { __le32 addr_low; }; - struct ice_aqc_nvm_cfg_data { __le16 field_id; __le16 field_options; __le16 field_value; }; - /* NVM Checksum Command (direct, 0x0706) */ struct ice_aqc_nvm_checksum { u8 flags; @@ -1831,9 +1750,6 @@ struct ice_aqc_nvm_checksum { u8 rsvd2[12]; }; - - - /* Get LLDP MIB (indirect 0x0A00) * Note: This is also used by the LLDP MIB Change Event (0x0A01) * as the format is the same. @@ -1985,7 +1901,6 @@ struct ice_aqc_lldp_stop_start_specific_agent { u8 reserved[15]; }; - /* Get/Set RSS key (indirect 0x0B04/0x0B02) */ struct ice_aqc_get_set_rss_key { #define ICE_AQC_GSET_RSS_KEY_VSI_VALID BIT(15) @@ -1997,7 +1912,6 @@ struct ice_aqc_get_set_rss_key { __le32 addr_low; }; - #define ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE 0x28 #define ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE 0xC #define ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE \ @@ -2019,7 +1933,6 @@ struct ice_aqc_get_set_rss_keys { u8 extended_hash_key[ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE]; }; - /* Get/Set RSS LUT (indirect 0x0B05/0x0B03) */ struct ice_aqc_get_set_rss_lut { #define ICE_AQC_GSET_RSS_LUT_VSI_VALID BIT(15) @@ -2055,7 +1968,6 @@ struct ice_aqc_get_set_rss_lut { __le32 addr_low; }; - /* Clear FD Table Command (direct, 0x0B06) */ struct ice_aqc_clear_fd_table { u8 clear_type; @@ -2066,9 +1978,6 @@ struct ice_aqc_clear_fd_table { u8 reserved[12]; }; - - - /* Add Tx LAN Queues (indirect 0x0C30) */ struct ice_aqc_add_txqs { u8 num_qgrps; @@ -2078,7 +1987,6 @@ struct ice_aqc_add_txqs { __le32 addr_low; }; - /* This is the descriptor of each queue entry for the Add Tx LAN Queues * command (0x0C30). Only used within struct ice_aqc_add_tx_qgrp. */ @@ -2091,7 +1999,6 @@ struct ice_aqc_add_txqs_perq { struct ice_aqc_txsched_elem info; }; - /* The format of the command buffer for Add Tx LAN Queues (0x0C30) * is an array of the following structs. Please note that the length of * each struct ice_aqc_add_tx_qgrp is variable due @@ -2104,7 +2011,6 @@ struct ice_aqc_add_tx_qgrp { struct ice_aqc_add_txqs_perq txqs[1]; }; - /* Disable Tx LAN Queues (indirect 0x0C31) */ struct ice_aqc_dis_txqs { u8 cmd_type; @@ -2127,7 +2033,6 @@ struct ice_aqc_dis_txqs { __le32 addr_low; }; - /* The buffer for Disable Tx LAN Queues (indirect 0x0C31) * contains the following structures, arrayed one after the * other. @@ -2150,12 +2055,10 @@ struct ice_aqc_dis_txq_item { (1 << ICE_AQC_Q_DIS_BUF_ELEM_TYPE_S) }; - struct ice_aqc_dis_txq { struct ice_aqc_dis_txq_item qgrps[1]; }; - /* Tx LAN Queues Cleanup Event (0x0C31) */ struct ice_aqc_txqs_cleanup { __le16 caller_opc; @@ -2163,7 +2066,6 @@ struct ice_aqc_txqs_cleanup { u8 reserved[12]; }; - /* Move / Reconfigure Tx Queues (indirect 0x0C32) */ struct ice_aqc_move_txqs { u8 cmd_type; @@ -2184,7 +2086,6 @@ struct ice_aqc_move_txqs { __le32 addr_low; }; - /* This is the descriptor of each queue entry for the move Tx LAN Queues * command (0x0C32). */ @@ -2195,15 +2096,12 @@ struct ice_aqc_move_txqs_elem { __le32 q_teid; }; - struct ice_aqc_move_txqs_data { __le32 src_teid; __le32 dest_teid; struct ice_aqc_move_txqs_elem txqs[1]; }; - - /* Download Package (indirect 0x0C40) */ /* Also used for Update Package (indirect 0x0C42) */ struct ice_aqc_download_pkg { @@ -2255,9 +2153,6 @@ struct ice_aqc_get_pkg_info_resp { struct ice_aqc_get_pkg_info pkg_info[1]; }; - - - /* Lan Queue Overflow Event (direct, 0x1001) */ struct ice_aqc_event_lan_overflow { __le32 prtdcb_ruptq; @@ -2265,9 +2160,6 @@ struct ice_aqc_event_lan_overflow { u8 reserved[8]; }; - - - /** * struct ice_aq_desc - Admin Queue (AQ) descriptor * @flags: ICE_AQ_FLAG_* flags @@ -2361,7 +2253,6 @@ struct ice_aq_desc { } params; }; - /* FW defined boundary for a large buffer, 4k >= Large buffer > 512 bytes */ #define ICE_AQ_LG_BUF 512 @@ -2572,8 +2463,6 @@ enum ice_adminq_opc { ice_aqc_opc_update_pkg = 0x0C42, ice_aqc_opc_get_pkg_info_list = 0x0C43, - - /* Standalone Commands/Events */ ice_aqc_opc_event_lan_overflow = 0x1001, }; diff --git a/drivers/net/ice/base/ice_bitops.h b/drivers/net/ice/base/ice_bitops.h index f0aa8ce88..32f64cac0 100644 --- a/drivers/net/ice/base/ice_bitops.h +++ b/drivers/net/ice/base/ice_bitops.h @@ -8,7 +8,6 @@ /* Define the size of the bitmap chunk */ typedef u32 ice_bitmap_t; - /* Number of bits per bitmap chunk */ #define BITS_PER_CHUNK (BITS_PER_BYTE * sizeof(ice_bitmap_t)) /* Determine which chunk a bit belongs in */ @@ -372,5 +371,4 @@ ice_cmp_bitmap(ice_bitmap_t *bmp1, ice_bitmap_t *bmp2, u16 size) return true; } - #endif /* _ICE_BITOPS_H_ */ diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index 11e902ea1..16b91dc12 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -11,7 +11,6 @@ #define ICE_PF_RESET_WAIT_COUNT 200 - /** * ice_set_mac_type - Sets MAC type * @hw: pointer to the HW structure @@ -41,7 +40,6 @@ static enum ice_status ice_set_mac_type(struct ice_hw *hw) return status; } - /** * ice_clear_pf_cfg - Clear PF configuration * @hw: pointer to the hardware structure @@ -113,7 +111,6 @@ ice_aq_manage_mac_read(struct ice_hw *hw, void *buf, u16 buf_size, ETH_ALEN, ICE_DMA_TO_NONDMA); break; } - return ICE_SUCCESS; } @@ -533,7 +530,6 @@ static void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw) ice_free(hw, sw); } - /** * ice_get_itr_intrl_gran * @hw: pointer to the HW struct @@ -598,7 +594,6 @@ void ice_print_rollback_msg(struct ice_hw *hw) &ver_lo); SNPRINTF(nvm_str, sizeof(nvm_str), "%x.%02x 0x%x %d.%d.%d", ver_hi, ver_lo, hw->nvm.eetrack, oem_ver, oem_build, oem_patch); - ice_warn(hw, "Firmware rollback mode detected. Current version is NVM: %s, FW: %d.%d. Device may exhibit limited functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware rollback mode", nvm_str, hw->fw_maj_ver, hw->fw_min_ver); @@ -617,7 +612,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw) ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__); - /* Set MAC type based on DeviceID */ status = ice_set_mac_type(hw); if (status) @@ -627,14 +621,12 @@ enum ice_status ice_init_hw(struct ice_hw *hw) PF_FUNC_RID_FUNCTION_NUMBER_M) >> PF_FUNC_RID_FUNCTION_NUMBER_S; - status = ice_reset(hw, ICE_RESET_PFR); if (status) return status; ice_get_itr_intrl_gran(hw); - status = ice_create_all_ctrlq(hw); if (status) goto err_unroll_cqinit; @@ -686,7 +678,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw) goto err_unroll_alloc; } - /* Initialize port_info struct with scheduler data */ status = ice_sched_init_port(hw->port_info); if (status) @@ -725,7 +716,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw) if (status) goto err_unroll_sched; - /* Get MAC information */ /* A single port can report up to two (LAN and WoL) addresses */ mac_buf = ice_calloc(hw, 2, @@ -926,7 +916,6 @@ enum ice_status ice_reset(struct ice_hw *hw, enum ice_reset_req req) wr32(hw, GLGEN_RTRIG, val); ice_flush(hw); - /* wait for the FW to be ready */ return ice_check_reset(hw); } @@ -997,8 +986,6 @@ ice_get_pfa_module_tlv(struct ice_hw *hw, u16 *module_tlv, u16 *module_tlv_len, return ICE_ERR_DOES_NOT_EXIST; } - - /** * ice_copy_rxq_ctx_to_hw * @hw: pointer to the hardware structure @@ -1321,7 +1308,6 @@ ice_clear_tx_drbell_q_ctx(struct ice_hw *hw, u32 tx_drbell_q_index) } #endif /* !NO_UNUSED_CTX_CODE || AE_DRIVER */ - /* FW Admin Queue command wrappers */ /** @@ -2142,7 +2128,6 @@ ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags, cmd->flags = flags; - /* Prep values for flags, sah, sal */ cmd->sah = HTONS(*((const u16 *)mac_addr)); cmd->sal = HTONL(*((const u32 *)(mac_addr + 2))); @@ -2179,7 +2164,6 @@ void ice_clear_pxe_mode(struct ice_hw *hw) ice_aq_clear_pxe_mode(hw); } - /** * ice_get_link_speed_based_on_phy_type - returns link speed * @phy_type_low: lower part of phy_type @@ -2848,7 +2832,6 @@ ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd) return ice_aq_send_cmd(hw, &desc, NULL, 0, cd); } - /** * ice_aq_set_port_id_led * @pi: pointer to the port information @@ -2869,7 +2852,6 @@ ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode, ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_port_id_led); - if (is_orig_mode) cmd->ident_mode = ICE_AQC_PORT_IDENT_LED_ORIG; else @@ -3357,7 +3339,6 @@ ice_aq_move_recfg_lan_txq(struct ice_hw *hw, u8 num_qs, bool is_move, return status; } - /* End of FW Admin Queue command wrappers */ /** @@ -3581,9 +3562,6 @@ ice_set_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info) return ICE_SUCCESS; } - - - /** * ice_read_byte - read context byte into struct * @src_ctx: the context structure to read from @@ -4047,8 +4025,6 @@ ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap, ICE_SCHED_NODE_OWNER_LAN); } - - /** * ice_replay_pre_init - replay pre initialization * @hw: pointer to the HW struct @@ -4246,7 +4222,6 @@ ice_stat_update_repc(struct ice_hw *hw, u16 vsi_handle, bool prev_stat_loaded, cur_stats->rx_errors += error_cnt; } - /** * ice_sched_query_elem - query element information from HW * @hw: pointer to the HW struct diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h index c42c58670..bcb0a999d 100644 --- a/drivers/net/ice/base/ice_common.h +++ b/drivers/net/ice/base/ice_common.h @@ -169,7 +169,6 @@ ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask, enum ice_status ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd); - enum ice_status ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode, struct ice_sq_cd *cd); @@ -178,7 +177,6 @@ ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr, u16 mem_addr, u8 page, u8 set_page, u8 *data, u8 length, bool write, struct ice_sq_cd *cd); - enum ice_status ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info); enum ice_status diff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c index 1ea8f3a24..8a65fae40 100644 --- a/drivers/net/ice/base/ice_controlq.c +++ b/drivers/net/ice/base/ice_controlq.c @@ -4,7 +4,6 @@ #include "ice_common.h" - #define ICE_CQ_INIT_REGS(qinfo, prefix) \ do { \ (qinfo)->sq.head = prefix##_ATQH; \ @@ -53,7 +52,6 @@ static void ice_mailbox_init_regs(struct ice_hw *hw) ICE_CQ_INIT_REGS(cq, PF_MBX); } - /** * ice_check_sq_alive * @hw: pointer to the HW struct @@ -521,7 +519,6 @@ ice_shutdown_rq(struct ice_hw *hw, struct ice_ctl_q_info *cq) return ret_code; } - /** * ice_init_check_adminq - Check version for Admin Queue to know if its alive * @hw: pointer to the hardware structure @@ -533,12 +530,10 @@ static enum ice_status ice_init_check_adminq(struct ice_hw *hw) ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__); - status = ice_aq_get_fw_ver(hw, NULL); if (status) goto init_ctrlq_free_rq; - if (!ice_aq_ver_check(hw)) { status = ICE_ERR_FW_API_VER; goto init_ctrlq_free_rq; @@ -633,7 +628,6 @@ enum ice_status ice_init_all_ctrlq(struct ice_hw *hw) ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__); - /* Init FW admin queue */ ret_code = ice_init_ctrlq(hw, ICE_CTL_Q_ADMIN); if (ret_code) @@ -972,7 +966,6 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq, ice_debug_cq(hw, (void *)desc_on_ring, buf, buf_size); - (cq->sq.next_to_use)++; if (cq->sq.next_to_use == cq->sq.count) cq->sq.next_to_use = 0; @@ -1025,7 +1018,6 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq, ice_debug_cq(hw, (void *)desc, buf, buf_size); - /* save writeback AQ if requested */ if (details->wb_desc) ice_memcpy(details->wb_desc, desc_on_ring, @@ -1158,7 +1150,6 @@ ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq, ice_debug_cq(hw, (void *)desc, e->msg_buf, cq->rq_buf_size); - /* Restore the original datalen and buffer address in the desc, * FW updates datalen to indicate the event message size */ diff --git a/drivers/net/ice/base/ice_controlq.h b/drivers/net/ice/base/ice_controlq.h index b1214f670..8ad7857c8 100644 --- a/drivers/net/ice/base/ice_controlq.h +++ b/drivers/net/ice/base/ice_controlq.h @@ -7,7 +7,6 @@ #include "ice_adminq_cmd.h" - /* Maximum buffer lengths for all control queue types */ #define ICE_AQ_MAX_BUF_LEN 4096 #define ICE_MBXQ_MAX_BUF_LEN 4096 diff --git a/drivers/net/ice/base/ice_devids.h b/drivers/net/ice/base/ice_devids.h index c9a567fb1..0ff3b9b34 100644 --- a/drivers/net/ice/base/ice_devids.h +++ b/drivers/net/ice/base/ice_devids.h @@ -5,7 +5,6 @@ #ifndef _ICE_DEVIDS_H_ #define _ICE_DEVIDS_H_ - /* Device IDs */ /* Intel(R) Ethernet Controller E810-C for backplane */ #define ICE_DEV_ID_E810C_BACKPLANE 0x1591 diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 4ad816874..05cd39b17 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -808,7 +808,6 @@ ice_aq_download_pkg(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf, return status; } - /** * ice_aq_update_pkg * @hw: pointer to the hardware structure @@ -1180,7 +1179,6 @@ static enum ice_status ice_get_pkg_info(struct ice_hw *hw) return status; } - /** * ice_verify_pkg - verify package * @pkg: pointer to the package buffer @@ -2084,7 +2082,6 @@ ice_find_prot_off(struct ice_hw *hw, enum ice_block blk, u8 prof, u8 fv_idx, /* PTG Management */ - /** * ice_ptg_find_ptype - Search for packet type group using packet type (ptype) * @hw: pointer to the hardware structure @@ -2121,7 +2118,6 @@ void ice_ptg_alloc_val(struct ice_hw *hw, enum ice_block blk, u8 ptg) hw->blk[blk].xlt1.ptg_tbl[ptg].in_use = true; } - /** * ice_ptg_remove_ptype - Removes ptype from a particular packet type group * @hw: pointer to the hardware structure @@ -2315,7 +2311,6 @@ ice_match_prop_lst(struct LIST_HEAD_TYPE *list1, struct LIST_HEAD_TYPE *list2) /* VSIG Management */ - /** * ice_vsig_find_vsi - find a VSIG that contains a specified VSI * @hw: pointer to the hardware structure diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h index 3b5c1c39a..137eaa7f8 100644 --- a/drivers/net/ice/base/ice_flex_pipe.h +++ b/drivers/net/ice/base/ice_flex_pipe.h @@ -46,7 +46,6 @@ bool ice_tunnel_port_in_use(struct ice_hw *hw, u16 port, u16 *index); bool ice_tunnel_get_type(struct ice_hw *hw, u16 port, enum ice_tunnel_type *type); - /* XLT2/VSI group functions */ enum ice_status ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig); diff --git a/drivers/net/ice/base/ice_hw_autogen.h b/drivers/net/ice/base/ice_hw_autogen.h index 6f227adb8..92d432044 100644 --- a/drivers/net/ice/base/ice_hw_autogen.h +++ b/drivers/net/ice/base/ice_hw_autogen.h @@ -6,8 +6,6 @@ #ifndef _ICE_HW_AUTOGEN_H_ #define _ICE_HW_AUTOGEN_H_ - - #define GL_RDPU_CNTRL 0x00052054 /* Reset Source: CORER */ #define GL_RDPU_CNTRL_RX_PAD_EN_S 0 #define GL_RDPU_CNTRL_RX_PAD_EN_M BIT(0) diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h index e77d4bf50..a97c63cc9 100644 --- a/drivers/net/ice/base/ice_lan_tx_rx.h +++ b/drivers/net/ice/base/ice_lan_tx_rx.h @@ -173,7 +173,6 @@ struct ice_fltr_desc { (0xFFFFFFFFULL << ICE_FXD_FLTR_QW1_FDID_S) #define ICE_FXD_FLTR_QW1_FDID_ZERO 0x0ULL - enum ice_rx_desc_status_bits { /* Note: These are predefined bit offsets */ ICE_RX_DESC_STATUS_DD_S = 0, @@ -204,7 +203,6 @@ enum ice_rx_desc_status_bits { #define ICE_RXD_QW1_STATUS_TSYNVALID_S ICE_RX_DESC_STATUS_TSYNVALID_S #define ICE_RXD_QW1_STATUS_TSYNVALID_M BIT_ULL(ICE_RXD_QW1_STATUS_TSYNVALID_S) - enum ice_rx_desc_fltstat_values { ICE_RX_DESC_FLTSTAT_NO_DATA = 0, ICE_RX_DESC_FLTSTAT_RSV_FD_ID = 1, /* 16byte desc? FD_ID : RSV */ @@ -212,7 +210,6 @@ enum ice_rx_desc_fltstat_values { ICE_RX_DESC_FLTSTAT_RSS_HASH = 3, }; - #define ICE_RXD_QW1_ERROR_S 19 #define ICE_RXD_QW1_ERROR_M (0xFFUL << ICE_RXD_QW1_ERROR_S) @@ -310,7 +307,6 @@ enum ice_rx_ptype_payload_layer { ICE_RX_PTYPE_PAYLOAD_LAYER_PAY4 = 3, }; - #define ICE_RXD_QW1_LEN_PBUF_S 38 #define ICE_RXD_QW1_LEN_PBUF_M (0x3FFFULL << ICE_RXD_QW1_LEN_PBUF_S) @@ -320,7 +316,6 @@ enum ice_rx_ptype_payload_layer { #define ICE_RXD_QW1_LEN_SPH_S 63 #define ICE_RXD_QW1_LEN_SPH_M BIT_ULL(ICE_RXD_QW1_LEN_SPH_S) - enum ice_rx_desc_ext_status_bits { /* Note: These are predefined bit offsets */ ICE_RX_DESC_EXT_STATUS_L2TAG2P_S = 0, @@ -331,7 +326,6 @@ enum ice_rx_desc_ext_status_bits { ICE_RX_DESC_EXT_STATUS_PELONGB_S = 11, }; - enum ice_rx_desc_pe_status_bits { /* Note: These are predefined bit offsets */ ICE_RX_DESC_PE_STATUS_QPID_S = 0, /* 18 BITS */ @@ -352,7 +346,6 @@ enum ice_rx_desc_pe_status_bits { #define ICE_RX_PROG_STATUS_DESC_QW1_PROGID_M \ (0x7UL << ICE_RX_PROG_STATUS_DESC_QW1_PROGID_S) - #define ICE_RX_PROG_STATUS_DESC_QW1_ERROR_S 19 #define ICE_RX_PROG_STATUS_DESC_QW1_ERROR_M \ (0x3FUL << ICE_RX_PROG_STATUS_DESC_QW1_ERROR_S) @@ -840,7 +833,6 @@ enum ice_rx_flex_desc_exstat_bits { ICE_RX_FLEX_DESC_EXSTAT_OVERSIZE_S = 3, }; - #define ICE_RXQ_CTX_SIZE_DWORDS 8 #define ICE_RXQ_CTX_SZ (ICE_RXQ_CTX_SIZE_DWORDS * sizeof(u32)) #define ICE_TX_CMPLTNQ_CTX_SIZE_DWORDS 22 @@ -1056,7 +1048,6 @@ enum ice_tx_ctx_desc_eipt_offload { #define ICE_TXD_CTX_QW0_L4T_CS_S 23 #define ICE_TXD_CTX_QW0_L4T_CS_M BIT_ULL(ICE_TXD_CTX_QW0_L4T_CS_S) - #define ICE_LAN_TXQ_MAX_QGRPS 127 #define ICE_LAN_TXQ_MAX_QDIS 1023 diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c index 66cfec641..e00942528 100644 --- a/drivers/net/ice/base/ice_nvm.c +++ b/drivers/net/ice/base/ice_nvm.c @@ -4,7 +4,6 @@ #include "ice_common.h" - /** * ice_aq_read_nvm * @hw: pointer to the HW struct @@ -138,7 +137,6 @@ ice_read_sr_word_aq(struct ice_hw *hw, u16 offset, u16 *data) return status; } - /** * ice_read_sr_buf_aq - Reads Shadow RAM buf via AQ * @hw: pointer to the HW structure @@ -354,7 +352,6 @@ enum ice_status ice_init_nvm(struct ice_hw *hw) return ICE_SUCCESS; } - /** * ice_read_sr_buf - Reads Shadow RAM buf and acquire lock if necessary * @hw: pointer to the HW structure @@ -380,7 +377,6 @@ ice_read_sr_buf(struct ice_hw *hw, u16 offset, u16 *words, u16 *data) return status; } - /** * ice_nvm_validate_checksum * @hw: pointer to the HW struct diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h index 91f56f3fa..cdb691523 100644 --- a/drivers/net/ice/base/ice_protocol_type.h +++ b/drivers/net/ice/base/ice_protocol_type.h @@ -114,7 +114,6 @@ enum ice_prot_id { #define ICE_VNI_OFFSET 12 /* offset of VNI from ICE_PROT_UDP_OF */ - #define ICE_MAC_OFOS_HW 1 #define ICE_MAC_IL_HW 4 #define ICE_ETYPE_OL_HW 9 @@ -148,7 +147,6 @@ struct ice_protocol_entry { u8 protocol_id; }; - struct ice_ether_hdr { u8 dst_addr[ETH_ALEN]; u8 src_addr[ETH_ALEN]; diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c index 1cfc3bc20..6732e291a 100644 --- a/drivers/net/ice/base/ice_sched.c +++ b/drivers/net/ice/base/ice_sched.c @@ -4,7 +4,6 @@ #include "ice_sched.h" - /** * ice_sched_add_root_node - Insert the Tx scheduler root node in SW DB * @pi: port information structure @@ -876,7 +875,6 @@ ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_l2_nodes, return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd); } - /** * ice_sched_add_elems - add nodes to HW and SW DB * @pi: port information structure @@ -1366,7 +1364,6 @@ enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw) goto sched_query_out; } - sched_query_out: ice_free(hw, buf); return status; @@ -2021,7 +2018,6 @@ enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle) return ice_sched_rm_vsi_cfg(pi, vsi_handle, ICE_SCHED_NODE_OWNER_LAN); } - /** * ice_sched_is_tree_balanced - Check tree nodes are identical or not * @hw: pointer to the HW struct diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 2437faead..00358e4db 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -6,7 +6,6 @@ #include "ice_flex_type.h" #include "ice_flow.h" - #define ICE_ETH_DA_OFFSET 0 #define ICE_ETH_ETHTYPE_OFFSET 12 #define ICE_ETH_VLAN_TCI_OFFSET 14 @@ -743,7 +742,6 @@ ice_aq_get_sw_cfg(struct ice_hw *hw, struct ice_aqc_get_sw_cfg_resp *buf, return status; } - /** * ice_alloc_sw - allocate resources specific to switch * @hw: pointer to the HW struct @@ -1787,13 +1785,11 @@ enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw) } } while (req_desc && !status); - out: ice_free(hw, (void *)rbuf); return status; } - /** * ice_fill_sw_info - Helper function to populate lb_en and lan_en * @hw: pointer to the hardware structure @@ -3424,7 +3420,6 @@ ice_remove_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list) return ICE_SUCCESS; } - /** * ice_rem_sw_rule_info * @hw: pointer to the hardware structure @@ -3823,7 +3818,6 @@ ice_add_to_vsi_fltr_list(struct ice_hw *hw, u16 vsi_handle, return status; } - /** * ice_determine_promisc_mask * @fi: filter info to parse @@ -4811,8 +4805,6 @@ ice_fill_valid_words(struct ice_adv_lkup_elem *rule, return ret_val; } - - /** * ice_create_first_fit_recp_def - Create a recipe grouping * @hw: pointer to the hardware structure diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h index 515ad3bb6..0f0a1e98e 100644 --- a/drivers/net/ice/base/ice_switch.h +++ b/drivers/net/ice/base/ice_switch.h @@ -15,7 +15,6 @@ #define ICE_FLTR_TX BIT(1) #define ICE_FLTR_TX_RX (ICE_FLTR_RX | ICE_FLTR_TX) - /* Worst case buffer length for ice_aqc_opc_get_res_alloc */ #define ICE_MAX_RES_TYPES 0x80 #define ICE_AQ_GET_RES_ALLOC_BUF_LEN \ @@ -391,7 +390,6 @@ enum ice_status ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info); void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle); - /* Promisc/defport setup for VSIs */ enum ice_status ice_cfg_dflt_vsi(struct ice_port_info *pi, u16 vsi_handle, bool set, diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index deb614e37..150b4c5c5 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -134,10 +134,6 @@ static inline u32 ice_round_to_num(u32 N, u32 R) #define __ALWAYS_UNUSED #endif - - - - #define IS_ETHER_ADDR_EQUAL(addr1, addr2) \ (((bool)((((u16 *)(addr1))[0] == ((u16 *)(addr2))[0]))) && \ ((bool)((((u16 *)(addr1))[1] == ((u16 *)(addr2))[1]))) && \ @@ -384,7 +380,6 @@ struct ice_hw_common_caps { u8 proxy_support; }; - /* Function specific capabilities */ struct ice_hw_func_caps { struct ice_hw_common_caps common_cap; @@ -401,7 +396,6 @@ struct ice_hw_dev_caps { u32 num_funcs; }; - /* Information about MAC such as address, etc... */ struct ice_mac_info { u8 lan_addr[ETH_ALEN]; @@ -567,7 +561,6 @@ enum ice_rl_type { #define ICE_TXSCHED_GET_RL_WAKEUP_MV(p) LE16_TO_CPU((p)->info.wake_up_calc) #define ICE_TXSCHED_GET_RL_ENCODE(p) LE16_TO_CPU((p)->info.rl_encode) - /* The following tree example shows the naming conventions followed under * ice_port_info struct for default scheduler tree topology. * @@ -729,7 +722,6 @@ struct ice_switch_info { struct ice_sw_recipe *recp_list; }; - /* Port hardware description */ struct ice_hw { u8 *hw_addr; @@ -787,7 +779,6 @@ struct ice_hw { u8 fw_patch; /* firmware patch version */ u32 fw_build; /* firmware build number */ - /* Device max aggregate bandwidths corresponding to the GL_PWR_MODE_CTL * register. Used for determining the ITR/INTRL granularity during * initialization. -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 02/30] net/ice/base: add support for tunnel packets 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 01/30] net/ice/base: remove redundant empty lines Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 03/30] net/ice/base: add non-word aligned ip field support Qi Zhang ` (28 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Henry Tieman, Paul M Stillwell Jr Add VXLAN tunnel training packets to flow director and change the interface to support tunnel packets. Signed-off-by: Henry Tieman <henry.w.tieman@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 266 ++++++++++++++++++++++++++++++++-------- drivers/net/ice/base/ice_fdir.h | 8 +- drivers/net/ice/base/ice_type.h | 10 +- 3 files changed, 228 insertions(+), 56 deletions(-) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index 9ef91b3b8..b92603e10 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -5,7 +5,7 @@ #include "ice_common.h" #include "ice_fdir.h" -/* These are dummy packet headers used to program flow director filters. */ +/* These are training packet headers used to program flow director filters. */ static const u8 ice_fdir_tcpv4_pkt[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, @@ -88,47 +88,177 @@ static const u8 ice_fdir_ipv6_pkt[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, }; -/* Flow Director dummy packet table */ +static const u8 ice_fdir_tcp4_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x5a, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + 0x45, 0x00, 0x00, 0x28, 0x00, 0x00, 0x40, 0x00, + 0x40, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x50, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_udp4_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x4e, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + 0x45, 0x00, 0x00, 0x1c, 0x00, 0x00, 0x40, 0x00, + 0x40, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_sctp4_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x52, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + 0x45, 0x00, 0x00, 0x20, 0x00, 0x01, 0x00, 0x00, + 0x40, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_ip4_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x46, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + 0x45, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x00, + 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_tcp6_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x6e, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, + 0x60, 0x00, 0x00, 0x00, 0x00, 0x14, 0x06, 0x40, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x50, 0x00, 0x20, 0x00, + 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_udp6_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x62, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, + 0x60, 0x00, 0x00, 0x00, 0x00, 0x08, 0x11, 0x40, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_sctp6_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x66, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, + 0x60, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x84, 0x40, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_ip6_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x5a, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, + 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3b, 0x40, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + +/* Flow Director no-op training packet table */ static const struct ice_fdir_base_pkt ice_fdir_pkt[] = { { ICE_FLTR_PTYPE_NONF_IPV4_TCP, - sizeof(ice_fdir_tcpv4_pkt), - ice_fdir_tcpv4_pkt, + sizeof(ice_fdir_tcpv4_pkt), ice_fdir_tcpv4_pkt, + sizeof(ice_fdir_tcp4_tun_pkt), ice_fdir_tcp4_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV4_UDP, - sizeof(ice_fdir_udpv4_pkt), - ice_fdir_udpv4_pkt, + sizeof(ice_fdir_udpv4_pkt), ice_fdir_udpv4_pkt, + sizeof(ice_fdir_udp4_tun_pkt), ice_fdir_udp4_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV4_SCTP, - sizeof(ice_fdir_sctpv4_pkt), - ice_fdir_sctpv4_pkt, + sizeof(ice_fdir_sctpv4_pkt), ice_fdir_sctpv4_pkt, + sizeof(ice_fdir_sctp4_tun_pkt), ice_fdir_sctp4_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV4_OTHER, - sizeof(ice_fdir_ipv4_pkt), - ice_fdir_ipv4_pkt, + sizeof(ice_fdir_ipv4_pkt), ice_fdir_ipv4_pkt, + sizeof(ice_fdir_ip4_tun_pkt), ice_fdir_ip4_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV6_TCP, - sizeof(ice_fdir_tcpv6_pkt), - ice_fdir_tcpv6_pkt, + sizeof(ice_fdir_tcpv6_pkt), ice_fdir_tcpv6_pkt, + sizeof(ice_fdir_tcp6_tun_pkt), ice_fdir_tcp6_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV6_UDP, - sizeof(ice_fdir_udpv6_pkt), - ice_fdir_udpv6_pkt, + sizeof(ice_fdir_udpv6_pkt), ice_fdir_udpv6_pkt, + sizeof(ice_fdir_udp6_tun_pkt), ice_fdir_udp6_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV6_SCTP, - sizeof(ice_fdir_sctpv6_pkt), - ice_fdir_sctpv6_pkt, + sizeof(ice_fdir_sctpv6_pkt), ice_fdir_sctpv6_pkt, + sizeof(ice_fdir_sctp6_tun_pkt), ice_fdir_sctp6_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV6_OTHER, - sizeof(ice_fdir_ipv6_pkt), - ice_fdir_ipv6_pkt, + sizeof(ice_fdir_ipv6_pkt), ice_fdir_ipv6_pkt, + sizeof(ice_fdir_ip6_tun_pkt), ice_fdir_ip6_tun_pkt, }, }; @@ -377,15 +507,20 @@ static void ice_pkt_insert_u32(u8 *pkt, int offset, __be32 data) } /** - * ice_fdir_get_prgm_pkt - generate a dummy packet + * ice_fdir_get_gen_prgm_pkt - generate a training packet + * @hw: pointer to the hardware structure * @input: flow director filter data structure * @pkt: pointer to return filter packet * @frag: generate a fragment packet + * @tun: true implies generate a tunnel packet */ enum ice_status -ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag) +ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, + u8 *pkt, bool frag, bool tun) { enum ice_fltr_ptype flow; + u16 tnl_port; + u8 *loc; u16 idx; if (input->flow_type == ICE_FLTR_PTYPE_NONF_IPV4_OTHER) { @@ -431,83 +566,96 @@ ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag) break; if (idx == ICE_FDIR_NUM_PKT) return ICE_ERR_PARAM; - ice_memcpy(pkt, ice_fdir_pkt[idx].pkt, ice_fdir_pkt[idx].pkt_len, - ICE_NONDMA_TO_NONDMA); + if (!tun) { + ice_memcpy(pkt, ice_fdir_pkt[idx].pkt, + ice_fdir_pkt[idx].pkt_len, ICE_NONDMA_TO_NONDMA); + loc = pkt; + } else { + if (!ice_get_open_tunnel_port(hw, TNL_ALL, &tnl_port)) + return ICE_ERR_DOES_NOT_EXIST; + if (!ice_fdir_pkt[idx].tun_pkt) + return ICE_ERR_PARAM; + ice_memcpy(pkt, ice_fdir_pkt[idx].tun_pkt, + ice_fdir_pkt[idx].tun_pkt_len, ICE_NONDMA_TO_NONDMA); + ice_pkt_insert_u16(pkt, ICE_IPV4_UDP_DST_PORT_OFFSET, + HTONS(tnl_port)); + loc = &pkt[ICE_FDIR_TUN_PKT_OFF]; + } switch (flow) { case ICE_FLTR_PTYPE_NONF_IPV4_TCP: - ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, input->ip.v4.dst_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_TCP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_TCP_DST_PORT_OFFSET, input->ip.v4.dst_port); - ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET, input->ip.v4.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_TCP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_TCP_SRC_PORT_OFFSET, input->ip.v4.src_port); if (frag) - pkt[20] = ICE_FDIR_IPV4_PKT_FLAG_DF; + loc[20] = ICE_FDIR_IPV4_PKT_FLAG_DF; break; case ICE_FLTR_PTYPE_NONF_IPV4_UDP: - ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, input->ip.v4.dst_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_UDP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_UDP_DST_PORT_OFFSET, input->ip.v4.dst_port); - ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET, input->ip.v4.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_UDP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_UDP_SRC_PORT_OFFSET, input->ip.v4.src_port); break; case ICE_FLTR_PTYPE_NONF_IPV4_SCTP: - ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, input->ip.v4.dst_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_SCTP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_SCTP_DST_PORT_OFFSET, input->ip.v4.dst_port); - ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET, input->ip.v4.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_SCTP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_SCTP_SRC_PORT_OFFSET, input->ip.v4.src_port); break; case ICE_FLTR_PTYPE_NONF_IPV4_OTHER: - ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, input->ip.v4.dst_ip); - ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET, input->ip.v4.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_PROTO_OFFSET, 0); + ice_pkt_insert_u16(loc, ICE_IPV4_PROTO_OFFSET, 0); break; case ICE_FLTR_PTYPE_NONF_IPV6_TCP: - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, input->ip.v6.dst_ip); - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET, input->ip.v6.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV6_TCP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_TCP_DST_PORT_OFFSET, input->ip.v6.dst_port); - ice_pkt_insert_u16(pkt, ICE_IPV6_TCP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_TCP_SRC_PORT_OFFSET, input->ip.v6.src_port); break; case ICE_FLTR_PTYPE_NONF_IPV6_UDP: - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, input->ip.v6.dst_ip); - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET, input->ip.v6.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV6_UDP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_UDP_DST_PORT_OFFSET, input->ip.v6.dst_port); - ice_pkt_insert_u16(pkt, ICE_IPV6_UDP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_UDP_SRC_PORT_OFFSET, input->ip.v6.src_port); break; case ICE_FLTR_PTYPE_NONF_IPV6_SCTP: - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, input->ip.v6.dst_ip); - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET, input->ip.v6.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV6_SCTP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_SCTP_DST_PORT_OFFSET, input->ip.v6.dst_port); - ice_pkt_insert_u16(pkt, ICE_IPV6_SCTP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_SCTP_SRC_PORT_OFFSET, input->ip.v6.src_port); break; case ICE_FLTR_PTYPE_NONF_IPV6_OTHER: - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, input->ip.v6.dst_ip); - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET, input->ip.v6.src_ip); break; default: @@ -515,12 +663,24 @@ ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag) } if (input->flex_fltr) - ice_pkt_insert_u16(pkt, input->flex_offset, input->flex_word); + ice_pkt_insert_u16(loc, input->flex_offset, input->flex_word); return ICE_SUCCESS; } /** + * ice_fdir_get_prgm_pkt - generate a training packet + * @input: flow director filter data structure + * @pkt: pointer to return filter packet + * @frag: generate a fragment packet + */ +enum ice_status +ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag) +{ + return ice_fdir_get_gen_prgm_pkt(NULL, input, pkt, frag, false); +} + +/** * ice_fdir_has_frag - does flow type have 2 ptypes * @flow: flow ptype * diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index 8490fac61..9e7e22033 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -58,7 +58,8 @@ enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw); #define ICE_IP_PROTO_IP 0 #define ICE_IP_PROTO_ESP 50 -#define ICE_FDIR_MAX_RAW_PKT_SIZE 512 +#define ICE_FDIR_TUN_PKT_OFF 50 +#define ICE_FDIR_MAX_RAW_PKT_SIZE (512 + ICE_FDIR_TUN_PKT_OFF) #define ICE_FDIR_BUF_FULL_MARGIN 10 #define ICE_FDIR_BUF_HEAD_ROOM 32 @@ -175,12 +176,17 @@ struct ice_fdir_base_pkt { enum ice_fltr_ptype flow; u16 pkt_len; const u8 *pkt; + u16 tun_pkt_len; + const u8 *tun_pkt; }; void ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input, struct ice_fltr_desc *fdesc, bool add); enum ice_status +ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, + u8 *pkt, bool frag, bool tun); +enum ice_status ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag); enum ice_status ice_add_del_fdir(struct ice_hw *hw, struct ice_fdir_fltr *input, bool add); diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index 150b4c5c5..7d0a4f63f 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -296,13 +296,19 @@ enum ice_fltr_ptype { ICE_FLTR_PTYPE_MAX, }; +enum ice_fd_hw_seg { + ICE_FD_HW_SEG_NON_TUN = 0, + ICE_FD_HW_SEG_TUN, + ICE_FD_HW_SEG_MAX, +}; + /* 2 VSI = 1 ICE_VSI_PF + 1 ICE_VSI_CTRL */ #define ICE_MAX_FDIR_VSI_PER_FILTER 2 struct ice_fd_hw_prof { - struct ice_flow_seg_info *fdir_seg; + struct ice_flow_seg_info *fdir_seg[ICE_FD_HW_SEG_MAX]; int cnt; - u64 entry_h[ICE_MAX_FDIR_VSI_PER_FILTER]; + u64 entry_h[ICE_MAX_FDIR_VSI_PER_FILTER][ICE_FD_HW_SEG_MAX]; u16 vsi_h[ICE_MAX_FDIR_VSI_PER_FILTER]; }; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 03/30] net/ice/base: add non-word aligned ip field support 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 01/30] net/ice/base: remove redundant empty lines Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 02/30] net/ice/base: add support for tunnel packets Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 04/30] net/ice/base: add non-word aligned ipv6 " Qi Zhang ` (27 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Add non-word aligned field support for ipv4 with ttl, tos and proto. All these fields are one byte within one word. In order to match bytes within the IPv4 header for flow director we need to use a mask. Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 30 +++++++++++++++++++++++------- drivers/net/ice/base/ice_fdir.h | 4 ++++ 2 files changed, 27 insertions(+), 7 deletions(-) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index b92603e10..db5bbc6ad 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -485,6 +485,17 @@ static void ice_pkt_insert_ipv6_addr(u8 *pkt, int offset, __be32 *addr) } /** + * ice_pkt_insert_u8 - insert a u8 value into a memory buffer. + * @pkt: packet buffer + * @offset: offset into buffer + * @data: 8 bit value to convert and insert into pkt at offset + */ +static void ice_pkt_insert_u8(u8 *pkt, int offset, u8 data) +{ + ice_memcpy(pkt + offset, &data, sizeof(data), ICE_NONDMA_TO_NONDMA); +} + +/** * ice_pkt_insert_u16 - insert a be16 value into a memory buffer. * @pkt: packet buffer * @offset: offset into buffer @@ -534,11 +545,9 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, case ICE_IP_PROTO_SCTP: flow = ICE_FLTR_PTYPE_NONF_IPV4_SCTP; break; - case ICE_IP_PROTO_IP: + default: flow = ICE_FLTR_PTYPE_NONF_IPV4_OTHER; break; - default: - return ICE_ERR_PARAM; } } else if (input->flow_type == ICE_FLTR_PTYPE_NONF_IPV6_OTHER) { switch (input->ip.v6.proto) { @@ -551,11 +560,9 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, case ICE_IP_PROTO_SCTP: flow = ICE_FLTR_PTYPE_NONF_IPV6_SCTP; break; - case ICE_IP_PROTO_IP: + default: flow = ICE_FLTR_PTYPE_NONF_IPV6_OTHER; break; - default: - return ICE_ERR_PARAM; } } else { flow = input->flow_type; @@ -592,6 +599,8 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.src_ip); ice_pkt_insert_u16(loc, ICE_IPV4_TCP_SRC_PORT_OFFSET, input->ip.v4.src_port); + ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); + ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); if (frag) loc[20] = ICE_FDIR_IPV4_PKT_FLAG_DF; break; @@ -604,6 +613,8 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.src_ip); ice_pkt_insert_u16(loc, ICE_IPV4_UDP_SRC_PORT_OFFSET, input->ip.v4.src_port); + ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); + ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); break; case ICE_FLTR_PTYPE_NONF_IPV4_SCTP: ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, @@ -614,13 +625,18 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.src_ip); ice_pkt_insert_u16(loc, ICE_IPV4_SCTP_SRC_PORT_OFFSET, input->ip.v4.src_port); + ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); + ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); break; case ICE_FLTR_PTYPE_NONF_IPV4_OTHER: ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, input->ip.v4.dst_ip); ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET, input->ip.v4.src_ip); - ice_pkt_insert_u16(loc, ICE_IPV4_PROTO_OFFSET, 0); + ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); + ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); + ice_pkt_insert_u8(loc, ICE_IPV4_PROTO_OFFSET, + input->ip.v4.proto); break; case ICE_FLTR_PTYPE_NONF_IPV6_TCP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index 9e7e22033..e817057c8 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -82,6 +82,9 @@ enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw); #define ICE_IPV6_SCTP_SRC_PORT_OFFSET 54 #define ICE_IPV6_SCTP_DST_PORT_OFFSET 56 +#define ICE_IPV4_TOS_OFFSET 15 +#define ICE_IPV4_TTL_OFFSET 22 + #define ICE_FDIR_MAX_FLTRS 16384 /* IP v4 has 2 flag bits that enable fragment processing: DF and MF. DF @@ -123,6 +126,7 @@ struct ice_fdir_v4 { u8 tos; u8 ip_ver; u8 proto; + u8 ttl; }; #define ICE_IPV6_ADDR_LEN_AS_U32 4 -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 04/30] net/ice/base: add non-word aligned ipv6 field support 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (2 preceding siblings ...) 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 03/30] net/ice/base: add non-word aligned ip field support Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 05/30] net/ice/base: correct the mask for checking protocol header Qi Zhang ` (26 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Add non-word aligned field support for IPv6 with hlim, tc and proto. All these fields are one byte within one word. In order to match bytes within the IPv6 header for flow director we need to use a mask. Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 32 ++++++++++++++++++++++++++++++++ drivers/net/ice/base/ice_fdir.h | 4 ++++ 2 files changed, 36 insertions(+) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index db5bbc6ad..e35506006 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -496,6 +496,28 @@ static void ice_pkt_insert_u8(u8 *pkt, int offset, u8 data) } /** + * ice_pkt_insert_u8_tc - insert a u8 value into a memory buffer for tc ipv6. + * @pkt: packet buffer + * @offset: offset into buffer + * @data: 8 bit value to convert and insert into pkt at offset + * + * This function is designed for inserting Traffic Class (tc) for IPv6, + * since that tc is not aligned in number of bytes. Here we split it out + * into two part and fill each byte with data copy from pkt, then insert + * the two bytes data one by one. + */ +static void ice_pkt_insert_u8_tc(u8 *pkt, int offset, u8 data) +{ + u8 high, low; + + high = (data >> 4) + (*(pkt + offset) & 0xF0); + ice_memcpy(pkt + offset, &high, sizeof(high), ICE_NONDMA_TO_NONDMA); + + low = (*(pkt + offset + 1) & 0x0F) + ((data & 0x0F) << 4); + ice_memcpy(pkt + offset + 1, &low, sizeof(low), ICE_NONDMA_TO_NONDMA); +} + +/** * ice_pkt_insert_u16 - insert a be16 value into a memory buffer. * @pkt: packet buffer * @offset: offset into buffer @@ -647,6 +669,8 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v6.dst_port); ice_pkt_insert_u16(loc, ICE_IPV6_TCP_SRC_PORT_OFFSET, input->ip.v6.src_port); + ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); + ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); break; case ICE_FLTR_PTYPE_NONF_IPV6_UDP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, @@ -657,6 +681,8 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v6.dst_port); ice_pkt_insert_u16(loc, ICE_IPV6_UDP_SRC_PORT_OFFSET, input->ip.v6.src_port); + ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); + ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); break; case ICE_FLTR_PTYPE_NONF_IPV6_SCTP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, @@ -667,12 +693,18 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v6.dst_port); ice_pkt_insert_u16(loc, ICE_IPV6_SCTP_SRC_PORT_OFFSET, input->ip.v6.src_port); + ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); + ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); break; case ICE_FLTR_PTYPE_NONF_IPV6_OTHER: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, input->ip.v6.dst_ip); ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET, input->ip.v6.src_ip); + ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); + ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); + ice_pkt_insert_u8(loc, ICE_IPV6_PROTO_OFFSET, + input->ip.v6.proto); break; default: return ICE_ERR_PARAM; diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index e817057c8..e0f3cd481 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -84,6 +84,9 @@ enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw); #define ICE_IPV4_TOS_OFFSET 15 #define ICE_IPV4_TTL_OFFSET 22 +#define ICE_IPV6_TC_OFFSET 14 +#define ICE_IPV6_HLIM_OFFSET 21 +#define ICE_IPV6_PROTO_OFFSET 20 #define ICE_FDIR_MAX_FLTRS 16384 @@ -140,6 +143,7 @@ struct ice_fdir_v6 { __be32 sec_parm_idx; /* security parameter index */ u8 tc; u8 proto; + u8 hlim; }; struct ice_fdir_extra { -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 05/30] net/ice/base: correct the mask for checking protocol header 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (3 preceding siblings ...) 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 04/30] net/ice/base: add non-word aligned ipv6 " Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 06/30] net/ice/base: propagate errors from functions Qi Zhang ` (25 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Zhirun Yan, Paul M Stillwell Jr Before this patch, the logic of protocol header checking only support non-tunneled packet. This patch remove the inner protocol in L3/L4 RSS seg hdr mask and change the protocol header validation to reflect this. So, for ice_add_rss_cfg(), the last parameter addl_hdrs could specify the protocol header for tunnel. Signed-off-by: Zhirun Yan <zhirun.yan@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 769fd2da7..682f26ce6 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -372,15 +372,18 @@ struct ice_flow_prof_params { ice_declare_bitmap(ptypes, ICE_FLOW_PTYPE_MAX); }; +#define ICE_FLOW_RSS_HDRS_INNER_MASK \ + (ICE_FLOW_SEG_HDR_PPPOE | ICE_FLOW_SEG_HDR_GTPC | \ + ICE_FLOW_SEG_HDR_GTPC_TEID | ICE_FLOW_SEG_HDR_GTPU) + #define ICE_FLOW_SEG_HDRS_L2_MASK \ (ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_VLAN) #define ICE_FLOW_SEG_HDRS_L3_MASK \ (ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV6 | \ - ICE_FLOW_SEG_HDR_ARP | ICE_FLOW_SEG_HDR_PPPOE) + ICE_FLOW_SEG_HDR_ARP) #define ICE_FLOW_SEG_HDRS_L4_MASK \ (ICE_FLOW_SEG_HDR_ICMP | ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_UDP | \ - ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_GTPC | \ - ICE_FLOW_SEG_HDR_GTPC_TEID | ICE_FLOW_SEG_HDR_GTPU) + ICE_FLOW_SEG_HDR_SCTP) /** * ice_flow_val_hdrs - validates packet segments for valid protocol headers @@ -1686,13 +1689,11 @@ ice_flow_add_fld_raw(struct ice_flow_seg_info *seg, u16 off, u8 len, (ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_VLAN) #define ICE_FLOW_RSS_SEG_HDR_L3_MASKS \ - (ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_PPPOE) + (ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV6) #define ICE_FLOW_RSS_SEG_HDR_L4_MASKS \ (ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_UDP | \ - ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_GTPC_TEID | \ - ICE_FLOW_SEG_HDR_GTPU) - + ICE_FLOW_SEG_HDR_SCTP) #define ICE_FLOW_RSS_SEG_HDR_VAL_MASKS \ (ICE_FLOW_RSS_SEG_HDR_L2_MASKS | \ @@ -1729,11 +1730,12 @@ ice_flow_set_rss_seg_info(struct ice_flow_seg_info *segs, u64 hash_fields, } ICE_FLOW_SET_HDRS(segs, flow_hdr); - if (segs->hdrs & ~ICE_FLOW_RSS_SEG_HDR_VAL_MASKS) + if (segs->hdrs & ~ICE_FLOW_RSS_SEG_HDR_VAL_MASKS & + ~ICE_FLOW_RSS_HDRS_INNER_MASK) return ICE_ERR_PARAM; val = (u64)(segs->hdrs & ICE_FLOW_RSS_SEG_HDR_L3_MASKS); - if (!ice_is_pow2(val)) + if (val && !ice_is_pow2(val)) return ICE_ERR_CFG; val = (u64)(segs->hdrs & ICE_FLOW_RSS_SEG_HDR_L4_MASKS); -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 06/30] net/ice/base: propagate errors from functions 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (4 preceding siblings ...) 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 05/30] net/ice/base: correct the mask for checking protocol header Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 07/30] net/ice/base: remove pointless NULL check of port info Qi Zhang ` (24 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr There could be an error returned from ice_fill_adv_dummy_packet() so we need to propagate that to the caller. Additionally, the call to ice_flow_xtract_pkt_flags() could also return an error so we need to propagate it as well. Also add in the correct offsets for GENEVE and VXLAN_GPE to the dummy packets. Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 9 ++++++--- drivers/net/ice/base/ice_switch.c | 8 ++++++-- 2 files changed, 12 insertions(+), 5 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 682f26ce6..7dae53270 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -869,9 +869,12 @@ ice_flow_create_xtrct_seq(struct ice_hw *hw, /* For ACL, we also need to extract the direction bit (Rx,Tx) data from * packet flags */ - if (params->blk == ICE_BLK_ACL) - ice_flow_xtract_pkt_flags(hw, params, - ICE_RX_MDID_PKT_FLAGS_15_0); + if (params->blk == ICE_BLK_ACL) { + status = ice_flow_xtract_pkt_flags(hw, params, + ICE_RX_MDID_PKT_FLAGS_15_0); + if (status) + return status; + } for (i = 0; i < params->prof->segs_cnt; i++) { u64 match = params->prof->segs[i].match; diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 00358e4db..fa023169d 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -156,6 +156,7 @@ struct ice_dummy_pkt_offsets dummy_udp_tun_tcp_packet_offsets[] = { { ICE_UDP_OF, 34 }, { ICE_VXLAN, 42 }, { ICE_GENEVE, 42 }, + { ICE_VXLAN_GPE, 42 }, { ICE_MAC_IL, 50 }, { ICE_IPV4_IL, 64 }, { ICE_TCP_IL, 84 }, @@ -208,6 +209,7 @@ struct ice_dummy_pkt_offsets dummy_udp_tun_udp_packet_offsets[] = { { ICE_UDP_OF, 34 }, { ICE_VXLAN, 42 }, { ICE_GENEVE, 42 }, + { ICE_VXLAN_GPE, 42 }, { ICE_MAC_IL, 50 }, { ICE_IPV4_IL, 64 }, { ICE_UDP_ILOS, 84 }, @@ -6189,8 +6191,10 @@ ice_add_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, s_rule->pdata.lkup_tx_rx.recipe_id = CPU_TO_LE16(rid); s_rule->pdata.lkup_tx_rx.act = CPU_TO_LE32(act); - ice_fill_adv_dummy_packet(lkups, lkups_cnt, s_rule, pkt, pkt_len, - pkt_offsets); + status = ice_fill_adv_dummy_packet(lkups, lkups_cnt, s_rule, pkt, + pkt_len, pkt_offsets); + if (status) + goto err_ice_add_adv_rule; if (rinfo->tun_type != ICE_NON_TUN) { status = ice_fill_adv_packet_tun(hw, rinfo->tun_type, -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 07/30] net/ice/base: remove pointless NULL check of port info 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (5 preceding siblings ...) 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 06/30] net/ice/base: propagate errors from functions Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 08/30] net/ice/base: remove RSS code as iavf host Qi Zhang ` (23 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Jacob Keller, Paul M Stillwell Jr The code in ice_sched_cleanup_all checks whether the port info is NULL prior to calling ice_sched_clear_port. More importantly, it also checks whether the port structure has been initialized by checking its port_state field as well. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_sched.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c index 6732e291a..553fc28ff 100644 --- a/drivers/net/ice/base/ice_sched.c +++ b/drivers/net/ice/base/ice_sched.c @@ -840,8 +840,7 @@ void ice_sched_cleanup_all(struct ice_hw *hw) hw->layer_info = NULL; } - if (hw->port_info) - ice_sched_clear_port(hw->port_info); + ice_sched_clear_port(hw->port_info); hw->num_tx_sched_layers = 0; hw->num_tx_sched_phys_layers = 0; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 08/30] net/ice/base: remove RSS code as iavf host 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (6 preceding siblings ...) 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 07/30] net/ice/base: remove pointless NULL check of port info Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 09/30] net/ice/base: add support for switch rule about VLAN PPPoE Qi Zhang ` (22 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr The DPDK PF doesn't support SRIOV so remove the related iavf host code. Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 128 ---------------------------------------- 1 file changed, 128 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 7dae53270..5d1b12d43 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -2128,134 +2128,6 @@ ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, return status; } -/* Mapping of AVF hash bit fields to an L3-L4 hash combination. - * As the ice_flow_avf_hdr_field represent individual bit shifts in a hash, - * convert its values to their appropriate flow L3, L4 values. - */ -#define ICE_FLOW_AVF_RSS_IPV4_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_OTHER) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV4)) -#define ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP)) -#define ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_UDP)) -#define ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS \ - (ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS | ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS | \ - ICE_FLOW_AVF_RSS_IPV4_MASKS | BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP)) - -#define ICE_FLOW_AVF_RSS_IPV6_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_OTHER) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV6)) -#define ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_UDP)) -#define ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP)) -#define ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS \ - (ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS | ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS | \ - ICE_FLOW_AVF_RSS_IPV6_MASKS | BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP)) - -#define ICE_FLOW_MAX_CFG 10 - -/** - * ice_add_avf_rss_cfg - add an RSS configuration for AVF driver - * @hw: pointer to the hardware structure - * @vsi_handle: software VSI handle - * @avf_hash: hash bit fields (ICE_AVF_FLOW_FIELD_*) to configure - * - * This function will take the hash bitmap provided by the AVF driver via a - * message, convert it to ICE-compatible values, and configure RSS flow - * profiles. - */ -enum ice_status -ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 avf_hash) -{ - enum ice_status status = ICE_SUCCESS; - u64 hash_flds; - - if (avf_hash == ICE_AVF_FLOW_FIELD_INVALID || - !ice_is_vsi_valid(hw, vsi_handle)) - return ICE_ERR_PARAM; - - /* Make sure no unsupported bits are specified */ - if (avf_hash & ~(ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS | - ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS)) - return ICE_ERR_CFG; - - hash_flds = avf_hash; - - /* Always create an L3 RSS configuration for any L4 RSS configuration */ - if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS) - hash_flds |= ICE_FLOW_AVF_RSS_IPV4_MASKS; - - if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS) - hash_flds |= ICE_FLOW_AVF_RSS_IPV6_MASKS; - - /* Create the corresponding RSS configuration for each valid hash bit */ - while (hash_flds) { - u64 rss_hash = ICE_HASH_INVALID; - - if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS) { - if (hash_flds & ICE_FLOW_AVF_RSS_IPV4_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV4; - hash_flds &= ~ICE_FLOW_AVF_RSS_IPV4_MASKS; - } else if (hash_flds & - ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV4 | - ICE_FLOW_HASH_TCP_PORT; - hash_flds &= ~ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS; - } else if (hash_flds & - ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV4 | - ICE_FLOW_HASH_UDP_PORT; - hash_flds &= ~ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS; - } else if (hash_flds & - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP)) { - rss_hash = ICE_FLOW_HASH_IPV4 | - ICE_FLOW_HASH_SCTP_PORT; - hash_flds &= - ~BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP); - } - } else if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS) { - if (hash_flds & ICE_FLOW_AVF_RSS_IPV6_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV6; - hash_flds &= ~ICE_FLOW_AVF_RSS_IPV6_MASKS; - } else if (hash_flds & - ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV6 | - ICE_FLOW_HASH_TCP_PORT; - hash_flds &= ~ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS; - } else if (hash_flds & - ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV6 | - ICE_FLOW_HASH_UDP_PORT; - hash_flds &= ~ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS; - } else if (hash_flds & - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP)) { - rss_hash = ICE_FLOW_HASH_IPV6 | - ICE_FLOW_HASH_SCTP_PORT; - hash_flds &= - ~BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP); - } - } - - if (rss_hash == ICE_HASH_INVALID) - return ICE_ERR_OUT_OF_RANGE; - - status = ice_add_rss_cfg(hw, vsi_handle, rss_hash, - ICE_FLOW_SEG_HDR_NONE); - if (status) - break; - } - - return status; -} - /** * ice_replay_rss_cfg - replay RSS configurations associated with VSI * @hw: pointer to the hardware structure -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 09/30] net/ice/base: add support for switch rule about VLAN PPPoE 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (7 preceding siblings ...) 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 08/30] net/ice/base: remove RSS code as iavf host Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 10/30] net/ice/base: minor structure refactor Qi Zhang ` (21 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Add support for switch rule about single-VLAN-PPPoE. Note that double VLAN is not supported by the hardware at this point, therefore only single-VLAN support for PPPoE is added. Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_protocol_type.h | 8 ++++++++ drivers/net/ice/base/ice_switch.c | 19 +++++++++++++++---- 2 files changed, 23 insertions(+), 4 deletions(-) diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h index cdb691523..c6caa8562 100644 --- a/drivers/net/ice/base/ice_protocol_type.h +++ b/drivers/net/ice/base/ice_protocol_type.h @@ -31,6 +31,7 @@ enum ice_protocol_type { ICE_MAC_OFOS = 0, ICE_MAC_IL, ICE_ETYPE_OL, + ICE_VLAN_OFOS, ICE_IPV4_OFOS, ICE_IPV4_IL, ICE_IPV6_OFOS, @@ -117,6 +118,7 @@ enum ice_prot_id { #define ICE_MAC_OFOS_HW 1 #define ICE_MAC_IL_HW 4 #define ICE_ETYPE_OL_HW 9 +#define ICE_VLAN_OL_HW 16 #define ICE_IPV4_OFOS_HW 32 #define ICE_IPV4_IL_HW 33 #define ICE_IPV6_OFOS_HW 40 @@ -162,6 +164,11 @@ struct ice_ether_vlan_hdr { u32 vlan_id; }; +struct ice_vlan_hdr { + u16 vlan; + u16 type; +}; + struct ice_ipv4_hdr { u8 version; u8 tos; @@ -239,6 +246,7 @@ struct ice_nvgre { union ice_prot_hdr { struct ice_ether_hdr eth_hdr; struct ice_ethtype_hdr ethertype; + struct ice_vlan_hdr vlan_hdr; struct ice_ipv4_hdr ipv4_hdr; struct ice_ipv6_hdr ipv6_hdr; struct ice_l4_hdr l4_hdr; diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index fa023169d..688584563 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -418,8 +418,9 @@ dummy_udp_gtp_packet[] = { static const struct ice_dummy_pkt_offsets dummy_pppoe_packet_offsets[] = { - { ICE_MAC_OFOS, 0 }, - { ICE_PPPOE, 14 }, + { ICE_MAC_OFOS, 0 }, + { ICE_VLAN_OFOS, 14}, + { ICE_PPPOE, 18 }, { ICE_PROTOCOL_LAST, 0 }, }; @@ -428,9 +429,11 @@ dummy_pppoe_packet[] = { 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x88, 0x64, + 0x81, 0x00, + + 0x00, 0x00, 0x88, 0x64, /* ICE_VLAN_OFOS 14 */ - 0x11, 0x00, 0x00, 0x01, /* ICE_PPPOE 14 */ + 0x11, 0x00, 0x00, 0x01, /* ICE_PPPOE 18 */ 0x00, 0x4e, 0x00, 0x21, 0x45, 0x00, 0x00, 0x30, /* PDU */ @@ -4632,6 +4635,7 @@ static const struct ice_prot_ext_tbl_entry ice_prot_ext[] = { { ICE_MAC_OFOS, { 0, 2, 4, 6, 8, 10, 12 } }, { ICE_MAC_IL, { 0, 2, 4, 6, 8, 10, 12 } }, { ICE_ETYPE_OL, { 0 } }, + { ICE_VLAN_OFOS, { 0, 2 } }, { ICE_IPV4_OFOS, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18 } }, { ICE_IPV4_IL, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18 } }, { ICE_IPV6_IL, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, @@ -4661,6 +4665,7 @@ static const struct ice_protocol_entry ice_prot_id_tbl[] = { { ICE_MAC_OFOS, ICE_MAC_OFOS_HW }, { ICE_MAC_IL, ICE_MAC_IL_HW }, { ICE_ETYPE_OL, ICE_ETYPE_OL_HW }, + { ICE_VLAN_OFOS, ICE_VLAN_OL_HW }, { ICE_IPV4_OFOS, ICE_IPV4_OFOS_HW }, { ICE_IPV4_IL, ICE_IPV4_IL_HW }, { ICE_IPV6_OFOS, ICE_IPV6_OFOS_HW }, @@ -5784,6 +5789,9 @@ ice_fill_adv_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt, case ICE_ETYPE_OL: len = sizeof(struct ice_ethtype_hdr); break; + case ICE_VLAN_OFOS: + len = sizeof(struct ice_vlan_hdr); + break; case ICE_IPV4_OFOS: case ICE_IPV4_IL: len = sizeof(struct ice_ipv4_hdr); @@ -5812,6 +5820,9 @@ ice_fill_adv_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt, case ICE_GTP: len = sizeof(struct ice_udp_gtp_hdr); break; + case ICE_PPPOE: + len = sizeof(struct ice_pppoe_hdr); + break; default: return ICE_ERR_PARAM; } -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 10/30] net/ice/base: minor structure refactor 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (8 preceding siblings ...) 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 09/30] net/ice/base: add support for switch rule about VLAN PPPoE Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 11/30] net/ice/base: associate switch recipe to profiles Qi Zhang ` (20 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Jesse Brandeburg, Paul M Stillwell Jr When declaring the ice_prot_ext, and ice_prot_id_tbl structure, we can use a fixed length array instead of a variable length one which helps us catch future code changes that might desynchronize the enum ice_protocol_type and the structs. This change also necessitates removing the last member of the structs which was just there to be a placeholder. Also reorder the ice_prot_ext struct to match the ordering in the associated enum ice_protocol_type. Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_switch.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 688584563..250f664b2 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -4631,17 +4631,17 @@ ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info) * matching entry describing its field. This needs to be updated if new * structure is added to that union. */ -static const struct ice_prot_ext_tbl_entry ice_prot_ext[] = { +static const struct ice_prot_ext_tbl_entry ice_prot_ext[ICE_PROTOCOL_LAST] = { { ICE_MAC_OFOS, { 0, 2, 4, 6, 8, 10, 12 } }, { ICE_MAC_IL, { 0, 2, 4, 6, 8, 10, 12 } }, { ICE_ETYPE_OL, { 0 } }, { ICE_VLAN_OFOS, { 0, 2 } }, { ICE_IPV4_OFOS, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18 } }, { ICE_IPV4_IL, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18 } }, - { ICE_IPV6_IL, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, - 26, 28, 30, 32, 34, 36, 38 } }, { ICE_IPV6_OFOS, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38 } }, + { ICE_IPV6_IL, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, + 26, 28, 30, 32, 34, 36, 38 } }, { ICE_TCP_IL, { 0, 2 } }, { ICE_UDP_OF, { 0, 2 } }, { ICE_UDP_ILOS, { 0, 2 } }, @@ -4652,7 +4652,6 @@ static const struct ice_prot_ext_tbl_entry ice_prot_ext[] = { { ICE_NVGRE, { 0, 2, 4, 6 } }, { ICE_GTP, { 8, 10, 12, 14, 16, 18, 20 } }, { ICE_PPPOE, { 0, 2, 4, 6 } }, - { ICE_PROTOCOL_LAST, { 0 } } }; /* The following table describes preferred grouping of recipes. @@ -4661,7 +4660,7 @@ static const struct ice_prot_ext_tbl_entry ice_prot_ext[] = { * following policy. */ -static const struct ice_protocol_entry ice_prot_id_tbl[] = { +static const struct ice_protocol_entry ice_prot_id_tbl[ICE_PROTOCOL_LAST] = { { ICE_MAC_OFOS, ICE_MAC_OFOS_HW }, { ICE_MAC_IL, ICE_MAC_IL_HW }, { ICE_ETYPE_OL, ICE_ETYPE_OL_HW }, @@ -4680,7 +4679,6 @@ static const struct ice_protocol_entry ice_prot_id_tbl[] = { { ICE_NVGRE, ICE_GRE_OF_HW }, { ICE_GTP, ICE_UDP_OF_HW }, { ICE_PPPOE, ICE_PPPOE_HW }, - { ICE_PROTOCOL_LAST, 0 } }; /** -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 11/30] net/ice/base: associate switch recipe to profiles 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (9 preceding siblings ...) 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 10/30] net/ice/base: minor structure refactor Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 12/30] net/ice/base: enable RSS for PPPoE with SCTP Qi Zhang ` (19 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Paul M Stillwell Jr Properly associate switch recipes to profiles. Previous code was using the wrong bitfield for updating the associations, which was causing other PFs to not properly identify and use existing recipes. This sometimes resulted in rules not being added when it should have been possible. Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_switch.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 250f664b2..64c2aec19 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -5581,14 +5581,14 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, if (status) goto err_unroll; - ice_or_bitmap(rm->r_bitmap, r_bitmap, rm->r_bitmap, + ice_or_bitmap(r_bitmap, r_bitmap, rm->r_bitmap, ICE_MAX_NUM_RECIPES); status = ice_acquire_change_lock(hw, ICE_RES_WRITE); if (status) goto err_unroll; status = ice_aq_map_recipe_to_profile(hw, fvit->profile_id, - (u8 *)rm->r_bitmap, + (u8 *)r_bitmap, NULL); ice_release_change_lock(hw); @@ -5596,12 +5596,12 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, goto err_unroll; /* Update profile to recipe bitmap array */ - ice_memcpy(profile_to_recipe[fvit->profile_id], rm->r_bitmap, - sizeof(rm->r_bitmap), ICE_NONDMA_TO_NONDMA); + ice_memcpy(profile_to_recipe[fvit->profile_id], r_bitmap, + sizeof(r_bitmap), ICE_NONDMA_TO_NONDMA); /* Update recipe to profile bitmap array */ for (j = 0; j < ICE_MAX_NUM_RECIPES; j++) - if (ice_is_bit_set(rm->r_bitmap, j)) + if (ice_is_bit_set(r_bitmap, j)) ice_set_bit((u16)fvit->profile_id, recipe_to_profile[j]); } -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 12/30] net/ice/base: enable RSS for PPPoE with SCTP 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (10 preceding siblings ...) 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 11/30] net/ice/base: associate switch recipe to profiles Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 13/30] net/ice/base: enable fdir queue region Qi Zhang ` (18 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Zhirun Yan, Paul M Stillwell Jr Add two ptypes(MAC_PPPOE_IPV4_SCTP and MAC_PPPOE_IPV6_SCTP) in sctp ptype bitmap to enable rss. Signed-off-by: Zhirun Yan <zhirun.yan@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 5d1b12d43..d91922527 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -253,7 +253,7 @@ static const u32 ice_ptypes_tcp_il[] = { static const u32 ice_ptypes_sctp_il[] = { 0x08000000, 0x01020204, 0x20408081, 0x04080810, 0x01020204, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x01040000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 13/30] net/ice/base: enable fdir queue region 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (11 preceding siblings ...) 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 12/30] net/ice/base: enable RSS for PPPoE with SCTP Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 14/30] net/ice/base: enable setting up FDIR counters Qi Zhang ` (17 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr Add fdir queue region support. Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> --- drivers/net/ice/base/ice_fdir.c | 3 +++ drivers/net/ice/base/ice_fdir.h | 2 ++ 2 files changed, 5 insertions(+) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index e35506006..4632f1a53 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -343,6 +343,9 @@ ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input, fdir_fltr_ctx.drop = ICE_FXD_FLTR_QW0_DROP_YES; fdir_fltr_ctx.qindex = 0; } else { + if (input->dest_ctl == + ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QGROUP) + fdir_fltr_ctx.toq = input->q_region; fdir_fltr_ctx.drop = ICE_FXD_FLTR_QW0_DROP_NO; fdir_fltr_ctx.qindex = input->q_index; } diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index e0f3cd481..ccfc30c85 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -167,6 +167,8 @@ struct ice_fdir_fltr { /* flex byte filter data */ __be16 flex_word; + /* queue region size (=2^q_region) */ + u8 q_region; u16 flex_offset; u16 flex_fltr; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 14/30] net/ice/base: enable setting up FDIR counters 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (12 preceding siblings ...) 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 13/30] net/ice/base: enable fdir queue region Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 15/30] net/ice/base: add dest MAC field support for FDIR Qi Zhang ` (16 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Enable getting value from input to set up flow director counters, so that the FDIR counters can count none, packets only, bytes only or both packets and bytes as demanded. Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 2 +- drivers/net/ice/base/ice_fdir.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index 4632f1a53..1c455ffe4 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -349,7 +349,7 @@ ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input, fdir_fltr_ctx.drop = ICE_FXD_FLTR_QW0_DROP_NO; fdir_fltr_ctx.qindex = input->q_index; } - fdir_fltr_ctx.cnt_ena = ICE_FXD_FLTR_QW0_STAT_ENA_PKTS; + fdir_fltr_ctx.cnt_ena = input->cnt_ena; fdir_fltr_ctx.cnt_index = input->cnt_index; fdir_fltr_ctx.fd_vsi = ice_get_hw_vsi_num(hw, input->dest_vsi); fdir_fltr_ctx.evict_ena = ICE_FXD_FLTR_QW0_EVICT_ENA_FALSE; diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index ccfc30c85..007f6dd8f 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -176,6 +176,7 @@ struct ice_fdir_fltr { u16 q_index; u16 dest_vsi; u8 dest_ctl; + u8 cnt_ena; u8 fltr_status; u16 cnt_index; u32 fltr_id; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 15/30] net/ice/base: add dest MAC field support for FDIR 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (13 preceding siblings ...) 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 14/30] net/ice/base: enable setting up FDIR counters Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 16/30] net/ice/base: update FW API minor version Qi Zhang ` (15 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Add dest MAC address support so that this field can be matched when we set Flow Director filter with dst addr for MAC. Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index 1c455ffe4..3a2175b30 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -543,6 +543,17 @@ static void ice_pkt_insert_u32(u8 *pkt, int offset, __be32 data) } /** + * ice_pkt_insert_mac_addr - insert a MAC addr into a memory buffer. + * @pkt: packet buffer + * @offset: offset into buffer + * @addr: MAC address to convert and insert into pkt at offset + */ +static void ice_pkt_insert_mac_addr(u8 *pkt, u8 *addr) +{ + ice_memcpy(pkt, addr, ETH_ALEN, ICE_NONDMA_TO_NONDMA); +} + +/** * ice_fdir_get_gen_prgm_pkt - generate a training packet * @hw: pointer to the hardware structure * @input: flow director filter data structure @@ -626,6 +637,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.src_port); ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); if (frag) loc[20] = ICE_FDIR_IPV4_PKT_FLAG_DF; break; @@ -640,6 +652,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.src_port); ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; case ICE_FLTR_PTYPE_NONF_IPV4_SCTP: ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, @@ -652,6 +665,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.src_port); ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; case ICE_FLTR_PTYPE_NONF_IPV4_OTHER: ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, @@ -662,6 +676,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); ice_pkt_insert_u8(loc, ICE_IPV4_PROTO_OFFSET, input->ip.v4.proto); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; case ICE_FLTR_PTYPE_NONF_IPV6_TCP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, @@ -674,6 +689,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v6.src_port); ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; case ICE_FLTR_PTYPE_NONF_IPV6_UDP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, @@ -686,6 +702,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v6.src_port); ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; case ICE_FLTR_PTYPE_NONF_IPV6_SCTP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, @@ -698,6 +715,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v6.src_port); ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; case ICE_FLTR_PTYPE_NONF_IPV6_OTHER: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, @@ -708,6 +726,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); ice_pkt_insert_u8(loc, ICE_IPV6_PROTO_OFFSET, input->ip.v6.proto); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; default: return ICE_ERR_PARAM; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 16/30] net/ice/base: update FW API minor version 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (14 preceding siblings ...) 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 15/30] net/ice/base: add dest MAC field support for FDIR Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 17/30] net/ice/base: enable symmetric hash for RSS Qi Zhang ` (14 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Kevin Scott, Paul M Stillwell Jr Update FW API minor version to align to current value advertised by FW in NVM images. Signed-off-by: Kevin Scott <kevin.c.scott@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_controlq.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_controlq.h b/drivers/net/ice/base/ice_controlq.h index 8ad7857c8..8b6046547 100644 --- a/drivers/net/ice/base/ice_controlq.h +++ b/drivers/net/ice/base/ice_controlq.h @@ -23,7 +23,7 @@ */ #define EXP_FW_API_VER_BRANCH 0x00 #define EXP_FW_API_VER_MAJOR 0x01 -#define EXP_FW_API_VER_MINOR 0x03 +#define EXP_FW_API_VER_MINOR 0x05 /* Different control queue types: These are mainly for SW consumption. */ enum ice_ctl_q { -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 17/30] net/ice/base: enable symmetric hash for RSS 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (15 preceding siblings ...) 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 16/30] net/ice/base: update FW API minor version Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 18/30] net/ice/base: replace alloc-followed-by-copy with memdup Qi Zhang ` (13 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr Add parameter "symm" to rss configuration APIs. When symm is 1, Symmetric Teoplitz Hash can be enabled by configuring GLQF_HSYMM properly. NOTE: Symmetric Teoplitz hash will work only if hash schema of VSIQF_HASH_CTL be configured to 01b and it is assumed be enabled in PMD. Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> --- drivers/net/ice/base/ice_flow.c | 149 +++++++++++++++++++++++++++++++++++++--- drivers/net/ice/base/ice_flow.h | 5 +- drivers/net/ice/ice_ethdev.c | 16 ++--- 3 files changed, 150 insertions(+), 20 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index d91922527..e0e4fcab6 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -1876,6 +1876,7 @@ ice_add_rss_list(struct ice_hw *hw, u16 vsi_handle, struct ice_flow_prof *prof) rss_cfg->hashed_flds = prof->segs[prof->segs_cnt - 1].match; rss_cfg->packet_hdr = prof->segs[prof->segs_cnt - 1].hdrs; + rss_cfg->symm = prof->cfg.symm; ice_set_bit(vsi_handle, rss_cfg->vsis); LIST_ADD_TAIL(&rss_cfg->l_entry, &hw->rss_list_head); @@ -1903,6 +1904,107 @@ ice_add_rss_list(struct ice_hw *hw, u16 vsi_handle, struct ice_flow_prof *prof) (((u64)(hdr) << ICE_FLOW_PROF_HDR_S) & ICE_FLOW_PROF_HDR_M) | \ ((u8)((segs_cnt) - 1) ? ICE_FLOW_PROF_ENCAP_M : 0)) +static void +ice_rss_config_xor_word(struct ice_hw *hw, u8 prof_id, u8 src, u8 dst) +{ + u32 s = ((src % 4) << 3); /* byte shift */ + u32 v = dst | 0x80; /* value to program */ + u8 i = src / 4; /* register index */ + u32 reg; + + reg = rd32(hw, GLQF_HSYMM(prof_id, i)); + reg = (reg & ~(0xff << s)) | (v << s); + wr32(hw, GLQF_HSYMM(prof_id, i), reg); +} + +static void +ice_rss_config_xor(struct ice_hw *hw, u8 prof_id, u8 src, u8 dst, u8 len) +{ + int fv_last_word = + ICE_FLOW_SW_FIELD_VECTOR_MAX / ICE_FLOW_FV_EXTRACT_SZ - 1; + int i; + + for (i = 0; i < len; i++) { + ice_rss_config_xor_word(hw, prof_id, + /* Yes, field vector in GLQF_HSYMM and + * GLQF_HINSET is inversed! + */ + fv_last_word - (src + i), + fv_last_word - (dst + i)); + ice_rss_config_xor_word(hw, prof_id, + fv_last_word - (dst + i), + fv_last_word - (src + i)); + } +} + +static void +ice_rss_update_symm(struct ice_hw *hw, + struct ice_flow_prof *prof) +{ + struct ice_prof_map *map; + u8 prof_id, m; + + map = ice_search_prof_id(hw, ICE_BLK_RSS, prof->id); + prof_id = map->prof_id; + + /* clear to default */ + for (m = 0; m < 6; m++) + wr32(hw, GLQF_HSYMM(prof_id, m), 0); + if (prof->cfg.symm) { + struct ice_flow_seg_info *seg = + &prof->segs[prof->segs_cnt - 1]; + + struct ice_flow_seg_xtrct *ipv4_src = + &seg->fields[ICE_FLOW_FIELD_IDX_IPV4_SA].xtrct; + struct ice_flow_seg_xtrct *ipv4_dst = + &seg->fields[ICE_FLOW_FIELD_IDX_IPV4_DA].xtrct; + struct ice_flow_seg_xtrct *ipv6_src = + &seg->fields[ICE_FLOW_FIELD_IDX_IPV6_SA].xtrct; + struct ice_flow_seg_xtrct *ipv6_dst = + &seg->fields[ICE_FLOW_FIELD_IDX_IPV6_DA].xtrct; + + struct ice_flow_seg_xtrct *tcp_src = + &seg->fields[ICE_FLOW_FIELD_IDX_TCP_SRC_PORT].xtrct; + struct ice_flow_seg_xtrct *tcp_dst = + &seg->fields[ICE_FLOW_FIELD_IDX_TCP_DST_PORT].xtrct; + + struct ice_flow_seg_xtrct *udp_src = + &seg->fields[ICE_FLOW_FIELD_IDX_UDP_SRC_PORT].xtrct; + struct ice_flow_seg_xtrct *udp_dst = + &seg->fields[ICE_FLOW_FIELD_IDX_UDP_DST_PORT].xtrct; + + struct ice_flow_seg_xtrct *sctp_src = + &seg->fields[ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT].xtrct; + struct ice_flow_seg_xtrct *sctp_dst = + &seg->fields[ICE_FLOW_FIELD_IDX_SCTP_DST_PORT].xtrct; + + /* xor IPv4 */ + if (ipv4_src->prot_id != 0 && ipv4_dst->prot_id != 0) + ice_rss_config_xor(hw, prof_id, + ipv4_src->idx, ipv4_dst->idx, 2); + + /* xor IPv6 */ + if (ipv6_src->prot_id != 0 && ipv6_dst->prot_id != 0) + ice_rss_config_xor(hw, prof_id, + ipv6_src->idx, ipv6_dst->idx, 8); + + /* xor TCP */ + if (tcp_src->prot_id != 0 && tcp_dst->prot_id != 0) + ice_rss_config_xor(hw, prof_id, + tcp_src->idx, tcp_dst->idx, 1); + + /* xor UDP */ + if (udp_src->prot_id != 0 && udp_dst->prot_id != 0) + ice_rss_config_xor(hw, prof_id, + udp_src->idx, udp_dst->idx, 1); + + /* xor SCTP */ + if (sctp_src->prot_id != 0 && sctp_dst->prot_id != 0) + ice_rss_config_xor(hw, prof_id, + sctp_src->idx, sctp_dst->idx, 1); + } +} + /** * ice_add_rss_cfg_sync - add an RSS configuration * @hw: pointer to the hardware structure @@ -1910,12 +2012,13 @@ ice_add_rss_list(struct ice_hw *hw, u16 vsi_handle, struct ice_flow_prof *prof) * @hashed_flds: hash bit fields (ICE_FLOW_HASH_*) to configure * @addl_hdrs: protocol header fields * @segs_cnt: packet segment count + * @symm: symmetric hash enable/disable * * Assumption: lock has already been acquired for RSS list */ static enum ice_status ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, - u32 addl_hdrs, u8 segs_cnt) + u32 addl_hdrs, u8 segs_cnt, bool symm) { const enum ice_block blk = ICE_BLK_RSS; struct ice_flow_prof *prof = NULL; @@ -1944,8 +2047,12 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, vsi_handle, ICE_FLOW_FIND_PROF_CHK_FLDS | ICE_FLOW_FIND_PROF_CHK_VSI); - if (prof) - goto exit; + if (prof) { + if (prof->cfg.symm == symm) + goto exit; + prof->cfg.symm = symm; + goto update_symm; + } /* Check if a flow profile exists with the same protocol headers and * associated with the input VSI. If so disasscociate the VSI from @@ -1976,9 +2083,18 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, vsi_handle, ICE_FLOW_FIND_PROF_CHK_FLDS); if (prof) { - status = ice_flow_assoc_prof(hw, blk, prof, vsi_handle); - if (!status) - status = ice_add_rss_list(hw, vsi_handle, prof); + if (prof->cfg.symm == symm) { + status = ice_flow_assoc_prof(hw, blk, prof, + vsi_handle); + if (!status) + status = ice_add_rss_list(hw, vsi_handle, + prof); + } else { + /* if a profile exist but with different symmetric + * requirement, just return error. + */ + status = ICE_ERR_NOT_SUPPORTED; + } goto exit; } @@ -2004,6 +2120,13 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, status = ice_add_rss_list(hw, vsi_handle, prof); + prof->cfg.symm = symm; + if (!symm) + goto exit; + +update_symm: + ice_rss_update_symm(hw, prof); + exit: ice_free(hw, segs); return status; @@ -2015,6 +2138,7 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, * @vsi_handle: software VSI handle * @hashed_flds: hash bit fields (ICE_FLOW_HASH_*) to configure * @addl_hdrs: protocol header fields + * @symm: symmetric hash enable/disable * * This function will generate a flow profile based on fields associated with * the input fields to hash on, the flow type and use the VSI number to add @@ -2022,7 +2146,7 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, */ enum ice_status ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, - u32 addl_hdrs) + u32 addl_hdrs, bool symm) { enum ice_status status; @@ -2032,10 +2156,11 @@ ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, ice_acquire_lock(&hw->rss_locks); status = ice_add_rss_cfg_sync(hw, vsi_handle, hashed_flds, addl_hdrs, - ICE_RSS_OUTER_HEADERS); + ICE_RSS_OUTER_HEADERS, symm); if (!status) status = ice_add_rss_cfg_sync(hw, vsi_handle, hashed_flds, - addl_hdrs, ICE_RSS_INNER_HEADERS); + addl_hdrs, ICE_RSS_INNER_HEADERS, + symm); ice_release_lock(&hw->rss_locks); return status; @@ -2148,13 +2273,15 @@ enum ice_status ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle) status = ice_add_rss_cfg_sync(hw, vsi_handle, r->hashed_flds, r->packet_hdr, - ICE_RSS_OUTER_HEADERS); + ICE_RSS_OUTER_HEADERS, + r->symm); if (status) break; status = ice_add_rss_cfg_sync(hw, vsi_handle, r->hashed_flds, r->packet_hdr, - ICE_RSS_INNER_HEADERS); + ICE_RSS_INNER_HEADERS, + r->symm); if (status) break; } diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h index 3afd201c4..6f26f3935 100644 --- a/drivers/net/ice/base/ice_flow.h +++ b/drivers/net/ice/base/ice_flow.h @@ -315,6 +315,8 @@ struct ice_flow_prof { /* struct sw_recipe */ /* struct fd */ u32 data; + /* Symmetric Hash for RSS */ + bool symm; } cfg; /* Default actions */ @@ -327,6 +329,7 @@ struct ice_rss_cfg { ice_declare_bitmap(vsis, ICE_MAX_VSI); u64 hashed_flds; u32 packet_hdr; + bool symm; }; enum ice_flow_action_type { @@ -402,7 +405,7 @@ ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds); enum ice_status ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle); enum ice_status ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, - u32 addl_hdrs); + u32 addl_hdrs, bool symm); enum ice_status ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, u32 addl_hdrs); diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c index 63997fdfb..ccd64f49f 100644 --- a/drivers/net/ice/ice_ethdev.c +++ b/drivers/net/ice/ice_ethdev.c @@ -1790,50 +1790,50 @@ static int ice_init_rss(struct ice_pf *pf) /* configure RSS for IPv4 with input set IPv4 src/dst */ ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV4, - ICE_FLOW_SEG_HDR_IPV4); + ICE_FLOW_SEG_HDR_IPV4, 0); if (ret) PMD_DRV_LOG(ERR, "%s IPV4 rss flow fail %d", __func__, ret); /* configure RSS for IPv6 with input set IPv6 src/dst */ ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV6, - ICE_FLOW_SEG_HDR_IPV6); + ICE_FLOW_SEG_HDR_IPV6, 0); if (ret) PMD_DRV_LOG(ERR, "%s IPV6 rss flow fail %d", __func__, ret); /* configure RSS for tcp6 with input set IPv6 src/dst, TCP src/dst */ ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_TCP_IPV6, - ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV6); + ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV6, 0); if (ret) PMD_DRV_LOG(ERR, "%s TCP_IPV6 rss flow fail %d", __func__, ret); /* configure RSS for udp6 with input set IPv6 src/dst, UDP src/dst */ ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_UDP_IPV6, - ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV6); + ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV6, 0); if (ret) PMD_DRV_LOG(ERR, "%s UDP_IPV6 rss flow fail %d", __func__, ret); /* configure RSS for sctp6 with input set IPv6 src/dst */ ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV6, - ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV6); + ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV6, 0); if (ret) PMD_DRV_LOG(ERR, "%s SCTP_IPV6 rss flow fail %d", __func__, ret); /* configure RSS for tcp4 with input set IP src/dst, TCP src/dst */ ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_TCP_IPV4, - ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV4); + ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV4, 0); if (ret) PMD_DRV_LOG(ERR, "%s TCP_IPV4 rss flow fail %d", __func__, ret); /* configure RSS for udp4 with input set IP src/dst, UDP src/dst */ ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_UDP_IPV4, - ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV4); + ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV4, 0); if (ret) PMD_DRV_LOG(ERR, "%s UDP_IPV4 rss flow fail %d", __func__, ret); /* configure RSS for sctp4 with input set IP src/dst */ ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV4, - ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV4); + ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV4, 0); if (ret) PMD_DRV_LOG(ERR, "%s SCTP_IPV4 rss flow fail %d", __func__, ret); -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 18/30] net/ice/base: replace alloc-followed-by-copy with memdup 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (16 preceding siblings ...) 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 17/30] net/ice/base: enable symmetric hash for RSS Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 19/30] net/ice/base: add FDIR support for GTPU qfi field Qi Zhang ` (12 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Bruce Allan, Paul M Stillwell Jr ice_memdup() is preferred over an alloc immediately followed by a copy. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flex_pipe.c | 5 ++--- drivers/net/ice/base/ice_switch.c | 7 ++----- 2 files changed, 4 insertions(+), 8 deletions(-) diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 05cd39b17..76c26fd4e 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -4939,12 +4939,11 @@ ice_get_profs_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, struct ice_vsig_prof *p; /* copy to the input list */ - p = (struct ice_vsig_prof *)ice_malloc(hw, sizeof(*p)); + p = (struct ice_vsig_prof *)ice_memdup(hw, ent1, sizeof(*p), + ICE_NONDMA_TO_NONDMA); if (!p) goto err_ice_get_profs_vsig; - ice_memcpy(p, ent1, sizeof(*p), ICE_NONDMA_TO_NONDMA); - LIST_ADD_TAIL(&p->list, lst); } diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 64c2aec19..62ccf533c 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -623,14 +623,11 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid, recps[rid].big_recp = (num_recps > 1); recps[rid].n_grp_count = num_recps; recps[rid].root_buf = (struct ice_aqc_recipe_data_elem *) - ice_calloc(hw, recps[rid].n_grp_count, - sizeof(struct ice_aqc_recipe_data_elem)); + ice_memdup(hw, tmp, recps[rid].n_grp_count * + sizeof(*recps[rid].root_buf), ICE_NONDMA_TO_NONDMA); if (!recps[rid].root_buf) goto err_unroll; - ice_memcpy(recps[rid].root_buf, tmp, recps[rid].n_grp_count * - sizeof(*recps[rid].root_buf), ICE_NONDMA_TO_NONDMA); - /* Copy result indexes */ ice_memcpy(recps[rid].res_idxs, result_bm, sizeof(recps[rid].res_idxs), ICE_NONDMA_TO_NONDMA); -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 19/30] net/ice/base: add FDIR support for GTPU qfi field 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (17 preceding siblings ...) 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 18/30] net/ice/base: replace alloc-followed-by-copy with memdup Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 20/30] net/ice/base: fix the bitmap for TCP in RSS Qi Zhang ` (11 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Add GTPU qfi field support for flow director. Note that for GTPU pkt, only qfi field (6 bits) can be set for FD. The supported GTPU pkts are defined as: ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP, ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP, ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP, ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER (FRAG and PAY belong to this) Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 111 ++++++++++++++++++++++++++++++++++++++++ drivers/net/ice/base/ice_fdir.h | 22 ++++++++ drivers/net/ice/base/ice_type.h | 4 ++ 3 files changed, 137 insertions(+) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index 3a2175b30..219588c46 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -42,6 +42,66 @@ static const u8 ice_fdir_ipv4_pkt[] = { 0x00, 0x00 }; +static const u8 ice_fdir_udp4_gtpu4_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x4c, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x08, 0x68, 0x08, 0x68, 0x00, 0x00, + 0x00, 0x00, 0x34, 0xff, 0x00, 0x28, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x02, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x45, 0x00, + 0x00, 0x1c, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, +}; + +static const u8 ice_fdir_tcp4_gtpu4_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x58, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x08, 0x68, 0x08, 0x68, 0x00, 0x00, + 0x00, 0x00, 0x34, 0xff, 0x00, 0x28, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x02, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x45, 0x00, + 0x00, 0x28, 0x00, 0x00, 0x40, 0x00, 0x40, 0x06, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_icmp4_gtpu4_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x4c, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x08, 0x68, 0x08, 0x68, 0x00, 0x00, + 0x00, 0x00, 0x34, 0xff, 0x00, 0x28, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x02, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x45, 0x00, + 0x00, 0x1c, 0x00, 0x00, 0x40, 0x00, 0x40, 0x01, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, +}; + +static const u8 ice_fdir_ipv4_gtpu4_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x44, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x08, 0x68, 0x08, 0x68, 0x00, 0x00, + 0x00, 0x00, 0x34, 0xff, 0x00, 0x28, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x02, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x45, 0x00, + 0x00, 0x14, 0x00, 0x00, 0x40, 0x00, 0x40, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, +}; + static const u8 ice_fdir_tcpv6_pkt[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00, @@ -241,6 +301,34 @@ static const struct ice_fdir_base_pkt ice_fdir_pkt[] = { sizeof(ice_fdir_ip4_tun_pkt), ice_fdir_ip4_tun_pkt, }, { + ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP, + sizeof(ice_fdir_udp4_gtpu4_pkt), + ice_fdir_udp4_gtpu4_pkt, + sizeof(ice_fdir_udp4_gtpu4_pkt), + ice_fdir_udp4_gtpu4_pkt, + }, + { + ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP, + sizeof(ice_fdir_tcp4_gtpu4_pkt), + ice_fdir_tcp4_gtpu4_pkt, + sizeof(ice_fdir_tcp4_gtpu4_pkt), + ice_fdir_tcp4_gtpu4_pkt, + }, + { + ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP, + sizeof(ice_fdir_icmp4_gtpu4_pkt), + ice_fdir_icmp4_gtpu4_pkt, + sizeof(ice_fdir_icmp4_gtpu4_pkt), + ice_fdir_icmp4_gtpu4_pkt, + }, + { + ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER, + sizeof(ice_fdir_ipv4_gtpu4_pkt), + ice_fdir_ipv4_gtpu4_pkt, + sizeof(ice_fdir_ipv4_gtpu4_pkt), + ice_fdir_ipv4_gtpu4_pkt, + }, + { ICE_FLTR_PTYPE_NONF_IPV6_TCP, sizeof(ice_fdir_tcpv6_pkt), ice_fdir_tcpv6_pkt, sizeof(ice_fdir_tcp6_tun_pkt), ice_fdir_tcp6_tun_pkt, @@ -488,6 +576,22 @@ static void ice_pkt_insert_ipv6_addr(u8 *pkt, int offset, __be32 *addr) } /** + * ice_pkt_insert_u6_qfi - insert a u6 value qfi into a memory buffer for gtpu + * @pkt: packet buffer + * @offset: offset into buffer + * @data: 8 bit value to convert and insert into pkt at offset + * + * This function is designed for inserting qfi (6 bits) for gtpu. + */ +static void ice_pkt_insert_u6_qfi(u8 *pkt, int offset, u8 data) +{ + u8 ret; + + ret = (data & 0x3F) + (*(pkt + offset) & 0xC0); + ice_memcpy(pkt + offset, &ret, sizeof(ret), ICE_NONDMA_TO_NONDMA); +} + +/** * ice_pkt_insert_u8 - insert a u8 value into a memory buffer. * @pkt: packet buffer * @offset: offset into buffer @@ -678,6 +782,13 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.proto); ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; + case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP: + case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP: + case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP: + case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER: + ice_pkt_insert_u6_qfi(loc, ICE_IPV4_GTPU_QFI_OFFSET, + input->gtpu_data.qfi); + break; case ICE_FLTR_PTYPE_NONF_IPV6_TCP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, input->ip.v6.dst_ip); diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index 007f6dd8f..22e5bcf8c 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -87,6 +87,7 @@ enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw); #define ICE_IPV6_TC_OFFSET 14 #define ICE_IPV6_HLIM_OFFSET 21 #define ICE_IPV6_PROTO_OFFSET 20 +#define ICE_IPV4_GTPU_QFI_OFFSET 56 #define ICE_FDIR_MAX_FLTRS 16384 @@ -146,6 +147,24 @@ struct ice_fdir_v6 { u8 hlim; }; +struct ice_fdir_udp_gtp { + u8 flags; + u8 msg_type; + u16 rsrvd_len; + u32 teid; + u16 rsrvd_seq_nbr; + u8 rsrvd_n_pdu_nbr; + u8 rsrvd_next_ext_type; + u8 rsvrd_ext_len; + u8 pdu_type:4, + spare:4; + u8 ppp:1, + rqi:1, + qfi:6; + u32 rsvrd; + u8 next_ext; +}; + struct ice_fdir_extra { u8 dst_mac[ETH_ALEN]; /* dest MAC address */ u32 usr_def[2]; /* user data */ @@ -162,6 +181,9 @@ struct ice_fdir_fltr { struct ice_fdir_v6 v6; } ip, mask; + struct ice_fdir_udp_gtp gtpu_data; + struct ice_fdir_udp_gtp gtpu_mask; + struct ice_fdir_extra ext_data; struct ice_fdir_extra ext_mask; diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index 7d0a4f63f..500b88461 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -288,6 +288,10 @@ enum ice_fltr_ptype { ICE_FLTR_PTYPE_NONF_IPV4_TCP, ICE_FLTR_PTYPE_NONF_IPV4_SCTP, ICE_FLTR_PTYPE_NONF_IPV4_OTHER, + ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP, + ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP, + ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP, + ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER, ICE_FLTR_PTYPE_FRAG_IPV4, ICE_FLTR_PTYPE_NONF_IPV6_UDP, ICE_FLTR_PTYPE_NONF_IPV6_TCP, -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 20/30] net/ice/base: fix the bitmap for TCP in RSS 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (18 preceding siblings ...) 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 19/30] net/ice/base: add FDIR support for GTPU qfi field Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 21/30] net/ice/base: fix segment in remove existing RSS rule Qi Zhang ` (10 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, stable, Zhirun Yan, Paul M Stillwell Jr Before this patch, if set rule for IPv4 first and then set rule for TCP with IPv4. The first rule for inner IP will be overwritten by TCP rule. This is because MAC_IPV6_TUN_MAC_IPV4_PAY using the same ptgs PTG_TUN_INNER_IPV4_OTHER with MAC_IPV4_TUN_MAC_IPV4_PAY, this ptype should not in TCP bitmap. Remove this bit in TCP bitmap. Fixes: aa1cd410fa64 ("net/ice/base: add flow module") Cc: stable@dpdk.org Signed-off-by: Zhirun Yan <zhirun.yan@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index e0e4fcab6..6782dfaa8 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -239,7 +239,7 @@ static const u32 ice_ptypes_udp_il[] = { /* Packet types for packets with an Innermost/Last TCP header */ static const u32 ice_ptypes_tcp_il[] = { - 0x04000000, 0x80810102, 0x10204040, 0x42040408, + 0x04000000, 0x80810102, 0x10204040, 0x02040408, 0x00810102, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00820000, 0x21084000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 21/30] net/ice/base: fix segment in remove existing RSS rule 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (19 preceding siblings ...) 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 20/30] net/ice/base: fix the bitmap for TCP in RSS Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 7:19 ` Yang, Qiming 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 22/30] net/ice/base: remove unused DDP package macros Qi Zhang ` (9 subsequent siblings) 30 siblings, 1 reply; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Zhirun Yan, Paul M Stillwell Jr Before this patch, RSS tunneled rules can not be destroyed at runtime. This is because it can not find the existing matching profile for tunnels. segs[0] should always be zero and all matched, segs[1] for inner part. It only construct one segment. This patch modifies construct segment in ice_rem_rss_cfg_sync() to match ice_add_rss_cfg_sync(). Fixes: 75bc2ea04af4 ("net/ice/base: packet encapsulation for RSS") Signed-off-by: Zhirun Yan <zhirun.yan@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 6782dfaa8..f9c65d6a2 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -2185,12 +2185,14 @@ ice_rem_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, struct ice_flow_prof *prof; enum ice_status status; - segs = (struct ice_flow_seg_info *)ice_malloc(hw, sizeof(*segs)); + segs = (struct ice_flow_seg_info *)ice_calloc(hw, segs_cnt, + sizeof(*segs)); if (!segs) return ICE_ERR_NO_MEMORY; /* Construct the packet segment info from the hashed fields */ - status = ice_flow_set_rss_seg_info(segs, hashed_flds, addl_hdrs); + status = ice_flow_set_rss_seg_info(&segs[segs_cnt - 1], hashed_flds, + addl_hdrs); if (status) goto out; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* Re: [dpdk-dev] [PATCH v4 21/30] net/ice/base: fix segment in remove existing RSS rule 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 21/30] net/ice/base: fix segment in remove existing RSS rule Qi Zhang @ 2019-09-23 7:19 ` Yang, Qiming 0 siblings, 0 replies; 166+ messages in thread From: Yang, Qiming @ 2019-09-23 7:19 UTC (permalink / raw) To: Zhang, Qi Z, Lu, Wenzhuo Cc: dev, Ye, Xiaolong, Yan, Zhirun, Stillwell Jr, Paul M > -----Original Message----- > From: Zhang, Qi Z > Sent: Monday, September 23, 2019 2:27 PM > To: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming > <qiming.yang@intel.com> > Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Zhang, Qi Z > <qi.z.zhang@intel.com>; Yan, Zhirun <zhirun.yan@intel.com>; Stillwell Jr, > Paul M <paul.m.stillwell.jr@intel.com> > Subject: [PATCH v4 21/30] net/ice/base: fix segment in remove existing RSS > rule > > Before this patch, RSS tunneled rules can not be destroyed at runtime. > This is because it can not find the existing matching profile for tunnels. > segs[0] should always be zero and all matched, segs[1] for inner part. > It only construct one segment. > > This patch modifies construct segment in ice_rem_rss_cfg_sync() to match > ice_add_rss_cfg_sync(). > > Fixes: 75bc2ea04af4 ("net/ice/base: packet encapsulation for RSS") > +CC stable > Signed-off-by: Zhirun Yan <zhirun.yan@intel.com> > Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> > Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> > --- > drivers/net/ice/base/ice_flow.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c > index 6782dfaa8..f9c65d6a2 100644 > --- a/drivers/net/ice/base/ice_flow.c > +++ b/drivers/net/ice/base/ice_flow.c > @@ -2185,12 +2185,14 @@ ice_rem_rss_cfg_sync(struct ice_hw *hw, u16 > vsi_handle, u64 hashed_flds, > struct ice_flow_prof *prof; > enum ice_status status; > > - segs = (struct ice_flow_seg_info *)ice_malloc(hw, sizeof(*segs)); > + segs = (struct ice_flow_seg_info *)ice_calloc(hw, segs_cnt, > + sizeof(*segs)); > if (!segs) > return ICE_ERR_NO_MEMORY; > > /* Construct the packet segment info from the hashed fields */ > - status = ice_flow_set_rss_seg_info(segs, hashed_flds, addl_hdrs); > + status = ice_flow_set_rss_seg_info(&segs[segs_cnt - 1], hashed_flds, > + addl_hdrs); > if (status) > goto out; > > -- > 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 22/30] net/ice/base: remove unused DDP package macros 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (20 preceding siblings ...) 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 21/30] net/ice/base: fix segment in remove existing RSS rule Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 23/30] net/ice/base: search field vector indices for result slots Qi Zhang ` (8 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Bruce Allan, Paul M Stillwell Jr Macros no longer be used and can be removed Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_type.h | 5 ----- 1 file changed, 5 deletions(-) diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index 500b88461..8322d88a0 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -835,11 +835,6 @@ struct ice_hw { /* tunneling info */ struct ice_tunnel_table tnl; -#define ICE_PKG_FILENAME "package_file" -#define ICE_PKG_FILENAME_EXT "pkg" -#define ICE_PKG_FILE_MAJ_VER 1 -#define ICE_PKG_FILE_MIN_VER 0 - /* HW block tables */ struct ice_blk_info blk[ICE_BLK_COUNT]; struct ice_lock fl_profs_locks[ICE_BLK_COUNT]; /* lock fltr profiles */ -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 23/30] net/ice/base: search field vector indices for result slots 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (21 preceding siblings ...) 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 22/30] net/ice/base: remove unused DDP package macros Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 24/30] net/ice/base: fix 4 byte alignment for pppoe dummy packet Qi Zhang ` (7 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowline, Paul M Stillwell Jr Previously, switch code would use only pre-reserved index sl ots at the end of each field vector for recipe result index locations. This patch adds code that detects other internal empty index slots that could potentially be used. For each recipe that is added, a determ ination is made as to whether any of these additional index slots alige with all the profiles selected for the recipe; if alignment is achieved, then these result index slots can be used. Signed-off-by: Dan Nowline <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flex_pipe.c | 41 +++++++++++++++++++++ drivers/net/ice/base/ice_flex_pipe.h | 2 ++ drivers/net/ice/base/ice_flex_type.h | 2 ++ drivers/net/ice/base/ice_protocol_type.h | 2 +- drivers/net/ice/base/ice_switch.c | 61 +++++++++++++++----------------- drivers/net/ice/base/ice_switch.h | 1 - drivers/net/ice/base/ice_type.h | 3 ++ 7 files changed, 78 insertions(+), 34 deletions(-) diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 76c26fd4e..318168910 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -1661,6 +1661,47 @@ ice_get_sw_fv_list(struct ice_hw *hw, u16 *prot_ids, u8 ids_cnt, } /** + * ice_init_profile_to_result_bm - Initialize the profile result index bitmap + * @hw: pointer to hardware structure + */ +void +ice_init_prof_result_bm(struct ice_hw *hw) +{ + struct ice_pkg_enum state; + struct ice_seg *ice_seg; + struct ice_fv *fv; + + if (!hw->seg) + return; + + ice_seg = hw->seg; + do { + u32 off; + u16 i; + + fv = (struct ice_fv *) + ice_pkg_enum_entry(ice_seg, &state, ICE_SID_FLD_VEC_SW, + &off, ice_sw_fv_handler); + ice_seg = NULL; + if (!fv) + break; + + ice_zero_bitmap(hw->switch_info->prof_res_bm[off], + ICE_MAX_FV_WORDS); + + /* Determine empty field vector indices, these can be + * used for recipe results. Skip index 0, since it is + * always used for Switch ID. + */ + for (i = 1; i < ICE_MAX_FV_WORDS; i++) + if (fv->ew[i].prot_id == ICE_PROT_INVALID && + fv->ew[i].off == ICE_FV_OFFSET_INVAL) + ice_set_bit(i, + hw->switch_info->prof_res_bm[off]); + } while (fv); +} + +/** * ice_pkg_buf_free * @hw: pointer to the HW structure * @bld: pointer to pkg build (allocated by ice_pkg_buf_alloc()) diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h index 137eaa7f8..e7d42e3de 100644 --- a/drivers/net/ice/base/ice_flex_pipe.h +++ b/drivers/net/ice/base/ice_flex_pipe.h @@ -33,6 +33,8 @@ ice_find_label_value(struct ice_seg *ice_seg, char const *name, u32 type, void ice_get_sw_fv_bitmap(struct ice_hw *hw, enum ice_prof_type type, ice_bitmap_t *bm); +void +ice_init_prof_result_bm(struct ice_hw *hw); enum ice_status ice_get_sw_fv_list(struct ice_hw *hw, u16 *prot_ids, u8 ids_cnt, ice_bitmap_t *bm, struct LIST_HEAD_TYPE *fv_list); diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h index c30d407c2..48c1e5184 100644 --- a/drivers/net/ice/base/ice_flex_type.h +++ b/drivers/net/ice/base/ice_flex_type.h @@ -16,6 +16,8 @@ struct ice_fv_word { }; #pragma pack() +#define ICE_MAX_NUM_PROFILES 256 + #define ICE_MAX_FV_WORDS 48 struct ice_fv { struct ice_fv_word ew[ICE_MAX_FV_WORDS]; diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h index c6caa8562..98185c9de 100644 --- a/drivers/net/ice/base/ice_protocol_type.h +++ b/drivers/net/ice/base/ice_protocol_type.h @@ -110,7 +110,7 @@ enum ice_prot_id { ICE_PROT_ARP_OF = 118, ICE_PROT_EAPOL_OF = 120, ICE_PROT_META_ID = 255, /* when offset == metaddata */ - ICE_PROT_INVALID = 255 /* when offset == 0xFF */ + ICE_PROT_INVALID = 255 /* when offset == ICE_FV_OFFSET_INVAL */ }; #define ICE_VNI_OFFSET 12 /* offset of VNI from ICE_PROT_UDP_OF */ diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 62ccf533c..9681d9590 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -467,21 +467,6 @@ static void ice_collect_result_idx(struct ice_aqc_recipe_data_elem *buf, } /** - * ice_init_possible_res_bm - initialize possible result bitmap - * @pos_result_bm: pointer to the bitmap to initialize - */ -static void ice_init_possible_res_bm(ice_bitmap_t *pos_result_bm) -{ - u16 bit; - - ice_zero_bitmap(pos_result_bm, ICE_MAX_FV_WORDS); - - for (bit = 0; bit < ICE_MAX_FV_WORDS; bit++) - if (ICE_POSSIBLE_RES_IDX & BIT_ULL(bit)) - ice_set_bit(bit, pos_result_bm); -} - -/** * ice_get_recp_frm_fw - update SW bookkeeping from FW recipe entries * @hw: pointer to hardware structure * @recps: struct that we need to populate @@ -496,7 +481,6 @@ static enum ice_status ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid, bool *refresh_required) { - ice_declare_bitmap(possible_idx, ICE_MAX_FV_WORDS); ice_declare_bitmap(result_bm, ICE_MAX_FV_WORDS); struct ice_aqc_recipe_data_elem *tmp; u16 num_recps = ICE_MAX_NUM_RECIPES; @@ -505,7 +489,6 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid, enum ice_status status; ice_zero_bitmap(result_bm, ICE_MAX_FV_WORDS); - ice_init_possible_res_bm(possible_idx); /* we need a buffer big enough to accommodate all the recipes */ tmp = (struct ice_aqc_recipe_data_elem *)ice_calloc(hw, @@ -541,7 +524,7 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid, for (sub_recps = 0; sub_recps < num_recps; sub_recps++) { struct ice_aqc_recipe_data_elem root_bufs = tmp[sub_recps]; struct ice_recp_grp_entry *rg_entry; - u8 prof_id, idx, prot = 0; + u8 prof, idx, prot = 0; bool is_root; u16 off = 0; @@ -561,8 +544,8 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid, ~ICE_AQ_RECIPE_RESULT_EN, result_bm); /* get the first profile that is associated with rid */ - prof_id = ice_find_first_bit(recipe_to_profile[idx], - ICE_MAX_NUM_PROFILES); + prof = ice_find_first_bit(recipe_to_profile[idx], + ICE_MAX_NUM_PROFILES); for (i = 0; i < ICE_NUM_WORDS_RECIPE; i++) { u8 lkup_indx = root_bufs.content.lkup_indx[i + 1]; @@ -579,12 +562,13 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid, * has ICE_AQ_RECIPE_LKUP_IGNORE or 0 since it isn't a * valid offset value. */ - if (ice_is_bit_set(possible_idx, rg_entry->fv_idx[i]) || + if (ice_is_bit_set(hw->switch_info->prof_res_bm[prof], + rg_entry->fv_idx[i]) || rg_entry->fv_idx[i] & ICE_AQ_RECIPE_LKUP_IGNORE || rg_entry->fv_idx[i] == 0) continue; - ice_find_prot_off(hw, ICE_BLK_SW, prof_id, + ice_find_prot_off(hw, ICE_BLK_SW, prof, rg_entry->fv_idx[i], &prot, &off); lkup_exts->fv_words[fv_word_idx].prot_id = prot; lkup_exts->fv_words[fv_word_idx].off = off; @@ -4950,30 +4934,32 @@ ice_find_free_recp_res_idx(struct ice_hw *hw, const ice_bitmap_t *profiles, ice_bitmap_t *free_idx) { ice_declare_bitmap(possible_idx, ICE_MAX_FV_WORDS); - ice_declare_bitmap(used_idx, ICE_MAX_FV_WORDS); ice_declare_bitmap(recipes, ICE_MAX_NUM_RECIPES); + ice_declare_bitmap(used_idx, ICE_MAX_FV_WORDS); u16 count = 0; u16 bit; - ice_zero_bitmap(free_idx, ICE_MAX_FV_WORDS); - ice_zero_bitmap(used_idx, ICE_MAX_FV_WORDS); + ice_zero_bitmap(possible_idx, ICE_MAX_FV_WORDS); ice_zero_bitmap(recipes, ICE_MAX_NUM_RECIPES); - ice_init_possible_res_bm(possible_idx); + ice_zero_bitmap(used_idx, ICE_MAX_FV_WORDS); + ice_zero_bitmap(free_idx, ICE_MAX_FV_WORDS); - for (bit = 0; bit < ICE_MAX_FV_WORDS; bit++) - if (ICE_POSSIBLE_RES_IDX & BIT_ULL(bit)) - ice_set_bit(bit, possible_idx); + for (count = 0; count < ICE_MAX_FV_WORDS; count++) + ice_set_bit(count, possible_idx); /* For each profile we are going to associate the recipe with, add the * recipes that are associated with that profile. This will give us - * the set of recipes that our recipe may collide with. + * the set of recipes that our recipe may collide with. Also, determine + * what possible result indexes are usable given this set of profiles. */ bit = 0; while (ICE_MAX_NUM_PROFILES > (bit = ice_find_next_bit(profiles, ICE_MAX_NUM_PROFILES, bit))) { ice_or_bitmap(recipes, recipes, profile_to_recipe[bit], ICE_MAX_NUM_RECIPES); - + ice_and_bitmap(possible_idx, possible_idx, + hw->switch_info->prof_res_bm[bit], + ICE_MAX_FV_WORDS); bit++; } @@ -4981,14 +4967,16 @@ ice_find_free_recp_res_idx(struct ice_hw *hw, const ice_bitmap_t *profiles, * which indexes have been used. */ for (bit = 0; bit < ICE_MAX_NUM_RECIPES; bit++) - if (ice_is_bit_set(recipes, bit)) + if (ice_is_bit_set(recipes, bit)) { ice_or_bitmap(used_idx, used_idx, hw->switch_info->recp_list[bit].res_idxs, ICE_MAX_FV_WORDS); + } ice_xor_bitmap(free_idx, used_idx, possible_idx, ICE_MAX_FV_WORDS); /* return number of free indexes */ + count = 0; bit = 0; while (ICE_MAX_FV_WORDS > (bit = ice_find_next_bit(free_idx, ICE_MAX_FV_WORDS, bit))) { @@ -5029,6 +5017,9 @@ ice_add_sw_recipe(struct ice_hw *hw, struct ice_sw_recipe *rm, ice_zero_bitmap(result_idx_bm, ICE_MAX_FV_WORDS); free_res_idx = ice_find_free_recp_res_idx(hw, profiles, result_idx_bm); + ice_debug(hw, ICE_DBG_SW, "Result idx slots: %d, need %d\n", + free_res_idx, rm->n_grp_count); + if (rm->n_grp_count > 1) { if (rm->n_grp_count > free_res_idx) return ICE_ERR_MAX_LIMIT; @@ -6081,6 +6072,12 @@ ice_add_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, u32 act = 0; u8 q_rgn; + /* Initialize profile to result index bitmap */ + if (!hw->switch_info->prof_res_bm_init) { + hw->switch_info->prof_res_bm_init = 1; + ice_init_prof_result_bm(hw); + } + if (!lkups_cnt) return ICE_ERR_PARAM; diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h index 0f0a1e98e..61083738a 100644 --- a/drivers/net/ice/base/ice_switch.h +++ b/drivers/net/ice/base/ice_switch.h @@ -222,7 +222,6 @@ struct ice_sw_recipe { /* Profiles this recipe should be associated with */ struct LIST_HEAD_TYPE fv_list; -#define ICE_MAX_NUM_PROFILES 256 /* Profiles this recipe is associated with */ u8 num_profs, *prof_ids; diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index 8322d88a0..a8e4229a1 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -730,6 +730,9 @@ struct ice_port_info { struct ice_switch_info { struct LIST_HEAD_TYPE vsi_list_map_head; struct ice_sw_recipe *recp_list; + u16 prof_res_bm_init; + + ice_declare_bitmap(prof_res_bm[ICE_MAX_NUM_PROFILES], ICE_MAX_FV_WORDS); }; /* Port hardware description */ -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 24/30] net/ice/base: fix 4 byte alignment for pppoe dummy packet 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (22 preceding siblings ...) 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 23/30] net/ice/base: search field vector indices for result slots Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 7:13 ` Yang, Qiming 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 25/30] net/ice/base: remove unnecessary error log Qi Zhang ` (6 subsequent siblings) 30 siblings, 1 reply; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Add two bytes to meet the requirement of 4 byte alignment for dummy packet for creating switch rule for PPPoE. Fixes: 032b6c617a96 ("net/ice/base: add support for GTP and PPPoE protocols") Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_switch.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 9681d9590..7681ba38b 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -441,6 +441,8 @@ dummy_pppoe_packet[] = { 0x00, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + + 0x00, 0x00, /* 2 bytes for 4 byte alignment */ }; /* this is a recipe to profile association bitmap */ -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* Re: [dpdk-dev] [PATCH v4 24/30] net/ice/base: fix 4 byte alignment for pppoe dummy packet 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 24/30] net/ice/base: fix 4 byte alignment for pppoe dummy packet Qi Zhang @ 2019-09-23 7:13 ` Yang, Qiming 0 siblings, 0 replies; 166+ messages in thread From: Yang, Qiming @ 2019-09-23 7:13 UTC (permalink / raw) To: Zhang, Qi Z, Lu, Wenzhuo Cc: dev, Ye, Xiaolong, Guo, Junfeng, Stillwell Jr, Paul M > -----Original Message----- > From: Zhang, Qi Z > Sent: Monday, September 23, 2019 2:27 PM > To: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming > <qiming.yang@intel.com> > Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Zhang, Qi Z > <qi.z.zhang@intel.com>; Guo, Junfeng <junfeng.guo@intel.com>; Stillwell Jr, > Paul M <paul.m.stillwell.jr@intel.com> > Subject: [PATCH v4 24/30] net/ice/base: fix 4 byte alignment for pppoe 4 bytes, same as below. > dummy packet > > Add two bytes to meet the requirement of 4 byte alignment for dummy > packet for creating switch rule for PPPoE. > > Fixes: 032b6c617a96 ("net/ice/base: add support for GTP and PPPoE > protocols") > > Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> > Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> > Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> > --- > drivers/net/ice/base/ice_switch.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/drivers/net/ice/base/ice_switch.c > b/drivers/net/ice/base/ice_switch.c > index 9681d9590..7681ba38b 100644 > --- a/drivers/net/ice/base/ice_switch.c > +++ b/drivers/net/ice/base/ice_switch.c > @@ -441,6 +441,8 @@ dummy_pppoe_packet[] = { > 0x00, 0x11, 0x00, 0x00, > 0x00, 0x00, 0x00, 0x00, > 0x00, 0x00, 0x00, 0x00, > + > + 0x00, 0x00, /* 2 bytes for 4 byte alignment */ > }; > > /* this is a recipe to profile association bitmap */ > -- > 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 25/30] net/ice/base: remove unnecessary error log 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (23 preceding siblings ...) 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 24/30] net/ice/base: fix 4 byte alignment for pppoe dummy packet Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 7:11 ` Yang, Qiming 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 26/30] net/ice/base: use bitmap copy where appropriate Qi Zhang ` (5 subsequent siblings) 30 siblings, 1 reply; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Paul M Stillwell Jr Remove the error log message when attempting to download a p ackage that has an unsupported version. Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flex_pipe.c | 16 ++++------------ 1 file changed, 4 insertions(+), 12 deletions(-) diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 318168910..11601f2c2 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -1284,7 +1284,6 @@ static void ice_init_pkg_regs(struct ice_hw *hw) /** * ice_chk_pkg_version - check package version for compatibility with driver - * @hw: pointer to the hardware structure * @pkg_ver: pointer to a version structure to check * * Check to make sure that the package about to be downloaded is compatible with @@ -1292,18 +1291,11 @@ static void ice_init_pkg_regs(struct ice_hw *hw) * version must match our ICE_PKG_SUPP_VER_MAJ and ICE_PKG_SUPP_VER_MNR * definitions. */ -static enum ice_status -ice_chk_pkg_version(struct ice_hw *hw, struct ice_pkg_ver *pkg_ver) +static enum ice_status ice_chk_pkg_version(struct ice_pkg_ver *pkg_ver) { if (pkg_ver->major != ICE_PKG_SUPP_VER_MAJ || - pkg_ver->minor != ICE_PKG_SUPP_VER_MNR) { - ice_info(hw, "ERROR: Incompatible package: %d.%d.%d.%d - requires package version: %d.%d.*.*\n", - pkg_ver->major, pkg_ver->minor, pkg_ver->update, - pkg_ver->draft, ICE_PKG_SUPP_VER_MAJ, - ICE_PKG_SUPP_VER_MNR); - + pkg_ver->minor != ICE_PKG_SUPP_VER_MNR) return ICE_ERR_NOT_SUPPORTED; - } return ICE_SUCCESS; } @@ -1358,7 +1350,7 @@ enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len) /* before downloading the package, check package version for * compatibility with driver */ - status = ice_chk_pkg_version(hw, &hw->pkg_ver); + status = ice_chk_pkg_version(&hw->pkg_ver); if (status) return status; @@ -1384,7 +1376,7 @@ enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len) if (!status) { status = ice_get_pkg_info(hw); if (!status) - status = ice_chk_pkg_version(hw, &hw->active_pkg_ver); + status = ice_chk_pkg_version(&hw->active_pkg_ver); } if (!status) { -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* Re: [dpdk-dev] [PATCH v4 25/30] net/ice/base: remove unnecessary error log 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 25/30] net/ice/base: remove unnecessary error log Qi Zhang @ 2019-09-23 7:11 ` Yang, Qiming 0 siblings, 0 replies; 166+ messages in thread From: Yang, Qiming @ 2019-09-23 7:11 UTC (permalink / raw) To: Zhang, Qi Z, Lu, Wenzhuo Cc: dev, Ye, Xiaolong, Nowlin, Dan, Stillwell Jr, Paul M > -----Original Message----- > From: Zhang, Qi Z > Sent: Monday, September 23, 2019 2:27 PM > To: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming > <qiming.yang@intel.com> > Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Zhang, Qi Z > <qi.z.zhang@intel.com>; Nowlin, Dan <dan.nowlin@intel.com>; Stillwell Jr, > Paul M <paul.m.stillwell.jr@intel.com> > Subject: [PATCH v4 25/30] net/ice/base: remove unnecessary error log > > Remove the error log message when attempting to download a p ackage that 'p ackage' is weird. > has an unsupported version. > > Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> > Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> > Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> > --- > drivers/net/ice/base/ice_flex_pipe.c | 16 ++++------------ > 1 file changed, 4 insertions(+), 12 deletions(-) > > diff --git a/drivers/net/ice/base/ice_flex_pipe.c > b/drivers/net/ice/base/ice_flex_pipe.c > index 318168910..11601f2c2 100644 > --- a/drivers/net/ice/base/ice_flex_pipe.c > +++ b/drivers/net/ice/base/ice_flex_pipe.c > @@ -1284,7 +1284,6 @@ static void ice_init_pkg_regs(struct ice_hw *hw) > > /** > * ice_chk_pkg_version - check package version for compatibility with driver > - * @hw: pointer to the hardware structure > * @pkg_ver: pointer to a version structure to check > * > * Check to make sure that the package about to be downloaded is > compatible with @@ -1292,18 +1291,11 @@ static void > ice_init_pkg_regs(struct ice_hw *hw) > * version must match our ICE_PKG_SUPP_VER_MAJ and > ICE_PKG_SUPP_VER_MNR > * definitions. > */ > -static enum ice_status > -ice_chk_pkg_version(struct ice_hw *hw, struct ice_pkg_ver *pkg_ver) > +static enum ice_status ice_chk_pkg_version(struct ice_pkg_ver *pkg_ver) > { > if (pkg_ver->major != ICE_PKG_SUPP_VER_MAJ || > - pkg_ver->minor != ICE_PKG_SUPP_VER_MNR) { > - ice_info(hw, "ERROR: Incompatible package: %d.%d.%d.%d - > requires package version: %d.%d.*.*\n", > - pkg_ver->major, pkg_ver->minor, pkg_ver->update, > - pkg_ver->draft, ICE_PKG_SUPP_VER_MAJ, > - ICE_PKG_SUPP_VER_MNR); > - > + pkg_ver->minor != ICE_PKG_SUPP_VER_MNR) > return ICE_ERR_NOT_SUPPORTED; > - } > > return ICE_SUCCESS; > } > @@ -1358,7 +1350,7 @@ enum ice_status ice_init_pkg(struct ice_hw *hw, > u8 *buf, u32 len) > /* before downloading the package, check package version for > * compatibility with driver > */ > - status = ice_chk_pkg_version(hw, &hw->pkg_ver); > + status = ice_chk_pkg_version(&hw->pkg_ver); > if (status) > return status; > > @@ -1384,7 +1376,7 @@ enum ice_status ice_init_pkg(struct ice_hw *hw, > u8 *buf, u32 len) > if (!status) { > status = ice_get_pkg_info(hw); > if (!status) > - status = ice_chk_pkg_version(hw, &hw- > >active_pkg_ver); > + status = ice_chk_pkg_version(&hw->active_pkg_ver); > } > > if (!status) { > -- > 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 26/30] net/ice/base: use bitmap copy where appropriate 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (24 preceding siblings ...) 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 25/30] net/ice/base: remove unnecessary error log Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 7:10 ` Yang, Qiming 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 27/30] net/ice/base: fix alignment isue Qi Zhang ` (4 subsequent siblings) 30 siblings, 1 reply; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Bruce Allan, Paul M Stillwell Jr ice_cp_bitmap() already exists and should be used instead of using ice_memcpy(). Note, there are a couple comments that sugges t using a bitmap-specific copy function, but those are not correct since the source block of memory is not a bitmap. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_switch.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 7681ba38b..10dfc720a 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -615,8 +615,7 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid, goto err_unroll; /* Copy result indexes */ - ice_memcpy(recps[rid].res_idxs, result_bm, sizeof(recps[rid].res_idxs), - ICE_NONDMA_TO_NONDMA); + ice_cp_bitmap(recps[rid].res_idxs, result_bm, ICE_MAX_FV_WORDS); recps[rid].recp_created = true; err_unroll: @@ -645,8 +644,8 @@ ice_get_recp_to_prof_map(struct ice_hw *hw) ice_zero_bitmap(r_bitmap, ICE_MAX_NUM_RECIPES); if (ice_aq_get_recipe_to_profile(hw, i, (u8 *)r_bitmap, NULL)) continue; - ice_memcpy(profile_to_recipe[i], r_bitmap, - sizeof(profile_to_recipe[i]), ICE_NONDMA_TO_NONDMA); + ice_cp_bitmap(profile_to_recipe[i], r_bitmap, + ICE_MAX_NUM_RECIPES); for (j = 0; j < ICE_MAX_NUM_RECIPES; j++) if (ice_is_bit_set(r_bitmap, j)) ice_set_bit(i, recipe_to_profile[j]); @@ -5586,8 +5585,8 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, goto err_unroll; /* Update profile to recipe bitmap array */ - ice_memcpy(profile_to_recipe[fvit->profile_id], r_bitmap, - sizeof(r_bitmap), ICE_NONDMA_TO_NONDMA); + ice_cp_bitmap(profile_to_recipe[fvit->profile_id], r_bitmap, + ICE_MAX_NUM_RECIPES); /* Update recipe to profile bitmap array */ for (j = 0; j < ICE_MAX_NUM_RECIPES; j++) -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* Re: [dpdk-dev] [PATCH v4 26/30] net/ice/base: use bitmap copy where appropriate 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 26/30] net/ice/base: use bitmap copy where appropriate Qi Zhang @ 2019-09-23 7:10 ` Yang, Qiming 0 siblings, 0 replies; 166+ messages in thread From: Yang, Qiming @ 2019-09-23 7:10 UTC (permalink / raw) To: Zhang, Qi Z, Lu, Wenzhuo Cc: dev, Ye, Xiaolong, Allan, Bruce W, Stillwell Jr, Paul M > -----Original Message----- > From: Zhang, Qi Z > Sent: Monday, September 23, 2019 2:27 PM > To: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming > <qiming.yang@intel.com> > Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Zhang, Qi Z > <qi.z.zhang@intel.com>; Allan, Bruce W <bruce.w.allan@intel.com>; Stillwell > Jr, Paul M <paul.m.stillwell.jr@intel.com> > Subject: [PATCH v4 26/30] net/ice/base: use bitmap copy where appropriate > > ice_cp_bitmap() already exists and should be used instead of using > ice_memcpy(). Note, there are a couple comments that sugges t using a More than one space before 'Note' Sugges t/suggest? > bitmap-specific copy function, but those are not correct since the source > block of memory is not a bitmap. > > Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> > Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> > Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> > --- > drivers/net/ice/base/ice_switch.c | 11 +++++------ > 1 file changed, 5 insertions(+), 6 deletions(-) > > diff --git a/drivers/net/ice/base/ice_switch.c > b/drivers/net/ice/base/ice_switch.c > index 7681ba38b..10dfc720a 100644 > --- a/drivers/net/ice/base/ice_switch.c > +++ b/drivers/net/ice/base/ice_switch.c > @@ -615,8 +615,7 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct > ice_sw_recipe *recps, u8 rid, > goto err_unroll; > > /* Copy result indexes */ > - ice_memcpy(recps[rid].res_idxs, result_bm, sizeof(recps[rid].res_idxs), > - ICE_NONDMA_TO_NONDMA); > + ice_cp_bitmap(recps[rid].res_idxs, result_bm, ICE_MAX_FV_WORDS); > recps[rid].recp_created = true; > > err_unroll: > @@ -645,8 +644,8 @@ ice_get_recp_to_prof_map(struct ice_hw *hw) > ice_zero_bitmap(r_bitmap, ICE_MAX_NUM_RECIPES); > if (ice_aq_get_recipe_to_profile(hw, i, (u8 *)r_bitmap, NULL)) > continue; > - ice_memcpy(profile_to_recipe[i], r_bitmap, > - sizeof(profile_to_recipe[i]), > ICE_NONDMA_TO_NONDMA); > + ice_cp_bitmap(profile_to_recipe[i], r_bitmap, > + ICE_MAX_NUM_RECIPES); > for (j = 0; j < ICE_MAX_NUM_RECIPES; j++) > if (ice_is_bit_set(r_bitmap, j)) > ice_set_bit(i, recipe_to_profile[j]); @@ - > 5586,8 +5585,8 @@ ice_add_adv_recipe(struct ice_hw *hw, struct > ice_adv_lkup_elem *lkups, > goto err_unroll; > > /* Update profile to recipe bitmap array */ > - ice_memcpy(profile_to_recipe[fvit->profile_id], r_bitmap, > - sizeof(r_bitmap), ICE_NONDMA_TO_NONDMA); > + ice_cp_bitmap(profile_to_recipe[fvit->profile_id], r_bitmap, > + ICE_MAX_NUM_RECIPES); > > /* Update recipe to profile bitmap array */ > for (j = 0; j < ICE_MAX_NUM_RECIPES; j++) > -- > 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 27/30] net/ice/base: fix alignment isue 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (25 preceding siblings ...) 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 26/30] net/ice/base: use bitmap copy where appropriate Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 6:26 ` Qi Zhang ` (3 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, stable, Tony Nguyen, Paul M Stillwell Jr As title says, fix an alignment issue. Fixes: 51d04e4933e3 ("net/ice/base: add flexible pipeline module") Cc: stable@dpdk.org Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flex_pipe.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 11601f2c2..0357fbd4e 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -131,8 +131,9 @@ static struct ice_buf_table *ice_find_buf_table(struct ice_seg *ice_seg) { struct ice_nvm_table *nvms; - nvms = (struct ice_nvm_table *)(ice_seg->device_table + - LE32_TO_CPU(ice_seg->device_table_count)); + nvms = (struct ice_nvm_table *) + (ice_seg->device_table + + LE32_TO_CPU(ice_seg->device_table_count)); return (_FORCE_ struct ice_buf_table *) (nvms->vers + LE32_TO_CPU(nvms->table_count)); -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 27/30] net/ice/base: fix alignment isue 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (26 preceding siblings ...) 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 27/30] net/ice/base: fix alignment isue Qi Zhang @ 2019-09-23 6:26 ` Qi Zhang 2019-09-23 6:27 ` [dpdk-dev] [PATCH v4 28/30] net/ice/base: fix PTYPE bitmap Qi Zhang ` (2 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:26 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, stable, Tony Nguyen, Paul M Stillwell Jr As title says, fix an alignment issue. Fixes: 51d04e4933e3 ("net/ice/base: add flexible pipeline module") Cc: stable@dpdk.org Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flex_pipe.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 11601f2c2..0357fbd4e 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -131,8 +131,9 @@ static struct ice_buf_table *ice_find_buf_table(struct ice_seg *ice_seg) { struct ice_nvm_table *nvms; - nvms = (struct ice_nvm_table *)(ice_seg->device_table + - LE32_TO_CPU(ice_seg->device_table_count)); + nvms = (struct ice_nvm_table *) + (ice_seg->device_table + + LE32_TO_CPU(ice_seg->device_table_count)); return (_FORCE_ struct ice_buf_table *) (nvms->vers + LE32_TO_CPU(nvms->table_count)); -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 28/30] net/ice/base: fix PTYPE bitmap 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (27 preceding siblings ...) 2019-09-23 6:26 ` Qi Zhang @ 2019-09-23 6:27 ` Qi Zhang 2019-09-23 6:27 ` [dpdk-dev] [PATCH v4 29/30] net/ice/base: add switch support for IPv6 tc field Qi Zhang 2019-09-23 6:27 ` [dpdk-dev] [PATCH v4 30/30] net/ice/base: remove unused code Qi Zhang 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:27 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Zhirun Yan, Paul M Stillwell Jr Before this patch, IPv4 and UDP inner hash rule will be over written by later rules after RSS initialization phase. This is because the PTYPE bitmap table cover some PTYPEs belong to another PTGs. And some PTYPEs are reserved. Remove these PTYPEs in TCP, UDP, SCTP and ipv4 bitmap table. Fixes: aa1cd410fa64 ("net/ice/base: add flow module") Signed-off-by: Zhirun Yan <zhirun.yan@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index f9c65d6a2..e03c5d0e7 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -177,9 +177,9 @@ static const u32 ice_ptypes_ipv4_ofos[] = { /* Packet types for packets with an Innermost/Last IPv4 header */ static const u32 ice_ptypes_ipv4_il[] = { - 0xE0000000, 0xB807700E, 0x8001DC03, 0xE01DC03B, - 0x0007700E, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x000FF800, 0x00000000, + 0xE0000000, 0xB807700E, 0x80000003, 0xE01DC03B, + 0x0000000E, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x001FF800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -227,8 +227,8 @@ static const u32 ice_ptypes_arp_of[] = { * packets with inner UDP. */ static const u32 ice_ptypes_udp_il[] = { - 0x81000000, 0x20204040, 0x04081010, 0x80810102, - 0x00204040, 0x00000000, 0x00000000, 0x00000000, + 0x81000000, 0x20204040, 0x04000010, 0x80810102, + 0x00200040, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00410000, 0x10842000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -239,7 +239,7 @@ static const u32 ice_ptypes_udp_il[] = { /* Packet types for packets with an Innermost/Last TCP header */ static const u32 ice_ptypes_tcp_il[] = { - 0x04000000, 0x80810102, 0x10204040, 0x02040408, + 0x04000000, 0x80810102, 0x10000040, 0x02040408, 0x00810102, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00820000, 0x21084000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -251,7 +251,7 @@ static const u32 ice_ptypes_tcp_il[] = { /* Packet types for packets with an Innermost/Last SCTP header */ static const u32 ice_ptypes_sctp_il[] = { - 0x08000000, 0x01020204, 0x20408081, 0x04080810, + 0x08000000, 0x01020204, 0x20000081, 0x04080810, 0x01020204, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01040000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 29/30] net/ice/base: add switch support for IPv6 tc field 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (28 preceding siblings ...) 2019-09-23 6:27 ` [dpdk-dev] [PATCH v4 28/30] net/ice/base: fix PTYPE bitmap Qi Zhang @ 2019-09-23 6:27 ` Qi Zhang 2019-09-23 6:27 ` [dpdk-dev] [PATCH v4 30/30] net/ice/base: remove unused code Qi Zhang 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:27 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Add support for IPv6 traffic class (tc) field for switch rule. Correct ice_ipv6_hdr based on the IPv6 Protocol using bitfields. Add big/little endian convert for tc field before it is inserted, since tc is only one byte and also does not have a byte-aligned offset. Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_protocol_type.h | 6 +++--- drivers/net/ice/base/ice_switch.c | 13 +++++++++++++ 2 files changed, 16 insertions(+), 3 deletions(-) diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h index 98185c9de..f61345a7f 100644 --- a/drivers/net/ice/base/ice_protocol_type.h +++ b/drivers/net/ice/base/ice_protocol_type.h @@ -183,9 +183,9 @@ struct ice_ipv4_hdr { }; struct ice_ipv6_hdr { - u8 version; - u8 tc; - u16 flow_label; + u32 version:4; + u32 tc:8; + u32 flow_label:20; u16 payload_len; u8 next_hdr; u8 hop_limit; diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 10dfc720a..80afa74cd 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -5785,6 +5785,19 @@ ice_fill_adv_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt, break; case ICE_IPV6_OFOS: case ICE_IPV6_IL: + /* Based on the same mechanism below, if tc (Traffic + * Class) for IPv6 has mask, it means tc field is set. + * Since tc is only one byte, we have to handle the + * big/little endian issue before it can be inserted. + */ + if (lkups[i].m_u.ipv6_hdr.tc) { + ((u16 *)&lkups[i].h_u)[0] = + (((u16 *)&lkups[i].h_u)[0] << 8) | + (((u16 *)&lkups[i].h_u)[0] >> 8); + ((u16 *)&lkups[i].m_u)[0] = + (((u16 *)&lkups[i].m_u)[0] << 8) | + (((u16 *)&lkups[i].m_u)[0] >> 8); + } len = sizeof(struct ice_ipv6_hdr); break; case ICE_TCP_IL: -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v4 30/30] net/ice/base: remove unused code 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang ` (29 preceding siblings ...) 2019-09-23 6:27 ` [dpdk-dev] [PATCH v4 29/30] net/ice/base: add switch support for IPv6 tc field Qi Zhang @ 2019-09-23 6:27 ` Qi Zhang 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 6:27 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr Remove unused code. Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_common.c | 4 ---- drivers/net/ice/base/ice_common.h | 2 -- drivers/net/ice/base/ice_flex_pipe.c | 1 - drivers/net/ice/base/ice_flow.h | 3 --- 4 files changed, 10 deletions(-) diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index 16b91dc12..48ba160f7 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -1068,7 +1068,6 @@ ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx, return ice_copy_rxq_ctx_to_hw(hw, ctx_buf, rxq_index); } -#if !defined(NO_UNUSED_CTX_CODE) || defined(AE_DRIVER) /** * ice_clear_rxq_ctx * @hw: pointer to the hardware structure @@ -1089,7 +1088,6 @@ enum ice_status ice_clear_rxq_ctx(struct ice_hw *hw, u32 rxq_index) return ICE_SUCCESS; } -#endif /* !NO_UNUSED_CTX_CODE || AE_DRIVER */ /* LAN Tx Queue Context */ const struct ice_ctx_ele ice_tlan_ctx_info[] = { @@ -1125,7 +1123,6 @@ const struct ice_ctx_ele ice_tlan_ctx_info[] = { { 0 } }; -#if !defined(NO_UNUSED_CTX_CODE) || defined(AE_DRIVER) /** * ice_copy_tx_cmpltnq_ctx_to_hw * @hw: pointer to the hardware structure @@ -1306,7 +1303,6 @@ ice_clear_tx_drbell_q_ctx(struct ice_hw *hw, u32 tx_drbell_q_index) return ICE_SUCCESS; } -#endif /* !NO_UNUSED_CTX_CODE || AE_DRIVER */ /* FW Admin Queue command wrappers */ diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h index bcb0a999d..c73184499 100644 --- a/drivers/net/ice/base/ice_common.h +++ b/drivers/net/ice/base/ice_common.h @@ -74,7 +74,6 @@ void ice_set_safe_mode_caps(struct ice_hw *hw); enum ice_status ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx, u32 rxq_index); -#if !defined(NO_UNUSED_CTX_CODE) || defined(AE_DRIVER) enum ice_status ice_clear_rxq_ctx(struct ice_hw *hw, u32 rxq_index); enum ice_status ice_clear_tx_cmpltnq_ctx(struct ice_hw *hw, u32 tx_cmpltnq_index); @@ -88,7 +87,6 @@ enum ice_status ice_write_tx_drbell_q_ctx(struct ice_hw *hw, struct ice_tx_drbell_q_ctx *tx_drbell_q_ctx, u32 tx_drbell_q_index); -#endif /* !NO_UNUSED_CTX_CODE || AE_DRIVER */ enum ice_status ice_aq_get_rss_lut(struct ice_hw *hw, u16 vsi_handle, u8 lut_type, u8 *lut, diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 0357fbd4e..75bb87079 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -2701,7 +2701,6 @@ ice_find_prof_id_with_mask(struct ice_hw *hw, enum ice_block blk, for (i = 0; i < es->count; i++) { u16 off = i * es->fvw; - u16 j; if (memcmp(&es->t[off], fv, es->fvw * sizeof(*fv))) continue; diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h index 6f26f3935..326ff6f81 100644 --- a/drivers/net/ice/base/ice_flow.h +++ b/drivers/net/ice/base/ice_flow.h @@ -362,9 +362,6 @@ struct ice_flow_action { } data; }; -/* TDD esp in the linux code doesn't like prototypes, so - * ifdef them all out, so they stop conflicting with our mocks - */ u64 ice_flow_find_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir, struct ice_flow_seg_info *segs, u8 segs_cnt); -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch. 2019-09-02 3:55 [dpdk-dev] [PATCH 0/8] net/ice/base: share code update secend batch Qi Zhang ` (10 preceding siblings ...) 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 01/30] net/ice/base: remove redundant empty lines Qi Zhang ` (30 more replies) 2019-09-27 4:16 ` [dpdk-dev] [PATCH 0/8] net/ice: base code update Qi Zhang ` (2 subsequent siblings) 14 siblings, 31 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang The patchset depends on the first batch http://patchwork.dpdk.org/project/dpdk/list/?series=6158&state=* Key Features: 1) Add tunnel support for fdir 2) Add non-word aligned field support for fdir 3) Add dest mac field support for fdir 4) Add flow count support for fdir 5) Add queue region support for fdir 6) Add vlan pppoe support for switch 7) Add GTPU qif support for fdir 8) Add symmetric hash support 9) Couple RSS fixes v5: - commit log typo fix v4: - couple bug fix and code clean. v3: - add features 7, 8, 9. v2: - add features 3, 4, 5, 6. *** BLURB HERE *** Qi Zhang (30): net/ice/base: remove redundant empty lines net/ice/base: add support for tunnel packets net/ice/base: add non-word aligned ip field support net/ice/base: add non-word aligned ipv6 field support net/ice/base: correct the mask for checking protocol header net/ice/base: propagate errors from functions net/ice/base: remove pointless NULL check of port info net/ice/base: remove RSS code as iavf host net/ice/base: add support for switch rule about VLAN PPPoE net/ice/base: minor structure refactor net/ice/base: associate switch recipe to profiles net/ice/base: enable RSS for PPPoE with SCTP net/ice/base: enable fdir queue region net/ice/base: enable setting up FDIR counters net/ice/base: add dest MAC field support for FDIR net/ice/base: update FW API minor version net/ice/base: enable symmetric hash for RSS net/ice/base: replace alloc-followed-by-copy with memdup net/ice/base: add FDIR support for GTPU qfi field net/ice/base: fix the bitmap for TCP in RSS net/ice/base: fix segment in remove existing RSS rule net/ice/base: remove unused DDP package macros net/ice/base: search field vector indices for result slots net/ice/base: fix 4 bytes alignment for pppoe dummy packet net/ice/base: remove unnecessary error log net/ice/base: use bitmap copy where appropriate net/ice/base: fix alignment isue net/ice/base: fix PTYPE bitmap net/ice/base: add switch support for IPv6 tc field net/ice/base: remove unused code drivers/net/ice/base/ice_adminq_cmd.h | 111 -------- drivers/net/ice/base/ice_bitops.h | 2 - drivers/net/ice/base/ice_common.c | 29 -- drivers/net/ice/base/ice_common.h | 4 - drivers/net/ice/base/ice_controlq.c | 9 - drivers/net/ice/base/ice_controlq.h | 3 +- drivers/net/ice/base/ice_devids.h | 1 - drivers/net/ice/base/ice_fdir.c | 461 +++++++++++++++++++++++++++---- drivers/net/ice/base/ice_fdir.h | 41 ++- drivers/net/ice/base/ice_flex_pipe.c | 73 +++-- drivers/net/ice/base/ice_flex_pipe.h | 3 +- drivers/net/ice/base/ice_flex_type.h | 2 + drivers/net/ice/base/ice_flow.c | 328 +++++++++++----------- drivers/net/ice/base/ice_flow.h | 8 +- drivers/net/ice/base/ice_hw_autogen.h | 2 - drivers/net/ice/base/ice_lan_tx_rx.h | 9 - drivers/net/ice/base/ice_nvm.c | 4 - drivers/net/ice/base/ice_protocol_type.h | 18 +- drivers/net/ice/base/ice_sched.c | 7 +- drivers/net/ice/base/ice_switch.c | 145 +++++----- drivers/net/ice/base/ice_switch.h | 3 - drivers/net/ice/base/ice_type.h | 31 +-- drivers/net/ice/ice_ethdev.c | 16 +- 23 files changed, 782 insertions(+), 528 deletions(-) -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 01/30] net/ice/base: remove redundant empty lines 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 02/30] net/ice/base: add support for tunnel packets Qi Zhang ` (29 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr Remove redundant empty lines Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_adminq_cmd.h | 111 ------------------------------- drivers/net/ice/base/ice_bitops.h | 2 - drivers/net/ice/base/ice_common.c | 25 ------- drivers/net/ice/base/ice_common.h | 2 - drivers/net/ice/base/ice_controlq.c | 9 --- drivers/net/ice/base/ice_controlq.h | 1 - drivers/net/ice/base/ice_devids.h | 1 - drivers/net/ice/base/ice_flex_pipe.c | 5 -- drivers/net/ice/base/ice_flex_pipe.h | 1 - drivers/net/ice/base/ice_hw_autogen.h | 2 - drivers/net/ice/base/ice_lan_tx_rx.h | 9 --- drivers/net/ice/base/ice_nvm.c | 4 -- drivers/net/ice/base/ice_protocol_type.h | 2 - drivers/net/ice/base/ice_sched.c | 4 -- drivers/net/ice/base/ice_switch.c | 8 --- drivers/net/ice/base/ice_switch.h | 2 - drivers/net/ice/base/ice_type.h | 9 --- 17 files changed, 197 deletions(-) diff --git a/drivers/net/ice/base/ice_adminq_cmd.h b/drivers/net/ice/base/ice_adminq_cmd.h index 8e1d6a07d..e6a1350ba 100644 --- a/drivers/net/ice/base/ice_adminq_cmd.h +++ b/drivers/net/ice/base/ice_adminq_cmd.h @@ -9,12 +9,10 @@ * descriptor format. It is shared between Firmware and Software. */ - #define ICE_MAX_VSI 768 #define ICE_AQC_TOPO_MAX_LEVEL_NUM 0x9 #define ICE_AQ_SET_MAC_FRAME_SIZE_MAX 9728 - struct ice_aqc_generic { __le32 param0; __le32 param1; @@ -22,7 +20,6 @@ struct ice_aqc_generic { __le32 addr_low; }; - /* Get version (direct 0x0001) */ struct ice_aqc_get_ver { __le32 rom_ver; @@ -37,7 +34,6 @@ struct ice_aqc_get_ver { u8 api_patch; }; - /* Send driver version (indirect 0x0002) */ struct ice_aqc_driver_ver { u8 major_ver; @@ -49,7 +45,6 @@ struct ice_aqc_driver_ver { __le32 addr_low; }; - /* Queue Shutdown (direct 0x0003) */ struct ice_aqc_q_shutdown { u8 driver_unloading; @@ -57,9 +52,6 @@ struct ice_aqc_q_shutdown { u8 reserved[15]; }; - - - /* Request resource ownership (direct 0x0008) * Release resource ownership (direct 0x0009) */ @@ -92,7 +84,6 @@ struct ice_aqc_req_res { u8 reserved[2]; }; - /* Get function capabilities (indirect 0x000A) * Get device capabilities (indirect 0x000B) */ @@ -105,7 +96,6 @@ struct ice_aqc_list_caps { __le32 addr_low; }; - /* Device/Function buffer entry, repeated per reported capability */ struct ice_aqc_list_caps_elem { __le16 cap; @@ -132,7 +122,6 @@ struct ice_aqc_list_caps_elem { __le64 rsvd2; }; - /* Manage MAC address, read command - indirect (0x0107) * This struct is also used for the response */ @@ -153,7 +142,6 @@ struct ice_aqc_manage_mac_read { __le32 addr_low; }; - /* Response buffer format for manage MAC read command */ struct ice_aqc_manage_mac_read_resp { u8 lport_num; @@ -163,7 +151,6 @@ struct ice_aqc_manage_mac_read_resp { u8 mac_addr[ETH_ALEN]; }; - /* Manage MAC address, write command - direct (0x0108) */ struct ice_aqc_manage_mac_write { u8 rsvd; @@ -182,7 +169,6 @@ struct ice_aqc_manage_mac_write { __le32 addr_low; }; - /* Clear PXE Command and response (direct 0x0110) */ struct ice_aqc_clear_pxe { u8 rx_cnt; @@ -190,7 +176,6 @@ struct ice_aqc_clear_pxe { u8 reserved[15]; }; - /* Configure No-Drop Policy Command (direct 0x0112) */ struct ice_aqc_config_no_drop_policy { u8 opts; @@ -215,7 +200,6 @@ struct ice_aqc_get_sw_cfg { __le32 addr_low; }; - /* Each entry in the response buffer is of the following type: */ struct ice_aqc_get_sw_cfg_resp_elem { /* VSI/Port Number */ @@ -242,7 +226,6 @@ struct ice_aqc_get_sw_cfg_resp_elem { #define ICE_AQC_GET_SW_CONF_RESP_IS_VF BIT(15) }; - /* The response buffer is as follows. Note that the length of the * elements array varies with the length of the command response. */ @@ -250,8 +233,6 @@ struct ice_aqc_get_sw_cfg_resp { struct ice_aqc_get_sw_cfg_resp_elem elements[1]; }; - - /* These resource type defines are used for all switch resource * commands where a resource type is required, such as: * Get Resource Allocation command (indirect 0x0204) @@ -324,7 +305,6 @@ struct ice_aqc_get_res_resp { struct ice_aqc_get_res_resp_elem elem[1]; }; - /* Allocate Resources command (indirect 0x0208) * Free Resources command (indirect 0x0209) */ @@ -335,7 +315,6 @@ struct ice_aqc_alloc_free_res_cmd { __le32 addr_low; }; - /* Resource descriptor */ struct ice_aqc_res_elem { union { @@ -344,7 +323,6 @@ struct ice_aqc_res_elem { } e; }; - /* Buffer for Allocate/Free Resources commands */ struct ice_aqc_alloc_free_res_elem { __le16 res_type; /* Types defined above cmd 0x0204 */ @@ -355,7 +333,6 @@ struct ice_aqc_alloc_free_res_elem { struct ice_aqc_res_elem elem[1]; }; - /* Get Allocated Resource Descriptors Command (indirect 0x020A) */ struct ice_aqc_get_allocd_res_desc { union { @@ -379,7 +356,6 @@ struct ice_aqc_get_allocd_res_desc_resp { struct ice_aqc_res_elem elem[1]; }; - /* Add VSI (indirect 0x0210) * Update VSI (indirect 0x0211) * Get VSI (indirect 0x0212) @@ -405,7 +381,6 @@ struct ice_aqc_add_get_update_free_vsi { __le32 addr_low; }; - /* Response descriptor for: * Add VSI (indirect 0x0210) * Update VSI (indirect 0x0211) @@ -420,7 +395,6 @@ struct ice_aqc_add_update_free_vsi_resp { __le32 addr_low; }; - struct ice_aqc_get_vsi_resp { __le16 vsi_num; u8 vf_id; @@ -434,7 +408,6 @@ struct ice_aqc_get_vsi_resp { __le32 addr_low; }; - struct ice_aqc_vsi_props { __le16 valid_sections; #define ICE_AQ_VSI_PROP_SW_VALID BIT(0) @@ -589,7 +562,6 @@ struct ice_aqc_vsi_props { u8 reserved[24]; }; - /* Add/update mirror rule - direct (0x0260) */ #define ICE_AQC_RULE_ID_VALID_S 7 #define ICE_AQC_RULE_ID_VALID_M (0x1 << ICE_AQC_RULE_ID_VALID_S) @@ -694,7 +666,6 @@ struct ice_aqc_storm_cfg { __le32 reserved; }; - #define ICE_MAX_NUM_RECIPES 64 /* Add/Get Recipe (indirect 0x0290/0x0292)*/ @@ -779,7 +750,6 @@ struct ice_aqc_sw_rules { __le32 addr_low; }; - #pragma pack(1) /* Add/Update/Get/Remove lookup Rx/Tx command/response entry * This structures describes the lookup rules and associated actions. "index" @@ -867,7 +837,6 @@ struct ice_sw_rule_lkup_rx_tx { }; #pragma pack() - /* Add/Update/Remove large action command/response entry * "index" is returned as part of a response to a successful Add command, and * can be used to identify the action for Update/Get/Remove commands. @@ -928,7 +897,6 @@ struct ice_sw_rule_lg_act { #define ICE_LG_ACT_STAT_COUNT_M (0x7F << ICE_LG_ACT_STAT_COUNT_S) }; - /* Add/Update/Remove VSI list command/response entry * "index" is returned as part of a response to a successful Add command, and * can be used to identify the VSI list for Update/Get/Remove commands. @@ -939,7 +907,6 @@ struct ice_sw_rule_vsi_list { __le16 vsi[1]; /* Array of number_vsi VSI numbers */ }; - #pragma pack(1) /* Query VSI list command/response entry */ struct ice_sw_rule_vsi_list_query { @@ -948,7 +915,6 @@ struct ice_sw_rule_vsi_list_query { }; #pragma pack() - #pragma pack(1) /* Add switch rule response: * Content of return buffer is same as the input buffer. The status field and @@ -974,7 +940,6 @@ struct ice_aqc_sw_rules_elem { #pragma pack() - /* PFC Ignore (direct 0x0301) * The command and response use the same descriptor structure */ @@ -1009,7 +974,6 @@ struct ice_aqc_set_dcb_params { u8 rsvd[14]; }; - /* Get Default Topology (indirect 0x0400) */ struct ice_aqc_get_topo { u8 port_num; @@ -1020,7 +984,6 @@ struct ice_aqc_get_topo { __le32 addr_low; }; - /* Update TSE (indirect 0x0403) * Get TSE (indirect 0x0404) * Add TSE (indirect 0x0401) @@ -1037,7 +1000,6 @@ struct ice_aqc_sched_elem_cmd { __le32 addr_low; }; - /* This is the buffer for: * Suspend Nodes (indirect 0x0409) * Resume Nodes (indirect 0x040A) @@ -1046,7 +1008,6 @@ struct ice_aqc_suspend_resume_elem { __le32 teid[1]; }; - struct ice_aqc_txsched_move_grp_info_hdr { __le32 src_parent_teid; __le32 dest_parent_teid; @@ -1054,19 +1015,16 @@ struct ice_aqc_txsched_move_grp_info_hdr { __le16 reserved; }; - struct ice_aqc_move_elem { struct ice_aqc_txsched_move_grp_info_hdr hdr; __le32 teid[1]; }; - struct ice_aqc_elem_info_bw { __le16 bw_profile_idx; __le16 bw_alloc; }; - struct ice_aqc_txsched_elem { u8 elem_type; /* Special field, reserved for some aq calls */ #define ICE_AQC_ELEM_TYPE_UNDEFINED 0x0 @@ -1098,50 +1056,42 @@ struct ice_aqc_txsched_elem { __le16 reserved2; }; - struct ice_aqc_txsched_elem_data { __le32 parent_teid; __le32 node_teid; struct ice_aqc_txsched_elem data; }; - struct ice_aqc_txsched_topo_grp_info_hdr { __le32 parent_teid; __le16 num_elems; __le16 reserved2; }; - struct ice_aqc_add_elem { struct ice_aqc_txsched_topo_grp_info_hdr hdr; struct ice_aqc_txsched_elem_data generic[1]; }; - struct ice_aqc_conf_elem { struct ice_aqc_txsched_elem_data generic[1]; }; - struct ice_aqc_get_elem { struct ice_aqc_txsched_elem_data generic[1]; }; - struct ice_aqc_get_topo_elem { struct ice_aqc_txsched_topo_grp_info_hdr hdr; struct ice_aqc_txsched_elem_data generic[ICE_AQC_TOPO_MAX_LEVEL_NUM]; }; - struct ice_aqc_delete_elem { struct ice_aqc_txsched_topo_grp_info_hdr hdr; __le32 teid[1]; }; - /* Query Port ETS (indirect 0x040E) * * This indirect command is used to query port TC node configuration. @@ -1168,7 +1118,6 @@ struct ice_aqc_port_ets_elem { __le32 tc_node_teid[8]; /* Used for response, reserved in command */ }; - /* Rate limiting profile for * Add RL profile (indirect 0x0410) * Query RL profile (indirect 0x0411) @@ -1184,7 +1133,6 @@ struct ice_aqc_rl_profile { __le32 addr_low; }; - struct ice_aqc_rl_profile_elem { u8 level; u8 flags; @@ -1204,13 +1152,10 @@ struct ice_aqc_rl_profile_elem { __le16 rl_encode; }; - struct ice_aqc_rl_profile_generic_elem { struct ice_aqc_rl_profile_elem generic[1]; }; - - /* Configure L2 Node CGD (indirect 0x0414) * This indirect command allows configuring a congestion domain for given L2 * node TEIDs in the scheduler topology. @@ -1222,19 +1167,16 @@ struct ice_aqc_cfg_l2_node_cgd { __le32 addr_low; }; - struct ice_aqc_cfg_l2_node_cgd_elem { __le32 node_teid; u8 cgd; u8 reserved[3]; }; - struct ice_aqc_cfg_l2_node_cgd_data { struct ice_aqc_cfg_l2_node_cgd_elem elem[1]; }; - /* Query Scheduler Resource Allocation (indirect 0x0412) * This indirect command retrieves the scheduler resources allocated by * EMP Firmware to the given PF. @@ -1245,7 +1187,6 @@ struct ice_aqc_query_txsched_res { __le32 addr_low; }; - struct ice_aqc_generic_sched_props { __le16 phys_levels; __le16 logical_levels; @@ -1257,7 +1198,6 @@ struct ice_aqc_generic_sched_props { u8 rsvd1[22]; }; - struct ice_aqc_layer_props { u8 logical_layer; u8 chunk_size; @@ -1271,13 +1211,11 @@ struct ice_aqc_layer_props { u8 rsvd1[14]; }; - struct ice_aqc_query_txsched_res_resp { struct ice_aqc_generic_sched_props sched_props; struct ice_aqc_layer_props layer_props[ICE_AQC_TOPO_MAX_LEVEL_NUM]; }; - /* Query Node to Root Topology (indirect 0x0413) * This command uses ice_aqc_get_elem as its data buffer. */ @@ -1288,7 +1226,6 @@ struct ice_aqc_query_node_to_root { __le32 addr_low; }; - /* Get PHY capabilities (indirect 0x0600) */ struct ice_aqc_get_phy_caps { u8 lport_num; @@ -1311,7 +1248,6 @@ struct ice_aqc_get_phy_caps { __le32 addr_low; }; - /* This is #define of PHY type (Extended): * The first set of defines is for phy_type_low. */ @@ -1453,7 +1389,6 @@ struct ice_aqc_get_phy_caps_data { } qual_modules[ICE_AQC_QUAL_MOD_COUNT_MAX]; }; - /* Set PHY capabilities (direct 0x0601) * NOTE: This command must be followed by setup link and restart auto-neg */ @@ -1464,7 +1399,6 @@ struct ice_aqc_set_phy_cfg { __le32 addr_low; }; - /* Set PHY config command data structure */ struct ice_aqc_set_phy_cfg_data { __le64 phy_type_low; /* Use values from ICE_PHY_TYPE_LOW_* */ @@ -1485,7 +1419,6 @@ struct ice_aqc_set_phy_cfg_data { u8 rsvd1; }; - /* Set MAC Config command data structure (direct 0x0603) */ struct ice_aqc_set_mac_cfg { __le16 max_frame_size; @@ -1505,7 +1438,6 @@ struct ice_aqc_set_mac_cfg { u8 reserved[7]; }; - /* Restart AN command data structure (direct 0x0605) * Also used for response, with only the lport_num field present. */ @@ -1518,7 +1450,6 @@ struct ice_aqc_restart_an { u8 reserved2[13]; }; - /* Get link status (indirect 0x0607), also used for Link Status Event */ struct ice_aqc_get_link_status { u8 lport_num; @@ -1535,7 +1466,6 @@ struct ice_aqc_get_link_status { __le32 addr_low; }; - /* Get link status response data structure, also used for Link Status Event */ struct ice_aqc_get_link_status_data { u8 topo_media_conflict; @@ -1621,7 +1551,6 @@ struct ice_aqc_get_link_status_data { __le64 phy_type_high; /* Use values from ICE_PHY_TYPE_HIGH_* */ }; - /* Set event mask command (direct 0x0613) */ struct ice_aqc_set_event_mask { u8 lport_num; @@ -1641,8 +1570,6 @@ struct ice_aqc_set_event_mask { u8 reserved1[6]; }; - - /* Set MAC Loopback command (direct 0x0620) */ struct ice_aqc_set_mac_lb { u8 lb_mode; @@ -1651,9 +1578,6 @@ struct ice_aqc_set_mac_lb { u8 reserved[15]; }; - - - struct ice_aqc_link_topo_addr { u8 lport_num; u8 lport_num_valid; @@ -1716,8 +1640,6 @@ struct ice_aqc_set_port_id_led { u8 rsvd[13]; }; - - /* Read/Write SFF EEPROM command (indirect 0x06EE) */ struct ice_aqc_sff_eeprom { u8 lport_num; @@ -1797,7 +1719,6 @@ struct ice_aqc_nvm { #define ICE_AQC_NVM_LLDP_STATUS_M_LEN 4 /* In Bits */ #define ICE_AQC_NVM_LLDP_STATUS_RD_LEN 4 /* In Bytes */ - /* Used for 0x0704 as well as for 0x0705 commands */ struct ice_aqc_nvm_cfg { u8 cmd_flags; @@ -1812,14 +1733,12 @@ struct ice_aqc_nvm_cfg { __le32 addr_low; }; - struct ice_aqc_nvm_cfg_data { __le16 field_id; __le16 field_options; __le16 field_value; }; - /* NVM Checksum Command (direct, 0x0706) */ struct ice_aqc_nvm_checksum { u8 flags; @@ -1831,9 +1750,6 @@ struct ice_aqc_nvm_checksum { u8 rsvd2[12]; }; - - - /* Get LLDP MIB (indirect 0x0A00) * Note: This is also used by the LLDP MIB Change Event (0x0A01) * as the format is the same. @@ -1985,7 +1901,6 @@ struct ice_aqc_lldp_stop_start_specific_agent { u8 reserved[15]; }; - /* Get/Set RSS key (indirect 0x0B04/0x0B02) */ struct ice_aqc_get_set_rss_key { #define ICE_AQC_GSET_RSS_KEY_VSI_VALID BIT(15) @@ -1997,7 +1912,6 @@ struct ice_aqc_get_set_rss_key { __le32 addr_low; }; - #define ICE_AQC_GET_SET_RSS_KEY_DATA_RSS_KEY_SIZE 0x28 #define ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE 0xC #define ICE_GET_SET_RSS_KEY_EXTEND_KEY_SIZE \ @@ -2019,7 +1933,6 @@ struct ice_aqc_get_set_rss_keys { u8 extended_hash_key[ICE_AQC_GET_SET_RSS_KEY_DATA_HASH_KEY_SIZE]; }; - /* Get/Set RSS LUT (indirect 0x0B05/0x0B03) */ struct ice_aqc_get_set_rss_lut { #define ICE_AQC_GSET_RSS_LUT_VSI_VALID BIT(15) @@ -2055,7 +1968,6 @@ struct ice_aqc_get_set_rss_lut { __le32 addr_low; }; - /* Clear FD Table Command (direct, 0x0B06) */ struct ice_aqc_clear_fd_table { u8 clear_type; @@ -2066,9 +1978,6 @@ struct ice_aqc_clear_fd_table { u8 reserved[12]; }; - - - /* Add Tx LAN Queues (indirect 0x0C30) */ struct ice_aqc_add_txqs { u8 num_qgrps; @@ -2078,7 +1987,6 @@ struct ice_aqc_add_txqs { __le32 addr_low; }; - /* This is the descriptor of each queue entry for the Add Tx LAN Queues * command (0x0C30). Only used within struct ice_aqc_add_tx_qgrp. */ @@ -2091,7 +1999,6 @@ struct ice_aqc_add_txqs_perq { struct ice_aqc_txsched_elem info; }; - /* The format of the command buffer for Add Tx LAN Queues (0x0C30) * is an array of the following structs. Please note that the length of * each struct ice_aqc_add_tx_qgrp is variable due @@ -2104,7 +2011,6 @@ struct ice_aqc_add_tx_qgrp { struct ice_aqc_add_txqs_perq txqs[1]; }; - /* Disable Tx LAN Queues (indirect 0x0C31) */ struct ice_aqc_dis_txqs { u8 cmd_type; @@ -2127,7 +2033,6 @@ struct ice_aqc_dis_txqs { __le32 addr_low; }; - /* The buffer for Disable Tx LAN Queues (indirect 0x0C31) * contains the following structures, arrayed one after the * other. @@ -2150,12 +2055,10 @@ struct ice_aqc_dis_txq_item { (1 << ICE_AQC_Q_DIS_BUF_ELEM_TYPE_S) }; - struct ice_aqc_dis_txq { struct ice_aqc_dis_txq_item qgrps[1]; }; - /* Tx LAN Queues Cleanup Event (0x0C31) */ struct ice_aqc_txqs_cleanup { __le16 caller_opc; @@ -2163,7 +2066,6 @@ struct ice_aqc_txqs_cleanup { u8 reserved[12]; }; - /* Move / Reconfigure Tx Queues (indirect 0x0C32) */ struct ice_aqc_move_txqs { u8 cmd_type; @@ -2184,7 +2086,6 @@ struct ice_aqc_move_txqs { __le32 addr_low; }; - /* This is the descriptor of each queue entry for the move Tx LAN Queues * command (0x0C32). */ @@ -2195,15 +2096,12 @@ struct ice_aqc_move_txqs_elem { __le32 q_teid; }; - struct ice_aqc_move_txqs_data { __le32 src_teid; __le32 dest_teid; struct ice_aqc_move_txqs_elem txqs[1]; }; - - /* Download Package (indirect 0x0C40) */ /* Also used for Update Package (indirect 0x0C42) */ struct ice_aqc_download_pkg { @@ -2255,9 +2153,6 @@ struct ice_aqc_get_pkg_info_resp { struct ice_aqc_get_pkg_info pkg_info[1]; }; - - - /* Lan Queue Overflow Event (direct, 0x1001) */ struct ice_aqc_event_lan_overflow { __le32 prtdcb_ruptq; @@ -2265,9 +2160,6 @@ struct ice_aqc_event_lan_overflow { u8 reserved[8]; }; - - - /** * struct ice_aq_desc - Admin Queue (AQ) descriptor * @flags: ICE_AQ_FLAG_* flags @@ -2361,7 +2253,6 @@ struct ice_aq_desc { } params; }; - /* FW defined boundary for a large buffer, 4k >= Large buffer > 512 bytes */ #define ICE_AQ_LG_BUF 512 @@ -2572,8 +2463,6 @@ enum ice_adminq_opc { ice_aqc_opc_update_pkg = 0x0C42, ice_aqc_opc_get_pkg_info_list = 0x0C43, - - /* Standalone Commands/Events */ ice_aqc_opc_event_lan_overflow = 0x1001, }; diff --git a/drivers/net/ice/base/ice_bitops.h b/drivers/net/ice/base/ice_bitops.h index f0aa8ce88..32f64cac0 100644 --- a/drivers/net/ice/base/ice_bitops.h +++ b/drivers/net/ice/base/ice_bitops.h @@ -8,7 +8,6 @@ /* Define the size of the bitmap chunk */ typedef u32 ice_bitmap_t; - /* Number of bits per bitmap chunk */ #define BITS_PER_CHUNK (BITS_PER_BYTE * sizeof(ice_bitmap_t)) /* Determine which chunk a bit belongs in */ @@ -372,5 +371,4 @@ ice_cmp_bitmap(ice_bitmap_t *bmp1, ice_bitmap_t *bmp2, u16 size) return true; } - #endif /* _ICE_BITOPS_H_ */ diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index 11e902ea1..16b91dc12 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -11,7 +11,6 @@ #define ICE_PF_RESET_WAIT_COUNT 200 - /** * ice_set_mac_type - Sets MAC type * @hw: pointer to the HW structure @@ -41,7 +40,6 @@ static enum ice_status ice_set_mac_type(struct ice_hw *hw) return status; } - /** * ice_clear_pf_cfg - Clear PF configuration * @hw: pointer to the hardware structure @@ -113,7 +111,6 @@ ice_aq_manage_mac_read(struct ice_hw *hw, void *buf, u16 buf_size, ETH_ALEN, ICE_DMA_TO_NONDMA); break; } - return ICE_SUCCESS; } @@ -533,7 +530,6 @@ static void ice_cleanup_fltr_mgmt_struct(struct ice_hw *hw) ice_free(hw, sw); } - /** * ice_get_itr_intrl_gran * @hw: pointer to the HW struct @@ -598,7 +594,6 @@ void ice_print_rollback_msg(struct ice_hw *hw) &ver_lo); SNPRINTF(nvm_str, sizeof(nvm_str), "%x.%02x 0x%x %d.%d.%d", ver_hi, ver_lo, hw->nvm.eetrack, oem_ver, oem_build, oem_patch); - ice_warn(hw, "Firmware rollback mode detected. Current version is NVM: %s, FW: %d.%d. Device may exhibit limited functionality. Refer to the Intel(R) Ethernet Adapters and Devices User Guide for details on firmware rollback mode", nvm_str, hw->fw_maj_ver, hw->fw_min_ver); @@ -617,7 +612,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw) ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__); - /* Set MAC type based on DeviceID */ status = ice_set_mac_type(hw); if (status) @@ -627,14 +621,12 @@ enum ice_status ice_init_hw(struct ice_hw *hw) PF_FUNC_RID_FUNCTION_NUMBER_M) >> PF_FUNC_RID_FUNCTION_NUMBER_S; - status = ice_reset(hw, ICE_RESET_PFR); if (status) return status; ice_get_itr_intrl_gran(hw); - status = ice_create_all_ctrlq(hw); if (status) goto err_unroll_cqinit; @@ -686,7 +678,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw) goto err_unroll_alloc; } - /* Initialize port_info struct with scheduler data */ status = ice_sched_init_port(hw->port_info); if (status) @@ -725,7 +716,6 @@ enum ice_status ice_init_hw(struct ice_hw *hw) if (status) goto err_unroll_sched; - /* Get MAC information */ /* A single port can report up to two (LAN and WoL) addresses */ mac_buf = ice_calloc(hw, 2, @@ -926,7 +916,6 @@ enum ice_status ice_reset(struct ice_hw *hw, enum ice_reset_req req) wr32(hw, GLGEN_RTRIG, val); ice_flush(hw); - /* wait for the FW to be ready */ return ice_check_reset(hw); } @@ -997,8 +986,6 @@ ice_get_pfa_module_tlv(struct ice_hw *hw, u16 *module_tlv, u16 *module_tlv_len, return ICE_ERR_DOES_NOT_EXIST; } - - /** * ice_copy_rxq_ctx_to_hw * @hw: pointer to the hardware structure @@ -1321,7 +1308,6 @@ ice_clear_tx_drbell_q_ctx(struct ice_hw *hw, u32 tx_drbell_q_index) } #endif /* !NO_UNUSED_CTX_CODE || AE_DRIVER */ - /* FW Admin Queue command wrappers */ /** @@ -2142,7 +2128,6 @@ ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags, cmd->flags = flags; - /* Prep values for flags, sah, sal */ cmd->sah = HTONS(*((const u16 *)mac_addr)); cmd->sal = HTONL(*((const u32 *)(mac_addr + 2))); @@ -2179,7 +2164,6 @@ void ice_clear_pxe_mode(struct ice_hw *hw) ice_aq_clear_pxe_mode(hw); } - /** * ice_get_link_speed_based_on_phy_type - returns link speed * @phy_type_low: lower part of phy_type @@ -2848,7 +2832,6 @@ ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd) return ice_aq_send_cmd(hw, &desc, NULL, 0, cd); } - /** * ice_aq_set_port_id_led * @pi: pointer to the port information @@ -2869,7 +2852,6 @@ ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode, ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_set_port_id_led); - if (is_orig_mode) cmd->ident_mode = ICE_AQC_PORT_IDENT_LED_ORIG; else @@ -3357,7 +3339,6 @@ ice_aq_move_recfg_lan_txq(struct ice_hw *hw, u8 num_qs, bool is_move, return status; } - /* End of FW Admin Queue command wrappers */ /** @@ -3581,9 +3562,6 @@ ice_set_ctx(u8 *src_ctx, u8 *dest_ctx, const struct ice_ctx_ele *ce_info) return ICE_SUCCESS; } - - - /** * ice_read_byte - read context byte into struct * @src_ctx: the context structure to read from @@ -4047,8 +4025,6 @@ ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap, ICE_SCHED_NODE_OWNER_LAN); } - - /** * ice_replay_pre_init - replay pre initialization * @hw: pointer to the HW struct @@ -4246,7 +4222,6 @@ ice_stat_update_repc(struct ice_hw *hw, u16 vsi_handle, bool prev_stat_loaded, cur_stats->rx_errors += error_cnt; } - /** * ice_sched_query_elem - query element information from HW * @hw: pointer to the HW struct diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h index c42c58670..bcb0a999d 100644 --- a/drivers/net/ice/base/ice_common.h +++ b/drivers/net/ice/base/ice_common.h @@ -169,7 +169,6 @@ ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask, enum ice_status ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd); - enum ice_status ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode, struct ice_sq_cd *cd); @@ -178,7 +177,6 @@ ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr, u16 mem_addr, u8 page, u8 set_page, u8 *data, u8 length, bool write, struct ice_sq_cd *cd); - enum ice_status ice_get_ctx(u8 *src_ctx, u8 *dest_ctx, struct ice_ctx_ele *ce_info); enum ice_status diff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c index 1ea8f3a24..8a65fae40 100644 --- a/drivers/net/ice/base/ice_controlq.c +++ b/drivers/net/ice/base/ice_controlq.c @@ -4,7 +4,6 @@ #include "ice_common.h" - #define ICE_CQ_INIT_REGS(qinfo, prefix) \ do { \ (qinfo)->sq.head = prefix##_ATQH; \ @@ -53,7 +52,6 @@ static void ice_mailbox_init_regs(struct ice_hw *hw) ICE_CQ_INIT_REGS(cq, PF_MBX); } - /** * ice_check_sq_alive * @hw: pointer to the HW struct @@ -521,7 +519,6 @@ ice_shutdown_rq(struct ice_hw *hw, struct ice_ctl_q_info *cq) return ret_code; } - /** * ice_init_check_adminq - Check version for Admin Queue to know if its alive * @hw: pointer to the hardware structure @@ -533,12 +530,10 @@ static enum ice_status ice_init_check_adminq(struct ice_hw *hw) ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__); - status = ice_aq_get_fw_ver(hw, NULL); if (status) goto init_ctrlq_free_rq; - if (!ice_aq_ver_check(hw)) { status = ICE_ERR_FW_API_VER; goto init_ctrlq_free_rq; @@ -633,7 +628,6 @@ enum ice_status ice_init_all_ctrlq(struct ice_hw *hw) ice_debug(hw, ICE_DBG_TRACE, "%s\n", __func__); - /* Init FW admin queue */ ret_code = ice_init_ctrlq(hw, ICE_CTL_Q_ADMIN); if (ret_code) @@ -972,7 +966,6 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq, ice_debug_cq(hw, (void *)desc_on_ring, buf, buf_size); - (cq->sq.next_to_use)++; if (cq->sq.next_to_use == cq->sq.count) cq->sq.next_to_use = 0; @@ -1025,7 +1018,6 @@ ice_sq_send_cmd_nolock(struct ice_hw *hw, struct ice_ctl_q_info *cq, ice_debug_cq(hw, (void *)desc, buf, buf_size); - /* save writeback AQ if requested */ if (details->wb_desc) ice_memcpy(details->wb_desc, desc_on_ring, @@ -1158,7 +1150,6 @@ ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq, ice_debug_cq(hw, (void *)desc, e->msg_buf, cq->rq_buf_size); - /* Restore the original datalen and buffer address in the desc, * FW updates datalen to indicate the event message size */ diff --git a/drivers/net/ice/base/ice_controlq.h b/drivers/net/ice/base/ice_controlq.h index b1214f670..8ad7857c8 100644 --- a/drivers/net/ice/base/ice_controlq.h +++ b/drivers/net/ice/base/ice_controlq.h @@ -7,7 +7,6 @@ #include "ice_adminq_cmd.h" - /* Maximum buffer lengths for all control queue types */ #define ICE_AQ_MAX_BUF_LEN 4096 #define ICE_MBXQ_MAX_BUF_LEN 4096 diff --git a/drivers/net/ice/base/ice_devids.h b/drivers/net/ice/base/ice_devids.h index c9a567fb1..0ff3b9b34 100644 --- a/drivers/net/ice/base/ice_devids.h +++ b/drivers/net/ice/base/ice_devids.h @@ -5,7 +5,6 @@ #ifndef _ICE_DEVIDS_H_ #define _ICE_DEVIDS_H_ - /* Device IDs */ /* Intel(R) Ethernet Controller E810-C for backplane */ #define ICE_DEV_ID_E810C_BACKPLANE 0x1591 diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 4ad816874..05cd39b17 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -808,7 +808,6 @@ ice_aq_download_pkg(struct ice_hw *hw, struct ice_buf_hdr *pkg_buf, return status; } - /** * ice_aq_update_pkg * @hw: pointer to the hardware structure @@ -1180,7 +1179,6 @@ static enum ice_status ice_get_pkg_info(struct ice_hw *hw) return status; } - /** * ice_verify_pkg - verify package * @pkg: pointer to the package buffer @@ -2084,7 +2082,6 @@ ice_find_prot_off(struct ice_hw *hw, enum ice_block blk, u8 prof, u8 fv_idx, /* PTG Management */ - /** * ice_ptg_find_ptype - Search for packet type group using packet type (ptype) * @hw: pointer to the hardware structure @@ -2121,7 +2118,6 @@ void ice_ptg_alloc_val(struct ice_hw *hw, enum ice_block blk, u8 ptg) hw->blk[blk].xlt1.ptg_tbl[ptg].in_use = true; } - /** * ice_ptg_remove_ptype - Removes ptype from a particular packet type group * @hw: pointer to the hardware structure @@ -2315,7 +2311,6 @@ ice_match_prop_lst(struct LIST_HEAD_TYPE *list1, struct LIST_HEAD_TYPE *list2) /* VSIG Management */ - /** * ice_vsig_find_vsi - find a VSIG that contains a specified VSI * @hw: pointer to the hardware structure diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h index 3b5c1c39a..137eaa7f8 100644 --- a/drivers/net/ice/base/ice_flex_pipe.h +++ b/drivers/net/ice/base/ice_flex_pipe.h @@ -46,7 +46,6 @@ bool ice_tunnel_port_in_use(struct ice_hw *hw, u16 port, u16 *index); bool ice_tunnel_get_type(struct ice_hw *hw, u16 port, enum ice_tunnel_type *type); - /* XLT2/VSI group functions */ enum ice_status ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig); diff --git a/drivers/net/ice/base/ice_hw_autogen.h b/drivers/net/ice/base/ice_hw_autogen.h index 6f227adb8..92d432044 100644 --- a/drivers/net/ice/base/ice_hw_autogen.h +++ b/drivers/net/ice/base/ice_hw_autogen.h @@ -6,8 +6,6 @@ #ifndef _ICE_HW_AUTOGEN_H_ #define _ICE_HW_AUTOGEN_H_ - - #define GL_RDPU_CNTRL 0x00052054 /* Reset Source: CORER */ #define GL_RDPU_CNTRL_RX_PAD_EN_S 0 #define GL_RDPU_CNTRL_RX_PAD_EN_M BIT(0) diff --git a/drivers/net/ice/base/ice_lan_tx_rx.h b/drivers/net/ice/base/ice_lan_tx_rx.h index e77d4bf50..a97c63cc9 100644 --- a/drivers/net/ice/base/ice_lan_tx_rx.h +++ b/drivers/net/ice/base/ice_lan_tx_rx.h @@ -173,7 +173,6 @@ struct ice_fltr_desc { (0xFFFFFFFFULL << ICE_FXD_FLTR_QW1_FDID_S) #define ICE_FXD_FLTR_QW1_FDID_ZERO 0x0ULL - enum ice_rx_desc_status_bits { /* Note: These are predefined bit offsets */ ICE_RX_DESC_STATUS_DD_S = 0, @@ -204,7 +203,6 @@ enum ice_rx_desc_status_bits { #define ICE_RXD_QW1_STATUS_TSYNVALID_S ICE_RX_DESC_STATUS_TSYNVALID_S #define ICE_RXD_QW1_STATUS_TSYNVALID_M BIT_ULL(ICE_RXD_QW1_STATUS_TSYNVALID_S) - enum ice_rx_desc_fltstat_values { ICE_RX_DESC_FLTSTAT_NO_DATA = 0, ICE_RX_DESC_FLTSTAT_RSV_FD_ID = 1, /* 16byte desc? FD_ID : RSV */ @@ -212,7 +210,6 @@ enum ice_rx_desc_fltstat_values { ICE_RX_DESC_FLTSTAT_RSS_HASH = 3, }; - #define ICE_RXD_QW1_ERROR_S 19 #define ICE_RXD_QW1_ERROR_M (0xFFUL << ICE_RXD_QW1_ERROR_S) @@ -310,7 +307,6 @@ enum ice_rx_ptype_payload_layer { ICE_RX_PTYPE_PAYLOAD_LAYER_PAY4 = 3, }; - #define ICE_RXD_QW1_LEN_PBUF_S 38 #define ICE_RXD_QW1_LEN_PBUF_M (0x3FFFULL << ICE_RXD_QW1_LEN_PBUF_S) @@ -320,7 +316,6 @@ enum ice_rx_ptype_payload_layer { #define ICE_RXD_QW1_LEN_SPH_S 63 #define ICE_RXD_QW1_LEN_SPH_M BIT_ULL(ICE_RXD_QW1_LEN_SPH_S) - enum ice_rx_desc_ext_status_bits { /* Note: These are predefined bit offsets */ ICE_RX_DESC_EXT_STATUS_L2TAG2P_S = 0, @@ -331,7 +326,6 @@ enum ice_rx_desc_ext_status_bits { ICE_RX_DESC_EXT_STATUS_PELONGB_S = 11, }; - enum ice_rx_desc_pe_status_bits { /* Note: These are predefined bit offsets */ ICE_RX_DESC_PE_STATUS_QPID_S = 0, /* 18 BITS */ @@ -352,7 +346,6 @@ enum ice_rx_desc_pe_status_bits { #define ICE_RX_PROG_STATUS_DESC_QW1_PROGID_M \ (0x7UL << ICE_RX_PROG_STATUS_DESC_QW1_PROGID_S) - #define ICE_RX_PROG_STATUS_DESC_QW1_ERROR_S 19 #define ICE_RX_PROG_STATUS_DESC_QW1_ERROR_M \ (0x3FUL << ICE_RX_PROG_STATUS_DESC_QW1_ERROR_S) @@ -840,7 +833,6 @@ enum ice_rx_flex_desc_exstat_bits { ICE_RX_FLEX_DESC_EXSTAT_OVERSIZE_S = 3, }; - #define ICE_RXQ_CTX_SIZE_DWORDS 8 #define ICE_RXQ_CTX_SZ (ICE_RXQ_CTX_SIZE_DWORDS * sizeof(u32)) #define ICE_TX_CMPLTNQ_CTX_SIZE_DWORDS 22 @@ -1056,7 +1048,6 @@ enum ice_tx_ctx_desc_eipt_offload { #define ICE_TXD_CTX_QW0_L4T_CS_S 23 #define ICE_TXD_CTX_QW0_L4T_CS_M BIT_ULL(ICE_TXD_CTX_QW0_L4T_CS_S) - #define ICE_LAN_TXQ_MAX_QGRPS 127 #define ICE_LAN_TXQ_MAX_QDIS 1023 diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c index 66cfec641..e00942528 100644 --- a/drivers/net/ice/base/ice_nvm.c +++ b/drivers/net/ice/base/ice_nvm.c @@ -4,7 +4,6 @@ #include "ice_common.h" - /** * ice_aq_read_nvm * @hw: pointer to the HW struct @@ -138,7 +137,6 @@ ice_read_sr_word_aq(struct ice_hw *hw, u16 offset, u16 *data) return status; } - /** * ice_read_sr_buf_aq - Reads Shadow RAM buf via AQ * @hw: pointer to the HW structure @@ -354,7 +352,6 @@ enum ice_status ice_init_nvm(struct ice_hw *hw) return ICE_SUCCESS; } - /** * ice_read_sr_buf - Reads Shadow RAM buf and acquire lock if necessary * @hw: pointer to the HW structure @@ -380,7 +377,6 @@ ice_read_sr_buf(struct ice_hw *hw, u16 offset, u16 *words, u16 *data) return status; } - /** * ice_nvm_validate_checksum * @hw: pointer to the HW struct diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h index 91f56f3fa..cdb691523 100644 --- a/drivers/net/ice/base/ice_protocol_type.h +++ b/drivers/net/ice/base/ice_protocol_type.h @@ -114,7 +114,6 @@ enum ice_prot_id { #define ICE_VNI_OFFSET 12 /* offset of VNI from ICE_PROT_UDP_OF */ - #define ICE_MAC_OFOS_HW 1 #define ICE_MAC_IL_HW 4 #define ICE_ETYPE_OL_HW 9 @@ -148,7 +147,6 @@ struct ice_protocol_entry { u8 protocol_id; }; - struct ice_ether_hdr { u8 dst_addr[ETH_ALEN]; u8 src_addr[ETH_ALEN]; diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c index 1cfc3bc20..6732e291a 100644 --- a/drivers/net/ice/base/ice_sched.c +++ b/drivers/net/ice/base/ice_sched.c @@ -4,7 +4,6 @@ #include "ice_sched.h" - /** * ice_sched_add_root_node - Insert the Tx scheduler root node in SW DB * @pi: port information structure @@ -876,7 +875,6 @@ ice_aq_cfg_l2_node_cgd(struct ice_hw *hw, u16 num_l2_nodes, return ice_aq_send_cmd(hw, &desc, buf, buf_size, cd); } - /** * ice_sched_add_elems - add nodes to HW and SW DB * @pi: port information structure @@ -1366,7 +1364,6 @@ enum ice_status ice_sched_query_res_alloc(struct ice_hw *hw) goto sched_query_out; } - sched_query_out: ice_free(hw, buf); return status; @@ -2021,7 +2018,6 @@ enum ice_status ice_rm_vsi_lan_cfg(struct ice_port_info *pi, u16 vsi_handle) return ice_sched_rm_vsi_cfg(pi, vsi_handle, ICE_SCHED_NODE_OWNER_LAN); } - /** * ice_sched_is_tree_balanced - Check tree nodes are identical or not * @hw: pointer to the HW struct diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 2437faead..00358e4db 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -6,7 +6,6 @@ #include "ice_flex_type.h" #include "ice_flow.h" - #define ICE_ETH_DA_OFFSET 0 #define ICE_ETH_ETHTYPE_OFFSET 12 #define ICE_ETH_VLAN_TCI_OFFSET 14 @@ -743,7 +742,6 @@ ice_aq_get_sw_cfg(struct ice_hw *hw, struct ice_aqc_get_sw_cfg_resp *buf, return status; } - /** * ice_alloc_sw - allocate resources specific to switch * @hw: pointer to the HW struct @@ -1787,13 +1785,11 @@ enum ice_status ice_get_initial_sw_cfg(struct ice_hw *hw) } } while (req_desc && !status); - out: ice_free(hw, (void *)rbuf); return status; } - /** * ice_fill_sw_info - Helper function to populate lb_en and lan_en * @hw: pointer to the hardware structure @@ -3424,7 +3420,6 @@ ice_remove_eth_mac(struct ice_hw *hw, struct LIST_HEAD_TYPE *em_list) return ICE_SUCCESS; } - /** * ice_rem_sw_rule_info * @hw: pointer to the hardware structure @@ -3823,7 +3818,6 @@ ice_add_to_vsi_fltr_list(struct ice_hw *hw, u16 vsi_handle, return status; } - /** * ice_determine_promisc_mask * @fi: filter info to parse @@ -4811,8 +4805,6 @@ ice_fill_valid_words(struct ice_adv_lkup_elem *rule, return ret_val; } - - /** * ice_create_first_fit_recp_def - Create a recipe grouping * @hw: pointer to the hardware structure diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h index 515ad3bb6..0f0a1e98e 100644 --- a/drivers/net/ice/base/ice_switch.h +++ b/drivers/net/ice/base/ice_switch.h @@ -15,7 +15,6 @@ #define ICE_FLTR_TX BIT(1) #define ICE_FLTR_TX_RX (ICE_FLTR_RX | ICE_FLTR_TX) - /* Worst case buffer length for ice_aqc_opc_get_res_alloc */ #define ICE_MAX_RES_TYPES 0x80 #define ICE_AQ_GET_RES_ALLOC_BUF_LEN \ @@ -391,7 +390,6 @@ enum ice_status ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info); void ice_remove_vsi_fltr(struct ice_hw *hw, u16 vsi_handle); - /* Promisc/defport setup for VSIs */ enum ice_status ice_cfg_dflt_vsi(struct ice_port_info *pi, u16 vsi_handle, bool set, diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index deb614e37..150b4c5c5 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -134,10 +134,6 @@ static inline u32 ice_round_to_num(u32 N, u32 R) #define __ALWAYS_UNUSED #endif - - - - #define IS_ETHER_ADDR_EQUAL(addr1, addr2) \ (((bool)((((u16 *)(addr1))[0] == ((u16 *)(addr2))[0]))) && \ ((bool)((((u16 *)(addr1))[1] == ((u16 *)(addr2))[1]))) && \ @@ -384,7 +380,6 @@ struct ice_hw_common_caps { u8 proxy_support; }; - /* Function specific capabilities */ struct ice_hw_func_caps { struct ice_hw_common_caps common_cap; @@ -401,7 +396,6 @@ struct ice_hw_dev_caps { u32 num_funcs; }; - /* Information about MAC such as address, etc... */ struct ice_mac_info { u8 lan_addr[ETH_ALEN]; @@ -567,7 +561,6 @@ enum ice_rl_type { #define ICE_TXSCHED_GET_RL_WAKEUP_MV(p) LE16_TO_CPU((p)->info.wake_up_calc) #define ICE_TXSCHED_GET_RL_ENCODE(p) LE16_TO_CPU((p)->info.rl_encode) - /* The following tree example shows the naming conventions followed under * ice_port_info struct for default scheduler tree topology. * @@ -729,7 +722,6 @@ struct ice_switch_info { struct ice_sw_recipe *recp_list; }; - /* Port hardware description */ struct ice_hw { u8 *hw_addr; @@ -787,7 +779,6 @@ struct ice_hw { u8 fw_patch; /* firmware patch version */ u32 fw_build; /* firmware build number */ - /* Device max aggregate bandwidths corresponding to the GL_PWR_MODE_CTL * register. Used for determining the ITR/INTRL granularity during * initialization. -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 02/30] net/ice/base: add support for tunnel packets 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 01/30] net/ice/base: remove redundant empty lines Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 03/30] net/ice/base: add non-word aligned ip field support Qi Zhang ` (28 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Henry Tieman, Paul M Stillwell Jr Add VXLAN tunnel training packets to flow director and change the interface to support tunnel packets. Signed-off-by: Henry Tieman <henry.w.tieman@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 266 ++++++++++++++++++++++++++++++++-------- drivers/net/ice/base/ice_fdir.h | 8 +- drivers/net/ice/base/ice_type.h | 10 +- 3 files changed, 228 insertions(+), 56 deletions(-) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index 9ef91b3b8..b92603e10 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -5,7 +5,7 @@ #include "ice_common.h" #include "ice_fdir.h" -/* These are dummy packet headers used to program flow director filters. */ +/* These are training packet headers used to program flow director filters. */ static const u8 ice_fdir_tcpv4_pkt[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, @@ -88,47 +88,177 @@ static const u8 ice_fdir_ipv6_pkt[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, }; -/* Flow Director dummy packet table */ +static const u8 ice_fdir_tcp4_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x5a, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + 0x45, 0x00, 0x00, 0x28, 0x00, 0x00, 0x40, 0x00, + 0x40, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x50, 0x00, 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_udp4_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x4e, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + 0x45, 0x00, 0x00, 0x1c, 0x00, 0x00, 0x40, 0x00, + 0x40, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_sctp4_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x52, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + 0x45, 0x00, 0x00, 0x20, 0x00, 0x01, 0x00, 0x00, + 0x40, 0x84, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_ip4_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x46, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, + 0x45, 0x00, 0x00, 0x14, 0x00, 0x00, 0x00, 0x00, + 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_tcp6_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x6e, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, + 0x60, 0x00, 0x00, 0x00, 0x00, 0x14, 0x06, 0x40, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x50, 0x00, 0x20, 0x00, + 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_udp6_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x62, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, + 0x60, 0x00, 0x00, 0x00, 0x00, 0x08, 0x11, 0x40, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_sctp6_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x66, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, + 0x60, 0x00, 0x00, 0x00, 0x00, 0x0c, 0x84, 0x40, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_ip6_tun_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x5a, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x04, 0x00, 0x00, 0x03, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86, 0xdd, + 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x3b, 0x40, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + +/* Flow Director no-op training packet table */ static const struct ice_fdir_base_pkt ice_fdir_pkt[] = { { ICE_FLTR_PTYPE_NONF_IPV4_TCP, - sizeof(ice_fdir_tcpv4_pkt), - ice_fdir_tcpv4_pkt, + sizeof(ice_fdir_tcpv4_pkt), ice_fdir_tcpv4_pkt, + sizeof(ice_fdir_tcp4_tun_pkt), ice_fdir_tcp4_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV4_UDP, - sizeof(ice_fdir_udpv4_pkt), - ice_fdir_udpv4_pkt, + sizeof(ice_fdir_udpv4_pkt), ice_fdir_udpv4_pkt, + sizeof(ice_fdir_udp4_tun_pkt), ice_fdir_udp4_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV4_SCTP, - sizeof(ice_fdir_sctpv4_pkt), - ice_fdir_sctpv4_pkt, + sizeof(ice_fdir_sctpv4_pkt), ice_fdir_sctpv4_pkt, + sizeof(ice_fdir_sctp4_tun_pkt), ice_fdir_sctp4_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV4_OTHER, - sizeof(ice_fdir_ipv4_pkt), - ice_fdir_ipv4_pkt, + sizeof(ice_fdir_ipv4_pkt), ice_fdir_ipv4_pkt, + sizeof(ice_fdir_ip4_tun_pkt), ice_fdir_ip4_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV6_TCP, - sizeof(ice_fdir_tcpv6_pkt), - ice_fdir_tcpv6_pkt, + sizeof(ice_fdir_tcpv6_pkt), ice_fdir_tcpv6_pkt, + sizeof(ice_fdir_tcp6_tun_pkt), ice_fdir_tcp6_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV6_UDP, - sizeof(ice_fdir_udpv6_pkt), - ice_fdir_udpv6_pkt, + sizeof(ice_fdir_udpv6_pkt), ice_fdir_udpv6_pkt, + sizeof(ice_fdir_udp6_tun_pkt), ice_fdir_udp6_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV6_SCTP, - sizeof(ice_fdir_sctpv6_pkt), - ice_fdir_sctpv6_pkt, + sizeof(ice_fdir_sctpv6_pkt), ice_fdir_sctpv6_pkt, + sizeof(ice_fdir_sctp6_tun_pkt), ice_fdir_sctp6_tun_pkt, }, { ICE_FLTR_PTYPE_NONF_IPV6_OTHER, - sizeof(ice_fdir_ipv6_pkt), - ice_fdir_ipv6_pkt, + sizeof(ice_fdir_ipv6_pkt), ice_fdir_ipv6_pkt, + sizeof(ice_fdir_ip6_tun_pkt), ice_fdir_ip6_tun_pkt, }, }; @@ -377,15 +507,20 @@ static void ice_pkt_insert_u32(u8 *pkt, int offset, __be32 data) } /** - * ice_fdir_get_prgm_pkt - generate a dummy packet + * ice_fdir_get_gen_prgm_pkt - generate a training packet + * @hw: pointer to the hardware structure * @input: flow director filter data structure * @pkt: pointer to return filter packet * @frag: generate a fragment packet + * @tun: true implies generate a tunnel packet */ enum ice_status -ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag) +ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, + u8 *pkt, bool frag, bool tun) { enum ice_fltr_ptype flow; + u16 tnl_port; + u8 *loc; u16 idx; if (input->flow_type == ICE_FLTR_PTYPE_NONF_IPV4_OTHER) { @@ -431,83 +566,96 @@ ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag) break; if (idx == ICE_FDIR_NUM_PKT) return ICE_ERR_PARAM; - ice_memcpy(pkt, ice_fdir_pkt[idx].pkt, ice_fdir_pkt[idx].pkt_len, - ICE_NONDMA_TO_NONDMA); + if (!tun) { + ice_memcpy(pkt, ice_fdir_pkt[idx].pkt, + ice_fdir_pkt[idx].pkt_len, ICE_NONDMA_TO_NONDMA); + loc = pkt; + } else { + if (!ice_get_open_tunnel_port(hw, TNL_ALL, &tnl_port)) + return ICE_ERR_DOES_NOT_EXIST; + if (!ice_fdir_pkt[idx].tun_pkt) + return ICE_ERR_PARAM; + ice_memcpy(pkt, ice_fdir_pkt[idx].tun_pkt, + ice_fdir_pkt[idx].tun_pkt_len, ICE_NONDMA_TO_NONDMA); + ice_pkt_insert_u16(pkt, ICE_IPV4_UDP_DST_PORT_OFFSET, + HTONS(tnl_port)); + loc = &pkt[ICE_FDIR_TUN_PKT_OFF]; + } switch (flow) { case ICE_FLTR_PTYPE_NONF_IPV4_TCP: - ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, input->ip.v4.dst_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_TCP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_TCP_DST_PORT_OFFSET, input->ip.v4.dst_port); - ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET, input->ip.v4.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_TCP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_TCP_SRC_PORT_OFFSET, input->ip.v4.src_port); if (frag) - pkt[20] = ICE_FDIR_IPV4_PKT_FLAG_DF; + loc[20] = ICE_FDIR_IPV4_PKT_FLAG_DF; break; case ICE_FLTR_PTYPE_NONF_IPV4_UDP: - ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, input->ip.v4.dst_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_UDP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_UDP_DST_PORT_OFFSET, input->ip.v4.dst_port); - ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET, input->ip.v4.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_UDP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_UDP_SRC_PORT_OFFSET, input->ip.v4.src_port); break; case ICE_FLTR_PTYPE_NONF_IPV4_SCTP: - ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, input->ip.v4.dst_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_SCTP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_SCTP_DST_PORT_OFFSET, input->ip.v4.dst_port); - ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET, input->ip.v4.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_SCTP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV4_SCTP_SRC_PORT_OFFSET, input->ip.v4.src_port); break; case ICE_FLTR_PTYPE_NONF_IPV4_OTHER: - ice_pkt_insert_u32(pkt, ICE_IPV4_DST_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, input->ip.v4.dst_ip); - ice_pkt_insert_u32(pkt, ICE_IPV4_SRC_ADDR_OFFSET, + ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET, input->ip.v4.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV4_PROTO_OFFSET, 0); + ice_pkt_insert_u16(loc, ICE_IPV4_PROTO_OFFSET, 0); break; case ICE_FLTR_PTYPE_NONF_IPV6_TCP: - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, input->ip.v6.dst_ip); - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET, input->ip.v6.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV6_TCP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_TCP_DST_PORT_OFFSET, input->ip.v6.dst_port); - ice_pkt_insert_u16(pkt, ICE_IPV6_TCP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_TCP_SRC_PORT_OFFSET, input->ip.v6.src_port); break; case ICE_FLTR_PTYPE_NONF_IPV6_UDP: - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, input->ip.v6.dst_ip); - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET, input->ip.v6.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV6_UDP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_UDP_DST_PORT_OFFSET, input->ip.v6.dst_port); - ice_pkt_insert_u16(pkt, ICE_IPV6_UDP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_UDP_SRC_PORT_OFFSET, input->ip.v6.src_port); break; case ICE_FLTR_PTYPE_NONF_IPV6_SCTP: - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, input->ip.v6.dst_ip); - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET, input->ip.v6.src_ip); - ice_pkt_insert_u16(pkt, ICE_IPV6_SCTP_DST_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_SCTP_DST_PORT_OFFSET, input->ip.v6.dst_port); - ice_pkt_insert_u16(pkt, ICE_IPV6_SCTP_SRC_PORT_OFFSET, + ice_pkt_insert_u16(loc, ICE_IPV6_SCTP_SRC_PORT_OFFSET, input->ip.v6.src_port); break; case ICE_FLTR_PTYPE_NONF_IPV6_OTHER: - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_DST_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, input->ip.v6.dst_ip); - ice_pkt_insert_ipv6_addr(pkt, ICE_IPV6_SRC_ADDR_OFFSET, + ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET, input->ip.v6.src_ip); break; default: @@ -515,12 +663,24 @@ ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag) } if (input->flex_fltr) - ice_pkt_insert_u16(pkt, input->flex_offset, input->flex_word); + ice_pkt_insert_u16(loc, input->flex_offset, input->flex_word); return ICE_SUCCESS; } /** + * ice_fdir_get_prgm_pkt - generate a training packet + * @input: flow director filter data structure + * @pkt: pointer to return filter packet + * @frag: generate a fragment packet + */ +enum ice_status +ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag) +{ + return ice_fdir_get_gen_prgm_pkt(NULL, input, pkt, frag, false); +} + +/** * ice_fdir_has_frag - does flow type have 2 ptypes * @flow: flow ptype * diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index 8490fac61..9e7e22033 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -58,7 +58,8 @@ enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw); #define ICE_IP_PROTO_IP 0 #define ICE_IP_PROTO_ESP 50 -#define ICE_FDIR_MAX_RAW_PKT_SIZE 512 +#define ICE_FDIR_TUN_PKT_OFF 50 +#define ICE_FDIR_MAX_RAW_PKT_SIZE (512 + ICE_FDIR_TUN_PKT_OFF) #define ICE_FDIR_BUF_FULL_MARGIN 10 #define ICE_FDIR_BUF_HEAD_ROOM 32 @@ -175,12 +176,17 @@ struct ice_fdir_base_pkt { enum ice_fltr_ptype flow; u16 pkt_len; const u8 *pkt; + u16 tun_pkt_len; + const u8 *tun_pkt; }; void ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input, struct ice_fltr_desc *fdesc, bool add); enum ice_status +ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, + u8 *pkt, bool frag, bool tun); +enum ice_status ice_fdir_get_prgm_pkt(struct ice_fdir_fltr *input, u8 *pkt, bool frag); enum ice_status ice_add_del_fdir(struct ice_hw *hw, struct ice_fdir_fltr *input, bool add); diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index 150b4c5c5..7d0a4f63f 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -296,13 +296,19 @@ enum ice_fltr_ptype { ICE_FLTR_PTYPE_MAX, }; +enum ice_fd_hw_seg { + ICE_FD_HW_SEG_NON_TUN = 0, + ICE_FD_HW_SEG_TUN, + ICE_FD_HW_SEG_MAX, +}; + /* 2 VSI = 1 ICE_VSI_PF + 1 ICE_VSI_CTRL */ #define ICE_MAX_FDIR_VSI_PER_FILTER 2 struct ice_fd_hw_prof { - struct ice_flow_seg_info *fdir_seg; + struct ice_flow_seg_info *fdir_seg[ICE_FD_HW_SEG_MAX]; int cnt; - u64 entry_h[ICE_MAX_FDIR_VSI_PER_FILTER]; + u64 entry_h[ICE_MAX_FDIR_VSI_PER_FILTER][ICE_FD_HW_SEG_MAX]; u16 vsi_h[ICE_MAX_FDIR_VSI_PER_FILTER]; }; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 03/30] net/ice/base: add non-word aligned ip field support 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 01/30] net/ice/base: remove redundant empty lines Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 02/30] net/ice/base: add support for tunnel packets Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 04/30] net/ice/base: add non-word aligned ipv6 " Qi Zhang ` (27 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Add non-word aligned field support for ipv4 with ttl, tos and proto. All these fields are one byte within one word. In order to match bytes within the IPv4 header for flow director we need to use a mask. Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 30 +++++++++++++++++++++++------- drivers/net/ice/base/ice_fdir.h | 4 ++++ 2 files changed, 27 insertions(+), 7 deletions(-) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index b92603e10..db5bbc6ad 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -485,6 +485,17 @@ static void ice_pkt_insert_ipv6_addr(u8 *pkt, int offset, __be32 *addr) } /** + * ice_pkt_insert_u8 - insert a u8 value into a memory buffer. + * @pkt: packet buffer + * @offset: offset into buffer + * @data: 8 bit value to convert and insert into pkt at offset + */ +static void ice_pkt_insert_u8(u8 *pkt, int offset, u8 data) +{ + ice_memcpy(pkt + offset, &data, sizeof(data), ICE_NONDMA_TO_NONDMA); +} + +/** * ice_pkt_insert_u16 - insert a be16 value into a memory buffer. * @pkt: packet buffer * @offset: offset into buffer @@ -534,11 +545,9 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, case ICE_IP_PROTO_SCTP: flow = ICE_FLTR_PTYPE_NONF_IPV4_SCTP; break; - case ICE_IP_PROTO_IP: + default: flow = ICE_FLTR_PTYPE_NONF_IPV4_OTHER; break; - default: - return ICE_ERR_PARAM; } } else if (input->flow_type == ICE_FLTR_PTYPE_NONF_IPV6_OTHER) { switch (input->ip.v6.proto) { @@ -551,11 +560,9 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, case ICE_IP_PROTO_SCTP: flow = ICE_FLTR_PTYPE_NONF_IPV6_SCTP; break; - case ICE_IP_PROTO_IP: + default: flow = ICE_FLTR_PTYPE_NONF_IPV6_OTHER; break; - default: - return ICE_ERR_PARAM; } } else { flow = input->flow_type; @@ -592,6 +599,8 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.src_ip); ice_pkt_insert_u16(loc, ICE_IPV4_TCP_SRC_PORT_OFFSET, input->ip.v4.src_port); + ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); + ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); if (frag) loc[20] = ICE_FDIR_IPV4_PKT_FLAG_DF; break; @@ -604,6 +613,8 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.src_ip); ice_pkt_insert_u16(loc, ICE_IPV4_UDP_SRC_PORT_OFFSET, input->ip.v4.src_port); + ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); + ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); break; case ICE_FLTR_PTYPE_NONF_IPV4_SCTP: ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, @@ -614,13 +625,18 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.src_ip); ice_pkt_insert_u16(loc, ICE_IPV4_SCTP_SRC_PORT_OFFSET, input->ip.v4.src_port); + ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); + ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); break; case ICE_FLTR_PTYPE_NONF_IPV4_OTHER: ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, input->ip.v4.dst_ip); ice_pkt_insert_u32(loc, ICE_IPV4_SRC_ADDR_OFFSET, input->ip.v4.src_ip); - ice_pkt_insert_u16(loc, ICE_IPV4_PROTO_OFFSET, 0); + ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); + ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); + ice_pkt_insert_u8(loc, ICE_IPV4_PROTO_OFFSET, + input->ip.v4.proto); break; case ICE_FLTR_PTYPE_NONF_IPV6_TCP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index 9e7e22033..e817057c8 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -82,6 +82,9 @@ enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw); #define ICE_IPV6_SCTP_SRC_PORT_OFFSET 54 #define ICE_IPV6_SCTP_DST_PORT_OFFSET 56 +#define ICE_IPV4_TOS_OFFSET 15 +#define ICE_IPV4_TTL_OFFSET 22 + #define ICE_FDIR_MAX_FLTRS 16384 /* IP v4 has 2 flag bits that enable fragment processing: DF and MF. DF @@ -123,6 +126,7 @@ struct ice_fdir_v4 { u8 tos; u8 ip_ver; u8 proto; + u8 ttl; }; #define ICE_IPV6_ADDR_LEN_AS_U32 4 -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 04/30] net/ice/base: add non-word aligned ipv6 field support 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (2 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 03/30] net/ice/base: add non-word aligned ip field support Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 05/30] net/ice/base: correct the mask for checking protocol header Qi Zhang ` (26 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Add non-word aligned field support for IPv6 with hlim, tc and proto. All these fields are one byte within one word. In order to match bytes within the IPv6 header for flow director we need to use a mask. Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 32 ++++++++++++++++++++++++++++++++ drivers/net/ice/base/ice_fdir.h | 4 ++++ 2 files changed, 36 insertions(+) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index db5bbc6ad..e35506006 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -496,6 +496,28 @@ static void ice_pkt_insert_u8(u8 *pkt, int offset, u8 data) } /** + * ice_pkt_insert_u8_tc - insert a u8 value into a memory buffer for tc ipv6. + * @pkt: packet buffer + * @offset: offset into buffer + * @data: 8 bit value to convert and insert into pkt at offset + * + * This function is designed for inserting Traffic Class (tc) for IPv6, + * since that tc is not aligned in number of bytes. Here we split it out + * into two part and fill each byte with data copy from pkt, then insert + * the two bytes data one by one. + */ +static void ice_pkt_insert_u8_tc(u8 *pkt, int offset, u8 data) +{ + u8 high, low; + + high = (data >> 4) + (*(pkt + offset) & 0xF0); + ice_memcpy(pkt + offset, &high, sizeof(high), ICE_NONDMA_TO_NONDMA); + + low = (*(pkt + offset + 1) & 0x0F) + ((data & 0x0F) << 4); + ice_memcpy(pkt + offset + 1, &low, sizeof(low), ICE_NONDMA_TO_NONDMA); +} + +/** * ice_pkt_insert_u16 - insert a be16 value into a memory buffer. * @pkt: packet buffer * @offset: offset into buffer @@ -647,6 +669,8 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v6.dst_port); ice_pkt_insert_u16(loc, ICE_IPV6_TCP_SRC_PORT_OFFSET, input->ip.v6.src_port); + ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); + ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); break; case ICE_FLTR_PTYPE_NONF_IPV6_UDP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, @@ -657,6 +681,8 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v6.dst_port); ice_pkt_insert_u16(loc, ICE_IPV6_UDP_SRC_PORT_OFFSET, input->ip.v6.src_port); + ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); + ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); break; case ICE_FLTR_PTYPE_NONF_IPV6_SCTP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, @@ -667,12 +693,18 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v6.dst_port); ice_pkt_insert_u16(loc, ICE_IPV6_SCTP_SRC_PORT_OFFSET, input->ip.v6.src_port); + ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); + ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); break; case ICE_FLTR_PTYPE_NONF_IPV6_OTHER: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, input->ip.v6.dst_ip); ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_SRC_ADDR_OFFSET, input->ip.v6.src_ip); + ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); + ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); + ice_pkt_insert_u8(loc, ICE_IPV6_PROTO_OFFSET, + input->ip.v6.proto); break; default: return ICE_ERR_PARAM; diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index e817057c8..e0f3cd481 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -84,6 +84,9 @@ enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw); #define ICE_IPV4_TOS_OFFSET 15 #define ICE_IPV4_TTL_OFFSET 22 +#define ICE_IPV6_TC_OFFSET 14 +#define ICE_IPV6_HLIM_OFFSET 21 +#define ICE_IPV6_PROTO_OFFSET 20 #define ICE_FDIR_MAX_FLTRS 16384 @@ -140,6 +143,7 @@ struct ice_fdir_v6 { __be32 sec_parm_idx; /* security parameter index */ u8 tc; u8 proto; + u8 hlim; }; struct ice_fdir_extra { -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 05/30] net/ice/base: correct the mask for checking protocol header 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (3 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 04/30] net/ice/base: add non-word aligned ipv6 " Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 06/30] net/ice/base: propagate errors from functions Qi Zhang ` (25 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Zhirun Yan, Paul M Stillwell Jr Before this patch, the logic of protocol header checking only support non-tunneled packet. This patch remove the inner protocol in L3/L4 RSS seg hdr mask and change the protocol header validation to reflect this. So, for ice_add_rss_cfg(), the last parameter addl_hdrs could specify the protocol header for tunnel. Signed-off-by: Zhirun Yan <zhirun.yan@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 20 +++++++++++--------- 1 file changed, 11 insertions(+), 9 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 769fd2da7..682f26ce6 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -372,15 +372,18 @@ struct ice_flow_prof_params { ice_declare_bitmap(ptypes, ICE_FLOW_PTYPE_MAX); }; +#define ICE_FLOW_RSS_HDRS_INNER_MASK \ + (ICE_FLOW_SEG_HDR_PPPOE | ICE_FLOW_SEG_HDR_GTPC | \ + ICE_FLOW_SEG_HDR_GTPC_TEID | ICE_FLOW_SEG_HDR_GTPU) + #define ICE_FLOW_SEG_HDRS_L2_MASK \ (ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_VLAN) #define ICE_FLOW_SEG_HDRS_L3_MASK \ (ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV6 | \ - ICE_FLOW_SEG_HDR_ARP | ICE_FLOW_SEG_HDR_PPPOE) + ICE_FLOW_SEG_HDR_ARP) #define ICE_FLOW_SEG_HDRS_L4_MASK \ (ICE_FLOW_SEG_HDR_ICMP | ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_UDP | \ - ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_GTPC | \ - ICE_FLOW_SEG_HDR_GTPC_TEID | ICE_FLOW_SEG_HDR_GTPU) + ICE_FLOW_SEG_HDR_SCTP) /** * ice_flow_val_hdrs - validates packet segments for valid protocol headers @@ -1686,13 +1689,11 @@ ice_flow_add_fld_raw(struct ice_flow_seg_info *seg, u16 off, u8 len, (ICE_FLOW_SEG_HDR_ETH | ICE_FLOW_SEG_HDR_VLAN) #define ICE_FLOW_RSS_SEG_HDR_L3_MASKS \ - (ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV6 | ICE_FLOW_SEG_HDR_PPPOE) + (ICE_FLOW_SEG_HDR_IPV4 | ICE_FLOW_SEG_HDR_IPV6) #define ICE_FLOW_RSS_SEG_HDR_L4_MASKS \ (ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_UDP | \ - ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_GTPC_TEID | \ - ICE_FLOW_SEG_HDR_GTPU) - + ICE_FLOW_SEG_HDR_SCTP) #define ICE_FLOW_RSS_SEG_HDR_VAL_MASKS \ (ICE_FLOW_RSS_SEG_HDR_L2_MASKS | \ @@ -1729,11 +1730,12 @@ ice_flow_set_rss_seg_info(struct ice_flow_seg_info *segs, u64 hash_fields, } ICE_FLOW_SET_HDRS(segs, flow_hdr); - if (segs->hdrs & ~ICE_FLOW_RSS_SEG_HDR_VAL_MASKS) + if (segs->hdrs & ~ICE_FLOW_RSS_SEG_HDR_VAL_MASKS & + ~ICE_FLOW_RSS_HDRS_INNER_MASK) return ICE_ERR_PARAM; val = (u64)(segs->hdrs & ICE_FLOW_RSS_SEG_HDR_L3_MASKS); - if (!ice_is_pow2(val)) + if (val && !ice_is_pow2(val)) return ICE_ERR_CFG; val = (u64)(segs->hdrs & ICE_FLOW_RSS_SEG_HDR_L4_MASKS); -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 06/30] net/ice/base: propagate errors from functions 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (4 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 05/30] net/ice/base: correct the mask for checking protocol header Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 07/30] net/ice/base: remove pointless NULL check of port info Qi Zhang ` (24 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr There could be an error returned from ice_fill_adv_dummy_packet() so we need to propagate that to the caller. Additionally, the call to ice_flow_xtract_pkt_flags() could also return an error so we need to propagate it as well. Also add in the correct offsets for GENEVE and VXLAN_GPE to the dummy packets. Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 9 ++++++--- drivers/net/ice/base/ice_switch.c | 8 ++++++-- 2 files changed, 12 insertions(+), 5 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 682f26ce6..7dae53270 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -869,9 +869,12 @@ ice_flow_create_xtrct_seq(struct ice_hw *hw, /* For ACL, we also need to extract the direction bit (Rx,Tx) data from * packet flags */ - if (params->blk == ICE_BLK_ACL) - ice_flow_xtract_pkt_flags(hw, params, - ICE_RX_MDID_PKT_FLAGS_15_0); + if (params->blk == ICE_BLK_ACL) { + status = ice_flow_xtract_pkt_flags(hw, params, + ICE_RX_MDID_PKT_FLAGS_15_0); + if (status) + return status; + } for (i = 0; i < params->prof->segs_cnt; i++) { u64 match = params->prof->segs[i].match; diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 00358e4db..fa023169d 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -156,6 +156,7 @@ struct ice_dummy_pkt_offsets dummy_udp_tun_tcp_packet_offsets[] = { { ICE_UDP_OF, 34 }, { ICE_VXLAN, 42 }, { ICE_GENEVE, 42 }, + { ICE_VXLAN_GPE, 42 }, { ICE_MAC_IL, 50 }, { ICE_IPV4_IL, 64 }, { ICE_TCP_IL, 84 }, @@ -208,6 +209,7 @@ struct ice_dummy_pkt_offsets dummy_udp_tun_udp_packet_offsets[] = { { ICE_UDP_OF, 34 }, { ICE_VXLAN, 42 }, { ICE_GENEVE, 42 }, + { ICE_VXLAN_GPE, 42 }, { ICE_MAC_IL, 50 }, { ICE_IPV4_IL, 64 }, { ICE_UDP_ILOS, 84 }, @@ -6189,8 +6191,10 @@ ice_add_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, s_rule->pdata.lkup_tx_rx.recipe_id = CPU_TO_LE16(rid); s_rule->pdata.lkup_tx_rx.act = CPU_TO_LE32(act); - ice_fill_adv_dummy_packet(lkups, lkups_cnt, s_rule, pkt, pkt_len, - pkt_offsets); + status = ice_fill_adv_dummy_packet(lkups, lkups_cnt, s_rule, pkt, + pkt_len, pkt_offsets); + if (status) + goto err_ice_add_adv_rule; if (rinfo->tun_type != ICE_NON_TUN) { status = ice_fill_adv_packet_tun(hw, rinfo->tun_type, -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 07/30] net/ice/base: remove pointless NULL check of port info 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (5 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 06/30] net/ice/base: propagate errors from functions Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 08/30] net/ice/base: remove RSS code as iavf host Qi Zhang ` (23 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Jacob Keller, Paul M Stillwell Jr The code in ice_sched_cleanup_all checks whether the port info is NULL prior to calling ice_sched_clear_port. More importantly, it also checks whether the port structure has been initialized by checking its port_state field as well. Signed-off-by: Jacob Keller <jacob.e.keller@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_sched.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/net/ice/base/ice_sched.c b/drivers/net/ice/base/ice_sched.c index 6732e291a..553fc28ff 100644 --- a/drivers/net/ice/base/ice_sched.c +++ b/drivers/net/ice/base/ice_sched.c @@ -840,8 +840,7 @@ void ice_sched_cleanup_all(struct ice_hw *hw) hw->layer_info = NULL; } - if (hw->port_info) - ice_sched_clear_port(hw->port_info); + ice_sched_clear_port(hw->port_info); hw->num_tx_sched_layers = 0; hw->num_tx_sched_phys_layers = 0; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 08/30] net/ice/base: remove RSS code as iavf host 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (6 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 07/30] net/ice/base: remove pointless NULL check of port info Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 09/30] net/ice/base: add support for switch rule about VLAN PPPoE Qi Zhang ` (22 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr The DPDK PF doesn't support SRIOV so remove the related iavf host code. Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 128 ---------------------------------------- 1 file changed, 128 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 7dae53270..5d1b12d43 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -2128,134 +2128,6 @@ ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, return status; } -/* Mapping of AVF hash bit fields to an L3-L4 hash combination. - * As the ice_flow_avf_hdr_field represent individual bit shifts in a hash, - * convert its values to their appropriate flow L3, L4 values. - */ -#define ICE_FLOW_AVF_RSS_IPV4_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_OTHER) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV4)) -#define ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP_SYN_NO_ACK) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_TCP)) -#define ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV4_UDP) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV4_UDP) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_UDP)) -#define ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS \ - (ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS | ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS | \ - ICE_FLOW_AVF_RSS_IPV4_MASKS | BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP)) - -#define ICE_FLOW_AVF_RSS_IPV6_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_OTHER) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_FRAG_IPV6)) -#define ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_UNICAST_IPV6_UDP) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_MULTICAST_IPV6_UDP) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_UDP)) -#define ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS \ - (BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP_SYN_NO_ACK) | \ - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_TCP)) -#define ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS \ - (ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS | ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS | \ - ICE_FLOW_AVF_RSS_IPV6_MASKS | BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP)) - -#define ICE_FLOW_MAX_CFG 10 - -/** - * ice_add_avf_rss_cfg - add an RSS configuration for AVF driver - * @hw: pointer to the hardware structure - * @vsi_handle: software VSI handle - * @avf_hash: hash bit fields (ICE_AVF_FLOW_FIELD_*) to configure - * - * This function will take the hash bitmap provided by the AVF driver via a - * message, convert it to ICE-compatible values, and configure RSS flow - * profiles. - */ -enum ice_status -ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 avf_hash) -{ - enum ice_status status = ICE_SUCCESS; - u64 hash_flds; - - if (avf_hash == ICE_AVF_FLOW_FIELD_INVALID || - !ice_is_vsi_valid(hw, vsi_handle)) - return ICE_ERR_PARAM; - - /* Make sure no unsupported bits are specified */ - if (avf_hash & ~(ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS | - ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS)) - return ICE_ERR_CFG; - - hash_flds = avf_hash; - - /* Always create an L3 RSS configuration for any L4 RSS configuration */ - if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS) - hash_flds |= ICE_FLOW_AVF_RSS_IPV4_MASKS; - - if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS) - hash_flds |= ICE_FLOW_AVF_RSS_IPV6_MASKS; - - /* Create the corresponding RSS configuration for each valid hash bit */ - while (hash_flds) { - u64 rss_hash = ICE_HASH_INVALID; - - if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV4_MASKS) { - if (hash_flds & ICE_FLOW_AVF_RSS_IPV4_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV4; - hash_flds &= ~ICE_FLOW_AVF_RSS_IPV4_MASKS; - } else if (hash_flds & - ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV4 | - ICE_FLOW_HASH_TCP_PORT; - hash_flds &= ~ICE_FLOW_AVF_RSS_TCP_IPV4_MASKS; - } else if (hash_flds & - ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV4 | - ICE_FLOW_HASH_UDP_PORT; - hash_flds &= ~ICE_FLOW_AVF_RSS_UDP_IPV4_MASKS; - } else if (hash_flds & - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP)) { - rss_hash = ICE_FLOW_HASH_IPV4 | - ICE_FLOW_HASH_SCTP_PORT; - hash_flds &= - ~BIT_ULL(ICE_AVF_FLOW_FIELD_IPV4_SCTP); - } - } else if (hash_flds & ICE_FLOW_AVF_RSS_ALL_IPV6_MASKS) { - if (hash_flds & ICE_FLOW_AVF_RSS_IPV6_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV6; - hash_flds &= ~ICE_FLOW_AVF_RSS_IPV6_MASKS; - } else if (hash_flds & - ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV6 | - ICE_FLOW_HASH_TCP_PORT; - hash_flds &= ~ICE_FLOW_AVF_RSS_TCP_IPV6_MASKS; - } else if (hash_flds & - ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS) { - rss_hash = ICE_FLOW_HASH_IPV6 | - ICE_FLOW_HASH_UDP_PORT; - hash_flds &= ~ICE_FLOW_AVF_RSS_UDP_IPV6_MASKS; - } else if (hash_flds & - BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP)) { - rss_hash = ICE_FLOW_HASH_IPV6 | - ICE_FLOW_HASH_SCTP_PORT; - hash_flds &= - ~BIT_ULL(ICE_AVF_FLOW_FIELD_IPV6_SCTP); - } - } - - if (rss_hash == ICE_HASH_INVALID) - return ICE_ERR_OUT_OF_RANGE; - - status = ice_add_rss_cfg(hw, vsi_handle, rss_hash, - ICE_FLOW_SEG_HDR_NONE); - if (status) - break; - } - - return status; -} - /** * ice_replay_rss_cfg - replay RSS configurations associated with VSI * @hw: pointer to the hardware structure -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 09/30] net/ice/base: add support for switch rule about VLAN PPPoE 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (7 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 08/30] net/ice/base: remove RSS code as iavf host Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 10/30] net/ice/base: minor structure refactor Qi Zhang ` (21 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Add support for switch rule about single-VLAN-PPPoE. Note that double VLAN is not supported by the hardware at this point, therefore only single-VLAN support for PPPoE is added. Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_protocol_type.h | 8 ++++++++ drivers/net/ice/base/ice_switch.c | 19 +++++++++++++++---- 2 files changed, 23 insertions(+), 4 deletions(-) diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h index cdb691523..c6caa8562 100644 --- a/drivers/net/ice/base/ice_protocol_type.h +++ b/drivers/net/ice/base/ice_protocol_type.h @@ -31,6 +31,7 @@ enum ice_protocol_type { ICE_MAC_OFOS = 0, ICE_MAC_IL, ICE_ETYPE_OL, + ICE_VLAN_OFOS, ICE_IPV4_OFOS, ICE_IPV4_IL, ICE_IPV6_OFOS, @@ -117,6 +118,7 @@ enum ice_prot_id { #define ICE_MAC_OFOS_HW 1 #define ICE_MAC_IL_HW 4 #define ICE_ETYPE_OL_HW 9 +#define ICE_VLAN_OL_HW 16 #define ICE_IPV4_OFOS_HW 32 #define ICE_IPV4_IL_HW 33 #define ICE_IPV6_OFOS_HW 40 @@ -162,6 +164,11 @@ struct ice_ether_vlan_hdr { u32 vlan_id; }; +struct ice_vlan_hdr { + u16 vlan; + u16 type; +}; + struct ice_ipv4_hdr { u8 version; u8 tos; @@ -239,6 +246,7 @@ struct ice_nvgre { union ice_prot_hdr { struct ice_ether_hdr eth_hdr; struct ice_ethtype_hdr ethertype; + struct ice_vlan_hdr vlan_hdr; struct ice_ipv4_hdr ipv4_hdr; struct ice_ipv6_hdr ipv6_hdr; struct ice_l4_hdr l4_hdr; diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index fa023169d..688584563 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -418,8 +418,9 @@ dummy_udp_gtp_packet[] = { static const struct ice_dummy_pkt_offsets dummy_pppoe_packet_offsets[] = { - { ICE_MAC_OFOS, 0 }, - { ICE_PPPOE, 14 }, + { ICE_MAC_OFOS, 0 }, + { ICE_VLAN_OFOS, 14}, + { ICE_PPPOE, 18 }, { ICE_PROTOCOL_LAST, 0 }, }; @@ -428,9 +429,11 @@ dummy_pppoe_packet[] = { 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x88, 0x64, + 0x81, 0x00, + + 0x00, 0x00, 0x88, 0x64, /* ICE_VLAN_OFOS 14 */ - 0x11, 0x00, 0x00, 0x01, /* ICE_PPPOE 14 */ + 0x11, 0x00, 0x00, 0x01, /* ICE_PPPOE 18 */ 0x00, 0x4e, 0x00, 0x21, 0x45, 0x00, 0x00, 0x30, /* PDU */ @@ -4632,6 +4635,7 @@ static const struct ice_prot_ext_tbl_entry ice_prot_ext[] = { { ICE_MAC_OFOS, { 0, 2, 4, 6, 8, 10, 12 } }, { ICE_MAC_IL, { 0, 2, 4, 6, 8, 10, 12 } }, { ICE_ETYPE_OL, { 0 } }, + { ICE_VLAN_OFOS, { 0, 2 } }, { ICE_IPV4_OFOS, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18 } }, { ICE_IPV4_IL, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18 } }, { ICE_IPV6_IL, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, @@ -4661,6 +4665,7 @@ static const struct ice_protocol_entry ice_prot_id_tbl[] = { { ICE_MAC_OFOS, ICE_MAC_OFOS_HW }, { ICE_MAC_IL, ICE_MAC_IL_HW }, { ICE_ETYPE_OL, ICE_ETYPE_OL_HW }, + { ICE_VLAN_OFOS, ICE_VLAN_OL_HW }, { ICE_IPV4_OFOS, ICE_IPV4_OFOS_HW }, { ICE_IPV4_IL, ICE_IPV4_IL_HW }, { ICE_IPV6_OFOS, ICE_IPV6_OFOS_HW }, @@ -5784,6 +5789,9 @@ ice_fill_adv_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt, case ICE_ETYPE_OL: len = sizeof(struct ice_ethtype_hdr); break; + case ICE_VLAN_OFOS: + len = sizeof(struct ice_vlan_hdr); + break; case ICE_IPV4_OFOS: case ICE_IPV4_IL: len = sizeof(struct ice_ipv4_hdr); @@ -5812,6 +5820,9 @@ ice_fill_adv_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt, case ICE_GTP: len = sizeof(struct ice_udp_gtp_hdr); break; + case ICE_PPPOE: + len = sizeof(struct ice_pppoe_hdr); + break; default: return ICE_ERR_PARAM; } -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 10/30] net/ice/base: minor structure refactor 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (8 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 09/30] net/ice/base: add support for switch rule about VLAN PPPoE Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 11/30] net/ice/base: associate switch recipe to profiles Qi Zhang ` (20 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Jesse Brandeburg, Paul M Stillwell Jr When declaring the ice_prot_ext, and ice_prot_id_tbl structure, we can use a fixed length array instead of a variable length one which helps us catch future code changes that might desynchronize the enum ice_protocol_type and the structs. This change also necessitates removing the last member of the structs which was just there to be a placeholder. Also reorder the ice_prot_ext struct to match the ordering in the associated enum ice_protocol_type. Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_switch.c | 10 ++++------ 1 file changed, 4 insertions(+), 6 deletions(-) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 688584563..250f664b2 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -4631,17 +4631,17 @@ ice_add_mac_with_counter(struct ice_hw *hw, struct ice_fltr_info *f_info) * matching entry describing its field. This needs to be updated if new * structure is added to that union. */ -static const struct ice_prot_ext_tbl_entry ice_prot_ext[] = { +static const struct ice_prot_ext_tbl_entry ice_prot_ext[ICE_PROTOCOL_LAST] = { { ICE_MAC_OFOS, { 0, 2, 4, 6, 8, 10, 12 } }, { ICE_MAC_IL, { 0, 2, 4, 6, 8, 10, 12 } }, { ICE_ETYPE_OL, { 0 } }, { ICE_VLAN_OFOS, { 0, 2 } }, { ICE_IPV4_OFOS, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18 } }, { ICE_IPV4_IL, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18 } }, - { ICE_IPV6_IL, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, - 26, 28, 30, 32, 34, 36, 38 } }, { ICE_IPV6_OFOS, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30, 32, 34, 36, 38 } }, + { ICE_IPV6_IL, { 0, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, + 26, 28, 30, 32, 34, 36, 38 } }, { ICE_TCP_IL, { 0, 2 } }, { ICE_UDP_OF, { 0, 2 } }, { ICE_UDP_ILOS, { 0, 2 } }, @@ -4652,7 +4652,6 @@ static const struct ice_prot_ext_tbl_entry ice_prot_ext[] = { { ICE_NVGRE, { 0, 2, 4, 6 } }, { ICE_GTP, { 8, 10, 12, 14, 16, 18, 20 } }, { ICE_PPPOE, { 0, 2, 4, 6 } }, - { ICE_PROTOCOL_LAST, { 0 } } }; /* The following table describes preferred grouping of recipes. @@ -4661,7 +4660,7 @@ static const struct ice_prot_ext_tbl_entry ice_prot_ext[] = { * following policy. */ -static const struct ice_protocol_entry ice_prot_id_tbl[] = { +static const struct ice_protocol_entry ice_prot_id_tbl[ICE_PROTOCOL_LAST] = { { ICE_MAC_OFOS, ICE_MAC_OFOS_HW }, { ICE_MAC_IL, ICE_MAC_IL_HW }, { ICE_ETYPE_OL, ICE_ETYPE_OL_HW }, @@ -4680,7 +4679,6 @@ static const struct ice_protocol_entry ice_prot_id_tbl[] = { { ICE_NVGRE, ICE_GRE_OF_HW }, { ICE_GTP, ICE_UDP_OF_HW }, { ICE_PPPOE, ICE_PPPOE_HW }, - { ICE_PROTOCOL_LAST, 0 } }; /** -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 11/30] net/ice/base: associate switch recipe to profiles 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (9 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 10/30] net/ice/base: minor structure refactor Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 12/30] net/ice/base: enable RSS for PPPoE with SCTP Qi Zhang ` (19 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Paul M Stillwell Jr Properly associate switch recipes to profiles. Previous code was using the wrong bitfield for updating the associations, which was causing other PFs to not properly identify and use existing recipes. This sometimes resulted in rules not being added when it should have been possible. Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_switch.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 250f664b2..64c2aec19 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -5581,14 +5581,14 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, if (status) goto err_unroll; - ice_or_bitmap(rm->r_bitmap, r_bitmap, rm->r_bitmap, + ice_or_bitmap(r_bitmap, r_bitmap, rm->r_bitmap, ICE_MAX_NUM_RECIPES); status = ice_acquire_change_lock(hw, ICE_RES_WRITE); if (status) goto err_unroll; status = ice_aq_map_recipe_to_profile(hw, fvit->profile_id, - (u8 *)rm->r_bitmap, + (u8 *)r_bitmap, NULL); ice_release_change_lock(hw); @@ -5596,12 +5596,12 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, goto err_unroll; /* Update profile to recipe bitmap array */ - ice_memcpy(profile_to_recipe[fvit->profile_id], rm->r_bitmap, - sizeof(rm->r_bitmap), ICE_NONDMA_TO_NONDMA); + ice_memcpy(profile_to_recipe[fvit->profile_id], r_bitmap, + sizeof(r_bitmap), ICE_NONDMA_TO_NONDMA); /* Update recipe to profile bitmap array */ for (j = 0; j < ICE_MAX_NUM_RECIPES; j++) - if (ice_is_bit_set(rm->r_bitmap, j)) + if (ice_is_bit_set(r_bitmap, j)) ice_set_bit((u16)fvit->profile_id, recipe_to_profile[j]); } -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 12/30] net/ice/base: enable RSS for PPPoE with SCTP 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (10 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 11/30] net/ice/base: associate switch recipe to profiles Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 13/30] net/ice/base: enable fdir queue region Qi Zhang ` (18 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Zhirun Yan, Paul M Stillwell Jr Add two ptypes(MAC_PPPOE_IPV4_SCTP and MAC_PPPOE_IPV6_SCTP) in sctp ptype bitmap to enable rss. Signed-off-by: Zhirun Yan <zhirun.yan@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 5d1b12d43..d91922527 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -253,7 +253,7 @@ static const u32 ice_ptypes_tcp_il[] = { static const u32 ice_ptypes_sctp_il[] = { 0x08000000, 0x01020204, 0x20408081, 0x04080810, 0x01020204, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x01040000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 13/30] net/ice/base: enable fdir queue region 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (11 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 12/30] net/ice/base: enable RSS for PPPoE with SCTP Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 14/30] net/ice/base: enable setting up FDIR counters Qi Zhang ` (17 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr Add fdir queue region support. Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> --- drivers/net/ice/base/ice_fdir.c | 3 +++ drivers/net/ice/base/ice_fdir.h | 2 ++ 2 files changed, 5 insertions(+) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index e35506006..4632f1a53 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -343,6 +343,9 @@ ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input, fdir_fltr_ctx.drop = ICE_FXD_FLTR_QW0_DROP_YES; fdir_fltr_ctx.qindex = 0; } else { + if (input->dest_ctl == + ICE_FLTR_PRGM_DESC_DEST_DIRECT_PKT_QGROUP) + fdir_fltr_ctx.toq = input->q_region; fdir_fltr_ctx.drop = ICE_FXD_FLTR_QW0_DROP_NO; fdir_fltr_ctx.qindex = input->q_index; } diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index e0f3cd481..ccfc30c85 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -167,6 +167,8 @@ struct ice_fdir_fltr { /* flex byte filter data */ __be16 flex_word; + /* queue region size (=2^q_region) */ + u8 q_region; u16 flex_offset; u16 flex_fltr; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 14/30] net/ice/base: enable setting up FDIR counters 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (12 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 13/30] net/ice/base: enable fdir queue region Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 15/30] net/ice/base: add dest MAC field support for FDIR Qi Zhang ` (16 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Enable getting value from input to set up flow director counters, so that the FDIR counters can count none, packets only, bytes only or both packets and bytes as demanded. Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 2 +- drivers/net/ice/base/ice_fdir.h | 1 + 2 files changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index 4632f1a53..1c455ffe4 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -349,7 +349,7 @@ ice_fdir_get_prgm_desc(struct ice_hw *hw, struct ice_fdir_fltr *input, fdir_fltr_ctx.drop = ICE_FXD_FLTR_QW0_DROP_NO; fdir_fltr_ctx.qindex = input->q_index; } - fdir_fltr_ctx.cnt_ena = ICE_FXD_FLTR_QW0_STAT_ENA_PKTS; + fdir_fltr_ctx.cnt_ena = input->cnt_ena; fdir_fltr_ctx.cnt_index = input->cnt_index; fdir_fltr_ctx.fd_vsi = ice_get_hw_vsi_num(hw, input->dest_vsi); fdir_fltr_ctx.evict_ena = ICE_FXD_FLTR_QW0_EVICT_ENA_FALSE; diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index ccfc30c85..007f6dd8f 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -176,6 +176,7 @@ struct ice_fdir_fltr { u16 q_index; u16 dest_vsi; u8 dest_ctl; + u8 cnt_ena; u8 fltr_status; u16 cnt_index; u32 fltr_id; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 15/30] net/ice/base: add dest MAC field support for FDIR 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (13 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 14/30] net/ice/base: enable setting up FDIR counters Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 16/30] net/ice/base: update FW API minor version Qi Zhang ` (15 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Add dest MAC address support so that this field can be matched when we set Flow Director filter with dst addr for MAC. Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 19 +++++++++++++++++++ 1 file changed, 19 insertions(+) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index 1c455ffe4..3a2175b30 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -543,6 +543,17 @@ static void ice_pkt_insert_u32(u8 *pkt, int offset, __be32 data) } /** + * ice_pkt_insert_mac_addr - insert a MAC addr into a memory buffer. + * @pkt: packet buffer + * @offset: offset into buffer + * @addr: MAC address to convert and insert into pkt at offset + */ +static void ice_pkt_insert_mac_addr(u8 *pkt, u8 *addr) +{ + ice_memcpy(pkt, addr, ETH_ALEN, ICE_NONDMA_TO_NONDMA); +} + +/** * ice_fdir_get_gen_prgm_pkt - generate a training packet * @hw: pointer to the hardware structure * @input: flow director filter data structure @@ -626,6 +637,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.src_port); ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); if (frag) loc[20] = ICE_FDIR_IPV4_PKT_FLAG_DF; break; @@ -640,6 +652,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.src_port); ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; case ICE_FLTR_PTYPE_NONF_IPV4_SCTP: ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, @@ -652,6 +665,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.src_port); ice_pkt_insert_u8(loc, ICE_IPV4_TOS_OFFSET, input->ip.v4.tos); ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; case ICE_FLTR_PTYPE_NONF_IPV4_OTHER: ice_pkt_insert_u32(loc, ICE_IPV4_DST_ADDR_OFFSET, @@ -662,6 +676,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, ice_pkt_insert_u8(loc, ICE_IPV4_TTL_OFFSET, input->ip.v4.ttl); ice_pkt_insert_u8(loc, ICE_IPV4_PROTO_OFFSET, input->ip.v4.proto); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; case ICE_FLTR_PTYPE_NONF_IPV6_TCP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, @@ -674,6 +689,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v6.src_port); ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; case ICE_FLTR_PTYPE_NONF_IPV6_UDP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, @@ -686,6 +702,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v6.src_port); ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; case ICE_FLTR_PTYPE_NONF_IPV6_SCTP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, @@ -698,6 +715,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v6.src_port); ice_pkt_insert_u8_tc(loc, ICE_IPV6_TC_OFFSET, input->ip.v6.tc); ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; case ICE_FLTR_PTYPE_NONF_IPV6_OTHER: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, @@ -708,6 +726,7 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, ice_pkt_insert_u8(loc, ICE_IPV6_HLIM_OFFSET, input->ip.v6.hlim); ice_pkt_insert_u8(loc, ICE_IPV6_PROTO_OFFSET, input->ip.v6.proto); + ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; default: return ICE_ERR_PARAM; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 16/30] net/ice/base: update FW API minor version 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (14 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 15/30] net/ice/base: add dest MAC field support for FDIR Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 17/30] net/ice/base: enable symmetric hash for RSS Qi Zhang ` (14 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Kevin Scott, Paul M Stillwell Jr Update FW API minor version to align to current value advertised by FW in NVM images. Signed-off-by: Kevin Scott <kevin.c.scott@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_controlq.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_controlq.h b/drivers/net/ice/base/ice_controlq.h index 8ad7857c8..8b6046547 100644 --- a/drivers/net/ice/base/ice_controlq.h +++ b/drivers/net/ice/base/ice_controlq.h @@ -23,7 +23,7 @@ */ #define EXP_FW_API_VER_BRANCH 0x00 #define EXP_FW_API_VER_MAJOR 0x01 -#define EXP_FW_API_VER_MINOR 0x03 +#define EXP_FW_API_VER_MINOR 0x05 /* Different control queue types: These are mainly for SW consumption. */ enum ice_ctl_q { -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 17/30] net/ice/base: enable symmetric hash for RSS 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (15 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 16/30] net/ice/base: update FW API minor version Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 18/30] net/ice/base: replace alloc-followed-by-copy with memdup Qi Zhang ` (13 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr Add parameter "symm" to rss configuration APIs. When symm is 1, Symmetric Teoplitz Hash can be enabled by configuring GLQF_HSYMM properly. NOTE: Symmetric Teoplitz hash will work only if hash schema of VSIQF_HASH_CTL be configured to 01b and it is assumed be enabled in PMD. Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> --- drivers/net/ice/base/ice_flow.c | 149 +++++++++++++++++++++++++++++++++++++--- drivers/net/ice/base/ice_flow.h | 5 +- drivers/net/ice/ice_ethdev.c | 16 ++--- 3 files changed, 150 insertions(+), 20 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index d91922527..e0e4fcab6 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -1876,6 +1876,7 @@ ice_add_rss_list(struct ice_hw *hw, u16 vsi_handle, struct ice_flow_prof *prof) rss_cfg->hashed_flds = prof->segs[prof->segs_cnt - 1].match; rss_cfg->packet_hdr = prof->segs[prof->segs_cnt - 1].hdrs; + rss_cfg->symm = prof->cfg.symm; ice_set_bit(vsi_handle, rss_cfg->vsis); LIST_ADD_TAIL(&rss_cfg->l_entry, &hw->rss_list_head); @@ -1903,6 +1904,107 @@ ice_add_rss_list(struct ice_hw *hw, u16 vsi_handle, struct ice_flow_prof *prof) (((u64)(hdr) << ICE_FLOW_PROF_HDR_S) & ICE_FLOW_PROF_HDR_M) | \ ((u8)((segs_cnt) - 1) ? ICE_FLOW_PROF_ENCAP_M : 0)) +static void +ice_rss_config_xor_word(struct ice_hw *hw, u8 prof_id, u8 src, u8 dst) +{ + u32 s = ((src % 4) << 3); /* byte shift */ + u32 v = dst | 0x80; /* value to program */ + u8 i = src / 4; /* register index */ + u32 reg; + + reg = rd32(hw, GLQF_HSYMM(prof_id, i)); + reg = (reg & ~(0xff << s)) | (v << s); + wr32(hw, GLQF_HSYMM(prof_id, i), reg); +} + +static void +ice_rss_config_xor(struct ice_hw *hw, u8 prof_id, u8 src, u8 dst, u8 len) +{ + int fv_last_word = + ICE_FLOW_SW_FIELD_VECTOR_MAX / ICE_FLOW_FV_EXTRACT_SZ - 1; + int i; + + for (i = 0; i < len; i++) { + ice_rss_config_xor_word(hw, prof_id, + /* Yes, field vector in GLQF_HSYMM and + * GLQF_HINSET is inversed! + */ + fv_last_word - (src + i), + fv_last_word - (dst + i)); + ice_rss_config_xor_word(hw, prof_id, + fv_last_word - (dst + i), + fv_last_word - (src + i)); + } +} + +static void +ice_rss_update_symm(struct ice_hw *hw, + struct ice_flow_prof *prof) +{ + struct ice_prof_map *map; + u8 prof_id, m; + + map = ice_search_prof_id(hw, ICE_BLK_RSS, prof->id); + prof_id = map->prof_id; + + /* clear to default */ + for (m = 0; m < 6; m++) + wr32(hw, GLQF_HSYMM(prof_id, m), 0); + if (prof->cfg.symm) { + struct ice_flow_seg_info *seg = + &prof->segs[prof->segs_cnt - 1]; + + struct ice_flow_seg_xtrct *ipv4_src = + &seg->fields[ICE_FLOW_FIELD_IDX_IPV4_SA].xtrct; + struct ice_flow_seg_xtrct *ipv4_dst = + &seg->fields[ICE_FLOW_FIELD_IDX_IPV4_DA].xtrct; + struct ice_flow_seg_xtrct *ipv6_src = + &seg->fields[ICE_FLOW_FIELD_IDX_IPV6_SA].xtrct; + struct ice_flow_seg_xtrct *ipv6_dst = + &seg->fields[ICE_FLOW_FIELD_IDX_IPV6_DA].xtrct; + + struct ice_flow_seg_xtrct *tcp_src = + &seg->fields[ICE_FLOW_FIELD_IDX_TCP_SRC_PORT].xtrct; + struct ice_flow_seg_xtrct *tcp_dst = + &seg->fields[ICE_FLOW_FIELD_IDX_TCP_DST_PORT].xtrct; + + struct ice_flow_seg_xtrct *udp_src = + &seg->fields[ICE_FLOW_FIELD_IDX_UDP_SRC_PORT].xtrct; + struct ice_flow_seg_xtrct *udp_dst = + &seg->fields[ICE_FLOW_FIELD_IDX_UDP_DST_PORT].xtrct; + + struct ice_flow_seg_xtrct *sctp_src = + &seg->fields[ICE_FLOW_FIELD_IDX_SCTP_SRC_PORT].xtrct; + struct ice_flow_seg_xtrct *sctp_dst = + &seg->fields[ICE_FLOW_FIELD_IDX_SCTP_DST_PORT].xtrct; + + /* xor IPv4 */ + if (ipv4_src->prot_id != 0 && ipv4_dst->prot_id != 0) + ice_rss_config_xor(hw, prof_id, + ipv4_src->idx, ipv4_dst->idx, 2); + + /* xor IPv6 */ + if (ipv6_src->prot_id != 0 && ipv6_dst->prot_id != 0) + ice_rss_config_xor(hw, prof_id, + ipv6_src->idx, ipv6_dst->idx, 8); + + /* xor TCP */ + if (tcp_src->prot_id != 0 && tcp_dst->prot_id != 0) + ice_rss_config_xor(hw, prof_id, + tcp_src->idx, tcp_dst->idx, 1); + + /* xor UDP */ + if (udp_src->prot_id != 0 && udp_dst->prot_id != 0) + ice_rss_config_xor(hw, prof_id, + udp_src->idx, udp_dst->idx, 1); + + /* xor SCTP */ + if (sctp_src->prot_id != 0 && sctp_dst->prot_id != 0) + ice_rss_config_xor(hw, prof_id, + sctp_src->idx, sctp_dst->idx, 1); + } +} + /** * ice_add_rss_cfg_sync - add an RSS configuration * @hw: pointer to the hardware structure @@ -1910,12 +2012,13 @@ ice_add_rss_list(struct ice_hw *hw, u16 vsi_handle, struct ice_flow_prof *prof) * @hashed_flds: hash bit fields (ICE_FLOW_HASH_*) to configure * @addl_hdrs: protocol header fields * @segs_cnt: packet segment count + * @symm: symmetric hash enable/disable * * Assumption: lock has already been acquired for RSS list */ static enum ice_status ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, - u32 addl_hdrs, u8 segs_cnt) + u32 addl_hdrs, u8 segs_cnt, bool symm) { const enum ice_block blk = ICE_BLK_RSS; struct ice_flow_prof *prof = NULL; @@ -1944,8 +2047,12 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, vsi_handle, ICE_FLOW_FIND_PROF_CHK_FLDS | ICE_FLOW_FIND_PROF_CHK_VSI); - if (prof) - goto exit; + if (prof) { + if (prof->cfg.symm == symm) + goto exit; + prof->cfg.symm = symm; + goto update_symm; + } /* Check if a flow profile exists with the same protocol headers and * associated with the input VSI. If so disasscociate the VSI from @@ -1976,9 +2083,18 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, vsi_handle, ICE_FLOW_FIND_PROF_CHK_FLDS); if (prof) { - status = ice_flow_assoc_prof(hw, blk, prof, vsi_handle); - if (!status) - status = ice_add_rss_list(hw, vsi_handle, prof); + if (prof->cfg.symm == symm) { + status = ice_flow_assoc_prof(hw, blk, prof, + vsi_handle); + if (!status) + status = ice_add_rss_list(hw, vsi_handle, + prof); + } else { + /* if a profile exist but with different symmetric + * requirement, just return error. + */ + status = ICE_ERR_NOT_SUPPORTED; + } goto exit; } @@ -2004,6 +2120,13 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, status = ice_add_rss_list(hw, vsi_handle, prof); + prof->cfg.symm = symm; + if (!symm) + goto exit; + +update_symm: + ice_rss_update_symm(hw, prof); + exit: ice_free(hw, segs); return status; @@ -2015,6 +2138,7 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, * @vsi_handle: software VSI handle * @hashed_flds: hash bit fields (ICE_FLOW_HASH_*) to configure * @addl_hdrs: protocol header fields + * @symm: symmetric hash enable/disable * * This function will generate a flow profile based on fields associated with * the input fields to hash on, the flow type and use the VSI number to add @@ -2022,7 +2146,7 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, */ enum ice_status ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, - u32 addl_hdrs) + u32 addl_hdrs, bool symm) { enum ice_status status; @@ -2032,10 +2156,11 @@ ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, ice_acquire_lock(&hw->rss_locks); status = ice_add_rss_cfg_sync(hw, vsi_handle, hashed_flds, addl_hdrs, - ICE_RSS_OUTER_HEADERS); + ICE_RSS_OUTER_HEADERS, symm); if (!status) status = ice_add_rss_cfg_sync(hw, vsi_handle, hashed_flds, - addl_hdrs, ICE_RSS_INNER_HEADERS); + addl_hdrs, ICE_RSS_INNER_HEADERS, + symm); ice_release_lock(&hw->rss_locks); return status; @@ -2148,13 +2273,15 @@ enum ice_status ice_replay_rss_cfg(struct ice_hw *hw, u16 vsi_handle) status = ice_add_rss_cfg_sync(hw, vsi_handle, r->hashed_flds, r->packet_hdr, - ICE_RSS_OUTER_HEADERS); + ICE_RSS_OUTER_HEADERS, + r->symm); if (status) break; status = ice_add_rss_cfg_sync(hw, vsi_handle, r->hashed_flds, r->packet_hdr, - ICE_RSS_INNER_HEADERS); + ICE_RSS_INNER_HEADERS, + r->symm); if (status) break; } diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h index 3afd201c4..6f26f3935 100644 --- a/drivers/net/ice/base/ice_flow.h +++ b/drivers/net/ice/base/ice_flow.h @@ -315,6 +315,8 @@ struct ice_flow_prof { /* struct sw_recipe */ /* struct fd */ u32 data; + /* Symmetric Hash for RSS */ + bool symm; } cfg; /* Default actions */ @@ -327,6 +329,7 @@ struct ice_rss_cfg { ice_declare_bitmap(vsis, ICE_MAX_VSI); u64 hashed_flds; u32 packet_hdr; + bool symm; }; enum ice_flow_action_type { @@ -402,7 +405,7 @@ ice_add_avf_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds); enum ice_status ice_rem_vsi_rss_cfg(struct ice_hw *hw, u16 vsi_handle); enum ice_status ice_add_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, - u32 addl_hdrs); + u32 addl_hdrs, bool symm); enum ice_status ice_rem_rss_cfg(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, u32 addl_hdrs); diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c index 63997fdfb..ccd64f49f 100644 --- a/drivers/net/ice/ice_ethdev.c +++ b/drivers/net/ice/ice_ethdev.c @@ -1790,50 +1790,50 @@ static int ice_init_rss(struct ice_pf *pf) /* configure RSS for IPv4 with input set IPv4 src/dst */ ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV4, - ICE_FLOW_SEG_HDR_IPV4); + ICE_FLOW_SEG_HDR_IPV4, 0); if (ret) PMD_DRV_LOG(ERR, "%s IPV4 rss flow fail %d", __func__, ret); /* configure RSS for IPv6 with input set IPv6 src/dst */ ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV6, - ICE_FLOW_SEG_HDR_IPV6); + ICE_FLOW_SEG_HDR_IPV6, 0); if (ret) PMD_DRV_LOG(ERR, "%s IPV6 rss flow fail %d", __func__, ret); /* configure RSS for tcp6 with input set IPv6 src/dst, TCP src/dst */ ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_TCP_IPV6, - ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV6); + ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV6, 0); if (ret) PMD_DRV_LOG(ERR, "%s TCP_IPV6 rss flow fail %d", __func__, ret); /* configure RSS for udp6 with input set IPv6 src/dst, UDP src/dst */ ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_UDP_IPV6, - ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV6); + ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV6, 0); if (ret) PMD_DRV_LOG(ERR, "%s UDP_IPV6 rss flow fail %d", __func__, ret); /* configure RSS for sctp6 with input set IPv6 src/dst */ ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV6, - ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV6); + ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV6, 0); if (ret) PMD_DRV_LOG(ERR, "%s SCTP_IPV6 rss flow fail %d", __func__, ret); /* configure RSS for tcp4 with input set IP src/dst, TCP src/dst */ ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_TCP_IPV4, - ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV4); + ICE_FLOW_SEG_HDR_TCP | ICE_FLOW_SEG_HDR_IPV4, 0); if (ret) PMD_DRV_LOG(ERR, "%s TCP_IPV4 rss flow fail %d", __func__, ret); /* configure RSS for udp4 with input set IP src/dst, UDP src/dst */ ret = ice_add_rss_cfg(hw, vsi->idx, ICE_HASH_UDP_IPV4, - ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV4); + ICE_FLOW_SEG_HDR_UDP | ICE_FLOW_SEG_HDR_IPV4, 0); if (ret) PMD_DRV_LOG(ERR, "%s UDP_IPV4 rss flow fail %d", __func__, ret); /* configure RSS for sctp4 with input set IP src/dst */ ret = ice_add_rss_cfg(hw, vsi->idx, ICE_FLOW_HASH_IPV4, - ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV4); + ICE_FLOW_SEG_HDR_SCTP | ICE_FLOW_SEG_HDR_IPV4, 0); if (ret) PMD_DRV_LOG(ERR, "%s SCTP_IPV4 rss flow fail %d", __func__, ret); -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 18/30] net/ice/base: replace alloc-followed-by-copy with memdup 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (16 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 17/30] net/ice/base: enable symmetric hash for RSS Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 19/30] net/ice/base: add FDIR support for GTPU qfi field Qi Zhang ` (12 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Bruce Allan, Paul M Stillwell Jr ice_memdup() is preferred over an alloc immediately followed by a copy. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flex_pipe.c | 5 ++--- drivers/net/ice/base/ice_switch.c | 7 ++----- 2 files changed, 4 insertions(+), 8 deletions(-) diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 05cd39b17..76c26fd4e 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -4939,12 +4939,11 @@ ice_get_profs_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, struct ice_vsig_prof *p; /* copy to the input list */ - p = (struct ice_vsig_prof *)ice_malloc(hw, sizeof(*p)); + p = (struct ice_vsig_prof *)ice_memdup(hw, ent1, sizeof(*p), + ICE_NONDMA_TO_NONDMA); if (!p) goto err_ice_get_profs_vsig; - ice_memcpy(p, ent1, sizeof(*p), ICE_NONDMA_TO_NONDMA); - LIST_ADD_TAIL(&p->list, lst); } diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 64c2aec19..62ccf533c 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -623,14 +623,11 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid, recps[rid].big_recp = (num_recps > 1); recps[rid].n_grp_count = num_recps; recps[rid].root_buf = (struct ice_aqc_recipe_data_elem *) - ice_calloc(hw, recps[rid].n_grp_count, - sizeof(struct ice_aqc_recipe_data_elem)); + ice_memdup(hw, tmp, recps[rid].n_grp_count * + sizeof(*recps[rid].root_buf), ICE_NONDMA_TO_NONDMA); if (!recps[rid].root_buf) goto err_unroll; - ice_memcpy(recps[rid].root_buf, tmp, recps[rid].n_grp_count * - sizeof(*recps[rid].root_buf), ICE_NONDMA_TO_NONDMA); - /* Copy result indexes */ ice_memcpy(recps[rid].res_idxs, result_bm, sizeof(recps[rid].res_idxs), ICE_NONDMA_TO_NONDMA); -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 19/30] net/ice/base: add FDIR support for GTPU qfi field 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (17 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 18/30] net/ice/base: replace alloc-followed-by-copy with memdup Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 20/30] net/ice/base: fix the bitmap for TCP in RSS Qi Zhang ` (11 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Add GTPU qfi field support for flow director. Note that for GTPU pkt, only qfi field (6 bits) can be set for FD. The supported GTPU pkts are defined as: ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP, ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP, ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP, ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER (FRAG and PAY belong to this) Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 111 ++++++++++++++++++++++++++++++++++++++++ drivers/net/ice/base/ice_fdir.h | 22 ++++++++ drivers/net/ice/base/ice_type.h | 4 ++ 3 files changed, 137 insertions(+) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index 3a2175b30..219588c46 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -42,6 +42,66 @@ static const u8 ice_fdir_ipv4_pkt[] = { 0x00, 0x00 }; +static const u8 ice_fdir_udp4_gtpu4_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x4c, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x08, 0x68, 0x08, 0x68, 0x00, 0x00, + 0x00, 0x00, 0x34, 0xff, 0x00, 0x28, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x02, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x45, 0x00, + 0x00, 0x1c, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, +}; + +static const u8 ice_fdir_tcp4_gtpu4_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x58, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x08, 0x68, 0x08, 0x68, 0x00, 0x00, + 0x00, 0x00, 0x34, 0xff, 0x00, 0x28, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x02, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x45, 0x00, + 0x00, 0x28, 0x00, 0x00, 0x40, 0x00, 0x40, 0x06, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, +}; + +static const u8 ice_fdir_icmp4_gtpu4_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x4c, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x08, 0x68, 0x08, 0x68, 0x00, 0x00, + 0x00, 0x00, 0x34, 0xff, 0x00, 0x28, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x02, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x45, 0x00, + 0x00, 0x1c, 0x00, 0x00, 0x40, 0x00, 0x40, 0x01, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, +}; + +static const u8 ice_fdir_ipv4_gtpu4_pkt[] = { + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x08, 0x00, 0x45, 0x00, + 0x00, 0x44, 0x00, 0x00, 0x40, 0x00, 0x40, 0x11, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, 0x08, 0x68, 0x08, 0x68, 0x00, 0x00, + 0x00, 0x00, 0x34, 0xff, 0x00, 0x28, 0x00, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x85, 0x02, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x45, 0x00, + 0x00, 0x14, 0x00, 0x00, 0x40, 0x00, 0x40, 0x00, + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + 0x00, 0x00, +}; + static const u8 ice_fdir_tcpv6_pkt[] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x86, 0xDD, 0x60, 0x00, @@ -241,6 +301,34 @@ static const struct ice_fdir_base_pkt ice_fdir_pkt[] = { sizeof(ice_fdir_ip4_tun_pkt), ice_fdir_ip4_tun_pkt, }, { + ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP, + sizeof(ice_fdir_udp4_gtpu4_pkt), + ice_fdir_udp4_gtpu4_pkt, + sizeof(ice_fdir_udp4_gtpu4_pkt), + ice_fdir_udp4_gtpu4_pkt, + }, + { + ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP, + sizeof(ice_fdir_tcp4_gtpu4_pkt), + ice_fdir_tcp4_gtpu4_pkt, + sizeof(ice_fdir_tcp4_gtpu4_pkt), + ice_fdir_tcp4_gtpu4_pkt, + }, + { + ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP, + sizeof(ice_fdir_icmp4_gtpu4_pkt), + ice_fdir_icmp4_gtpu4_pkt, + sizeof(ice_fdir_icmp4_gtpu4_pkt), + ice_fdir_icmp4_gtpu4_pkt, + }, + { + ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER, + sizeof(ice_fdir_ipv4_gtpu4_pkt), + ice_fdir_ipv4_gtpu4_pkt, + sizeof(ice_fdir_ipv4_gtpu4_pkt), + ice_fdir_ipv4_gtpu4_pkt, + }, + { ICE_FLTR_PTYPE_NONF_IPV6_TCP, sizeof(ice_fdir_tcpv6_pkt), ice_fdir_tcpv6_pkt, sizeof(ice_fdir_tcp6_tun_pkt), ice_fdir_tcp6_tun_pkt, @@ -488,6 +576,22 @@ static void ice_pkt_insert_ipv6_addr(u8 *pkt, int offset, __be32 *addr) } /** + * ice_pkt_insert_u6_qfi - insert a u6 value qfi into a memory buffer for gtpu + * @pkt: packet buffer + * @offset: offset into buffer + * @data: 8 bit value to convert and insert into pkt at offset + * + * This function is designed for inserting qfi (6 bits) for gtpu. + */ +static void ice_pkt_insert_u6_qfi(u8 *pkt, int offset, u8 data) +{ + u8 ret; + + ret = (data & 0x3F) + (*(pkt + offset) & 0xC0); + ice_memcpy(pkt + offset, &ret, sizeof(ret), ICE_NONDMA_TO_NONDMA); +} + +/** * ice_pkt_insert_u8 - insert a u8 value into a memory buffer. * @pkt: packet buffer * @offset: offset into buffer @@ -678,6 +782,13 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, input->ip.v4.proto); ice_pkt_insert_mac_addr(loc, input->ext_data.dst_mac); break; + case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP: + case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP: + case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP: + case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER: + ice_pkt_insert_u6_qfi(loc, ICE_IPV4_GTPU_QFI_OFFSET, + input->gtpu_data.qfi); + break; case ICE_FLTR_PTYPE_NONF_IPV6_TCP: ice_pkt_insert_ipv6_addr(loc, ICE_IPV6_DST_ADDR_OFFSET, input->ip.v6.dst_ip); diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index 007f6dd8f..22e5bcf8c 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -87,6 +87,7 @@ enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw); #define ICE_IPV6_TC_OFFSET 14 #define ICE_IPV6_HLIM_OFFSET 21 #define ICE_IPV6_PROTO_OFFSET 20 +#define ICE_IPV4_GTPU_QFI_OFFSET 56 #define ICE_FDIR_MAX_FLTRS 16384 @@ -146,6 +147,24 @@ struct ice_fdir_v6 { u8 hlim; }; +struct ice_fdir_udp_gtp { + u8 flags; + u8 msg_type; + u16 rsrvd_len; + u32 teid; + u16 rsrvd_seq_nbr; + u8 rsrvd_n_pdu_nbr; + u8 rsrvd_next_ext_type; + u8 rsvrd_ext_len; + u8 pdu_type:4, + spare:4; + u8 ppp:1, + rqi:1, + qfi:6; + u32 rsvrd; + u8 next_ext; +}; + struct ice_fdir_extra { u8 dst_mac[ETH_ALEN]; /* dest MAC address */ u32 usr_def[2]; /* user data */ @@ -162,6 +181,9 @@ struct ice_fdir_fltr { struct ice_fdir_v6 v6; } ip, mask; + struct ice_fdir_udp_gtp gtpu_data; + struct ice_fdir_udp_gtp gtpu_mask; + struct ice_fdir_extra ext_data; struct ice_fdir_extra ext_mask; diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index 7d0a4f63f..500b88461 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -288,6 +288,10 @@ enum ice_fltr_ptype { ICE_FLTR_PTYPE_NONF_IPV4_TCP, ICE_FLTR_PTYPE_NONF_IPV4_SCTP, ICE_FLTR_PTYPE_NONF_IPV4_OTHER, + ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_UDP, + ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP, + ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP, + ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER, ICE_FLTR_PTYPE_FRAG_IPV4, ICE_FLTR_PTYPE_NONF_IPV6_UDP, ICE_FLTR_PTYPE_NONF_IPV6_TCP, -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 20/30] net/ice/base: fix the bitmap for TCP in RSS 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (18 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 19/30] net/ice/base: add FDIR support for GTPU qfi field Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 21/30] net/ice/base: fix segment in remove existing RSS rule Qi Zhang ` (10 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, stable, Zhirun Yan, Paul M Stillwell Jr Before this patch, if set rule for IPv4 first and then set rule for TCP with IPv4. The first rule for inner IP will be overwritten by TCP rule. This is because MAC_IPV6_TUN_MAC_IPV4_PAY using the same ptgs PTG_TUN_INNER_IPV4_OTHER with MAC_IPV4_TUN_MAC_IPV4_PAY, this ptype should not in TCP bitmap. Remove this bit in TCP bitmap. Fixes: aa1cd410fa64 ("net/ice/base: add flow module") Cc: stable@dpdk.org Signed-off-by: Zhirun Yan <zhirun.yan@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index e0e4fcab6..6782dfaa8 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -239,7 +239,7 @@ static const u32 ice_ptypes_udp_il[] = { /* Packet types for packets with an Innermost/Last TCP header */ static const u32 ice_ptypes_tcp_il[] = { - 0x04000000, 0x80810102, 0x10204040, 0x42040408, + 0x04000000, 0x80810102, 0x10204040, 0x02040408, 0x00810102, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00820000, 0x21084000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 21/30] net/ice/base: fix segment in remove existing RSS rule 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (19 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 20/30] net/ice/base: fix the bitmap for TCP in RSS Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 22/30] net/ice/base: remove unused DDP package macros Qi Zhang ` (9 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Zhirun Yan, Paul M Stillwell Jr Before this patch, RSS tunneled rules can not be destroyed at runtime. This is because it can not find the existing matching profile for tunnels. segs[0] should always be zero and all matched, segs[1] for inner part. It only construct one segment. This patch modifies construct segment in ice_rem_rss_cfg_sync() to match ice_add_rss_cfg_sync(). Fixes: 75bc2ea04af4 ("net/ice/base: packet encapsulation for RSS") Signed-off-by: Zhirun Yan <zhirun.yan@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 6 ++++-- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 6782dfaa8..f9c65d6a2 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -2185,12 +2185,14 @@ ice_rem_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds, struct ice_flow_prof *prof; enum ice_status status; - segs = (struct ice_flow_seg_info *)ice_malloc(hw, sizeof(*segs)); + segs = (struct ice_flow_seg_info *)ice_calloc(hw, segs_cnt, + sizeof(*segs)); if (!segs) return ICE_ERR_NO_MEMORY; /* Construct the packet segment info from the hashed fields */ - status = ice_flow_set_rss_seg_info(segs, hashed_flds, addl_hdrs); + status = ice_flow_set_rss_seg_info(&segs[segs_cnt - 1], hashed_flds, + addl_hdrs); if (status) goto out; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 22/30] net/ice/base: remove unused DDP package macros 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (20 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 21/30] net/ice/base: fix segment in remove existing RSS rule Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 23/30] net/ice/base: search field vector indices for result slots Qi Zhang ` (8 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Bruce Allan, Paul M Stillwell Jr Macros no longer be used and can be removed Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_type.h | 5 ----- 1 file changed, 5 deletions(-) diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index 500b88461..8322d88a0 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -835,11 +835,6 @@ struct ice_hw { /* tunneling info */ struct ice_tunnel_table tnl; -#define ICE_PKG_FILENAME "package_file" -#define ICE_PKG_FILENAME_EXT "pkg" -#define ICE_PKG_FILE_MAJ_VER 1 -#define ICE_PKG_FILE_MIN_VER 0 - /* HW block tables */ struct ice_blk_info blk[ICE_BLK_COUNT]; struct ice_lock fl_profs_locks[ICE_BLK_COUNT]; /* lock fltr profiles */ -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 23/30] net/ice/base: search field vector indices for result slots 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (21 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 22/30] net/ice/base: remove unused DDP package macros Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 24/30] net/ice/base: fix 4 bytes alignment for pppoe dummy packet Qi Zhang ` (7 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowline, Paul M Stillwell Jr Previously, switch code would use only pre-reserved index slots at the end of each field vector for recipe result index locations. This patch adds code that detects other internal empty index slots that could potentially be used. For each recipe that is added, a determ ination is made as to whether any of these additional index slots alige with all the profiles selected for the recipe; if alignment is achieved, then these result index slots can be used. Signed-off-by: Dan Nowline <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flex_pipe.c | 41 +++++++++++++++++++++ drivers/net/ice/base/ice_flex_pipe.h | 2 ++ drivers/net/ice/base/ice_flex_type.h | 2 ++ drivers/net/ice/base/ice_protocol_type.h | 2 +- drivers/net/ice/base/ice_switch.c | 61 +++++++++++++++----------------- drivers/net/ice/base/ice_switch.h | 1 - drivers/net/ice/base/ice_type.h | 3 ++ 7 files changed, 78 insertions(+), 34 deletions(-) diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 76c26fd4e..318168910 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -1661,6 +1661,47 @@ ice_get_sw_fv_list(struct ice_hw *hw, u16 *prot_ids, u8 ids_cnt, } /** + * ice_init_profile_to_result_bm - Initialize the profile result index bitmap + * @hw: pointer to hardware structure + */ +void +ice_init_prof_result_bm(struct ice_hw *hw) +{ + struct ice_pkg_enum state; + struct ice_seg *ice_seg; + struct ice_fv *fv; + + if (!hw->seg) + return; + + ice_seg = hw->seg; + do { + u32 off; + u16 i; + + fv = (struct ice_fv *) + ice_pkg_enum_entry(ice_seg, &state, ICE_SID_FLD_VEC_SW, + &off, ice_sw_fv_handler); + ice_seg = NULL; + if (!fv) + break; + + ice_zero_bitmap(hw->switch_info->prof_res_bm[off], + ICE_MAX_FV_WORDS); + + /* Determine empty field vector indices, these can be + * used for recipe results. Skip index 0, since it is + * always used for Switch ID. + */ + for (i = 1; i < ICE_MAX_FV_WORDS; i++) + if (fv->ew[i].prot_id == ICE_PROT_INVALID && + fv->ew[i].off == ICE_FV_OFFSET_INVAL) + ice_set_bit(i, + hw->switch_info->prof_res_bm[off]); + } while (fv); +} + +/** * ice_pkg_buf_free * @hw: pointer to the HW structure * @bld: pointer to pkg build (allocated by ice_pkg_buf_alloc()) diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h index 137eaa7f8..e7d42e3de 100644 --- a/drivers/net/ice/base/ice_flex_pipe.h +++ b/drivers/net/ice/base/ice_flex_pipe.h @@ -33,6 +33,8 @@ ice_find_label_value(struct ice_seg *ice_seg, char const *name, u32 type, void ice_get_sw_fv_bitmap(struct ice_hw *hw, enum ice_prof_type type, ice_bitmap_t *bm); +void +ice_init_prof_result_bm(struct ice_hw *hw); enum ice_status ice_get_sw_fv_list(struct ice_hw *hw, u16 *prot_ids, u8 ids_cnt, ice_bitmap_t *bm, struct LIST_HEAD_TYPE *fv_list); diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h index c30d407c2..48c1e5184 100644 --- a/drivers/net/ice/base/ice_flex_type.h +++ b/drivers/net/ice/base/ice_flex_type.h @@ -16,6 +16,8 @@ struct ice_fv_word { }; #pragma pack() +#define ICE_MAX_NUM_PROFILES 256 + #define ICE_MAX_FV_WORDS 48 struct ice_fv { struct ice_fv_word ew[ICE_MAX_FV_WORDS]; diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h index c6caa8562..98185c9de 100644 --- a/drivers/net/ice/base/ice_protocol_type.h +++ b/drivers/net/ice/base/ice_protocol_type.h @@ -110,7 +110,7 @@ enum ice_prot_id { ICE_PROT_ARP_OF = 118, ICE_PROT_EAPOL_OF = 120, ICE_PROT_META_ID = 255, /* when offset == metaddata */ - ICE_PROT_INVALID = 255 /* when offset == 0xFF */ + ICE_PROT_INVALID = 255 /* when offset == ICE_FV_OFFSET_INVAL */ }; #define ICE_VNI_OFFSET 12 /* offset of VNI from ICE_PROT_UDP_OF */ diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 62ccf533c..9681d9590 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -467,21 +467,6 @@ static void ice_collect_result_idx(struct ice_aqc_recipe_data_elem *buf, } /** - * ice_init_possible_res_bm - initialize possible result bitmap - * @pos_result_bm: pointer to the bitmap to initialize - */ -static void ice_init_possible_res_bm(ice_bitmap_t *pos_result_bm) -{ - u16 bit; - - ice_zero_bitmap(pos_result_bm, ICE_MAX_FV_WORDS); - - for (bit = 0; bit < ICE_MAX_FV_WORDS; bit++) - if (ICE_POSSIBLE_RES_IDX & BIT_ULL(bit)) - ice_set_bit(bit, pos_result_bm); -} - -/** * ice_get_recp_frm_fw - update SW bookkeeping from FW recipe entries * @hw: pointer to hardware structure * @recps: struct that we need to populate @@ -496,7 +481,6 @@ static enum ice_status ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid, bool *refresh_required) { - ice_declare_bitmap(possible_idx, ICE_MAX_FV_WORDS); ice_declare_bitmap(result_bm, ICE_MAX_FV_WORDS); struct ice_aqc_recipe_data_elem *tmp; u16 num_recps = ICE_MAX_NUM_RECIPES; @@ -505,7 +489,6 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid, enum ice_status status; ice_zero_bitmap(result_bm, ICE_MAX_FV_WORDS); - ice_init_possible_res_bm(possible_idx); /* we need a buffer big enough to accommodate all the recipes */ tmp = (struct ice_aqc_recipe_data_elem *)ice_calloc(hw, @@ -541,7 +524,7 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid, for (sub_recps = 0; sub_recps < num_recps; sub_recps++) { struct ice_aqc_recipe_data_elem root_bufs = tmp[sub_recps]; struct ice_recp_grp_entry *rg_entry; - u8 prof_id, idx, prot = 0; + u8 prof, idx, prot = 0; bool is_root; u16 off = 0; @@ -561,8 +544,8 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid, ~ICE_AQ_RECIPE_RESULT_EN, result_bm); /* get the first profile that is associated with rid */ - prof_id = ice_find_first_bit(recipe_to_profile[idx], - ICE_MAX_NUM_PROFILES); + prof = ice_find_first_bit(recipe_to_profile[idx], + ICE_MAX_NUM_PROFILES); for (i = 0; i < ICE_NUM_WORDS_RECIPE; i++) { u8 lkup_indx = root_bufs.content.lkup_indx[i + 1]; @@ -579,12 +562,13 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid, * has ICE_AQ_RECIPE_LKUP_IGNORE or 0 since it isn't a * valid offset value. */ - if (ice_is_bit_set(possible_idx, rg_entry->fv_idx[i]) || + if (ice_is_bit_set(hw->switch_info->prof_res_bm[prof], + rg_entry->fv_idx[i]) || rg_entry->fv_idx[i] & ICE_AQ_RECIPE_LKUP_IGNORE || rg_entry->fv_idx[i] == 0) continue; - ice_find_prot_off(hw, ICE_BLK_SW, prof_id, + ice_find_prot_off(hw, ICE_BLK_SW, prof, rg_entry->fv_idx[i], &prot, &off); lkup_exts->fv_words[fv_word_idx].prot_id = prot; lkup_exts->fv_words[fv_word_idx].off = off; @@ -4950,30 +4934,32 @@ ice_find_free_recp_res_idx(struct ice_hw *hw, const ice_bitmap_t *profiles, ice_bitmap_t *free_idx) { ice_declare_bitmap(possible_idx, ICE_MAX_FV_WORDS); - ice_declare_bitmap(used_idx, ICE_MAX_FV_WORDS); ice_declare_bitmap(recipes, ICE_MAX_NUM_RECIPES); + ice_declare_bitmap(used_idx, ICE_MAX_FV_WORDS); u16 count = 0; u16 bit; - ice_zero_bitmap(free_idx, ICE_MAX_FV_WORDS); - ice_zero_bitmap(used_idx, ICE_MAX_FV_WORDS); + ice_zero_bitmap(possible_idx, ICE_MAX_FV_WORDS); ice_zero_bitmap(recipes, ICE_MAX_NUM_RECIPES); - ice_init_possible_res_bm(possible_idx); + ice_zero_bitmap(used_idx, ICE_MAX_FV_WORDS); + ice_zero_bitmap(free_idx, ICE_MAX_FV_WORDS); - for (bit = 0; bit < ICE_MAX_FV_WORDS; bit++) - if (ICE_POSSIBLE_RES_IDX & BIT_ULL(bit)) - ice_set_bit(bit, possible_idx); + for (count = 0; count < ICE_MAX_FV_WORDS; count++) + ice_set_bit(count, possible_idx); /* For each profile we are going to associate the recipe with, add the * recipes that are associated with that profile. This will give us - * the set of recipes that our recipe may collide with. + * the set of recipes that our recipe may collide with. Also, determine + * what possible result indexes are usable given this set of profiles. */ bit = 0; while (ICE_MAX_NUM_PROFILES > (bit = ice_find_next_bit(profiles, ICE_MAX_NUM_PROFILES, bit))) { ice_or_bitmap(recipes, recipes, profile_to_recipe[bit], ICE_MAX_NUM_RECIPES); - + ice_and_bitmap(possible_idx, possible_idx, + hw->switch_info->prof_res_bm[bit], + ICE_MAX_FV_WORDS); bit++; } @@ -4981,14 +4967,16 @@ ice_find_free_recp_res_idx(struct ice_hw *hw, const ice_bitmap_t *profiles, * which indexes have been used. */ for (bit = 0; bit < ICE_MAX_NUM_RECIPES; bit++) - if (ice_is_bit_set(recipes, bit)) + if (ice_is_bit_set(recipes, bit)) { ice_or_bitmap(used_idx, used_idx, hw->switch_info->recp_list[bit].res_idxs, ICE_MAX_FV_WORDS); + } ice_xor_bitmap(free_idx, used_idx, possible_idx, ICE_MAX_FV_WORDS); /* return number of free indexes */ + count = 0; bit = 0; while (ICE_MAX_FV_WORDS > (bit = ice_find_next_bit(free_idx, ICE_MAX_FV_WORDS, bit))) { @@ -5029,6 +5017,9 @@ ice_add_sw_recipe(struct ice_hw *hw, struct ice_sw_recipe *rm, ice_zero_bitmap(result_idx_bm, ICE_MAX_FV_WORDS); free_res_idx = ice_find_free_recp_res_idx(hw, profiles, result_idx_bm); + ice_debug(hw, ICE_DBG_SW, "Result idx slots: %d, need %d\n", + free_res_idx, rm->n_grp_count); + if (rm->n_grp_count > 1) { if (rm->n_grp_count > free_res_idx) return ICE_ERR_MAX_LIMIT; @@ -6081,6 +6072,12 @@ ice_add_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, u32 act = 0; u8 q_rgn; + /* Initialize profile to result index bitmap */ + if (!hw->switch_info->prof_res_bm_init) { + hw->switch_info->prof_res_bm_init = 1; + ice_init_prof_result_bm(hw); + } + if (!lkups_cnt) return ICE_ERR_PARAM; diff --git a/drivers/net/ice/base/ice_switch.h b/drivers/net/ice/base/ice_switch.h index 0f0a1e98e..61083738a 100644 --- a/drivers/net/ice/base/ice_switch.h +++ b/drivers/net/ice/base/ice_switch.h @@ -222,7 +222,6 @@ struct ice_sw_recipe { /* Profiles this recipe should be associated with */ struct LIST_HEAD_TYPE fv_list; -#define ICE_MAX_NUM_PROFILES 256 /* Profiles this recipe is associated with */ u8 num_profs, *prof_ids; diff --git a/drivers/net/ice/base/ice_type.h b/drivers/net/ice/base/ice_type.h index 8322d88a0..a8e4229a1 100644 --- a/drivers/net/ice/base/ice_type.h +++ b/drivers/net/ice/base/ice_type.h @@ -730,6 +730,9 @@ struct ice_port_info { struct ice_switch_info { struct LIST_HEAD_TYPE vsi_list_map_head; struct ice_sw_recipe *recp_list; + u16 prof_res_bm_init; + + ice_declare_bitmap(prof_res_bm[ICE_MAX_NUM_PROFILES], ICE_MAX_FV_WORDS); }; /* Port hardware description */ -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 24/30] net/ice/base: fix 4 bytes alignment for pppoe dummy packet 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (22 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 23/30] net/ice/base: search field vector indices for result slots Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 25/30] net/ice/base: remove unnecessary error log Qi Zhang ` (6 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Add two bytes to meet the requirement of 4 bytes alignment for dummy packet for creating switch rule for PPPoE. Fixes: 032b6c617a96 ("net/ice/base: add support for GTP and PPPoE protocols") Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_switch.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 9681d9590..7681ba38b 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -441,6 +441,8 @@ dummy_pppoe_packet[] = { 0x00, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, + + 0x00, 0x00, /* 2 bytes for 4 byte alignment */ }; /* this is a recipe to profile association bitmap */ -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 25/30] net/ice/base: remove unnecessary error log 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (23 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 24/30] net/ice/base: fix 4 bytes alignment for pppoe dummy packet Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 26/30] net/ice/base: use bitmap copy where appropriate Qi Zhang ` (5 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Paul M Stillwell Jr Remove the error log message when attempting to download a package that has an unsupported version. Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flex_pipe.c | 16 ++++------------ 1 file changed, 4 insertions(+), 12 deletions(-) diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 318168910..11601f2c2 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -1284,7 +1284,6 @@ static void ice_init_pkg_regs(struct ice_hw *hw) /** * ice_chk_pkg_version - check package version for compatibility with driver - * @hw: pointer to the hardware structure * @pkg_ver: pointer to a version structure to check * * Check to make sure that the package about to be downloaded is compatible with @@ -1292,18 +1291,11 @@ static void ice_init_pkg_regs(struct ice_hw *hw) * version must match our ICE_PKG_SUPP_VER_MAJ and ICE_PKG_SUPP_VER_MNR * definitions. */ -static enum ice_status -ice_chk_pkg_version(struct ice_hw *hw, struct ice_pkg_ver *pkg_ver) +static enum ice_status ice_chk_pkg_version(struct ice_pkg_ver *pkg_ver) { if (pkg_ver->major != ICE_PKG_SUPP_VER_MAJ || - pkg_ver->minor != ICE_PKG_SUPP_VER_MNR) { - ice_info(hw, "ERROR: Incompatible package: %d.%d.%d.%d - requires package version: %d.%d.*.*\n", - pkg_ver->major, pkg_ver->minor, pkg_ver->update, - pkg_ver->draft, ICE_PKG_SUPP_VER_MAJ, - ICE_PKG_SUPP_VER_MNR); - + pkg_ver->minor != ICE_PKG_SUPP_VER_MNR) return ICE_ERR_NOT_SUPPORTED; - } return ICE_SUCCESS; } @@ -1358,7 +1350,7 @@ enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len) /* before downloading the package, check package version for * compatibility with driver */ - status = ice_chk_pkg_version(hw, &hw->pkg_ver); + status = ice_chk_pkg_version(&hw->pkg_ver); if (status) return status; @@ -1384,7 +1376,7 @@ enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buf, u32 len) if (!status) { status = ice_get_pkg_info(hw); if (!status) - status = ice_chk_pkg_version(hw, &hw->active_pkg_ver); + status = ice_chk_pkg_version(&hw->active_pkg_ver); } if (!status) { -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 26/30] net/ice/base: use bitmap copy where appropriate 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (24 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 25/30] net/ice/base: remove unnecessary error log Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 27/30] net/ice/base: fix alignment isue Qi Zhang ` (4 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Bruce Allan, Paul M Stillwell Jr ice_cp_bitmap() already exists and should be used instead of using ice_memcpy(). Note, there are a couple comments that suggest using a bitmap-specific copy function, but those are not correct since the source block of memory is not a bitmap. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_switch.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 7681ba38b..10dfc720a 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -615,8 +615,7 @@ ice_get_recp_frm_fw(struct ice_hw *hw, struct ice_sw_recipe *recps, u8 rid, goto err_unroll; /* Copy result indexes */ - ice_memcpy(recps[rid].res_idxs, result_bm, sizeof(recps[rid].res_idxs), - ICE_NONDMA_TO_NONDMA); + ice_cp_bitmap(recps[rid].res_idxs, result_bm, ICE_MAX_FV_WORDS); recps[rid].recp_created = true; err_unroll: @@ -645,8 +644,8 @@ ice_get_recp_to_prof_map(struct ice_hw *hw) ice_zero_bitmap(r_bitmap, ICE_MAX_NUM_RECIPES); if (ice_aq_get_recipe_to_profile(hw, i, (u8 *)r_bitmap, NULL)) continue; - ice_memcpy(profile_to_recipe[i], r_bitmap, - sizeof(profile_to_recipe[i]), ICE_NONDMA_TO_NONDMA); + ice_cp_bitmap(profile_to_recipe[i], r_bitmap, + ICE_MAX_NUM_RECIPES); for (j = 0; j < ICE_MAX_NUM_RECIPES; j++) if (ice_is_bit_set(r_bitmap, j)) ice_set_bit(i, recipe_to_profile[j]); @@ -5586,8 +5585,8 @@ ice_add_adv_recipe(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, goto err_unroll; /* Update profile to recipe bitmap array */ - ice_memcpy(profile_to_recipe[fvit->profile_id], r_bitmap, - sizeof(r_bitmap), ICE_NONDMA_TO_NONDMA); + ice_cp_bitmap(profile_to_recipe[fvit->profile_id], r_bitmap, + ICE_MAX_NUM_RECIPES); /* Update recipe to profile bitmap array */ for (j = 0; j < ICE_MAX_NUM_RECIPES; j++) -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 27/30] net/ice/base: fix alignment isue 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (25 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 26/30] net/ice/base: use bitmap copy where appropriate Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 28/30] net/ice/base: fix PTYPE bitmap Qi Zhang ` (3 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, stable, Tony Nguyen, Paul M Stillwell Jr As title says, fix an alignment issue. Fixes: 51d04e4933e3 ("net/ice/base: add flexible pipeline module") Cc: stable@dpdk.org Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flex_pipe.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 11601f2c2..0357fbd4e 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -131,8 +131,9 @@ static struct ice_buf_table *ice_find_buf_table(struct ice_seg *ice_seg) { struct ice_nvm_table *nvms; - nvms = (struct ice_nvm_table *)(ice_seg->device_table + - LE32_TO_CPU(ice_seg->device_table_count)); + nvms = (struct ice_nvm_table *) + (ice_seg->device_table + + LE32_TO_CPU(ice_seg->device_table_count)); return (_FORCE_ struct ice_buf_table *) (nvms->vers + LE32_TO_CPU(nvms->table_count)); -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 28/30] net/ice/base: fix PTYPE bitmap 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (26 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 27/30] net/ice/base: fix alignment isue Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 29/30] net/ice/base: add switch support for IPv6 tc field Qi Zhang ` (2 subsequent siblings) 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Zhirun Yan, Paul M Stillwell Jr Before this patch, IPv4 and UDP inner hash rule will be over written by later rules after RSS initialization phase. This is because the PTYPE bitmap table cover some PTYPEs belong to another PTGs. And some PTYPEs are reserved. Remove these PTYPEs in TCP, UDP, SCTP and ipv4 bitmap table. Fixes: aa1cd410fa64 ("net/ice/base: add flow module") Signed-off-by: Zhirun Yan <zhirun.yan@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 14 +++++++------- 1 file changed, 7 insertions(+), 7 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index f9c65d6a2..e03c5d0e7 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -177,9 +177,9 @@ static const u32 ice_ptypes_ipv4_ofos[] = { /* Packet types for packets with an Innermost/Last IPv4 header */ static const u32 ice_ptypes_ipv4_il[] = { - 0xE0000000, 0xB807700E, 0x8001DC03, 0xE01DC03B, - 0x0007700E, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x000FF800, 0x00000000, + 0xE0000000, 0xB807700E, 0x80000003, 0xE01DC03B, + 0x0000000E, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x001FF800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -227,8 +227,8 @@ static const u32 ice_ptypes_arp_of[] = { * packets with inner UDP. */ static const u32 ice_ptypes_udp_il[] = { - 0x81000000, 0x20204040, 0x04081010, 0x80810102, - 0x00204040, 0x00000000, 0x00000000, 0x00000000, + 0x81000000, 0x20204040, 0x04000010, 0x80810102, + 0x00200040, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00410000, 0x10842000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -239,7 +239,7 @@ static const u32 ice_ptypes_udp_il[] = { /* Packet types for packets with an Innermost/Last TCP header */ static const u32 ice_ptypes_tcp_il[] = { - 0x04000000, 0x80810102, 0x10204040, 0x02040408, + 0x04000000, 0x80810102, 0x10000040, 0x02040408, 0x00810102, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00820000, 0x21084000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -251,7 +251,7 @@ static const u32 ice_ptypes_tcp_il[] = { /* Packet types for packets with an Innermost/Last SCTP header */ static const u32 ice_ptypes_sctp_il[] = { - 0x08000000, 0x01020204, 0x20408081, 0x04080810, + 0x08000000, 0x01020204, 0x20000081, 0x04080810, 0x01020204, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01040000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 29/30] net/ice/base: add switch support for IPv6 tc field 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (27 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 28/30] net/ice/base: fix PTYPE bitmap Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 30/30] net/ice/base: remove unused code Qi Zhang 2019-09-23 9:31 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Yang, Qiming 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Add support for IPv6 traffic class (tc) field for switch rule. Correct ice_ipv6_hdr based on the IPv6 Protocol using bitfields. Add big/little endian convert for tc field before it is inserted, since tc is only one byte and also does not have a byte-aligned offset. Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_protocol_type.h | 6 +++--- drivers/net/ice/base/ice_switch.c | 13 +++++++++++++ 2 files changed, 16 insertions(+), 3 deletions(-) diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h index 98185c9de..f61345a7f 100644 --- a/drivers/net/ice/base/ice_protocol_type.h +++ b/drivers/net/ice/base/ice_protocol_type.h @@ -183,9 +183,9 @@ struct ice_ipv4_hdr { }; struct ice_ipv6_hdr { - u8 version; - u8 tc; - u16 flow_label; + u32 version:4; + u32 tc:8; + u32 flow_label:20; u16 payload_len; u8 next_hdr; u8 hop_limit; diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 10dfc720a..80afa74cd 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -5785,6 +5785,19 @@ ice_fill_adv_dummy_packet(struct ice_adv_lkup_elem *lkups, u16 lkups_cnt, break; case ICE_IPV6_OFOS: case ICE_IPV6_IL: + /* Based on the same mechanism below, if tc (Traffic + * Class) for IPv6 has mask, it means tc field is set. + * Since tc is only one byte, we have to handle the + * big/little endian issue before it can be inserted. + */ + if (lkups[i].m_u.ipv6_hdr.tc) { + ((u16 *)&lkups[i].h_u)[0] = + (((u16 *)&lkups[i].h_u)[0] << 8) | + (((u16 *)&lkups[i].h_u)[0] >> 8); + ((u16 *)&lkups[i].m_u)[0] = + (((u16 *)&lkups[i].m_u)[0] << 8) | + (((u16 *)&lkups[i].m_u)[0] >> 8); + } len = sizeof(struct ice_ipv6_hdr); break; case ICE_TCP_IL: -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v5 30/30] net/ice/base: remove unused code 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (28 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 29/30] net/ice/base: add switch support for IPv6 tc field Qi Zhang @ 2019-09-23 7:44 ` Qi Zhang 2019-09-23 9:31 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Yang, Qiming 30 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-23 7:44 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr Remove unused code. Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_common.c | 4 ---- drivers/net/ice/base/ice_common.h | 2 -- drivers/net/ice/base/ice_flex_pipe.c | 1 - drivers/net/ice/base/ice_flow.h | 3 --- 4 files changed, 10 deletions(-) diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index 16b91dc12..48ba160f7 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -1068,7 +1068,6 @@ ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx, return ice_copy_rxq_ctx_to_hw(hw, ctx_buf, rxq_index); } -#if !defined(NO_UNUSED_CTX_CODE) || defined(AE_DRIVER) /** * ice_clear_rxq_ctx * @hw: pointer to the hardware structure @@ -1089,7 +1088,6 @@ enum ice_status ice_clear_rxq_ctx(struct ice_hw *hw, u32 rxq_index) return ICE_SUCCESS; } -#endif /* !NO_UNUSED_CTX_CODE || AE_DRIVER */ /* LAN Tx Queue Context */ const struct ice_ctx_ele ice_tlan_ctx_info[] = { @@ -1125,7 +1123,6 @@ const struct ice_ctx_ele ice_tlan_ctx_info[] = { { 0 } }; -#if !defined(NO_UNUSED_CTX_CODE) || defined(AE_DRIVER) /** * ice_copy_tx_cmpltnq_ctx_to_hw * @hw: pointer to the hardware structure @@ -1306,7 +1303,6 @@ ice_clear_tx_drbell_q_ctx(struct ice_hw *hw, u32 tx_drbell_q_index) return ICE_SUCCESS; } -#endif /* !NO_UNUSED_CTX_CODE || AE_DRIVER */ /* FW Admin Queue command wrappers */ diff --git a/drivers/net/ice/base/ice_common.h b/drivers/net/ice/base/ice_common.h index bcb0a999d..c73184499 100644 --- a/drivers/net/ice/base/ice_common.h +++ b/drivers/net/ice/base/ice_common.h @@ -74,7 +74,6 @@ void ice_set_safe_mode_caps(struct ice_hw *hw); enum ice_status ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx, u32 rxq_index); -#if !defined(NO_UNUSED_CTX_CODE) || defined(AE_DRIVER) enum ice_status ice_clear_rxq_ctx(struct ice_hw *hw, u32 rxq_index); enum ice_status ice_clear_tx_cmpltnq_ctx(struct ice_hw *hw, u32 tx_cmpltnq_index); @@ -88,7 +87,6 @@ enum ice_status ice_write_tx_drbell_q_ctx(struct ice_hw *hw, struct ice_tx_drbell_q_ctx *tx_drbell_q_ctx, u32 tx_drbell_q_index); -#endif /* !NO_UNUSED_CTX_CODE || AE_DRIVER */ enum ice_status ice_aq_get_rss_lut(struct ice_hw *hw, u16 vsi_handle, u8 lut_type, u8 *lut, diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 0357fbd4e..75bb87079 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -2701,7 +2701,6 @@ ice_find_prof_id_with_mask(struct ice_hw *hw, enum ice_block blk, for (i = 0; i < es->count; i++) { u16 off = i * es->fvw; - u16 j; if (memcmp(&es->t[off], fv, es->fvw * sizeof(*fv))) continue; diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h index 6f26f3935..326ff6f81 100644 --- a/drivers/net/ice/base/ice_flow.h +++ b/drivers/net/ice/base/ice_flow.h @@ -362,9 +362,6 @@ struct ice_flow_action { } data; }; -/* TDD esp in the linux code doesn't like prototypes, so - * ifdef them all out, so they stop conflicting with our mocks - */ u64 ice_flow_find_prof(struct ice_hw *hw, enum ice_block blk, enum ice_flow_dir dir, struct ice_flow_seg_info *segs, u8 segs_cnt); -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* Re: [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch. 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang ` (29 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 30/30] net/ice/base: remove unused code Qi Zhang @ 2019-09-23 9:31 ` Yang, Qiming 2019-09-23 22:21 ` Ye Xiaolong 30 siblings, 1 reply; 166+ messages in thread From: Yang, Qiming @ 2019-09-23 9:31 UTC (permalink / raw) To: Zhang, Qi Z, Lu, Wenzhuo; +Cc: dev, Ye, Xiaolong > -----Original Message----- > From: Zhang, Qi Z > Sent: Monday, September 23, 2019 3:44 PM > To: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming > <qiming.yang@intel.com> > Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Zhang, Qi Z > <qi.z.zhang@intel.com> > Subject: [PATCH v5 00/30] net/ice/base: share code update secend batch. > > The patchset depends on the first batch > http://patchwork.dpdk.org/project/dpdk/list/?series=6158&state=* > > Key Features: > > 1) Add tunnel support for fdir > 2) Add non-word aligned field support for fdir > 3) Add dest mac field support for fdir > 4) Add flow count support for fdir > 5) Add queue region support for fdir > 6) Add vlan pppoe support for switch > 7) Add GTPU qif support for fdir > 8) Add symmetric hash support > 9) Couple RSS fixes > > v5: > - commit log typo fix > v4: > - couple bug fix and code clean. > v3: > - add features 7, 8, 9. > v2: > - add features 3, 4, 5, 6. > > *** BLURB HERE *** > > Qi Zhang (30): > net/ice/base: remove redundant empty lines > net/ice/base: add support for tunnel packets > net/ice/base: add non-word aligned ip field support > net/ice/base: add non-word aligned ipv6 field support > net/ice/base: correct the mask for checking protocol header > net/ice/base: propagate errors from functions > net/ice/base: remove pointless NULL check of port info > net/ice/base: remove RSS code as iavf host > net/ice/base: add support for switch rule about VLAN PPPoE > net/ice/base: minor structure refactor > net/ice/base: associate switch recipe to profiles > net/ice/base: enable RSS for PPPoE with SCTP > net/ice/base: enable fdir queue region > net/ice/base: enable setting up FDIR counters > net/ice/base: add dest MAC field support for FDIR > net/ice/base: update FW API minor version > net/ice/base: enable symmetric hash for RSS > net/ice/base: replace alloc-followed-by-copy with memdup > net/ice/base: add FDIR support for GTPU qfi field > net/ice/base: fix the bitmap for TCP in RSS > net/ice/base: fix segment in remove existing RSS rule > net/ice/base: remove unused DDP package macros > net/ice/base: search field vector indices for result slots > net/ice/base: fix 4 bytes alignment for pppoe dummy packet > net/ice/base: remove unnecessary error log > net/ice/base: use bitmap copy where appropriate > net/ice/base: fix alignment isue > net/ice/base: fix PTYPE bitmap > net/ice/base: add switch support for IPv6 tc field > net/ice/base: remove unused code > > drivers/net/ice/base/ice_adminq_cmd.h | 111 -------- > drivers/net/ice/base/ice_bitops.h | 2 - > drivers/net/ice/base/ice_common.c | 29 -- > drivers/net/ice/base/ice_common.h | 4 - > drivers/net/ice/base/ice_controlq.c | 9 - > drivers/net/ice/base/ice_controlq.h | 3 +- > drivers/net/ice/base/ice_devids.h | 1 - > drivers/net/ice/base/ice_fdir.c | 461 +++++++++++++++++++++++++++--- > - > drivers/net/ice/base/ice_fdir.h | 41 ++- > drivers/net/ice/base/ice_flex_pipe.c | 73 +++-- > drivers/net/ice/base/ice_flex_pipe.h | 3 +- > drivers/net/ice/base/ice_flex_type.h | 2 + > drivers/net/ice/base/ice_flow.c | 328 +++++++++++----------- > drivers/net/ice/base/ice_flow.h | 8 +- > drivers/net/ice/base/ice_hw_autogen.h | 2 - > drivers/net/ice/base/ice_lan_tx_rx.h | 9 - > drivers/net/ice/base/ice_nvm.c | 4 - > drivers/net/ice/base/ice_protocol_type.h | 18 +- > drivers/net/ice/base/ice_sched.c | 7 +- > drivers/net/ice/base/ice_switch.c | 145 +++++----- > drivers/net/ice/base/ice_switch.h | 3 - > drivers/net/ice/base/ice_type.h | 31 +-- > drivers/net/ice/ice_ethdev.c | 16 +- > 23 files changed, 782 insertions(+), 528 deletions(-) > > -- > 2.13.6 Acked-by: Qiming Yang <qiming.yang@intel.com> ^ permalink raw reply [flat|nested] 166+ messages in thread
* Re: [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch. 2019-09-23 9:31 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Yang, Qiming @ 2019-09-23 22:21 ` Ye Xiaolong 0 siblings, 0 replies; 166+ messages in thread From: Ye Xiaolong @ 2019-09-23 22:21 UTC (permalink / raw) To: Yang, Qiming; +Cc: Zhang, Qi Z, Lu, Wenzhuo, dev On 09/23, Yang, Qiming wrote: > >> -----Original Message----- >> From: Zhang, Qi Z >> Sent: Monday, September 23, 2019 3:44 PM >> To: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming >> <qiming.yang@intel.com> >> Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Zhang, Qi Z >> <qi.z.zhang@intel.com> >> Subject: [PATCH v5 00/30] net/ice/base: share code update secend batch. >> >> The patchset depends on the first batch >> http://patchwork.dpdk.org/project/dpdk/list/?series=6158&state=* >> >> Key Features: >> >> 1) Add tunnel support for fdir >> 2) Add non-word aligned field support for fdir >> 3) Add dest mac field support for fdir >> 4) Add flow count support for fdir >> 5) Add queue region support for fdir >> 6) Add vlan pppoe support for switch >> 7) Add GTPU qif support for fdir >> 8) Add symmetric hash support >> 9) Couple RSS fixes >> >> v5: >> - commit log typo fix >> v4: >> - couple bug fix and code clean. >> v3: >> - add features 7, 8, 9. >> v2: >> - add features 3, 4, 5, 6. >> >> *** BLURB HERE *** >> >> Qi Zhang (30): >> net/ice/base: remove redundant empty lines >> net/ice/base: add support for tunnel packets >> net/ice/base: add non-word aligned ip field support >> net/ice/base: add non-word aligned ipv6 field support >> net/ice/base: correct the mask for checking protocol header >> net/ice/base: propagate errors from functions >> net/ice/base: remove pointless NULL check of port info >> net/ice/base: remove RSS code as iavf host >> net/ice/base: add support for switch rule about VLAN PPPoE >> net/ice/base: minor structure refactor >> net/ice/base: associate switch recipe to profiles >> net/ice/base: enable RSS for PPPoE with SCTP >> net/ice/base: enable fdir queue region >> net/ice/base: enable setting up FDIR counters >> net/ice/base: add dest MAC field support for FDIR >> net/ice/base: update FW API minor version >> net/ice/base: enable symmetric hash for RSS >> net/ice/base: replace alloc-followed-by-copy with memdup >> net/ice/base: add FDIR support for GTPU qfi field >> net/ice/base: fix the bitmap for TCP in RSS >> net/ice/base: fix segment in remove existing RSS rule >> net/ice/base: remove unused DDP package macros >> net/ice/base: search field vector indices for result slots >> net/ice/base: fix 4 bytes alignment for pppoe dummy packet >> net/ice/base: remove unnecessary error log >> net/ice/base: use bitmap copy where appropriate >> net/ice/base: fix alignment isue >> net/ice/base: fix PTYPE bitmap >> net/ice/base: add switch support for IPv6 tc field >> net/ice/base: remove unused code >> >> drivers/net/ice/base/ice_adminq_cmd.h | 111 -------- >> drivers/net/ice/base/ice_bitops.h | 2 - >> drivers/net/ice/base/ice_common.c | 29 -- >> drivers/net/ice/base/ice_common.h | 4 - >> drivers/net/ice/base/ice_controlq.c | 9 - >> drivers/net/ice/base/ice_controlq.h | 3 +- >> drivers/net/ice/base/ice_devids.h | 1 - >> drivers/net/ice/base/ice_fdir.c | 461 +++++++++++++++++++++++++++--- >> - >> drivers/net/ice/base/ice_fdir.h | 41 ++- >> drivers/net/ice/base/ice_flex_pipe.c | 73 +++-- >> drivers/net/ice/base/ice_flex_pipe.h | 3 +- >> drivers/net/ice/base/ice_flex_type.h | 2 + >> drivers/net/ice/base/ice_flow.c | 328 +++++++++++----------- >> drivers/net/ice/base/ice_flow.h | 8 +- >> drivers/net/ice/base/ice_hw_autogen.h | 2 - >> drivers/net/ice/base/ice_lan_tx_rx.h | 9 - >> drivers/net/ice/base/ice_nvm.c | 4 - >> drivers/net/ice/base/ice_protocol_type.h | 18 +- >> drivers/net/ice/base/ice_sched.c | 7 +- >> drivers/net/ice/base/ice_switch.c | 145 +++++----- >> drivers/net/ice/base/ice_switch.h | 3 - >> drivers/net/ice/base/ice_type.h | 31 +-- >> drivers/net/ice/ice_ethdev.c | 16 +- >> 23 files changed, 782 insertions(+), 528 deletions(-) >> >> -- >> 2.13.6 > >Acked-by: Qiming Yang <qiming.yang@intel.com> Applied to dpdk-next-net-intel. ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH 0/8] net/ice: base code update 2019-09-02 3:55 [dpdk-dev] [PATCH 0/8] net/ice/base: share code update secend batch Qi Zhang ` (11 preceding siblings ...) 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang @ 2019-09-27 4:16 ` Qi Zhang 2019-09-27 4:16 ` [dpdk-dev] [PATCH 1/8] net/ice/base: fix for adding PPPoE switch rule Qi Zhang ` (8 more replies) 2019-10-06 3:13 ` [dpdk-dev] [PATCH v2 00/12] " Qi Zhang 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 00/12] net/ice: base code update Qi Zhang 14 siblings, 9 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-27 4:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang Changes in summary 1. add GTP TEID support for fdir 2. improve fdir mask support. 3. couple fixes. Qi Zhang (8): net/ice/base: fix for adding PPPoE switch rule net/ice/base: fix for NVGRE switch rule programming net/ice/base: update flow ptype bitmaps net/ice/base: add GTPU TEID support for FD net/ice/base: improvements to Flow Director masking net/ice/base: remove dead error condition net/ice/base: zero initialize structures net/ice/base: fix unexpected switch rule overwrite drivers/net/ice/base/ice_common.c | 3 - drivers/net/ice/base/ice_fdir.c | 2 + drivers/net/ice/base/ice_fdir.h | 1 + drivers/net/ice/base/ice_flex_pipe.c | 83 ++++++++-------- drivers/net/ice/base/ice_flex_type.h | 4 +- drivers/net/ice/base/ice_flow.c | 156 +++++++++++++++++-------------- drivers/net/ice/base/ice_flow.h | 10 +- drivers/net/ice/base/ice_protocol_type.h | 2 +- drivers/net/ice/base/ice_switch.c | 23 +++-- 9 files changed, 151 insertions(+), 133 deletions(-) -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH 1/8] net/ice/base: fix for adding PPPoE switch rule 2019-09-27 4:16 ` [dpdk-dev] [PATCH 0/8] net/ice: base code update Qi Zhang @ 2019-09-27 4:16 ` Qi Zhang 2019-09-27 5:30 ` Yang, Qiming 2019-09-27 6:01 ` Zhao1, Wei 2019-09-27 4:16 ` [dpdk-dev] [PATCH 2/8] net/ice/base: fix for NVGRE switch rule programming Qi Zhang ` (7 subsequent siblings) 8 siblings, 2 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-27 4:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Paul M Stillwell Jr Update VLAN protocol ID to correct value for single VXLAN scenario. Correct the PPPOE training packet. Fixes: d341bdc30290 ("net/ice/base: add support for GTP and PPPoE protocols") Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_protocol_type.h | 2 +- drivers/net/ice/base/ice_switch.c | 12 +++++++----- 2 files changed, 8 insertions(+), 6 deletions(-) diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h index f61345a7f..548c9730a 100644 --- a/drivers/net/ice/base/ice_protocol_type.h +++ b/drivers/net/ice/base/ice_protocol_type.h @@ -118,7 +118,7 @@ enum ice_prot_id { #define ICE_MAC_OFOS_HW 1 #define ICE_MAC_IL_HW 4 #define ICE_ETYPE_OL_HW 9 -#define ICE_VLAN_OL_HW 16 +#define ICE_VLAN_OL_HW 17 #define ICE_IPV4_OFOS_HW 32 #define ICE_IPV4_IL_HW 33 #define ICE_IPV6_OFOS_HW 40 diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 80afa74cd..a72f4b430 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -433,16 +433,18 @@ dummy_pppoe_packet[] = { 0x00, 0x00, 0x88, 0x64, /* ICE_VLAN_OFOS 14 */ - 0x11, 0x00, 0x00, 0x01, /* ICE_PPPOE 18 */ - 0x00, 0x4e, 0x00, 0x21, + 0x11, 0x00, 0x00, 0x00, /* ICE_PPPOE 18 */ + 0x00, 0x16, - 0x45, 0x00, 0x00, 0x30, /* PDU */ + 0x00, 0x21, /* PPP Link Layer 24 */ + + 0x45, 0x00, 0x00, 0x14, /* ICE_IPV4_IL 26 */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, /* 2 bytes for 4 byte alignment */ + 0x00, 0x00, /* 2 bytes for 4 bytes alignment */ }; /* this is a recipe to profile association bitmap */ -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* Re: [dpdk-dev] [PATCH 1/8] net/ice/base: fix for adding PPPoE switch rule 2019-09-27 4:16 ` [dpdk-dev] [PATCH 1/8] net/ice/base: fix for adding PPPoE switch rule Qi Zhang @ 2019-09-27 5:30 ` Yang, Qiming 2019-09-27 6:18 ` Zhang, Qi Z 2019-09-27 6:01 ` Zhao1, Wei 1 sibling, 1 reply; 166+ messages in thread From: Yang, Qiming @ 2019-09-27 5:30 UTC (permalink / raw) To: Zhang, Qi Z, Lu, Wenzhuo Cc: dev, Ye, Xiaolong, Nowlin, Dan, Stillwell Jr, Paul M Missing CC stable for the fix patches. Qiming > -----Original Message----- > From: Zhang, Qi Z > Sent: Friday, September 27, 2019 12:17 PM > To: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming > <qiming.yang@intel.com> > Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Zhang, Qi Z > <qi.z.zhang@intel.com>; Nowlin, Dan <dan.nowlin@intel.com>; Stillwell Jr, > Paul M <paul.m.stillwell.jr@intel.com> > Subject: [PATCH 1/8] net/ice/base: fix for adding PPPoE switch rule > > Update VLAN protocol ID to correct value for single VXLAN scenario. > Correct the PPPOE training packet. > > Fixes: d341bdc30290 ("net/ice/base: add support for GTP and PPPoE > protocols") > > Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> > Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> > Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> > --- > drivers/net/ice/base/ice_protocol_type.h | 2 +- > drivers/net/ice/base/ice_switch.c | 12 +++++++----- > 2 files changed, 8 insertions(+), 6 deletions(-) > > diff --git a/drivers/net/ice/base/ice_protocol_type.h > b/drivers/net/ice/base/ice_protocol_type.h > index f61345a7f..548c9730a 100644 > --- a/drivers/net/ice/base/ice_protocol_type.h > +++ b/drivers/net/ice/base/ice_protocol_type.h > @@ -118,7 +118,7 @@ enum ice_prot_id { > #define ICE_MAC_OFOS_HW 1 > #define ICE_MAC_IL_HW 4 > #define ICE_ETYPE_OL_HW 9 > -#define ICE_VLAN_OL_HW 16 > +#define ICE_VLAN_OL_HW 17 > #define ICE_IPV4_OFOS_HW 32 > #define ICE_IPV4_IL_HW 33 > #define ICE_IPV6_OFOS_HW 40 > diff --git a/drivers/net/ice/base/ice_switch.c > b/drivers/net/ice/base/ice_switch.c > index 80afa74cd..a72f4b430 100644 > --- a/drivers/net/ice/base/ice_switch.c > +++ b/drivers/net/ice/base/ice_switch.c > @@ -433,16 +433,18 @@ dummy_pppoe_packet[] = { > > 0x00, 0x00, 0x88, 0x64, /* ICE_VLAN_OFOS 14 */ > > - 0x11, 0x00, 0x00, 0x01, /* ICE_PPPOE 18 */ > - 0x00, 0x4e, 0x00, 0x21, > + 0x11, 0x00, 0x00, 0x00, /* ICE_PPPOE 18 */ > + 0x00, 0x16, > > - 0x45, 0x00, 0x00, 0x30, /* PDU */ > + 0x00, 0x21, /* PPP Link Layer 24 */ > + > + 0x45, 0x00, 0x00, 0x14, /* ICE_IPV4_IL 26 */ > + 0x00, 0x00, 0x00, 0x00, > 0x00, 0x00, 0x00, 0x00, > - 0x00, 0x11, 0x00, 0x00, > 0x00, 0x00, 0x00, 0x00, > 0x00, 0x00, 0x00, 0x00, > > - 0x00, 0x00, /* 2 bytes for 4 byte alignment */ > + 0x00, 0x00, /* 2 bytes for 4 bytes alignment */ > }; > > /* this is a recipe to profile association bitmap */ > -- > 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* Re: [dpdk-dev] [PATCH 1/8] net/ice/base: fix for adding PPPoE switch rule 2019-09-27 5:30 ` Yang, Qiming @ 2019-09-27 6:18 ` Zhang, Qi Z 0 siblings, 0 replies; 166+ messages in thread From: Zhang, Qi Z @ 2019-09-27 6:18 UTC (permalink / raw) To: Yang, Qiming, Lu, Wenzhuo Cc: dev, Ye, Xiaolong, Nowlin, Dan, Stillwell Jr, Paul M > -----Original Message----- > From: Yang, Qiming > Sent: Friday, September 27, 2019 1:31 PM > To: Zhang, Qi Z <qi.z.zhang@intel.com>; Lu, Wenzhuo <wenzhuo.lu@intel.com> > Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Nowlin, Dan > <dan.nowlin@intel.com>; Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com> > Subject: RE: [PATCH 1/8] net/ice/base: fix for adding PPPoE switch rule > > Missing CC stable for the fix patches. This fix on the patch from current release, no need to CC stable > > Qiming > > > -----Original Message----- > > From: Zhang, Qi Z > > Sent: Friday, September 27, 2019 12:17 PM > > To: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming > > <qiming.yang@intel.com> > > Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Zhang, Qi Z > > <qi.z.zhang@intel.com>; Nowlin, Dan <dan.nowlin@intel.com>; Stillwell > > Jr, Paul M <paul.m.stillwell.jr@intel.com> > > Subject: [PATCH 1/8] net/ice/base: fix for adding PPPoE switch rule > > > > Update VLAN protocol ID to correct value for single VXLAN scenario. > > Correct the PPPOE training packet. > > > > Fixes: d341bdc30290 ("net/ice/base: add support for GTP and PPPoE > > protocols") > > > > Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> > > Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> > > Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> > > --- > > drivers/net/ice/base/ice_protocol_type.h | 2 +- > > drivers/net/ice/base/ice_switch.c | 12 +++++++----- > > 2 files changed, 8 insertions(+), 6 deletions(-) > > > > diff --git a/drivers/net/ice/base/ice_protocol_type.h > > b/drivers/net/ice/base/ice_protocol_type.h > > index f61345a7f..548c9730a 100644 > > --- a/drivers/net/ice/base/ice_protocol_type.h > > +++ b/drivers/net/ice/base/ice_protocol_type.h > > @@ -118,7 +118,7 @@ enum ice_prot_id { > > #define ICE_MAC_OFOS_HW 1 > > #define ICE_MAC_IL_HW 4 > > #define ICE_ETYPE_OL_HW 9 > > -#define ICE_VLAN_OL_HW 16 > > +#define ICE_VLAN_OL_HW 17 > > #define ICE_IPV4_OFOS_HW 32 > > #define ICE_IPV4_IL_HW 33 > > #define ICE_IPV6_OFOS_HW 40 > > diff --git a/drivers/net/ice/base/ice_switch.c > > b/drivers/net/ice/base/ice_switch.c > > index 80afa74cd..a72f4b430 100644 > > --- a/drivers/net/ice/base/ice_switch.c > > +++ b/drivers/net/ice/base/ice_switch.c > > @@ -433,16 +433,18 @@ dummy_pppoe_packet[] = { > > > > 0x00, 0x00, 0x88, 0x64, /* ICE_VLAN_OFOS 14 */ > > > > - 0x11, 0x00, 0x00, 0x01, /* ICE_PPPOE 18 */ > > - 0x00, 0x4e, 0x00, 0x21, > > + 0x11, 0x00, 0x00, 0x00, /* ICE_PPPOE 18 */ > > + 0x00, 0x16, > > > > - 0x45, 0x00, 0x00, 0x30, /* PDU */ > > + 0x00, 0x21, /* PPP Link Layer 24 */ > > + > > + 0x45, 0x00, 0x00, 0x14, /* ICE_IPV4_IL 26 */ > > + 0x00, 0x00, 0x00, 0x00, > > 0x00, 0x00, 0x00, 0x00, > > - 0x00, 0x11, 0x00, 0x00, > > 0x00, 0x00, 0x00, 0x00, > > 0x00, 0x00, 0x00, 0x00, > > > > - 0x00, 0x00, /* 2 bytes for 4 byte alignment */ > > + 0x00, 0x00, /* 2 bytes for 4 bytes alignment */ > > }; > > > > /* this is a recipe to profile association bitmap */ > > -- > > 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* Re: [dpdk-dev] [PATCH 1/8] net/ice/base: fix for adding PPPoE switch rule 2019-09-27 4:16 ` [dpdk-dev] [PATCH 1/8] net/ice/base: fix for adding PPPoE switch rule Qi Zhang 2019-09-27 5:30 ` Yang, Qiming @ 2019-09-27 6:01 ` Zhao1, Wei 1 sibling, 0 replies; 166+ messages in thread From: Zhao1, Wei @ 2019-09-27 6:01 UTC (permalink / raw) To: Zhang, Qi Z, Lu, Wenzhuo, Yang, Qiming Cc: dev, Ye, Xiaolong, Zhang, Qi Z, Nowlin, Dan, Stillwell Jr, Paul M Tested-by: Wei Zhao <wei.zhao1@intel.com> > -----Original Message----- > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Qi Zhang > Sent: Friday, September 27, 2019 12:17 PM > To: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming > <qiming.yang@intel.com> > Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Zhang, Qi Z > <qi.z.zhang@intel.com>; Nowlin, Dan <dan.nowlin@intel.com>; Stillwell Jr, > Paul M <paul.m.stillwell.jr@intel.com> > Subject: [dpdk-dev] [PATCH 1/8] net/ice/base: fix for adding PPPoE switch > rule > > Update VLAN protocol ID to correct value for single VXLAN scenario. > Correct the PPPOE training packet. > > Fixes: d341bdc30290 ("net/ice/base: add support for GTP and PPPoE > protocols") > > Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> > Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> > Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> > --- > drivers/net/ice/base/ice_protocol_type.h | 2 +- > drivers/net/ice/base/ice_switch.c | 12 +++++++----- > 2 files changed, 8 insertions(+), 6 deletions(-) > > diff --git a/drivers/net/ice/base/ice_protocol_type.h > b/drivers/net/ice/base/ice_protocol_type.h > index f61345a7f..548c9730a 100644 > --- a/drivers/net/ice/base/ice_protocol_type.h > +++ b/drivers/net/ice/base/ice_protocol_type.h > @@ -118,7 +118,7 @@ enum ice_prot_id { > #define ICE_MAC_OFOS_HW 1 > #define ICE_MAC_IL_HW 4 > #define ICE_ETYPE_OL_HW 9 > -#define ICE_VLAN_OL_HW 16 > +#define ICE_VLAN_OL_HW 17 > #define ICE_IPV4_OFOS_HW 32 > #define ICE_IPV4_IL_HW 33 > #define ICE_IPV6_OFOS_HW 40 > diff --git a/drivers/net/ice/base/ice_switch.c > b/drivers/net/ice/base/ice_switch.c > index 80afa74cd..a72f4b430 100644 > --- a/drivers/net/ice/base/ice_switch.c > +++ b/drivers/net/ice/base/ice_switch.c > @@ -433,16 +433,18 @@ dummy_pppoe_packet[] = { > > 0x00, 0x00, 0x88, 0x64, /* ICE_VLAN_OFOS 14 */ > > - 0x11, 0x00, 0x00, 0x01, /* ICE_PPPOE 18 */ > - 0x00, 0x4e, 0x00, 0x21, > + 0x11, 0x00, 0x00, 0x00, /* ICE_PPPOE 18 */ > + 0x00, 0x16, > > - 0x45, 0x00, 0x00, 0x30, /* PDU */ > + 0x00, 0x21, /* PPP Link Layer 24 */ > + > + 0x45, 0x00, 0x00, 0x14, /* ICE_IPV4_IL 26 */ > + 0x00, 0x00, 0x00, 0x00, > 0x00, 0x00, 0x00, 0x00, > - 0x00, 0x11, 0x00, 0x00, > 0x00, 0x00, 0x00, 0x00, > 0x00, 0x00, 0x00, 0x00, > > - 0x00, 0x00, /* 2 bytes for 4 byte alignment */ > + 0x00, 0x00, /* 2 bytes for 4 bytes alignment */ > }; > > /* this is a recipe to profile association bitmap */ > -- > 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH 2/8] net/ice/base: fix for NVGRE switch rule programming 2019-09-27 4:16 ` [dpdk-dev] [PATCH 0/8] net/ice: base code update Qi Zhang 2019-09-27 4:16 ` [dpdk-dev] [PATCH 1/8] net/ice/base: fix for adding PPPoE switch rule Qi Zhang @ 2019-09-27 4:16 ` Qi Zhang 2019-09-27 6:01 ` Zhao1, Wei 2019-09-27 4:16 ` [dpdk-dev] [PATCH 3/8] net/ice/base: update flow ptype bitmaps Qi Zhang ` (6 subsequent siblings) 8 siblings, 1 reply; 166+ messages in thread From: Qi Zhang @ 2019-09-27 4:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Paul M Stillwell Jr Correct for GRE/NVGRE training packets to include the correct protocol IDs for TCP and UDP respectively. Fixes: b83a0c290322 ("net/ice/base: fix inner TCP and UDP support for GRE") Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_switch.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index a72f4b430..c22235b68 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -93,7 +93,7 @@ u8 dummy_gre_tcp_packet[] = { 0x45, 0x00, 0x00, 0x14, /* ICE_IPV4_IL 56 */ 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, + 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -140,7 +140,7 @@ u8 dummy_gre_udp_packet[] = { 0x45, 0x00, 0x00, 0x14, /* ICE_IPV4_IL 56 */ 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, + 0x00, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* Re: [dpdk-dev] [PATCH 2/8] net/ice/base: fix for NVGRE switch rule programming 2019-09-27 4:16 ` [dpdk-dev] [PATCH 2/8] net/ice/base: fix for NVGRE switch rule programming Qi Zhang @ 2019-09-27 6:01 ` Zhao1, Wei 0 siblings, 0 replies; 166+ messages in thread From: Zhao1, Wei @ 2019-09-27 6:01 UTC (permalink / raw) To: Zhang, Qi Z, Lu, Wenzhuo, Yang, Qiming Cc: dev, Ye, Xiaolong, Zhang, Qi Z, Nowlin, Dan, Stillwell Jr, Paul M Tested-by: Wei Zhao <wei.zhao1@intel.com> > -----Original Message----- > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Qi Zhang > Sent: Friday, September 27, 2019 12:17 PM > To: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming > <qiming.yang@intel.com> > Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Zhang, Qi Z > <qi.z.zhang@intel.com>; Nowlin, Dan <dan.nowlin@intel.com>; Stillwell Jr, > Paul M <paul.m.stillwell.jr@intel.com> > Subject: [dpdk-dev] [PATCH 2/8] net/ice/base: fix for NVGRE switch rule > programming > > Correct for GRE/NVGRE training packets to include the correct protocol IDs > for TCP and UDP respectively. > > Fixes: b83a0c290322 ("net/ice/base: fix inner TCP and UDP support for GRE") > > Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> > Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> > Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> > --- > drivers/net/ice/base/ice_switch.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/net/ice/base/ice_switch.c > b/drivers/net/ice/base/ice_switch.c > index a72f4b430..c22235b68 100644 > --- a/drivers/net/ice/base/ice_switch.c > +++ b/drivers/net/ice/base/ice_switch.c > @@ -93,7 +93,7 @@ u8 dummy_gre_tcp_packet[] = { > > 0x45, 0x00, 0x00, 0x14, /* ICE_IPV4_IL 56 */ > 0x00, 0x00, 0x00, 0x00, > - 0x00, 0x00, 0x00, 0x00, > + 0x00, 0x06, 0x00, 0x00, > 0x00, 0x00, 0x00, 0x00, > 0x00, 0x00, 0x00, 0x00, > > @@ -140,7 +140,7 @@ u8 dummy_gre_udp_packet[] = { > > 0x45, 0x00, 0x00, 0x14, /* ICE_IPV4_IL 56 */ > 0x00, 0x00, 0x00, 0x00, > - 0x00, 0x00, 0x00, 0x00, > + 0x00, 0x11, 0x00, 0x00, > 0x00, 0x00, 0x00, 0x00, > 0x00, 0x00, 0x00, 0x00, > > -- > 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH 3/8] net/ice/base: update flow ptype bitmaps 2019-09-27 4:16 ` [dpdk-dev] [PATCH 0/8] net/ice: base code update Qi Zhang 2019-09-27 4:16 ` [dpdk-dev] [PATCH 1/8] net/ice/base: fix for adding PPPoE switch rule Qi Zhang 2019-09-27 4:16 ` [dpdk-dev] [PATCH 2/8] net/ice/base: fix for NVGRE switch rule programming Qi Zhang @ 2019-09-27 4:16 ` Qi Zhang 2019-09-27 4:16 ` [dpdk-dev] [PATCH 4/8] net/ice/base: add GTPU TEID support for FD Qi Zhang ` (5 subsequent siblings) 8 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-27 4:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Paul M Stillwell Jr In the flow api, the outer first ptype bitmaps contained many references to inner ptypes. Because of PTG assignments, these were causing issues when programming rules on the inner ptypes. For example, in RSS when programming the outer IPV6 hash fields, it also programmed several inner IPV4 PTGs with the same extraction. There were several ptypes that have been removed, thus this patch removes those bits from the type bitmaps. Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 38 +++++++++++++++++++------------------- 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index e03c5d0e7..8ed3f8eb7 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -141,9 +141,9 @@ struct ice_flow_field_info ice_flds_info[ICE_FLOW_FIELD_IDX_MAX] = { * Packet types for packets with an Outer/First/Single MAC header */ static const u32 ice_ptypes_mac_ofos[] = { - 0xFDC00CC6, 0xBFBF7F7E, 0xF7EFDFDF, 0xFEFDFDFB, - 0x03BF7F7E, 0x00000000, 0x00000000, 0x00000000, - 0x000B0F0F, 0x00003000, 0x00000000, 0x00000000, + 0xFDC00846, 0xBFBF7F7E, 0xF70001DF, 0xFEFDFDFB, + 0x0000077E, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00003000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -165,9 +165,9 @@ static const u32 ice_ptypes_macvlan_il[] = { /* Packet types for packets with an Outer/First/Single IPv4 header */ static const u32 ice_ptypes_ipv4_ofos[] = { - 0xFDC00000, 0xBFBF7F7E, 0x00EFDFDF, 0x00000000, + 0x1DC00000, 0x04000800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x0003000F, 0x000FC000, 0x00000000, 0x00000000, + 0x00000000, 0x000FC000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -189,9 +189,9 @@ static const u32 ice_ptypes_ipv4_il[] = { /* Packet types for packets with an Outer/First/Single IPv6 header */ static const u32 ice_ptypes_ipv6_ofos[] = { - 0x00000000, 0x00000000, 0xF7000000, 0xFEFDFDFB, - 0x03BF7F7E, 0x00000000, 0x00000000, 0x00000000, - 0x00080F00, 0x03F00000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x77000000, 0x10002000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x03F00000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -201,8 +201,8 @@ static const u32 ice_ptypes_ipv6_ofos[] = { /* Packet types for packets with an Innermost/Last IPv6 header */ static const u32 ice_ptypes_ipv6_il[] = { - 0x00000000, 0x03B80770, 0x00EE01DC, 0x0EE00000, - 0x03B80770, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x03B80770, 0x000001DC, 0x0EE00000, + 0x00000770, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x7FE00000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -228,7 +228,7 @@ static const u32 ice_ptypes_arp_of[] = { */ static const u32 ice_ptypes_udp_il[] = { 0x81000000, 0x20204040, 0x04000010, 0x80810102, - 0x00200040, 0x00000000, 0x00000000, 0x00000000, + 0x00000040, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00410000, 0x10842000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -240,7 +240,7 @@ static const u32 ice_ptypes_udp_il[] = { /* Packet types for packets with an Innermost/Last TCP header */ static const u32 ice_ptypes_tcp_il[] = { 0x04000000, 0x80810102, 0x10000040, 0x02040408, - 0x00810102, 0x00000000, 0x00000000, 0x00000000, + 0x00000102, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00820000, 0x21084000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -252,7 +252,7 @@ static const u32 ice_ptypes_tcp_il[] = { /* Packet types for packets with an Innermost/Last SCTP header */ static const u32 ice_ptypes_sctp_il[] = { 0x08000000, 0x01020204, 0x20000081, 0x04080810, - 0x01020204, 0x00000000, 0x00000000, 0x00000000, + 0x00000204, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01040000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -275,8 +275,8 @@ static const u32 ice_ptypes_icmp_of[] = { /* Packet types for packets with an Innermost/Last ICMP header */ static const u32 ice_ptypes_icmp_il[] = { - 0x00000000, 0x02040408, 0x40810102, 0x08101020, - 0x02040408, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x02040408, 0x40000102, 0x08101020, + 0x00000408, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x42108000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -287,8 +287,8 @@ static const u32 ice_ptypes_icmp_il[] = { /* Packet types for packets with an Outermost/First GRE header */ static const u32 ice_ptypes_gre_of[] = { - 0x00000000, 0xBFBF7800, 0x00EFDFDF, 0xFEFDE000, - 0x03BF7F7E, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0xBFBF7800, 0x000001DF, 0xFEFDE000, + 0x0000017E, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -299,8 +299,8 @@ static const u32 ice_ptypes_gre_of[] = { /* Packet types for packets with an Innermost/Last MAC header */ static const u32 ice_ptypes_mac_il[] = { - 0x00000000, 0x00000000, 0x00EFDE00, 0x00000000, - 0x03BF7800, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH 4/8] net/ice/base: add GTPU TEID support for FD 2019-09-27 4:16 ` [dpdk-dev] [PATCH 0/8] net/ice: base code update Qi Zhang ` (2 preceding siblings ...) 2019-09-27 4:16 ` [dpdk-dev] [PATCH 3/8] net/ice/base: update flow ptype bitmaps Qi Zhang @ 2019-09-27 4:16 ` Qi Zhang 2019-09-27 4:16 ` [dpdk-dev] [PATCH 5/8] net/ice/base: improvements to Flow Director masking Qi Zhang ` (4 subsequent siblings) 8 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-27 4:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Added the training packet for GTPU TEID field to the Flow director to allow matching against this field. Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 2 ++ drivers/net/ice/base/ice_fdir.h | 1 + 2 files changed, 3 insertions(+) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index 219588c46..37b388169 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -786,6 +786,8 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP: case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP: case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER: + ice_pkt_insert_u32(loc, ICE_IPV4_GTPU_TEID_OFFSET, + input->gtpu_data.teid); ice_pkt_insert_u6_qfi(loc, ICE_IPV4_GTPU_QFI_OFFSET, input->gtpu_data.qfi); break; diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index 22e5bcf8c..db1f8351f 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -87,6 +87,7 @@ enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw); #define ICE_IPV6_TC_OFFSET 14 #define ICE_IPV6_HLIM_OFFSET 21 #define ICE_IPV6_PROTO_OFFSET 20 +#define ICE_IPV4_GTPU_TEID_OFFSET 46 #define ICE_IPV4_GTPU_QFI_OFFSET 56 #define ICE_FDIR_MAX_FLTRS 16384 -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH 5/8] net/ice/base: improvements to Flow Director masking 2019-09-27 4:16 ` [dpdk-dev] [PATCH 0/8] net/ice: base code update Qi Zhang ` (3 preceding siblings ...) 2019-09-27 4:16 ` [dpdk-dev] [PATCH 4/8] net/ice/base: add GTPU TEID support for FD Qi Zhang @ 2019-09-27 4:16 ` Qi Zhang 2019-09-27 5:27 ` Yang, Qiming 2019-09-27 4:16 ` [dpdk-dev] [PATCH 6/8] net/ice/base: remove dead error condition Qi Zhang ` (3 subsequent siblings) 8 siblings, 1 reply; 166+ messages in thread From: Qi Zhang @ 2019-09-27 4:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Paul M Stillwell Jr Currently, 3-tuple FD matching is implemented using masking. However, this is using up twenty-four of the thirty-two FD masks available. This patch uses the swap register more efficiently to implement the 3-tuple matches, which saves all FD masks for other uses. Added IPV6 versions of DSCP, TTL and Protocol fields for FD use. Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flex_pipe.c | 71 +++++++++------------ drivers/net/ice/base/ice_flex_type.h | 4 +- drivers/net/ice/base/ice_flow.c | 118 ++++++++++++++++++++--------------- drivers/net/ice/base/ice_flow.h | 10 ++- 4 files changed, 108 insertions(+), 95 deletions(-) diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 75bb87079..8f8cab86e 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -1248,25 +1248,6 @@ void ice_free_seg(struct ice_hw *hw) } /** - * ice_init_fd_mask_regs - initialize Flow Director mask registers - * @hw: pointer to the HW struct - * - * This function sets up the Flow Director mask registers to allow for complete - * masking off of any of the 24 Field Vector words. After this call, mask 0 will - * mask off all of FV index 0, mask 1 will mask off all of FV index 1, etc. - */ -static void ice_init_fd_mask_regs(struct ice_hw *hw) -{ - u16 i; - - for (i = 0; i < hw->blk[ICE_BLK_FD].es.fvw; i++) { - wr32(hw, GLQF_FDMASK(i), i); - ice_debug(hw, ICE_DBG_INIT, "init fd mask(%d): %x = %x\n", i, - GLQF_FDMASK(i), i); - } -} - -/** * ice_init_pkg_regs - initialize additional package registers * @hw: pointer to the hardware structure */ @@ -1279,8 +1260,6 @@ static void ice_init_pkg_regs(struct ice_hw *hw) /* setup Switch block input mask, which is 48-bits in two parts */ wr32(hw, GL_PREEXT_L2_PMASK0(ICE_SW_BLK_IDX), ICE_SW_BLK_INP_MASK_L); wr32(hw, GL_PREEXT_L2_PMASK1(ICE_SW_BLK_IDX), ICE_SW_BLK_INP_MASK_H); - /* setup default flow director masks */ - ice_init_fd_mask_regs(hw); } /** @@ -2643,7 +2622,8 @@ ice_prof_has_mask_idx(struct ice_hw *hw, enum ice_block blk, u8 prof, u16 idx, expect_no_mask = true; /* Scan the enabled masks on this profile, for the specified idx */ - for (i = 0; i < ICE_PROFILE_MASK_COUNT; i++) + for (i = hw->blk[blk].masks.first; i < hw->blk[blk].masks.first + + hw->blk[blk].masks.count; i++) if (hw->blk[blk].es.mask_ena[prof] & BIT(i)) if (hw->blk[blk].masks.masks[i].in_use && hw->blk[blk].masks.masks[i].idx == idx) { @@ -2981,14 +2961,15 @@ ice_write_prof_mask_enable_res(struct ice_hw *hw, enum ice_block blk, */ static void ice_init_prof_masks(struct ice_hw *hw, enum ice_block blk) { -#define MAX_NUM_PORTS 8 - u16 num_ports = MAX_NUM_PORTS; + u16 per_pf; u16 i; ice_init_lock(&hw->blk[blk].masks.lock); - hw->blk[blk].masks.count = ICE_PROFILE_MASK_COUNT / num_ports; - hw->blk[blk].masks.first = hw->pf_id * hw->blk[blk].masks.count; + per_pf = ICE_PROF_MASK_COUNT / hw->dev_caps.num_funcs; + + hw->blk[blk].masks.count = per_pf; + hw->blk[blk].masks.first = hw->pf_id * per_pf; ice_memset(hw->blk[blk].masks.masks, 0, sizeof(hw->blk[blk].masks.masks), ICE_NONDMA_MEM); @@ -4241,8 +4222,6 @@ ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es) ice_zero_bitmap(pair_list, ICE_FD_SRC_DST_PAIR_COUNT); - ice_init_fd_mask_regs(hw); - /* This code assumes that the Flow Director field vectors are assigned * from the end of the FV indexes working towards the zero index, that * only complete fields will be included and will be consecutive, and @@ -4298,7 +4277,7 @@ ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es) return ICE_ERR_OUT_OF_RANGE; /* keep track of non-relevant fields */ - mask_sel |= 1 << (first_free - k); + mask_sel |= BIT(first_free - k); } pair_start[index] = first_free; @@ -4342,29 +4321,39 @@ ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es) si -= indexes_used; } - /* for each set of 4 swap indexes, write the appropriate register */ + /* for each set of 4 swap and 4 inset indexes, write the appropriate + * register + */ for (j = 0; j < hw->blk[ICE_BLK_FD].es.fvw / 4; j++) { - u32 raw_entry = 0; + u32 raw_swap = 0; + u32 raw_in = 0; for (k = 0; k < 4; k++) { u8 idx; idx = (j * 4) + k; - if (used[idx]) - raw_entry |= used[idx] << (k * BITS_PER_BYTE); + if (used[idx] && !(mask_sel & BIT(idx))) { + raw_swap |= used[idx] << (k * BITS_PER_BYTE); +#define ICE_INSET_DFLT 0x9f + raw_in |= ICE_INSET_DFLT << (k * BITS_PER_BYTE); + } } - /* write the appropriate register set, based on HW block */ - wr32(hw, GLQF_FDSWAP(prof_id, j), raw_entry); + /* write the appropriate swap register set */ + wr32(hw, GLQF_FDSWAP(prof_id, j), raw_swap); + + ice_debug(hw, ICE_DBG_INIT, "swap wr(%d, %d): %x = %08x\n", + prof_id, j, GLQF_FDSWAP(prof_id, j), raw_swap); - ice_debug(hw, ICE_DBG_INIT, "swap wr(%d, %d): %x = %x\n", - prof_id, j, GLQF_FDSWAP(prof_id, j), raw_entry); + /* write the appropriate inset register set */ + wr32(hw, GLQF_FDINSET(prof_id, j), raw_in); + + ice_debug(hw, ICE_DBG_INIT, "inset wr(%d, %d): %x = %08x\n", + prof_id, j, GLQF_FDINSET(prof_id, j), raw_in); } - /* update the masks for this profile to be sure we ignore fields that - * are not relevant to our match criteria - */ - ice_update_fd_mask(hw, prof_id, mask_sel); + /* initially clear the mask select for this profile */ + ice_update_fd_mask(hw, prof_id, 0); return ICE_SUCCESS; } diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h index 48c1e5184..92d205ac7 100644 --- a/drivers/net/ice/base/ice_flex_type.h +++ b/drivers/net/ice/base/ice_flex_type.h @@ -668,8 +668,8 @@ struct ice_masks { struct ice_lock lock; /* lock to protect this structure */ u16 first; /* first mask owned by the PF */ u16 count; /* number of masks owned by the PF */ -#define ICE_PROFILE_MASK_COUNT 32 - struct ice_mask masks[ICE_PROFILE_MASK_COUNT]; +#define ICE_PROF_MASK_COUNT 32 + struct ice_mask masks[ICE_PROF_MASK_COUNT]; }; /* Tables per block */ diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 8ed3f8eb7..370ad9ba3 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -22,15 +22,6 @@ #define ICE_FLOW_FLD_SZ_GTP_TEID 4 #define ICE_FLOW_FLD_SZ_PPPOE_SESS_ID 2 -/* Protocol header fields are extracted at the word boundaries as word-sized - * values. Specify the displacement value of some non-word-aligned fields needed - * to compute the offset of words containing the fields in the corresponding - * protocol headers. Displacement values are expressed in number of bits. - */ -#define ICE_FLOW_FLD_IPV6_TTL_DSCP_DISP (-4) -#define ICE_FLOW_FLD_IPV6_TTL_PROT_DISP ((-2) * BITS_PER_BYTE) -#define ICE_FLOW_FLD_IPV6_TTL_TTL_DISP ((-1) * BITS_PER_BYTE) - /* Describe properties of a protocol header field */ struct ice_flow_field_info { enum ice_flow_seg_hdr hdr; @@ -67,18 +58,29 @@ struct ice_flow_field_info ice_flds_info[ICE_FLOW_FIELD_IDX_MAX] = { ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_VLAN, 14, ICE_FLOW_FLD_SZ_VLAN), /* ICE_FLOW_FIELD_IDX_ETH_TYPE */ ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_ETH, 12, ICE_FLOW_FLD_SZ_ETH_TYPE), - /* IPv4 */ - /* ICE_FLOW_FIELD_IDX_IP_DSCP */ - ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV4, 1, 1), - /* ICE_FLOW_FIELD_IDX_IP_TTL */ - ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_NONE, 8, 1), - /* ICE_FLOW_FIELD_IDX_IP_PROT */ - ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_NONE, 9, ICE_FLOW_FLD_SZ_IP_PROT), + /* IPv4 / IPv6 */ + /* ICE_FLOW_FIELD_IDX_IPV4_DSCP */ + ICE_FLOW_FLD_INFO_MSK(ICE_FLOW_SEG_HDR_IPV4, 0, ICE_FLOW_FLD_SZ_IP_DSCP, + 0x00fc), + /* ICE_FLOW_FIELD_IDX_IPV6_DSCP */ + ICE_FLOW_FLD_INFO_MSK(ICE_FLOW_SEG_HDR_IPV6, 0, ICE_FLOW_FLD_SZ_IP_DSCP, + 0x0ff0), + /* ICE_FLOW_FIELD_IDX_IPV4_TTL */ + ICE_FLOW_FLD_INFO_MSK(ICE_FLOW_SEG_HDR_NONE, 8, + ICE_FLOW_FLD_SZ_IP_TTL, 0xff00), + /* ICE_FLOW_FIELD_IDX_IPV4_PROT */ + ICE_FLOW_FLD_INFO_MSK(ICE_FLOW_SEG_HDR_NONE, 8, + ICE_FLOW_FLD_SZ_IP_PROT, 0x00ff), + /* ICE_FLOW_FIELD_IDX_IPV6_TTL */ + ICE_FLOW_FLD_INFO_MSK(ICE_FLOW_SEG_HDR_NONE, 6, + ICE_FLOW_FLD_SZ_IP_TTL, 0x00ff), + /* ICE_FLOW_FIELD_IDX_IPV6_PROT */ + ICE_FLOW_FLD_INFO_MSK(ICE_FLOW_SEG_HDR_NONE, 6, + ICE_FLOW_FLD_SZ_IP_PROT, 0xff00), /* ICE_FLOW_FIELD_IDX_IPV4_SA */ ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV4, 12, ICE_FLOW_FLD_SZ_IPV4_ADDR), /* ICE_FLOW_FIELD_IDX_IPV4_DA */ ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV4, 16, ICE_FLOW_FLD_SZ_IPV4_ADDR), - /* IPv6 */ /* ICE_FLOW_FIELD_IDX_IPV6_SA */ ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 8, ICE_FLOW_FLD_SZ_IPV6_ADDR), /* ICE_FLOW_FIELD_IDX_IPV6_DA */ @@ -608,6 +610,7 @@ ice_flow_xtract_pkt_flags(struct ice_hw *hw, * @params: information about the flow to be processed * @seg: packet segment index of the field to be extracted * @fld: ID of field to be extracted + * @match: bitfield of all fields * * This function determines the protocol ID, offset, and size of the given * field. It then allocates one or more extraction sequence entries for the @@ -615,13 +618,14 @@ ice_flow_xtract_pkt_flags(struct ice_hw *hw, */ static enum ice_status ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params, - u8 seg, enum ice_flow_field fld) + u8 seg, enum ice_flow_field fld, u64 match) { enum ice_flow_field sib = ICE_FLOW_FIELD_IDX_MAX; enum ice_prot_id prot_id = ICE_PROT_ID_INVAL; u8 fv_words = hw->blk[params->blk].es.fvw; struct ice_flow_fld_info *flds; u16 cnt, ese_bits, i; + u16 sib_mask = 0; s16 adj = 0; u16 mask; u16 off; @@ -638,35 +642,49 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params, case ICE_FLOW_FIELD_IDX_ETH_TYPE: prot_id = seg == 0 ? ICE_PROT_ETYPE_OL : ICE_PROT_ETYPE_IL; break; - case ICE_FLOW_FIELD_IDX_IP_DSCP: - if (params->prof->segs[seg].hdrs & ICE_FLOW_SEG_HDR_IPV6) - adj = ICE_FLOW_FLD_IPV6_TTL_DSCP_DISP; - /* Fall through */ - case ICE_FLOW_FIELD_IDX_IP_TTL: - case ICE_FLOW_FIELD_IDX_IP_PROT: - /* Some fields are located at different offsets in IPv4 and - * IPv6 + case ICE_FLOW_FIELD_IDX_IPV4_DSCP: + prot_id = seg == 0 ? ICE_PROT_IPV4_OF_OR_S : ICE_PROT_IPV4_IL; + break; + case ICE_FLOW_FIELD_IDX_IPV6_DSCP: + prot_id = seg == 0 ? ICE_PROT_IPV6_OF_OR_S : ICE_PROT_IPV6_IL; + break; + case ICE_FLOW_FIELD_IDX_IPV4_TTL: + case ICE_FLOW_FIELD_IDX_IPV4_PROT: + prot_id = seg == 0 ? ICE_PROT_IPV4_OF_OR_S : ICE_PROT_IPV4_IL; + + /* TTL and PROT share the same extraction seq. entry. + * Each is considered a sibling to the other in terms of sharing + * the same extraction sequence entry. */ - if (params->prof->segs[seg].hdrs & ICE_FLOW_SEG_HDR_IPV4) { - prot_id = seg == 0 ? ICE_PROT_IPV4_OF_OR_S : - ICE_PROT_IPV4_IL; - /* TTL and PROT share the same extraction seq. entry. - * Each is considered a sibling to the other in term - * sharing the same extraction sequence entry. - */ - if (fld == ICE_FLOW_FIELD_IDX_IP_TTL) - sib = ICE_FLOW_FIELD_IDX_IP_PROT; - else if (fld == ICE_FLOW_FIELD_IDX_IP_PROT) - sib = ICE_FLOW_FIELD_IDX_IP_TTL; - } else if (params->prof->segs[seg].hdrs & - ICE_FLOW_SEG_HDR_IPV6) { - prot_id = seg == 0 ? ICE_PROT_IPV6_OF_OR_S : - ICE_PROT_IPV6_IL; - if (fld == ICE_FLOW_FIELD_IDX_IP_TTL) - adj = ICE_FLOW_FLD_IPV6_TTL_TTL_DISP; - else if (fld == ICE_FLOW_FIELD_IDX_IP_PROT) - adj = ICE_FLOW_FLD_IPV6_TTL_PROT_DISP; - } + if (fld == ICE_FLOW_FIELD_IDX_IPV4_TTL) + sib = ICE_FLOW_FIELD_IDX_IPV4_PROT; + else if (fld == ICE_FLOW_FIELD_IDX_IPV4_PROT) + sib = ICE_FLOW_FIELD_IDX_IPV4_TTL; + + /* If the sibling field is also included, that field's + * mask needs to be included. + */ + if (match & BIT(sib)) + sib_mask = ice_flds_info[sib].mask; + break; + case ICE_FLOW_FIELD_IDX_IPV6_TTL: + case ICE_FLOW_FIELD_IDX_IPV6_PROT: + prot_id = seg == 0 ? ICE_PROT_IPV6_OF_OR_S : ICE_PROT_IPV6_IL; + + /* TTL and PROT share the same extraction seq. entry. + * Each is considered a sibling to the other in terms of sharing + * the same extraction sequence entry. + */ + if (fld == ICE_FLOW_FIELD_IDX_IPV6_TTL) + sib = ICE_FLOW_FIELD_IDX_IPV6_PROT; + else if (fld == ICE_FLOW_FIELD_IDX_IPV6_PROT) + sib = ICE_FLOW_FIELD_IDX_IPV6_TTL; + + /* If the sibling field is also included, that field's + * mask needs to be included. + */ + if (match & BIT(sib)) + sib_mask = ice_flds_info[sib].mask; break; case ICE_FLOW_FIELD_IDX_IPV4_SA: case ICE_FLOW_FIELD_IDX_IPV4_DA: @@ -733,6 +751,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params, ICE_FLOW_FV_EXTRACT_SZ; flds[fld].xtrct.disp = (u8)((ice_flds_info[fld].off + adj) % ese_bits); flds[fld].xtrct.idx = params->es_cnt; + flds[fld].xtrct.mask = ice_flds_info[fld].mask; /* Adjust the next field-entry index after accommodating the number of * entries this field consumes @@ -742,7 +761,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params, /* Fill in the extraction sequence entries needed for this field */ off = flds[fld].xtrct.off; - mask = ice_flds_info[fld].mask; + mask = flds[fld].xtrct.mask; for (i = 0; i < cnt; i++) { /* Only consume an extraction sequence entry if there is no * sibling field associated with this field or the sibling entry @@ -767,7 +786,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params, params->es[idx].prot_id = prot_id; params->es[idx].off = off; - params->mask[idx] = mask; + params->mask[idx] = mask | sib_mask; params->es_cnt++; } @@ -885,7 +904,8 @@ ice_flow_create_xtrct_seq(struct ice_hw *hw, if (match & bit) { status = ice_flow_xtract_fld - (hw, params, i, (enum ice_flow_field)j); + (hw, params, i, (enum ice_flow_field)j, + match); if (status) return status; match &= ~bit; diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h index 326ff6f81..c224e6ebf 100644 --- a/drivers/net/ice/base/ice_flow.h +++ b/drivers/net/ice/base/ice_flow.h @@ -114,9 +114,12 @@ enum ice_flow_field { ICE_FLOW_FIELD_IDX_C_VLAN, ICE_FLOW_FIELD_IDX_ETH_TYPE, /* L3 */ - ICE_FLOW_FIELD_IDX_IP_DSCP, - ICE_FLOW_FIELD_IDX_IP_TTL, - ICE_FLOW_FIELD_IDX_IP_PROT, + ICE_FLOW_FIELD_IDX_IPV4_DSCP, + ICE_FLOW_FIELD_IDX_IPV6_DSCP, + ICE_FLOW_FIELD_IDX_IPV4_TTL, + ICE_FLOW_FIELD_IDX_IPV4_PROT, + ICE_FLOW_FIELD_IDX_IPV6_TTL, + ICE_FLOW_FIELD_IDX_IPV6_PROT, ICE_FLOW_FIELD_IDX_IPV4_SA, ICE_FLOW_FIELD_IDX_IPV4_DA, ICE_FLOW_FIELD_IDX_IPV6_SA, @@ -232,6 +235,7 @@ struct ice_flow_seg_xtrct { u16 off; /* Starting offset of the field in header in bytes */ u8 idx; /* Index of FV entry used */ u8 disp; /* Displacement of field in bits fr. FV entry's start */ + u16 mask; /* Mask for field */ }; enum ice_flow_fld_match_type { -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* Re: [dpdk-dev] [PATCH 5/8] net/ice/base: improvements to Flow Director masking 2019-09-27 4:16 ` [dpdk-dev] [PATCH 5/8] net/ice/base: improvements to Flow Director masking Qi Zhang @ 2019-09-27 5:27 ` Yang, Qiming 2019-09-27 6:22 ` Zhang, Qi Z 0 siblings, 1 reply; 166+ messages in thread From: Yang, Qiming @ 2019-09-27 5:27 UTC (permalink / raw) To: Zhang, Qi Z, Lu, Wenzhuo Cc: dev, Ye, Xiaolong, Nowlin, Dan, Stillwell Jr, Paul M Hi, Qi > -----Original Message----- > From: Zhang, Qi Z > Sent: Friday, September 27, 2019 12:17 PM > To: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming > <qiming.yang@intel.com> > Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Zhang, Qi Z > <qi.z.zhang@intel.com>; Nowlin, Dan <dan.nowlin@intel.com>; Stillwell Jr, > Paul M <paul.m.stillwell.jr@intel.com> > Subject: [PATCH 5/8] net/ice/base: improvements to Flow Director masking > > Currently, 3-tuple FD matching is implemented using masking. However, this > is using up twenty-four of the thirty-two FD masks available. This patch uses > the swap register more efficiently to implement the 3-tuple matches, which > saves all FD masks for other uses. > > Added IPV6 versions of DSCP, TTL and Protocol fields for FD use. > > Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> > Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> > Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> > --- > drivers/net/ice/base/ice_flex_pipe.c | 71 +++++++++------------ > drivers/net/ice/base/ice_flex_type.h | 4 +- > drivers/net/ice/base/ice_flow.c | 118 ++++++++++++++++++++--------------- > drivers/net/ice/base/ice_flow.h | 10 ++- > 4 files changed, 108 insertions(+), 95 deletions(-) > > diff --git a/drivers/net/ice/base/ice_flex_pipe.c > b/drivers/net/ice/base/ice_flex_pipe.c > index 75bb87079..8f8cab86e 100644 > --- a/drivers/net/ice/base/ice_flex_pipe.c > +++ b/drivers/net/ice/base/ice_flex_pipe.c > @@ -1248,25 +1248,6 @@ void ice_free_seg(struct ice_hw *hw) } > [snip] > @@ -4342,29 +4321,39 @@ ice_update_fd_swap(struct ice_hw *hw, u16 > prof_id, struct ice_fv_word *es) > si -= indexes_used; > } > > - /* for each set of 4 swap indexes, write the appropriate register */ > + /* for each set of 4 swap and 4 inset indexes, write the appropriate > + * register > + */ > for (j = 0; j < hw->blk[ICE_BLK_FD].es.fvw / 4; j++) { > - u32 raw_entry = 0; > + u32 raw_swap = 0; > + u32 raw_in = 0; > > for (k = 0; k < 4; k++) { > u8 idx; > > idx = (j * 4) + k; > - if (used[idx]) > - raw_entry |= used[idx] << (k * > BITS_PER_BYTE); > + if (used[idx] && !(mask_sel & BIT(idx))) { > + raw_swap |= used[idx] << (k * > BITS_PER_BYTE); #define > +ICE_INSET_DFLT 0x9f Is this macro defined within this function? > + raw_in |= ICE_INSET_DFLT << (k * > BITS_PER_BYTE); > + } > } > [snip] Qiming ^ permalink raw reply [flat|nested] 166+ messages in thread
* Re: [dpdk-dev] [PATCH 5/8] net/ice/base: improvements to Flow Director masking 2019-09-27 5:27 ` Yang, Qiming @ 2019-09-27 6:22 ` Zhang, Qi Z 0 siblings, 0 replies; 166+ messages in thread From: Zhang, Qi Z @ 2019-09-27 6:22 UTC (permalink / raw) To: Yang, Qiming, Lu, Wenzhuo Cc: dev, Ye, Xiaolong, Nowlin, Dan, Stillwell Jr, Paul M > -----Original Message----- > From: Yang, Qiming > Sent: Friday, September 27, 2019 1:28 PM > To: Zhang, Qi Z <qi.z.zhang@intel.com>; Lu, Wenzhuo <wenzhuo.lu@intel.com> > Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Nowlin, Dan > <dan.nowlin@intel.com>; Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com> > Subject: RE: [PATCH 5/8] net/ice/base: improvements to Flow Director > masking > > Hi, Qi > > > -----Original Message----- > > From: Zhang, Qi Z > > Sent: Friday, September 27, 2019 12:17 PM > > To: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming > > <qiming.yang@intel.com> > > Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Zhang, Qi Z > > <qi.z.zhang@intel.com>; Nowlin, Dan <dan.nowlin@intel.com>; Stillwell > > Jr, Paul M <paul.m.stillwell.jr@intel.com> > > Subject: [PATCH 5/8] net/ice/base: improvements to Flow Director > > masking > > > > Currently, 3-tuple FD matching is implemented using masking. However, > > this is using up twenty-four of the thirty-two FD masks available. > > This patch uses the swap register more efficiently to implement the > > 3-tuple matches, which saves all FD masks for other uses. > > > > Added IPV6 versions of DSCP, TTL and Protocol fields for FD use. > > > > Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> > > Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> > > Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> > > --- > > drivers/net/ice/base/ice_flex_pipe.c | 71 +++++++++------------ > > drivers/net/ice/base/ice_flex_type.h | 4 +- > > drivers/net/ice/base/ice_flow.c | 118 > ++++++++++++++++++++--------------- > > drivers/net/ice/base/ice_flow.h | 10 ++- > > 4 files changed, 108 insertions(+), 95 deletions(-) > > > > diff --git a/drivers/net/ice/base/ice_flex_pipe.c > > b/drivers/net/ice/base/ice_flex_pipe.c > > index 75bb87079..8f8cab86e 100644 > > --- a/drivers/net/ice/base/ice_flex_pipe.c > > +++ b/drivers/net/ice/base/ice_flex_pipe.c > > @@ -1248,25 +1248,6 @@ void ice_free_seg(struct ice_hw *hw) } > > > [snip] > > > @@ -4342,29 +4321,39 @@ ice_update_fd_swap(struct ice_hw *hw, u16 > > prof_id, struct ice_fv_word *es) > > si -= indexes_used; > > } > > > > - /* for each set of 4 swap indexes, write the appropriate register */ > > + /* for each set of 4 swap and 4 inset indexes, write the appropriate > > + * register > > + */ > > for (j = 0; j < hw->blk[ICE_BLK_FD].es.fvw / 4; j++) { > > - u32 raw_entry = 0; > > + u32 raw_swap = 0; > > + u32 raw_in = 0; > > > > for (k = 0; k < 4; k++) { > > u8 idx; > > > > idx = (j * 4) + k; > > - if (used[idx]) > > - raw_entry |= used[idx] << (k * > > BITS_PER_BYTE); > > + if (used[idx] && !(mask_sel & BIT(idx))) { > > + raw_swap |= used[idx] << (k * > > BITS_PER_BYTE); #define > > +ICE_INSET_DFLT 0x9f > > Is this macro defined within this function? Yes, because its only be used in this function :) > > > + raw_in |= ICE_INSET_DFLT << (k * > > BITS_PER_BYTE); > > + } > > } > > > [snip] > > > Qiming ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH 6/8] net/ice/base: remove dead error condition 2019-09-27 4:16 ` [dpdk-dev] [PATCH 0/8] net/ice: base code update Qi Zhang ` (4 preceding siblings ...) 2019-09-27 4:16 ` [dpdk-dev] [PATCH 5/8] net/ice/base: improvements to Flow Director masking Qi Zhang @ 2019-09-27 4:16 ` Qi Zhang 2019-09-27 4:16 ` [dpdk-dev] [PATCH 7/8] net/ice/base: zero initialize structures Qi Zhang ` (2 subsequent siblings) 8 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-27 4:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Jeb Cramer, Paul M Stillwell Jr The pointer cmd is set to an address of a structure, which can never be NULL. Remove the check-for-NULL lines since it's dead code anyway. Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_common.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index 48ba160f7..4ba3ab202 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -176,9 +176,6 @@ ice_aq_get_link_topo_handle(struct ice_port_info *pi, u8 node_type, cmd = &desc.params.get_link_topo; - if (!cmd) - return ICE_ERR_PARAM; - ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_link_topo); cmd->addr.node_type_ctx = (ICE_AQC_LINK_TOPO_NODE_CTX_PORT << -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH 7/8] net/ice/base: zero initialize structures 2019-09-27 4:16 ` [dpdk-dev] [PATCH 0/8] net/ice: base code update Qi Zhang ` (5 preceding siblings ...) 2019-09-27 4:16 ` [dpdk-dev] [PATCH 6/8] net/ice/base: remove dead error condition Qi Zhang @ 2019-09-27 4:16 ` Qi Zhang 2019-09-27 4:16 ` [dpdk-dev] [PATCH 8/8] net/ice/base: fix unexpected switch rule overwrite Qi Zhang 2019-09-27 6:24 ` [dpdk-dev] [PATCH 0/8] net/ice: base code update Yang, Qiming 8 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-27 4:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Jeb Cramer, Jesse Brandeburg, Paul M Stillwell Jr Some functions create ice_pkg_enum structure, but it seems it's possible some of the members are used un-initialized. So we'll initialize all instantiations of this structure within ice_flex_pipe.c The patch also fix header comment mismatch issue for ice_init_prof_result_bm Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com> Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flex_pipe.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 8f8cab86e..bf14149b8 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -470,6 +470,7 @@ static void ice_init_pkg_hints(struct ice_hw *hw, struct ice_seg *ice_seg) int i; ice_memset(&hw->tnl, 0, sizeof(hw->tnl), ICE_NONDMA_MEM); + ice_memset(&state, 0, sizeof(state), ICE_NONDMA_MEM); if (!ice_seg) return; @@ -1517,6 +1518,8 @@ ice_get_sw_fv_bitmap(struct ice_hw *hw, enum ice_prof_type type, struct ice_seg *ice_seg; struct ice_fv *fv; + ice_memset(&state, 0, sizeof(state), ICE_NONDMA_MEM); + if (type == ICE_PROF_ALL) { u16 i; @@ -1573,6 +1576,8 @@ ice_get_sw_fv_list(struct ice_hw *hw, u16 *prot_ids, u8 ids_cnt, struct ice_fv *fv; u32 offset; + ice_memset(&state, 0, sizeof(state), ICE_NONDMA_MEM); + if (!ids_cnt || !hw->seg) return ICE_ERR_PARAM; @@ -1633,16 +1638,17 @@ ice_get_sw_fv_list(struct ice_hw *hw, u16 *prot_ids, u8 ids_cnt, } /** - * ice_init_profile_to_result_bm - Initialize the profile result index bitmap + * ice_init_prof_result_bm - Initialize the profile result index bitmap * @hw: pointer to hardware structure */ -void -ice_init_prof_result_bm(struct ice_hw *hw) +void ice_init_prof_result_bm(struct ice_hw *hw) { struct ice_pkg_enum state; struct ice_seg *ice_seg; struct ice_fv *fv; + ice_memset(&state, 0, sizeof(state), ICE_NONDMA_MEM); + if (!hw->seg) return; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH 8/8] net/ice/base: fix unexpected switch rule overwrite 2019-09-27 4:16 ` [dpdk-dev] [PATCH 0/8] net/ice: base code update Qi Zhang ` (6 preceding siblings ...) 2019-09-27 4:16 ` [dpdk-dev] [PATCH 7/8] net/ice/base: zero initialize structures Qi Zhang @ 2019-09-27 4:16 ` Qi Zhang 2019-09-27 6:24 ` [dpdk-dev] [PATCH 0/8] net/ice: base code update Yang, Qiming 8 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-09-27 4:16 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr A switch rule with "drop" action will be overwritten by a rule with same pattern match but with a "to queue" action. While in an inversed flow creation sequence, the "to queue" can't be overwritten by the "drop" rule. The inconsistent behavior is not expected, the patch fix the issue by preventing rule overwrite in both cases. Fixes: fed0c5ca5f19 ("net/ice/base: support programming a new switch recipe") Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> --- drivers/net/ice/base/ice_switch.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index c22235b68..6ca50e13d 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -5975,13 +5975,10 @@ ice_adv_add_update_vsi_list(struct ice_hw *hw, u16 vsi_list_id = 0; if (cur_fltr->sw_act.fltr_act == ICE_FWD_TO_Q || - cur_fltr->sw_act.fltr_act == ICE_FWD_TO_QGRP) + cur_fltr->sw_act.fltr_act == ICE_FWD_TO_QGRP || + cur_fltr->sw_act.fltr_act == ICE_DROP_PACKET) return ICE_ERR_NOT_IMPL; - if (cur_fltr->sw_act.fltr_act == ICE_DROP_PACKET && - new_fltr->sw_act.fltr_act == ICE_DROP_PACKET) - return ICE_ERR_ALREADY_EXISTS; - if ((new_fltr->sw_act.fltr_act == ICE_FWD_TO_Q || new_fltr->sw_act.fltr_act == ICE_FWD_TO_QGRP) && (cur_fltr->sw_act.fltr_act == ICE_FWD_TO_VSI || -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* Re: [dpdk-dev] [PATCH 0/8] net/ice: base code update 2019-09-27 4:16 ` [dpdk-dev] [PATCH 0/8] net/ice: base code update Qi Zhang ` (7 preceding siblings ...) 2019-09-27 4:16 ` [dpdk-dev] [PATCH 8/8] net/ice/base: fix unexpected switch rule overwrite Qi Zhang @ 2019-09-27 6:24 ` Yang, Qiming 8 siblings, 0 replies; 166+ messages in thread From: Yang, Qiming @ 2019-09-27 6:24 UTC (permalink / raw) To: Zhang, Qi Z, Lu, Wenzhuo; +Cc: dev, Ye, Xiaolong > -----Original Message----- > From: Zhang, Qi Z > Sent: Friday, September 27, 2019 12:17 PM > To: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming > <qiming.yang@intel.com> > Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Zhang, Qi Z > <qi.z.zhang@intel.com> > Subject: [PATCH 0/8] net/ice: base code update > > Changes in summary > 1. add GTP TEID support for fdir > 2. improve fdir mask support. > 3. couple fixes. > > Qi Zhang (8): > net/ice/base: fix for adding PPPoE switch rule > net/ice/base: fix for NVGRE switch rule programming > net/ice/base: update flow ptype bitmaps > net/ice/base: add GTPU TEID support for FD > net/ice/base: improvements to Flow Director masking > net/ice/base: remove dead error condition > net/ice/base: zero initialize structures > net/ice/base: fix unexpected switch rule overwrite > > drivers/net/ice/base/ice_common.c | 3 - > drivers/net/ice/base/ice_fdir.c | 2 + > drivers/net/ice/base/ice_fdir.h | 1 + > drivers/net/ice/base/ice_flex_pipe.c | 83 ++++++++-------- > drivers/net/ice/base/ice_flex_type.h | 4 +- > drivers/net/ice/base/ice_flow.c | 156 +++++++++++++++++-------------- > drivers/net/ice/base/ice_flow.h | 10 +- > drivers/net/ice/base/ice_protocol_type.h | 2 +- > drivers/net/ice/base/ice_switch.c | 23 +++-- > 9 files changed, 151 insertions(+), 133 deletions(-) > > -- > 2.13.6 Acked-by: Qiming Yang <qiming.yang@intel.com> ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 00/12] net/ice: base code update 2019-09-02 3:55 [dpdk-dev] [PATCH 0/8] net/ice/base: share code update secend batch Qi Zhang ` (12 preceding siblings ...) 2019-09-27 4:16 ` [dpdk-dev] [PATCH 0/8] net/ice: base code update Qi Zhang @ 2019-10-06 3:13 ` Qi Zhang 2019-10-06 3:13 ` [dpdk-dev] [PATCH v2 01/12] net/ice/base: fix for adding PPPoE switch rule Qi Zhang ` (11 more replies) 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 00/12] net/ice: base code update Qi Zhang 14 siblings, 12 replies; 166+ messages in thread From: Qi Zhang @ 2019-10-06 3:13 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang Changes in summary 1. add GTP TEID support for fdir 2. improve fdir mask support. 3. couple fixes. 4. support QFI match in fdir v2: - add QFI match support in fdir - couple fixes and code clean Qi Zhang (12): net/ice/base: fix for adding PPPoE switch rule net/ice/base: fix for NVGRE switch rule programming net/ice/base: update flow ptype bitmaps net/ice/base: add GTPU TEID support for FD net/ice/base: improvements to Flow Director masking net/ice/base: remove dead error condition net/ice/base: zero initialize structures net/ice/base: fix unexpected switch rule overwrite net/ice/base: fix flow raw field vector extraction net/ice/base: fix switch rule programming for all profiles net/ice/base: add QFI for Flow Director net/base/ice: improve misc code style drivers/net/ice/base/ice_common.c | 3 - drivers/net/ice/base/ice_fdir.c | 2 + drivers/net/ice/base/ice_fdir.h | 1 + drivers/net/ice/base/ice_flex_pipe.c | 334 +++++++++++++------------------ drivers/net/ice/base/ice_flex_pipe.h | 9 +- drivers/net/ice/base/ice_flex_type.h | 70 ++++++- drivers/net/ice/base/ice_flow.c | 224 ++++++++++++++------- drivers/net/ice/base/ice_flow.h | 34 +++- drivers/net/ice/base/ice_nvm.c | 2 +- drivers/net/ice/base/ice_protocol_type.h | 2 +- drivers/net/ice/base/ice_switch.c | 30 +-- 11 files changed, 409 insertions(+), 302 deletions(-) -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 01/12] net/ice/base: fix for adding PPPoE switch rule 2019-10-06 3:13 ` [dpdk-dev] [PATCH v2 00/12] " Qi Zhang @ 2019-10-06 3:13 ` Qi Zhang 2019-10-06 3:13 ` [dpdk-dev] [PATCH v2 02/12] net/ice/base: fix for NVGRE switch rule programming Qi Zhang ` (10 subsequent siblings) 11 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-10-06 3:13 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Junfeng Guo, Paul M Stillwell Jr Update VLAN protocol ID to correct value for single VXLAN scenario. Fix the missing ethertype offset for PPPoE dummy packet offset to allow matching the corresponding field. Fixes: d341bdc30290 ("net/ice/base: add support for GTP and PPPoE protocols") Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Acked-by: Qiming Yang <qiming.yang@intel.com> --- drivers/net/ice/base/ice_protocol_type.h | 2 +- drivers/net/ice/base/ice_switch.c | 16 ++++++++++------ 2 files changed, 11 insertions(+), 7 deletions(-) diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h index f61345a7f..548c9730a 100644 --- a/drivers/net/ice/base/ice_protocol_type.h +++ b/drivers/net/ice/base/ice_protocol_type.h @@ -118,7 +118,7 @@ enum ice_prot_id { #define ICE_MAC_OFOS_HW 1 #define ICE_MAC_IL_HW 4 #define ICE_ETYPE_OL_HW 9 -#define ICE_VLAN_OL_HW 16 +#define ICE_VLAN_OL_HW 17 #define ICE_IPV4_OFOS_HW 32 #define ICE_IPV4_IL_HW 33 #define ICE_IPV6_OFOS_HW 40 diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 80afa74cd..71d7f0737 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -419,6 +419,7 @@ dummy_udp_gtp_packet[] = { static const struct ice_dummy_pkt_offsets dummy_pppoe_packet_offsets[] = { { ICE_MAC_OFOS, 0 }, + { ICE_ETYPE_OL, 12 }, { ICE_VLAN_OFOS, 14}, { ICE_PPPOE, 18 }, { ICE_PROTOCOL_LAST, 0 }, @@ -429,20 +430,23 @@ dummy_pppoe_packet[] = { 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x81, 0x00, + + 0x81, 0x00, /* ICE_ETYPE_OL 12 */ 0x00, 0x00, 0x88, 0x64, /* ICE_VLAN_OFOS 14 */ - 0x11, 0x00, 0x00, 0x01, /* ICE_PPPOE 18 */ - 0x00, 0x4e, 0x00, 0x21, + 0x11, 0x00, 0x00, 0x00, /* ICE_PPPOE 18 */ + 0x00, 0x16, + + 0x00, 0x21, /* PPP Link Layer 24 */ - 0x45, 0x00, 0x00, 0x30, /* PDU */ + 0x45, 0x00, 0x00, 0x14, /* ICE_IPV4_IL 26 */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, /* 2 bytes for 4 byte alignment */ + 0x00, 0x00, /* 2 bytes for 4 bytes alignment */ }; /* this is a recipe to profile association bitmap */ -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 02/12] net/ice/base: fix for NVGRE switch rule programming 2019-10-06 3:13 ` [dpdk-dev] [PATCH v2 00/12] " Qi Zhang 2019-10-06 3:13 ` [dpdk-dev] [PATCH v2 01/12] net/ice/base: fix for adding PPPoE switch rule Qi Zhang @ 2019-10-06 3:13 ` Qi Zhang 2019-10-06 3:13 ` [dpdk-dev] [PATCH v2 03/12] net/ice/base: update flow ptype bitmaps Qi Zhang ` (9 subsequent siblings) 11 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-10-06 3:13 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Paul M Stillwell Jr Correct for GRE/NVGRE training packets to include the correct protocol IDs for TCP and UDP respectively. Fixes: b83a0c290322 ("net/ice/base: fix inner TCP and UDP support for GRE") Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Acked-by: Qiming Yang <qiming.yang@intel.com> --- drivers/net/ice/base/ice_switch.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 71d7f0737..334f1b5e0 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -93,7 +93,7 @@ u8 dummy_gre_tcp_packet[] = { 0x45, 0x00, 0x00, 0x14, /* ICE_IPV4_IL 56 */ 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, + 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -140,7 +140,7 @@ u8 dummy_gre_udp_packet[] = { 0x45, 0x00, 0x00, 0x14, /* ICE_IPV4_IL 56 */ 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, + 0x00, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 03/12] net/ice/base: update flow ptype bitmaps 2019-10-06 3:13 ` [dpdk-dev] [PATCH v2 00/12] " Qi Zhang 2019-10-06 3:13 ` [dpdk-dev] [PATCH v2 01/12] net/ice/base: fix for adding PPPoE switch rule Qi Zhang 2019-10-06 3:13 ` [dpdk-dev] [PATCH v2 02/12] net/ice/base: fix for NVGRE switch rule programming Qi Zhang @ 2019-10-06 3:13 ` Qi Zhang 2019-10-06 3:14 ` [dpdk-dev] [PATCH v2 04/12] net/ice/base: add GTPU TEID support for FD Qi Zhang ` (8 subsequent siblings) 11 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-10-06 3:13 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Paul M Stillwell Jr In the flow api, the outer first ptype bitmaps contained many references to inner ptypes. Because of PTG assignments, these were causing issues when programming rules on the inner ptypes. For example, in RSS when programming the outer IPV6 hash fields, it also programmed several inner IPV4 PTGs with the same extraction. There were several ptypes that have been removed, thus this patch removes those bits from the type bitmaps. Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Acked-by: Qiming Yang <qiming.yang@intel.com> --- drivers/net/ice/base/ice_flow.c | 38 +++++++++++++++++++------------------- 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index e03c5d0e7..8ed3f8eb7 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -141,9 +141,9 @@ struct ice_flow_field_info ice_flds_info[ICE_FLOW_FIELD_IDX_MAX] = { * Packet types for packets with an Outer/First/Single MAC header */ static const u32 ice_ptypes_mac_ofos[] = { - 0xFDC00CC6, 0xBFBF7F7E, 0xF7EFDFDF, 0xFEFDFDFB, - 0x03BF7F7E, 0x00000000, 0x00000000, 0x00000000, - 0x000B0F0F, 0x00003000, 0x00000000, 0x00000000, + 0xFDC00846, 0xBFBF7F7E, 0xF70001DF, 0xFEFDFDFB, + 0x0000077E, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00003000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -165,9 +165,9 @@ static const u32 ice_ptypes_macvlan_il[] = { /* Packet types for packets with an Outer/First/Single IPv4 header */ static const u32 ice_ptypes_ipv4_ofos[] = { - 0xFDC00000, 0xBFBF7F7E, 0x00EFDFDF, 0x00000000, + 0x1DC00000, 0x04000800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x0003000F, 0x000FC000, 0x00000000, 0x00000000, + 0x00000000, 0x000FC000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -189,9 +189,9 @@ static const u32 ice_ptypes_ipv4_il[] = { /* Packet types for packets with an Outer/First/Single IPv6 header */ static const u32 ice_ptypes_ipv6_ofos[] = { - 0x00000000, 0x00000000, 0xF7000000, 0xFEFDFDFB, - 0x03BF7F7E, 0x00000000, 0x00000000, 0x00000000, - 0x00080F00, 0x03F00000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x77000000, 0x10002000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x03F00000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -201,8 +201,8 @@ static const u32 ice_ptypes_ipv6_ofos[] = { /* Packet types for packets with an Innermost/Last IPv6 header */ static const u32 ice_ptypes_ipv6_il[] = { - 0x00000000, 0x03B80770, 0x00EE01DC, 0x0EE00000, - 0x03B80770, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x03B80770, 0x000001DC, 0x0EE00000, + 0x00000770, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x7FE00000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -228,7 +228,7 @@ static const u32 ice_ptypes_arp_of[] = { */ static const u32 ice_ptypes_udp_il[] = { 0x81000000, 0x20204040, 0x04000010, 0x80810102, - 0x00200040, 0x00000000, 0x00000000, 0x00000000, + 0x00000040, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00410000, 0x10842000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -240,7 +240,7 @@ static const u32 ice_ptypes_udp_il[] = { /* Packet types for packets with an Innermost/Last TCP header */ static const u32 ice_ptypes_tcp_il[] = { 0x04000000, 0x80810102, 0x10000040, 0x02040408, - 0x00810102, 0x00000000, 0x00000000, 0x00000000, + 0x00000102, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00820000, 0x21084000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -252,7 +252,7 @@ static const u32 ice_ptypes_tcp_il[] = { /* Packet types for packets with an Innermost/Last SCTP header */ static const u32 ice_ptypes_sctp_il[] = { 0x08000000, 0x01020204, 0x20000081, 0x04080810, - 0x01020204, 0x00000000, 0x00000000, 0x00000000, + 0x00000204, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01040000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -275,8 +275,8 @@ static const u32 ice_ptypes_icmp_of[] = { /* Packet types for packets with an Innermost/Last ICMP header */ static const u32 ice_ptypes_icmp_il[] = { - 0x00000000, 0x02040408, 0x40810102, 0x08101020, - 0x02040408, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x02040408, 0x40000102, 0x08101020, + 0x00000408, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x42108000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -287,8 +287,8 @@ static const u32 ice_ptypes_icmp_il[] = { /* Packet types for packets with an Outermost/First GRE header */ static const u32 ice_ptypes_gre_of[] = { - 0x00000000, 0xBFBF7800, 0x00EFDFDF, 0xFEFDE000, - 0x03BF7F7E, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0xBFBF7800, 0x000001DF, 0xFEFDE000, + 0x0000017E, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -299,8 +299,8 @@ static const u32 ice_ptypes_gre_of[] = { /* Packet types for packets with an Innermost/Last MAC header */ static const u32 ice_ptypes_mac_il[] = { - 0x00000000, 0x00000000, 0x00EFDE00, 0x00000000, - 0x03BF7800, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 04/12] net/ice/base: add GTPU TEID support for FD 2019-10-06 3:13 ` [dpdk-dev] [PATCH v2 00/12] " Qi Zhang ` (2 preceding siblings ...) 2019-10-06 3:13 ` [dpdk-dev] [PATCH v2 03/12] net/ice/base: update flow ptype bitmaps Qi Zhang @ 2019-10-06 3:14 ` Qi Zhang 2019-10-06 3:14 ` [dpdk-dev] [PATCH v2 05/12] net/ice/base: improvements to Flow Director masking Qi Zhang ` (7 subsequent siblings) 11 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-10-06 3:14 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Added the training packet for GTPU TEID field to the Flow director to allow matching against this field. Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Acked-by: Qiming Yang <qiming.yang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 2 ++ drivers/net/ice/base/ice_fdir.h | 1 + 2 files changed, 3 insertions(+) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index 219588c46..37b388169 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -786,6 +786,8 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP: case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP: case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER: + ice_pkt_insert_u32(loc, ICE_IPV4_GTPU_TEID_OFFSET, + input->gtpu_data.teid); ice_pkt_insert_u6_qfi(loc, ICE_IPV4_GTPU_QFI_OFFSET, input->gtpu_data.qfi); break; diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index 22e5bcf8c..db1f8351f 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -87,6 +87,7 @@ enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw); #define ICE_IPV6_TC_OFFSET 14 #define ICE_IPV6_HLIM_OFFSET 21 #define ICE_IPV6_PROTO_OFFSET 20 +#define ICE_IPV4_GTPU_TEID_OFFSET 46 #define ICE_IPV4_GTPU_QFI_OFFSET 56 #define ICE_FDIR_MAX_FLTRS 16384 -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 05/12] net/ice/base: improvements to Flow Director masking 2019-10-06 3:13 ` [dpdk-dev] [PATCH v2 00/12] " Qi Zhang ` (3 preceding siblings ...) 2019-10-06 3:14 ` [dpdk-dev] [PATCH v2 04/12] net/ice/base: add GTPU TEID support for FD Qi Zhang @ 2019-10-06 3:14 ` Qi Zhang 2019-10-06 3:14 ` [dpdk-dev] [PATCH v2 06/12] net/ice/base: remove dead error condition Qi Zhang ` (6 subsequent siblings) 11 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-10-06 3:14 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Paul M Stillwell Jr Currently, 3-tuple FD matching is implemented using masking. However, this is using up twenty-four of the thirty-two FD masks available. This patch uses the swap register more efficiently to implement the 3-tuple matches, which saves all FD masks for other uses. Added IPV6 versions of DSCP, TTL and Protocol fields for FD use. Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Acked-by: Qiming Yang <qiming.yang@intel.com> --- drivers/net/ice/base/ice_flex_pipe.c | 71 +++++++++------------ drivers/net/ice/base/ice_flex_type.h | 4 +- drivers/net/ice/base/ice_flow.c | 118 ++++++++++++++++++++--------------- drivers/net/ice/base/ice_flow.h | 10 ++- 4 files changed, 108 insertions(+), 95 deletions(-) diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 75bb87079..8f8cab86e 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -1248,25 +1248,6 @@ void ice_free_seg(struct ice_hw *hw) } /** - * ice_init_fd_mask_regs - initialize Flow Director mask registers - * @hw: pointer to the HW struct - * - * This function sets up the Flow Director mask registers to allow for complete - * masking off of any of the 24 Field Vector words. After this call, mask 0 will - * mask off all of FV index 0, mask 1 will mask off all of FV index 1, etc. - */ -static void ice_init_fd_mask_regs(struct ice_hw *hw) -{ - u16 i; - - for (i = 0; i < hw->blk[ICE_BLK_FD].es.fvw; i++) { - wr32(hw, GLQF_FDMASK(i), i); - ice_debug(hw, ICE_DBG_INIT, "init fd mask(%d): %x = %x\n", i, - GLQF_FDMASK(i), i); - } -} - -/** * ice_init_pkg_regs - initialize additional package registers * @hw: pointer to the hardware structure */ @@ -1279,8 +1260,6 @@ static void ice_init_pkg_regs(struct ice_hw *hw) /* setup Switch block input mask, which is 48-bits in two parts */ wr32(hw, GL_PREEXT_L2_PMASK0(ICE_SW_BLK_IDX), ICE_SW_BLK_INP_MASK_L); wr32(hw, GL_PREEXT_L2_PMASK1(ICE_SW_BLK_IDX), ICE_SW_BLK_INP_MASK_H); - /* setup default flow director masks */ - ice_init_fd_mask_regs(hw); } /** @@ -2643,7 +2622,8 @@ ice_prof_has_mask_idx(struct ice_hw *hw, enum ice_block blk, u8 prof, u16 idx, expect_no_mask = true; /* Scan the enabled masks on this profile, for the specified idx */ - for (i = 0; i < ICE_PROFILE_MASK_COUNT; i++) + for (i = hw->blk[blk].masks.first; i < hw->blk[blk].masks.first + + hw->blk[blk].masks.count; i++) if (hw->blk[blk].es.mask_ena[prof] & BIT(i)) if (hw->blk[blk].masks.masks[i].in_use && hw->blk[blk].masks.masks[i].idx == idx) { @@ -2981,14 +2961,15 @@ ice_write_prof_mask_enable_res(struct ice_hw *hw, enum ice_block blk, */ static void ice_init_prof_masks(struct ice_hw *hw, enum ice_block blk) { -#define MAX_NUM_PORTS 8 - u16 num_ports = MAX_NUM_PORTS; + u16 per_pf; u16 i; ice_init_lock(&hw->blk[blk].masks.lock); - hw->blk[blk].masks.count = ICE_PROFILE_MASK_COUNT / num_ports; - hw->blk[blk].masks.first = hw->pf_id * hw->blk[blk].masks.count; + per_pf = ICE_PROF_MASK_COUNT / hw->dev_caps.num_funcs; + + hw->blk[blk].masks.count = per_pf; + hw->blk[blk].masks.first = hw->pf_id * per_pf; ice_memset(hw->blk[blk].masks.masks, 0, sizeof(hw->blk[blk].masks.masks), ICE_NONDMA_MEM); @@ -4241,8 +4222,6 @@ ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es) ice_zero_bitmap(pair_list, ICE_FD_SRC_DST_PAIR_COUNT); - ice_init_fd_mask_regs(hw); - /* This code assumes that the Flow Director field vectors are assigned * from the end of the FV indexes working towards the zero index, that * only complete fields will be included and will be consecutive, and @@ -4298,7 +4277,7 @@ ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es) return ICE_ERR_OUT_OF_RANGE; /* keep track of non-relevant fields */ - mask_sel |= 1 << (first_free - k); + mask_sel |= BIT(first_free - k); } pair_start[index] = first_free; @@ -4342,29 +4321,39 @@ ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es) si -= indexes_used; } - /* for each set of 4 swap indexes, write the appropriate register */ + /* for each set of 4 swap and 4 inset indexes, write the appropriate + * register + */ for (j = 0; j < hw->blk[ICE_BLK_FD].es.fvw / 4; j++) { - u32 raw_entry = 0; + u32 raw_swap = 0; + u32 raw_in = 0; for (k = 0; k < 4; k++) { u8 idx; idx = (j * 4) + k; - if (used[idx]) - raw_entry |= used[idx] << (k * BITS_PER_BYTE); + if (used[idx] && !(mask_sel & BIT(idx))) { + raw_swap |= used[idx] << (k * BITS_PER_BYTE); +#define ICE_INSET_DFLT 0x9f + raw_in |= ICE_INSET_DFLT << (k * BITS_PER_BYTE); + } } - /* write the appropriate register set, based on HW block */ - wr32(hw, GLQF_FDSWAP(prof_id, j), raw_entry); + /* write the appropriate swap register set */ + wr32(hw, GLQF_FDSWAP(prof_id, j), raw_swap); + + ice_debug(hw, ICE_DBG_INIT, "swap wr(%d, %d): %x = %08x\n", + prof_id, j, GLQF_FDSWAP(prof_id, j), raw_swap); - ice_debug(hw, ICE_DBG_INIT, "swap wr(%d, %d): %x = %x\n", - prof_id, j, GLQF_FDSWAP(prof_id, j), raw_entry); + /* write the appropriate inset register set */ + wr32(hw, GLQF_FDINSET(prof_id, j), raw_in); + + ice_debug(hw, ICE_DBG_INIT, "inset wr(%d, %d): %x = %08x\n", + prof_id, j, GLQF_FDINSET(prof_id, j), raw_in); } - /* update the masks for this profile to be sure we ignore fields that - * are not relevant to our match criteria - */ - ice_update_fd_mask(hw, prof_id, mask_sel); + /* initially clear the mask select for this profile */ + ice_update_fd_mask(hw, prof_id, 0); return ICE_SUCCESS; } diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h index 48c1e5184..92d205ac7 100644 --- a/drivers/net/ice/base/ice_flex_type.h +++ b/drivers/net/ice/base/ice_flex_type.h @@ -668,8 +668,8 @@ struct ice_masks { struct ice_lock lock; /* lock to protect this structure */ u16 first; /* first mask owned by the PF */ u16 count; /* number of masks owned by the PF */ -#define ICE_PROFILE_MASK_COUNT 32 - struct ice_mask masks[ICE_PROFILE_MASK_COUNT]; +#define ICE_PROF_MASK_COUNT 32 + struct ice_mask masks[ICE_PROF_MASK_COUNT]; }; /* Tables per block */ diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 8ed3f8eb7..370ad9ba3 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -22,15 +22,6 @@ #define ICE_FLOW_FLD_SZ_GTP_TEID 4 #define ICE_FLOW_FLD_SZ_PPPOE_SESS_ID 2 -/* Protocol header fields are extracted at the word boundaries as word-sized - * values. Specify the displacement value of some non-word-aligned fields needed - * to compute the offset of words containing the fields in the corresponding - * protocol headers. Displacement values are expressed in number of bits. - */ -#define ICE_FLOW_FLD_IPV6_TTL_DSCP_DISP (-4) -#define ICE_FLOW_FLD_IPV6_TTL_PROT_DISP ((-2) * BITS_PER_BYTE) -#define ICE_FLOW_FLD_IPV6_TTL_TTL_DISP ((-1) * BITS_PER_BYTE) - /* Describe properties of a protocol header field */ struct ice_flow_field_info { enum ice_flow_seg_hdr hdr; @@ -67,18 +58,29 @@ struct ice_flow_field_info ice_flds_info[ICE_FLOW_FIELD_IDX_MAX] = { ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_VLAN, 14, ICE_FLOW_FLD_SZ_VLAN), /* ICE_FLOW_FIELD_IDX_ETH_TYPE */ ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_ETH, 12, ICE_FLOW_FLD_SZ_ETH_TYPE), - /* IPv4 */ - /* ICE_FLOW_FIELD_IDX_IP_DSCP */ - ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV4, 1, 1), - /* ICE_FLOW_FIELD_IDX_IP_TTL */ - ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_NONE, 8, 1), - /* ICE_FLOW_FIELD_IDX_IP_PROT */ - ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_NONE, 9, ICE_FLOW_FLD_SZ_IP_PROT), + /* IPv4 / IPv6 */ + /* ICE_FLOW_FIELD_IDX_IPV4_DSCP */ + ICE_FLOW_FLD_INFO_MSK(ICE_FLOW_SEG_HDR_IPV4, 0, ICE_FLOW_FLD_SZ_IP_DSCP, + 0x00fc), + /* ICE_FLOW_FIELD_IDX_IPV6_DSCP */ + ICE_FLOW_FLD_INFO_MSK(ICE_FLOW_SEG_HDR_IPV6, 0, ICE_FLOW_FLD_SZ_IP_DSCP, + 0x0ff0), + /* ICE_FLOW_FIELD_IDX_IPV4_TTL */ + ICE_FLOW_FLD_INFO_MSK(ICE_FLOW_SEG_HDR_NONE, 8, + ICE_FLOW_FLD_SZ_IP_TTL, 0xff00), + /* ICE_FLOW_FIELD_IDX_IPV4_PROT */ + ICE_FLOW_FLD_INFO_MSK(ICE_FLOW_SEG_HDR_NONE, 8, + ICE_FLOW_FLD_SZ_IP_PROT, 0x00ff), + /* ICE_FLOW_FIELD_IDX_IPV6_TTL */ + ICE_FLOW_FLD_INFO_MSK(ICE_FLOW_SEG_HDR_NONE, 6, + ICE_FLOW_FLD_SZ_IP_TTL, 0x00ff), + /* ICE_FLOW_FIELD_IDX_IPV6_PROT */ + ICE_FLOW_FLD_INFO_MSK(ICE_FLOW_SEG_HDR_NONE, 6, + ICE_FLOW_FLD_SZ_IP_PROT, 0xff00), /* ICE_FLOW_FIELD_IDX_IPV4_SA */ ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV4, 12, ICE_FLOW_FLD_SZ_IPV4_ADDR), /* ICE_FLOW_FIELD_IDX_IPV4_DA */ ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV4, 16, ICE_FLOW_FLD_SZ_IPV4_ADDR), - /* IPv6 */ /* ICE_FLOW_FIELD_IDX_IPV6_SA */ ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 8, ICE_FLOW_FLD_SZ_IPV6_ADDR), /* ICE_FLOW_FIELD_IDX_IPV6_DA */ @@ -608,6 +610,7 @@ ice_flow_xtract_pkt_flags(struct ice_hw *hw, * @params: information about the flow to be processed * @seg: packet segment index of the field to be extracted * @fld: ID of field to be extracted + * @match: bitfield of all fields * * This function determines the protocol ID, offset, and size of the given * field. It then allocates one or more extraction sequence entries for the @@ -615,13 +618,14 @@ ice_flow_xtract_pkt_flags(struct ice_hw *hw, */ static enum ice_status ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params, - u8 seg, enum ice_flow_field fld) + u8 seg, enum ice_flow_field fld, u64 match) { enum ice_flow_field sib = ICE_FLOW_FIELD_IDX_MAX; enum ice_prot_id prot_id = ICE_PROT_ID_INVAL; u8 fv_words = hw->blk[params->blk].es.fvw; struct ice_flow_fld_info *flds; u16 cnt, ese_bits, i; + u16 sib_mask = 0; s16 adj = 0; u16 mask; u16 off; @@ -638,35 +642,49 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params, case ICE_FLOW_FIELD_IDX_ETH_TYPE: prot_id = seg == 0 ? ICE_PROT_ETYPE_OL : ICE_PROT_ETYPE_IL; break; - case ICE_FLOW_FIELD_IDX_IP_DSCP: - if (params->prof->segs[seg].hdrs & ICE_FLOW_SEG_HDR_IPV6) - adj = ICE_FLOW_FLD_IPV6_TTL_DSCP_DISP; - /* Fall through */ - case ICE_FLOW_FIELD_IDX_IP_TTL: - case ICE_FLOW_FIELD_IDX_IP_PROT: - /* Some fields are located at different offsets in IPv4 and - * IPv6 + case ICE_FLOW_FIELD_IDX_IPV4_DSCP: + prot_id = seg == 0 ? ICE_PROT_IPV4_OF_OR_S : ICE_PROT_IPV4_IL; + break; + case ICE_FLOW_FIELD_IDX_IPV6_DSCP: + prot_id = seg == 0 ? ICE_PROT_IPV6_OF_OR_S : ICE_PROT_IPV6_IL; + break; + case ICE_FLOW_FIELD_IDX_IPV4_TTL: + case ICE_FLOW_FIELD_IDX_IPV4_PROT: + prot_id = seg == 0 ? ICE_PROT_IPV4_OF_OR_S : ICE_PROT_IPV4_IL; + + /* TTL and PROT share the same extraction seq. entry. + * Each is considered a sibling to the other in terms of sharing + * the same extraction sequence entry. */ - if (params->prof->segs[seg].hdrs & ICE_FLOW_SEG_HDR_IPV4) { - prot_id = seg == 0 ? ICE_PROT_IPV4_OF_OR_S : - ICE_PROT_IPV4_IL; - /* TTL and PROT share the same extraction seq. entry. - * Each is considered a sibling to the other in term - * sharing the same extraction sequence entry. - */ - if (fld == ICE_FLOW_FIELD_IDX_IP_TTL) - sib = ICE_FLOW_FIELD_IDX_IP_PROT; - else if (fld == ICE_FLOW_FIELD_IDX_IP_PROT) - sib = ICE_FLOW_FIELD_IDX_IP_TTL; - } else if (params->prof->segs[seg].hdrs & - ICE_FLOW_SEG_HDR_IPV6) { - prot_id = seg == 0 ? ICE_PROT_IPV6_OF_OR_S : - ICE_PROT_IPV6_IL; - if (fld == ICE_FLOW_FIELD_IDX_IP_TTL) - adj = ICE_FLOW_FLD_IPV6_TTL_TTL_DISP; - else if (fld == ICE_FLOW_FIELD_IDX_IP_PROT) - adj = ICE_FLOW_FLD_IPV6_TTL_PROT_DISP; - } + if (fld == ICE_FLOW_FIELD_IDX_IPV4_TTL) + sib = ICE_FLOW_FIELD_IDX_IPV4_PROT; + else if (fld == ICE_FLOW_FIELD_IDX_IPV4_PROT) + sib = ICE_FLOW_FIELD_IDX_IPV4_TTL; + + /* If the sibling field is also included, that field's + * mask needs to be included. + */ + if (match & BIT(sib)) + sib_mask = ice_flds_info[sib].mask; + break; + case ICE_FLOW_FIELD_IDX_IPV6_TTL: + case ICE_FLOW_FIELD_IDX_IPV6_PROT: + prot_id = seg == 0 ? ICE_PROT_IPV6_OF_OR_S : ICE_PROT_IPV6_IL; + + /* TTL and PROT share the same extraction seq. entry. + * Each is considered a sibling to the other in terms of sharing + * the same extraction sequence entry. + */ + if (fld == ICE_FLOW_FIELD_IDX_IPV6_TTL) + sib = ICE_FLOW_FIELD_IDX_IPV6_PROT; + else if (fld == ICE_FLOW_FIELD_IDX_IPV6_PROT) + sib = ICE_FLOW_FIELD_IDX_IPV6_TTL; + + /* If the sibling field is also included, that field's + * mask needs to be included. + */ + if (match & BIT(sib)) + sib_mask = ice_flds_info[sib].mask; break; case ICE_FLOW_FIELD_IDX_IPV4_SA: case ICE_FLOW_FIELD_IDX_IPV4_DA: @@ -733,6 +751,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params, ICE_FLOW_FV_EXTRACT_SZ; flds[fld].xtrct.disp = (u8)((ice_flds_info[fld].off + adj) % ese_bits); flds[fld].xtrct.idx = params->es_cnt; + flds[fld].xtrct.mask = ice_flds_info[fld].mask; /* Adjust the next field-entry index after accommodating the number of * entries this field consumes @@ -742,7 +761,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params, /* Fill in the extraction sequence entries needed for this field */ off = flds[fld].xtrct.off; - mask = ice_flds_info[fld].mask; + mask = flds[fld].xtrct.mask; for (i = 0; i < cnt; i++) { /* Only consume an extraction sequence entry if there is no * sibling field associated with this field or the sibling entry @@ -767,7 +786,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params, params->es[idx].prot_id = prot_id; params->es[idx].off = off; - params->mask[idx] = mask; + params->mask[idx] = mask | sib_mask; params->es_cnt++; } @@ -885,7 +904,8 @@ ice_flow_create_xtrct_seq(struct ice_hw *hw, if (match & bit) { status = ice_flow_xtract_fld - (hw, params, i, (enum ice_flow_field)j); + (hw, params, i, (enum ice_flow_field)j, + match); if (status) return status; match &= ~bit; diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h index 326ff6f81..c224e6ebf 100644 --- a/drivers/net/ice/base/ice_flow.h +++ b/drivers/net/ice/base/ice_flow.h @@ -114,9 +114,12 @@ enum ice_flow_field { ICE_FLOW_FIELD_IDX_C_VLAN, ICE_FLOW_FIELD_IDX_ETH_TYPE, /* L3 */ - ICE_FLOW_FIELD_IDX_IP_DSCP, - ICE_FLOW_FIELD_IDX_IP_TTL, - ICE_FLOW_FIELD_IDX_IP_PROT, + ICE_FLOW_FIELD_IDX_IPV4_DSCP, + ICE_FLOW_FIELD_IDX_IPV6_DSCP, + ICE_FLOW_FIELD_IDX_IPV4_TTL, + ICE_FLOW_FIELD_IDX_IPV4_PROT, + ICE_FLOW_FIELD_IDX_IPV6_TTL, + ICE_FLOW_FIELD_IDX_IPV6_PROT, ICE_FLOW_FIELD_IDX_IPV4_SA, ICE_FLOW_FIELD_IDX_IPV4_DA, ICE_FLOW_FIELD_IDX_IPV6_SA, @@ -232,6 +235,7 @@ struct ice_flow_seg_xtrct { u16 off; /* Starting offset of the field in header in bytes */ u8 idx; /* Index of FV entry used */ u8 disp; /* Displacement of field in bits fr. FV entry's start */ + u16 mask; /* Mask for field */ }; enum ice_flow_fld_match_type { -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 06/12] net/ice/base: remove dead error condition 2019-10-06 3:13 ` [dpdk-dev] [PATCH v2 00/12] " Qi Zhang ` (4 preceding siblings ...) 2019-10-06 3:14 ` [dpdk-dev] [PATCH v2 05/12] net/ice/base: improvements to Flow Director masking Qi Zhang @ 2019-10-06 3:14 ` Qi Zhang 2019-10-06 3:14 ` [dpdk-dev] [PATCH v2 07/12] net/ice/base: zero initialize structures Qi Zhang ` (5 subsequent siblings) 11 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-10-06 3:14 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Jeb Cramer, Paul M Stillwell Jr The pointer cmd is set to an address of a structure, which can never be NULL. Remove the check-for-NULL lines since it's dead code anyway. Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Acked-by: Qiming Yang <qiming.yang@intel.com> --- drivers/net/ice/base/ice_common.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index 48ba160f7..4ba3ab202 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -176,9 +176,6 @@ ice_aq_get_link_topo_handle(struct ice_port_info *pi, u8 node_type, cmd = &desc.params.get_link_topo; - if (!cmd) - return ICE_ERR_PARAM; - ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_link_topo); cmd->addr.node_type_ctx = (ICE_AQC_LINK_TOPO_NODE_CTX_PORT << -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 07/12] net/ice/base: zero initialize structures 2019-10-06 3:13 ` [dpdk-dev] [PATCH v2 00/12] " Qi Zhang ` (5 preceding siblings ...) 2019-10-06 3:14 ` [dpdk-dev] [PATCH v2 06/12] net/ice/base: remove dead error condition Qi Zhang @ 2019-10-06 3:14 ` Qi Zhang 2019-10-06 3:14 ` [dpdk-dev] [PATCH v2 08/12] net/ice/base: fix unexpected switch rule overwrite Qi Zhang ` (4 subsequent siblings) 11 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-10-06 3:14 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Jeb Cramer, Jesse Brandeburg, Paul M Stillwell Jr Some functions create ice_pkg_enum structure, but it seems it's possible some of the members are used un-initialized. So we'll initialize all instantiations of this structure within ice_flex_pipe.c The patch also fix header comment mismatch issue for ice_init_prof_result_bm Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com> Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Acked-by: Qiming Yang <qiming.yang@intel.com> --- drivers/net/ice/base/ice_flex_pipe.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 8f8cab86e..bf14149b8 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -470,6 +470,7 @@ static void ice_init_pkg_hints(struct ice_hw *hw, struct ice_seg *ice_seg) int i; ice_memset(&hw->tnl, 0, sizeof(hw->tnl), ICE_NONDMA_MEM); + ice_memset(&state, 0, sizeof(state), ICE_NONDMA_MEM); if (!ice_seg) return; @@ -1517,6 +1518,8 @@ ice_get_sw_fv_bitmap(struct ice_hw *hw, enum ice_prof_type type, struct ice_seg *ice_seg; struct ice_fv *fv; + ice_memset(&state, 0, sizeof(state), ICE_NONDMA_MEM); + if (type == ICE_PROF_ALL) { u16 i; @@ -1573,6 +1576,8 @@ ice_get_sw_fv_list(struct ice_hw *hw, u16 *prot_ids, u8 ids_cnt, struct ice_fv *fv; u32 offset; + ice_memset(&state, 0, sizeof(state), ICE_NONDMA_MEM); + if (!ids_cnt || !hw->seg) return ICE_ERR_PARAM; @@ -1633,16 +1638,17 @@ ice_get_sw_fv_list(struct ice_hw *hw, u16 *prot_ids, u8 ids_cnt, } /** - * ice_init_profile_to_result_bm - Initialize the profile result index bitmap + * ice_init_prof_result_bm - Initialize the profile result index bitmap * @hw: pointer to hardware structure */ -void -ice_init_prof_result_bm(struct ice_hw *hw) +void ice_init_prof_result_bm(struct ice_hw *hw) { struct ice_pkg_enum state; struct ice_seg *ice_seg; struct ice_fv *fv; + ice_memset(&state, 0, sizeof(state), ICE_NONDMA_MEM); + if (!hw->seg) return; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 08/12] net/ice/base: fix unexpected switch rule overwrite 2019-10-06 3:13 ` [dpdk-dev] [PATCH v2 00/12] " Qi Zhang ` (6 preceding siblings ...) 2019-10-06 3:14 ` [dpdk-dev] [PATCH v2 07/12] net/ice/base: zero initialize structures Qi Zhang @ 2019-10-06 3:14 ` Qi Zhang 2019-10-06 3:14 ` [dpdk-dev] [PATCH v2 09/12] net/ice/base: fix flow raw field vector extraction Qi Zhang ` (3 subsequent siblings) 11 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-10-06 3:14 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr A switch rule with "drop" action will be overwritten by a rule with same pattern match but with a "to queue" action. While in an inversed flow creation sequence, the "to queue" can't be overwritten by the "drop" rule. The inconsistent behavior is not expected, the patch fix the issue by preventing rule overwrite in both cases. Fixes: fed0c5ca5f19 ("net/ice/base: support programming a new switch recipe") Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Acked-by: Qiming Yang <qiming.yang@intel.com> --- drivers/net/ice/base/ice_switch.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 334f1b5e0..2c02021b1 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -5977,13 +5977,10 @@ ice_adv_add_update_vsi_list(struct ice_hw *hw, u16 vsi_list_id = 0; if (cur_fltr->sw_act.fltr_act == ICE_FWD_TO_Q || - cur_fltr->sw_act.fltr_act == ICE_FWD_TO_QGRP) + cur_fltr->sw_act.fltr_act == ICE_FWD_TO_QGRP || + cur_fltr->sw_act.fltr_act == ICE_DROP_PACKET) return ICE_ERR_NOT_IMPL; - if (cur_fltr->sw_act.fltr_act == ICE_DROP_PACKET && - new_fltr->sw_act.fltr_act == ICE_DROP_PACKET) - return ICE_ERR_ALREADY_EXISTS; - if ((new_fltr->sw_act.fltr_act == ICE_FWD_TO_Q || new_fltr->sw_act.fltr_act == ICE_FWD_TO_QGRP) && (cur_fltr->sw_act.fltr_act == ICE_FWD_TO_VSI || -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 09/12] net/ice/base: fix flow raw field vector extraction 2019-10-06 3:13 ` [dpdk-dev] [PATCH v2 00/12] " Qi Zhang ` (7 preceding siblings ...) 2019-10-06 3:14 ` [dpdk-dev] [PATCH v2 08/12] net/ice/base: fix unexpected switch rule overwrite Qi Zhang @ 2019-10-06 3:14 ` Qi Zhang 2019-10-06 3:14 ` [dpdk-dev] [PATCH v2 10/12] net/ice/base: fix switch rule programming for all profiles Qi Zhang ` (2 subsequent siblings) 11 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-10-06 3:14 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Paul M Stillwell Jr Correct the ordering of raw field extraction in the field vector by taking into account the ordering setting for requesting block. Fixes: aa1cd410fa64 ("net/ice/base: add flow module") Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 370ad9ba3..38c7c42f7 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -806,6 +806,7 @@ static enum ice_status ice_flow_xtract_raws(struct ice_hw *hw, struct ice_flow_prof_params *params, u8 seg) { + u16 fv_words; u16 hdrs_sz; u8 i; @@ -821,6 +822,8 @@ ice_flow_xtract_raws(struct ice_hw *hw, struct ice_flow_prof_params *params, if (!hdrs_sz) return ICE_ERR_PARAM; + fv_words = hw->blk[params->blk].es.fvw; + for (i = 0; i < params->prof->segs[seg].raws_cnt; i++) { struct ice_flow_seg_fld_raw *raw; u16 off, cnt, j; @@ -853,6 +856,8 @@ ice_flow_xtract_raws(struct ice_hw *hw, struct ice_flow_prof_params *params, BITS_PER_BYTE)); off = raw->info.xtrct.off; for (j = 0; j < cnt; j++) { + u16 idx; + /* Make sure the number of extraction sequence required * does not exceed the block's capability */ @@ -860,8 +865,14 @@ ice_flow_xtract_raws(struct ice_hw *hw, struct ice_flow_prof_params *params, params->es_cnt >= ICE_MAX_FV_WORDS) return ICE_ERR_MAX_LIMIT; - params->es[params->es_cnt].prot_id = ICE_PROT_PAY; - params->es[params->es_cnt].off = off; + /* some blocks require a reversed field vector layout */ + if (hw->blk[params->blk].es.reverse) + idx = fv_words - params->es_cnt - 1; + else + idx = params->es_cnt; + + params->es[idx].prot_id = ICE_PROT_PAY; + params->es[idx].off = off; params->es_cnt++; off += ICE_FLOW_FV_EXTRACT_SZ; } -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 10/12] net/ice/base: fix switch rule programming for all profiles 2019-10-06 3:13 ` [dpdk-dev] [PATCH v2 00/12] " Qi Zhang ` (8 preceding siblings ...) 2019-10-06 3:14 ` [dpdk-dev] [PATCH v2 09/12] net/ice/base: fix flow raw field vector extraction Qi Zhang @ 2019-10-06 3:14 ` Qi Zhang 2019-10-06 3:14 ` [dpdk-dev] [PATCH v2 11/12] net/ice/base: add QFI for Flow Director Qi Zhang 2019-10-06 3:14 ` [dpdk-dev] [PATCH v2 12/12] net/base/ice: improve misc code style Qi Zhang 11 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-10-06 3:14 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Paul M Stillwell Jr In switch rule programming, if the caller requested tunnel type of ICE_SW_TUN_AND_NON_TUN, then the code would incorrectly attempt to add a tunneled UDP port in the training packet, this would cause the rule addition to fail. This patch does not attempt to add the UDP port so that the rule programming will succeed. Fixes: 75c06a770e25 ("net/ice/base: update switch training packets with open ports") Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_switch.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 2c02021b1..36da27f78 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -6214,7 +6214,8 @@ ice_add_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, if (status) goto err_ice_add_adv_rule; - if (rinfo->tun_type != ICE_NON_TUN) { + if (rinfo->tun_type != ICE_NON_TUN && + rinfo->tun_type != ICE_SW_TUN_AND_NON_TUN) { status = ice_fill_adv_packet_tun(hw, rinfo->tun_type, s_rule->pdata.lkup_tx_rx.hdr, pkt_offsets); -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 11/12] net/ice/base: add QFI for Flow Director 2019-10-06 3:13 ` [dpdk-dev] [PATCH v2 00/12] " Qi Zhang ` (9 preceding siblings ...) 2019-10-06 3:14 ` [dpdk-dev] [PATCH v2 10/12] net/ice/base: fix switch rule programming for all profiles Qi Zhang @ 2019-10-06 3:14 ` Qi Zhang 2019-10-06 3:14 ` [dpdk-dev] [PATCH v2 12/12] net/base/ice: improve misc code style Qi Zhang 11 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-10-06 3:14 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Paul M Stillwell Jr Added the GTP QFI field to the Flow director interface to allow matching against this field. Since this field only appears in GTP packets with extension headers, this also requires adding profile TCAM mask matching capability. This allows comprehending different PTYPE attributes by examining flags from the parser. Using this method, different profiles can be used by examining flag values from the parser. Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flex_pipe.c | 245 ++++++++++++++--------------------- drivers/net/ice/base/ice_flex_pipe.h | 6 +- drivers/net/ice/base/ice_flex_type.h | 66 ++++++++++ drivers/net/ice/base/ice_flow.c | 57 +++++++- drivers/net/ice/base/ice_flow.h | 24 +++- 5 files changed, 238 insertions(+), 160 deletions(-) diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index bf14149b8..c2af1dfe8 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -2692,34 +2692,7 @@ ice_find_prof_id_with_mask(struct ice_hw *hw, enum ice_block blk, continue; /* check if masks settings are the same for this profile */ - if (!ice_prof_has_mask(hw, blk, i, masks)) - continue; - - *prof_id = i; - return ICE_SUCCESS; - } - - return ICE_ERR_DOES_NOT_EXIST; -} - -/** - * ice_find_prof_id - find profile ID for a given field vector - * @hw: pointer to the hardware structure - * @blk: HW block - * @fv: field vector to search for - * @prof_id: receives the profile ID - */ -static enum ice_status -ice_find_prof_id(struct ice_hw *hw, enum ice_block blk, - struct ice_fv_word *fv, u8 *prof_id) -{ - struct ice_es *es = &hw->blk[blk].es; - u16 off, i; - - for (i = 0; i < es->count; i++) { - off = i * es->fvw; - - if (memcmp(&es->t[off], fv, es->fvw * sizeof(*fv))) + if (masks && !ice_prof_has_mask(hw, blk, i, masks)) continue; *prof_id = i; @@ -4364,127 +4337,58 @@ ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es) return ICE_SUCCESS; } +/* The entries here needs to match the order of enum ice_ptype_attrib */ +static const struct ice_ptype_attrib_info ice_ptype_attributes[] = { + { ICE_GTP_PDU_EH, ICE_GTP_PDU_FLAG_MASK }, + { ICE_GTP_SESSION, ICE_GTP_FLAGS_MASK }, + { ICE_GTP_DOWNLINK, ICE_GTP_FLAGS_MASK }, + { ICE_GTP_UPLINK, ICE_GTP_FLAGS_MASK }, +}; + /** - * ice_add_prof_with_mask - add profile - * @hw: pointer to the HW struct - * @blk: hardware block - * @id: profile tracking ID - * @ptypes: array of bitmaps indicating ptypes (ICE_FLOW_PTYPE_MAX bits) - * @es: extraction sequence (length of array is determined by the block) - * @masks: extraction sequence (length of array is determined by the block) - * - * This function registers a profile, which matches a set of PTYPES with a - * particular extraction sequence. While the hardware profile is allocated - * it will not be written until the first call to ice_add_flow that specifies - * the ID value used here. + * ice_get_ptype_attrib_info - get ptype attribute information + * @type: attribute type + * @info: pointer to variable to the attribute information */ -enum ice_status -ice_add_prof_with_mask(struct ice_hw *hw, enum ice_block blk, u64 id, - u8 ptypes[], struct ice_fv_word *es, u16 *masks) +static void +ice_get_ptype_attrib_info(enum ice_ptype_attrib_type type, + struct ice_ptype_attrib_info *info) { - u32 bytes = DIVIDE_AND_ROUND_UP(ICE_FLOW_PTYPE_MAX, BITS_PER_BYTE); - ice_declare_bitmap(ptgs_used, ICE_XLT1_CNT); - struct ice_prof_map *prof; - enum ice_status status; - u32 byte = 0; - u8 prof_id; - - ice_zero_bitmap(ptgs_used, ICE_XLT1_CNT); - - ice_acquire_lock(&hw->blk[blk].es.prof_map_lock); - - /* search for existing profile */ - status = ice_find_prof_id_with_mask(hw, blk, es, masks, &prof_id); - if (status) { - /* allocate profile ID */ - status = ice_alloc_prof_id(hw, blk, &prof_id); - if (status) - goto err_ice_add_prof; - if (blk == ICE_BLK_FD) { - /* For Flow Director block, the extraction sequence may - * need to be altered in the case where there are paired - * fields that have no match. This is necessary because - * for Flow Director, src and dest fields need to paired - * for filter programming and these values are swapped - * during Tx. - */ - status = ice_update_fd_swap(hw, prof_id, es); - if (status) - goto err_ice_add_prof; - } - status = ice_update_prof_masking(hw, blk, prof_id, es, masks); - if (status) - goto err_ice_add_prof; - - /* and write new es */ - ice_write_es(hw, blk, prof_id, es); - } - - ice_prof_inc_ref(hw, blk, prof_id); - - /* add profile info */ - - prof = (struct ice_prof_map *)ice_malloc(hw, sizeof(*prof)); - if (!prof) - goto err_ice_add_prof; - - prof->profile_cookie = id; - prof->prof_id = prof_id; - prof->ptg_cnt = 0; - prof->context = 0; - - /* build list of ptgs */ - while (bytes && prof->ptg_cnt < ICE_MAX_PTG_PER_PROFILE) { - u32 bit; - - if (!ptypes[byte]) { - bytes--; - byte++; - continue; - } - /* Examine 8 bits per byte */ - for (bit = 0; bit < 8; bit++) { - if (ptypes[byte] & BIT(bit)) { - u16 ptype; - u8 ptg; - u8 m; - - ptype = byte * BITS_PER_BYTE + bit; - - /* The package should place all ptypes in a - * non-zero PTG, so the following call should - * never fail. - */ - if (ice_ptg_find_ptype(hw, blk, ptype, &ptg)) - continue; + *info = ice_ptype_attributes[type]; +} - /* If PTG is already added, skip and continue */ - if (ice_is_bit_set(ptgs_used, ptg)) - continue; +/** + * ice_add_prof_attrib - add any ptg with attributes to profile + * @prof: pointer to the profile to which ptg entries will be added + * @ptg: PTG to be added + * @ptype: PTYPE that needs to be looked up + * @attr: array of attributes that will be considered + * @attr_cnt: number of elements in the attribute array + */ +static enum ice_status +ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype, + const struct ice_ptype_attributes *attr, u16 attr_cnt) +{ + bool found = false; + u16 i; - ice_set_bit(ptg, ptgs_used); - prof->ptg[prof->ptg_cnt] = ptg; + for (i = 0; i < attr_cnt; i++) { + if (attr[i].ptype == ptype) { + found = true; - if (++prof->ptg_cnt >= ICE_MAX_PTG_PER_PROFILE) - break; + prof->ptg[prof->ptg_cnt] = ptg; + ice_get_ptype_attrib_info(attr[i].attrib, + &prof->attr[prof->ptg_cnt]); - /* nothing left in byte, then exit */ - m = ~((1 << (bit + 1)) - 1); - if (!(ptypes[byte] & m)) - break; - } + if (++prof->ptg_cnt >= ICE_MAX_PTG_PER_PROFILE) + return ICE_ERR_MAX_LIMIT; } - - bytes--; - byte++; } - LIST_ADD(&prof->list, &hw->blk[blk].es.prof_map); - status = ICE_SUCCESS; + if (!found) + return ICE_ERR_DOES_NOT_EXIST; -err_ice_add_prof: - ice_release_lock(&hw->blk[blk].es.prof_map_lock); - return status; + return ICE_SUCCESS; } /** @@ -4493,16 +4397,20 @@ ice_add_prof_with_mask(struct ice_hw *hw, enum ice_block blk, u64 id, * @blk: hardware block * @id: profile tracking ID * @ptypes: array of bitmaps indicating ptypes (ICE_FLOW_PTYPE_MAX bits) + * @attr: array of attributes + * @attr_cnt: number of elements in attrib array * @es: extraction sequence (length of array is determined by the block) + * @masks: mask for extraction sequence * - * This function registers a profile, which matches a set of PTGs with a + * This function registers a profile, which matches a set of PTYPES with a * particular extraction sequence. While the hardware profile is allocated * it will not be written until the first call to ice_add_flow that specifies * the ID value used here. */ enum ice_status ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], - struct ice_fv_word *es) + const struct ice_ptype_attributes *attr, u16 attr_cnt, + struct ice_fv_word *es, u16 *masks) { u32 bytes = DIVIDE_AND_ROUND_UP(ICE_FLOW_PTYPE_MAX, BITS_PER_BYTE); ice_declare_bitmap(ptgs_used, ICE_XLT1_CNT); @@ -4516,7 +4424,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], ice_acquire_lock(&hw->blk[blk].es.prof_map_lock); /* search for existing profile */ - status = ice_find_prof_id(hw, blk, es, &prof_id); + status = ice_find_prof_id_with_mask(hw, blk, es, masks, &prof_id); if (status) { /* allocate profile ID */ status = ice_alloc_prof_id(hw, blk, &prof_id); @@ -4534,6 +4442,9 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], if (status) goto err_ice_add_prof; } + status = ice_update_prof_masking(hw, blk, prof_id, es, masks); + if (status) + goto err_ice_add_prof; /* and write new es */ ice_write_es(hw, blk, prof_id, es); @@ -4582,10 +4493,25 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], continue; ice_set_bit(ptg, ptgs_used); - prof->ptg[prof->ptg_cnt] = ptg; - - if (++prof->ptg_cnt >= ICE_MAX_PTG_PER_PROFILE) + /* Check to see there are any attributes for + * this ptype, and add them if found. + */ + status = ice_add_prof_attrib(prof, ptg, ptype, + attr, attr_cnt); + if (status == ICE_ERR_MAX_LIMIT) break; + if (status) { + /* This is simple a ptype/ptg with no + * attribute + */ + prof->ptg[prof->ptg_cnt] = ptg; + prof->attr[prof->ptg_cnt].flags = 0; + prof->attr[prof->ptg_cnt].mask = 0; + + if (++prof->ptg_cnt >= + ICE_MAX_PTG_PER_PROFILE) + break; + } /* nothing left in byte, then exit */ m = ~((1 << (bit + 1)) - 1); @@ -4928,6 +4854,7 @@ ice_get_prof(struct ice_hw *hw, enum ice_block blk, u64 hdl, p->type = ICE_PTG_ES_ADD; p->ptype = 0; p->ptg = map->ptg[i]; + p->attr = map->attr[i]; p->add_ptg = 0; p->add_prof = 1; @@ -5017,6 +4944,7 @@ ice_add_prof_to_lst(struct ice_hw *hw, enum ice_block blk, p->tcam[i].prof_id = map->prof_id; p->tcam[i].tcam_idx = ICE_INVALID_TCAM; p->tcam[i].ptg = map->ptg[i]; + p->tcam[i].attr = map->attr[i]; } LIST_ADD(&p->list, lst); @@ -5064,6 +4992,19 @@ ice_move_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig, } /** + * ice_set_tcam_flags - set tcam flag don't care mask + * @mask: mask for flags + * @dc_mask: pointer to the don't care mask + */ +static void ice_set_tcam_flags(u16 mask, u8 dc_mask[ICE_TCAM_KEY_VAL_SZ]) +{ + u16 *flag_word; + + /* flags are lowest u16 */ + flag_word = (u16 *)dc_mask; + *flag_word = ~mask; +} +/** * ice_prof_tcam_ena_dis - add enable or disable TCAM change * @hw: pointer to the HW struct * @blk: hardware block @@ -5105,9 +5046,12 @@ ice_prof_tcam_ena_dis(struct ice_hw *hw, enum ice_block blk, bool enable, if (!p) return ICE_ERR_NO_MEMORY; + /* set don't care masks for tcam flags */ + ice_set_tcam_flags(tcam->attr.mask, dc_msk); + status = ice_tcam_write_entry(hw, blk, tcam->tcam_idx, tcam->prof_id, - tcam->ptg, vsig, 0, 0, vl_msk, dc_msk, - nm_msk); + tcam->ptg, vsig, 0, tcam->attr.flags, + vl_msk, dc_msk, nm_msk); if (status) goto err_ice_prof_tcam_ena_dis; @@ -5258,6 +5202,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl, t->tcam[i].ptg = map->ptg[i]; t->tcam[i].prof_id = map->prof_id; t->tcam[i].tcam_idx = tcam_idx; + t->tcam[i].attr = map->attr[i]; t->tcam[i].in_use = true; p->type = ICE_TCAM_ADD; @@ -5267,11 +5212,15 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl, p->vsig = vsig; p->tcam_idx = t->tcam[i].tcam_idx; + /* set don't care masks for tcam flags */ + ice_set_tcam_flags(t->tcam[i].attr.mask, dc_msk); + /* write the TCAM entry */ status = ice_tcam_write_entry(hw, blk, t->tcam[i].tcam_idx, t->tcam[i].prof_id, - t->tcam[i].ptg, vsig, 0, 0, - vl_msk, dc_msk, nm_msk); + t->tcam[i].ptg, vsig, 0, + t->tcam[i].attr.flags, vl_msk, + dc_msk, nm_msk); if (status) goto err_ice_add_prof_id_vsig; diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h index e7d42e3de..b24a09b4d 100644 --- a/drivers/net/ice/base/ice_flex_pipe.h +++ b/drivers/net/ice/base/ice_flex_pipe.h @@ -52,11 +52,9 @@ ice_tunnel_get_type(struct ice_hw *hw, u16 port, enum ice_tunnel_type *type); enum ice_status ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig); enum ice_status -ice_add_prof_with_mask(struct ice_hw *hw, enum ice_block blk, u64 id, - u8 ptypes[], struct ice_fv_word *es, u16 *masks); -enum ice_status ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], - struct ice_fv_word *es); + const struct ice_ptype_attributes *attr, u16 attr_cnt, + struct ice_fv_word *es, u16 *masks); void ice_init_all_prof_masks(struct ice_hw *hw); void ice_shutdown_all_prof_masks(struct ice_hw *hw); struct ice_prof_map * diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h index 92d205ac7..1be98ea52 100644 --- a/drivers/net/ice/base/ice_flex_type.h +++ b/drivers/net/ice/base/ice_flex_type.h @@ -278,6 +278,69 @@ enum ice_sect { #define ICE_PTYPE_IPV6_TCP_PAY 92 #define ICE_PTYPE_IPV6_SCTP_PAY 93 #define ICE_PTYPE_IPV6_ICMP_PAY 94 +#define ICE_MAC_IPV4_GTPC_TEID 325 +#define ICE_MAC_IPV6_GTPC_TEID 326 +#define ICE_MAC_IPV4_GTPC 327 +#define ICE_MAC_IPV6_GTPC 328 +#define ICE_MAC_IPV4_GTPU 329 +#define ICE_MAC_IPV6_GTPU 330 +#define ICE_MAC_IPV4_GTPU_IPV4_FRAG 331 +#define ICE_MAC_IPV4_GTPU_IPV4_PAY 332 +#define ICE_MAC_IPV4_GTPU_IPV4_UDP_PAY 333 +#define ICE_MAC_IPV4_GTPU_IPV4_TCP 334 +#define ICE_MAC_IPV4_GTPU_IPV4_ICMP 335 +#define ICE_MAC_IPV6_GTPU_IPV4_FRAG 336 +#define ICE_MAC_IPV6_GTPU_IPV4_PAY 337 +#define ICE_MAC_IPV6_GTPU_IPV4_UDP_PAY 338 +#define ICE_MAC_IPV6_GTPU_IPV4_TCP 339 +#define ICE_MAC_IPV6_GTPU_IPV4_ICMP 340 +#define ICE_MAC_IPV4_GTPU_IPV6_FRAG 341 +#define ICE_MAC_IPV4_GTPU_IPV6_PAY 342 +#define ICE_MAC_IPV4_GTPU_IPV6_UDP_PAY 343 +#define ICE_MAC_IPV4_GTPU_IPV6_TCP 344 +#define ICE_MAC_IPV4_GTPU_IPV6_ICMPV6 345 +#define ICE_MAC_IPV6_GTPU_IPV6_FRAG 346 +#define ICE_MAC_IPV6_GTPU_IPV6_PAY 347 +#define ICE_MAC_IPV6_GTPU_IPV6_UDP_PAY 348 +#define ICE_MAC_IPV6_GTPU_IPV6_TCP 349 +#define ICE_MAC_IPV6_GTPU_IPV6_ICMPV6 350 + +/* Attributes that can modify PTYPE definitions. + * + * These values will represent special attributes for PTYPES, which will + * resolve into metadata packet flags definitions that can be used in the TCAM + * for identifying a PTYPE with specific characteristics. + */ +enum ice_ptype_attrib_type { + /* GTP PTYPES */ + ICE_PTYPE_ATTR_GTP_PDU_EH, + ICE_PTYPE_ATTR_GTP_SESSION, + ICE_PTYPE_ATTR_GTP_DOWNLINK, + ICE_PTYPE_ATTR_GTP_UPLINK, +}; + +struct ice_ptype_attrib_info { + u16 flags; + u16 mask; +}; + +/* TCAM flag definitions */ +#define ICE_GTP_PDU BIT(14) +#define ICE_GTP_PDU_LINK BIT(13) + +/* GTP attributes */ +#define ICE_GTP_PDU_FLAG_MASK (ICE_GTP_PDU) +#define ICE_GTP_PDU_EH ICE_GTP_PDU + +#define ICE_GTP_FLAGS_MASK (ICE_GTP_PDU | ICE_GTP_PDU_LINK) +#define ICE_GTP_SESSION 0 +#define ICE_GTP_DOWNLINK ICE_GTP_PDU +#define ICE_GTP_UPLINK (ICE_GTP_PDU | ICE_GTP_PDU_LINK) + +struct ice_ptype_attributes { + u16 ptype; + enum ice_ptype_attrib_type attrib; +}; /* Packet Type Groups (PTG) - Inner Most fields (IM) */ #define ICE_PTG_IM_IPV4_TCP 16 @@ -530,12 +593,14 @@ struct ice_prof_map { u8 prof_id; u8 ptg_cnt; u8 ptg[ICE_MAX_PTG_PER_PROFILE]; + struct ice_ptype_attrib_info attr[ICE_MAX_PTG_PER_PROFILE]; }; #define ICE_INVALID_TCAM 0xFFFF struct ice_tcam_inf { u16 tcam_idx; + struct ice_ptype_attrib_info attr; u8 ptg; u8 prof_id; u8 in_use; @@ -708,6 +773,7 @@ struct ice_chs_chg { u16 vsig; u16 orig_vsig; u16 tcam_idx; + struct ice_ptype_attrib_info attr; }; #define ICE_FLOW_PTYPE_MAX ICE_XLT1_CNT diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 38c7c42f7..f4f961167 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -20,6 +20,7 @@ #define ICE_FLOW_FLD_SZ_ARP_OPER 2 #define ICE_FLOW_FLD_SZ_GRE_KEYID 4 #define ICE_FLOW_FLD_SZ_GTP_TEID 4 +#define ICE_FLOW_FLD_SZ_GTP_QFI 2 #define ICE_FLOW_FLD_SZ_PPPOE_SESS_ID 2 /* Describe properties of a protocol header field */ @@ -126,6 +127,12 @@ struct ice_flow_field_info ice_flds_info[ICE_FLOW_FIELD_IDX_MAX] = { /* ICE_FLOW_FIELD_IDX_GTPU_IP_TEID */ ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_GTPU_IP, 12, ICE_FLOW_FLD_SZ_GTP_TEID), + /* ICE_FLOW_FIELD_IDX_GTPU_EH_TEID */ + ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_GTPU_EH, 12, + ICE_FLOW_FLD_SZ_GTP_TEID), + /* ICE_FLOW_FIELD_IDX_GTPU_EH_QFI */ + ICE_FLOW_FLD_INFO_MSK(ICE_FLOW_SEG_HDR_GTPU_EH, 20, + ICE_FLOW_FLD_SZ_GTP_QFI, 0x003f), /* ICE_FLOW_FIELD_IDX_GTPU_UP_TEID */ ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_GTPU_UP, 12, ICE_FLOW_FLD_SZ_GTP_TEID), @@ -169,7 +176,7 @@ static const u32 ice_ptypes_macvlan_il[] = { static const u32 ice_ptypes_ipv4_ofos[] = { 0x1DC00000, 0x04000800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x000FC000, 0x00000000, 0x00000000, + 0x0003000F, 0x000FC000, 0x03E0F800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -193,7 +200,7 @@ static const u32 ice_ptypes_ipv4_il[] = { static const u32 ice_ptypes_ipv6_ofos[] = { 0x00000000, 0x00000000, 0x77000000, 0x10002000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x03F00000, 0x00000000, 0x00000000, + 0x00080F00, 0x03F00000, 0x7C1F0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -336,10 +343,33 @@ static const u32 ice_ptypes_gtpc_tid[] = { }; /* Packet types for GTPU */ +static const struct ice_ptype_attributes ice_attr_gtpu_eh[] = { + { ICE_MAC_IPV4_GTPU_IPV4_FRAG, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV4_GTPU_IPV4_PAY, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV4_GTPU_IPV4_UDP_PAY, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV4_GTPU_IPV4_TCP, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV4_GTPU_IPV4_ICMP, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV4_FRAG, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV4_PAY, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV4_UDP_PAY, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV4_TCP, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV4_ICMP, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV4_GTPU_IPV6_FRAG, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV4_GTPU_IPV6_PAY, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV4_GTPU_IPV6_UDP_PAY, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV4_GTPU_IPV6_TCP, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV4_GTPU_IPV6_ICMPV6, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV6_FRAG, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV6_PAY, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV6_UDP_PAY, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV6_TCP, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV6_ICMPV6, ICE_PTYPE_ATTR_GTP_PDU_EH }, +}; + static const u32 ice_ptypes_gtpu[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x7FFFF800, 0x00000000, + 0x00000000, 0x00000000, 0x7FFFFE00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -370,6 +400,10 @@ struct ice_flow_prof_params { * This will give us the direction flags. */ struct ice_fv_word es[ICE_MAX_FV_WORDS]; + /* attributes can be used to add attributes to a particular PTYPE */ + const struct ice_ptype_attributes *attr; + u16 attr_cnt; + u16 mask[ICE_MAX_FV_WORDS]; ice_declare_bitmap(ptypes, ICE_FLOW_PTYPE_MAX); }; @@ -562,6 +596,16 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params) ice_and_bitmap(params->ptypes, params->ptypes, src, ICE_FLOW_PTYPE_MAX); } + } else if (hdrs & ICE_FLOW_SEG_HDR_GTPU_EH) { + if (!i) { + src = (const ice_bitmap_t *)ice_ptypes_gtpu; + ice_and_bitmap(params->ptypes, params->ptypes, + src, ICE_FLOW_PTYPE_MAX); + } + + /* Attributes for GTP packet with Extension Header */ + params->attr = ice_attr_gtpu_eh; + params->attr_cnt = ARRAY_SIZE(ice_attr_gtpu_eh); } } @@ -711,6 +755,8 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params, case ICE_FLOW_FIELD_IDX_GTPU_IP_TEID: case ICE_FLOW_FIELD_IDX_GTPU_UP_TEID: case ICE_FLOW_FIELD_IDX_GTPU_DWN_TEID: + case ICE_FLOW_FIELD_IDX_GTPU_EH_TEID: + case ICE_FLOW_FIELD_IDX_GTPU_EH_QFI: /* GTP is accessed through UDP OF protocol */ prot_id = ICE_PROT_UDP_OF; break; @@ -1176,8 +1222,9 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk, } /* Add a HW profile for this flow profile */ - status = ice_add_prof_with_mask(hw, blk, prof_id, (u8 *)params.ptypes, - params.es, params.mask); + status = ice_add_prof(hw, blk, prof_id, (u8 *)params.ptypes, + params.attr, params.attr_cnt, params.es, + params.mask); if (status) { ice_debug(hw, ICE_DBG_FLOW, "Error adding a HW flow profile\n"); goto out; diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h index c224e6ebf..4686274af 100644 --- a/drivers/net/ice/base/ice_flow.h +++ b/drivers/net/ice/base/ice_flow.h @@ -58,6 +58,19 @@ #define ICE_FLOW_HASH_GTP_U_IPV6_TEID \ (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_GTP_U_TEID) +#define ICE_FLOW_HASH_GTP_U_EH_TEID \ + (BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_EH_TEID)) + +#define ICE_FLOW_HASH_GTP_U_EH_QFI \ + (BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_EH_QFI)) + +#define ICE_FLOW_HASH_GTP_U_IPV4_EH \ + (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_GTP_U_EH_TEID | \ + ICE_FLOW_HASH_GTP_U_EH_QFI) +#define ICE_FLOW_HASH_GTP_U_IPV6_EH \ + (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_GTP_U_EH_TEID | \ + ICE_FLOW_HASH_GTP_U_EH_QFI) + #define ICE_FLOW_HASH_PPPOE_SESS_ID \ (BIT_ULL(ICE_FLOW_FIELD_IDX_PPPOE_SESS_ID)) @@ -89,9 +102,10 @@ enum ice_flow_seg_hdr { ICE_FLOW_SEG_HDR_GTPC = 0x00000400, ICE_FLOW_SEG_HDR_GTPC_TEID = 0x00000800, ICE_FLOW_SEG_HDR_GTPU_IP = 0x00001000, - ICE_FLOW_SEG_HDR_GTPU_DWN = 0x00002000, - ICE_FLOW_SEG_HDR_GTPU_UP = 0x00004000, - ICE_FLOW_SEG_HDR_PPPOE = 0x00008000, + ICE_FLOW_SEG_HDR_GTPU_EH = 0x00002000, + ICE_FLOW_SEG_HDR_GTPU_DWN = 0x00004000, + ICE_FLOW_SEG_HDR_GTPU_UP = 0x00008000, + ICE_FLOW_SEG_HDR_PPPOE = 0x00010000, }; /* These segements all have the same PTYPES, but are otherwise distinguished by @@ -99,6 +113,7 @@ enum ice_flow_seg_hdr { * * gtp_eh_pdu gtp_eh_pdu_link * ICE_FLOW_SEG_HDR_GTPU_IP 0 0 + * ICE_FLOW_SEG_HDR_GTPU_EH 1 don't care * ICE_FLOW_SEG_HDR_GTPU_DWN 1 0 * ICE_FLOW_SEG_HDR_GTPU_UP 1 1 */ @@ -147,6 +162,9 @@ enum ice_flow_field { ICE_FLOW_FIELD_IDX_GTPC_TEID, /* GTPU_IP */ ICE_FLOW_FIELD_IDX_GTPU_IP_TEID, + /* GTPU_EH */ + ICE_FLOW_FIELD_IDX_GTPU_EH_TEID, + ICE_FLOW_FIELD_IDX_GTPU_EH_QFI, /* GTPU_UP */ ICE_FLOW_FIELD_IDX_GTPU_UP_TEID, /* GTPU_DWN */ -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v2 12/12] net/base/ice: improve misc code style 2019-10-06 3:13 ` [dpdk-dev] [PATCH v2 00/12] " Qi Zhang ` (10 preceding siblings ...) 2019-10-06 3:14 ` [dpdk-dev] [PATCH v2 11/12] net/ice/base: add QFI for Flow Director Qi Zhang @ 2019-10-06 3:14 ` Qi Zhang 11 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-10-06 3:14 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Tony Nguyen, Paul M Stillwell Jr Combine a couple of function definitions that can fit on one line. RCT a variable declaration. Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flex_pipe.c | 6 ++---- drivers/net/ice/base/ice_flex_pipe.h | 3 +-- drivers/net/ice/base/ice_nvm.c | 2 +- 3 files changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index c2af1dfe8..dd098f529 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -2131,8 +2131,7 @@ ice_ptg_find_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 *ptg) * This function allocates a given packet type group ID specified by the ptg * parameter. */ -static -void ice_ptg_alloc_val(struct ice_hw *hw, enum ice_block blk, u8 ptg) +static void ice_ptg_alloc_val(struct ice_hw *hw, enum ice_block blk, u8 ptg) { hw->blk[blk].xlt1.ptg_tbl[ptg].in_use = true; } @@ -3286,8 +3285,7 @@ static const u32 ice_blk_sids[ICE_BLK_COUNT][ICE_SID_OFF_COUNT] = { * @hw: pointer to the hardware structure * @blk: the HW block to initialize */ -static -void ice_init_sw_xlt1_db(struct ice_hw *hw, enum ice_block blk) +static void ice_init_sw_xlt1_db(struct ice_hw *hw, enum ice_block blk) { u16 pt; diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h index b24a09b4d..ee606af15 100644 --- a/drivers/net/ice/base/ice_flex_pipe.h +++ b/drivers/net/ice/base/ice_flex_pipe.h @@ -65,8 +65,7 @@ enum ice_status ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl); enum ice_status ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl); -enum ice_status -ice_init_pkg(struct ice_hw *hw, u8 *buff, u32 len); +enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buff, u32 len); enum ice_status ice_copy_and_init_pkg(struct ice_hw *hw, const u8 *buf, u32 len); enum ice_status ice_init_hw_tbls(struct ice_hw *hw); diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c index e00942528..1dbfc2dcc 100644 --- a/drivers/net/ice/base/ice_nvm.c +++ b/drivers/net/ice/base/ice_nvm.c @@ -260,8 +260,8 @@ enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data) */ enum ice_status ice_init_nvm(struct ice_hw *hw) { - struct ice_nvm_info *nvm = &hw->nvm; u16 oem_hi, oem_lo, boot_cfg_tlv, boot_cfg_tlv_len; + struct ice_nvm_info *nvm = &hw->nvm; u16 eetrack_lo, eetrack_hi; enum ice_status status; u32 fla, gens_stat; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 00/12] net/ice: base code update 2019-09-02 3:55 [dpdk-dev] [PATCH 0/8] net/ice/base: share code update secend batch Qi Zhang ` (13 preceding siblings ...) 2019-10-06 3:13 ` [dpdk-dev] [PATCH v2 00/12] " Qi Zhang @ 2019-10-08 1:50 ` Qi Zhang 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 01/12] net/ice/base: fix for adding PPPoE switch rule Qi Zhang ` (12 more replies) 14 siblings, 13 replies; 166+ messages in thread From: Qi Zhang @ 2019-10-08 1:50 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang Changes in summary 1. add GTP TEID support for fdir 2. improve fdir mask support. 3. couple fixes. 4. support QFI match in fdir v2: - add QFI match support in fdir - couple fixes and code clean v3: - fix title in patch 12/12 Qi Zhang (12): net/ice/base: fix for adding PPPoE switch rule net/ice/base: fix for NVGRE switch rule programming net/ice/base: update flow ptype bitmaps net/ice/base: add GTPU TEID support for FD net/ice/base: improvements to Flow Director masking net/ice/base: remove dead error condition net/ice/base: zero initialize structures net/ice/base: fix unexpected switch rule overwrite net/ice/base: fix flow raw field vector extraction net/ice/base: fix switch rule programming for all profiles net/ice/base: add QFI for Flow Director net/ice/base: improve misc code style drivers/net/ice/base/ice_common.c | 3 - drivers/net/ice/base/ice_fdir.c | 2 + drivers/net/ice/base/ice_fdir.h | 1 + drivers/net/ice/base/ice_flex_pipe.c | 334 +++++++++++++------------------ drivers/net/ice/base/ice_flex_pipe.h | 9 +- drivers/net/ice/base/ice_flex_type.h | 70 ++++++- drivers/net/ice/base/ice_flow.c | 224 ++++++++++++++------- drivers/net/ice/base/ice_flow.h | 34 +++- drivers/net/ice/base/ice_nvm.c | 2 +- drivers/net/ice/base/ice_protocol_type.h | 2 +- drivers/net/ice/base/ice_switch.c | 30 +-- 11 files changed, 409 insertions(+), 302 deletions(-) -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 01/12] net/ice/base: fix for adding PPPoE switch rule 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 00/12] net/ice: base code update Qi Zhang @ 2019-10-08 1:50 ` Qi Zhang 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 02/12] net/ice/base: fix for NVGRE switch rule programming Qi Zhang ` (11 subsequent siblings) 12 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-10-08 1:50 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Junfeng Guo, Paul M Stillwell Jr Update VLAN protocol ID to correct value for single VXLAN scenario. Fix the missing ethertype offset for PPPoE dummy packet offset to allow matching the corresponding field. Fixes: d341bdc30290 ("net/ice/base: add support for GTP and PPPoE protocols") Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Acked-by: Qiming Yang <qiming.yang@intel.com> --- drivers/net/ice/base/ice_protocol_type.h | 2 +- drivers/net/ice/base/ice_switch.c | 16 ++++++++++------ 2 files changed, 11 insertions(+), 7 deletions(-) diff --git a/drivers/net/ice/base/ice_protocol_type.h b/drivers/net/ice/base/ice_protocol_type.h index f61345a7f..548c9730a 100644 --- a/drivers/net/ice/base/ice_protocol_type.h +++ b/drivers/net/ice/base/ice_protocol_type.h @@ -118,7 +118,7 @@ enum ice_prot_id { #define ICE_MAC_OFOS_HW 1 #define ICE_MAC_IL_HW 4 #define ICE_ETYPE_OL_HW 9 -#define ICE_VLAN_OL_HW 16 +#define ICE_VLAN_OL_HW 17 #define ICE_IPV4_OFOS_HW 32 #define ICE_IPV4_IL_HW 33 #define ICE_IPV6_OFOS_HW 40 diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 80afa74cd..71d7f0737 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -419,6 +419,7 @@ dummy_udp_gtp_packet[] = { static const struct ice_dummy_pkt_offsets dummy_pppoe_packet_offsets[] = { { ICE_MAC_OFOS, 0 }, + { ICE_ETYPE_OL, 12 }, { ICE_VLAN_OFOS, 14}, { ICE_PPPOE, 18 }, { ICE_PROTOCOL_LAST, 0 }, @@ -429,20 +430,23 @@ dummy_pppoe_packet[] = { 0x00, 0x00, 0x00, 0x00, /* ICE_MAC_OFOS 0 */ 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x81, 0x00, + + 0x81, 0x00, /* ICE_ETYPE_OL 12 */ 0x00, 0x00, 0x88, 0x64, /* ICE_VLAN_OFOS 14 */ - 0x11, 0x00, 0x00, 0x01, /* ICE_PPPOE 18 */ - 0x00, 0x4e, 0x00, 0x21, + 0x11, 0x00, 0x00, 0x00, /* ICE_PPPOE 18 */ + 0x00, 0x16, + + 0x00, 0x21, /* PPP Link Layer 24 */ - 0x45, 0x00, 0x00, 0x30, /* PDU */ + 0x45, 0x00, 0x00, 0x14, /* ICE_IPV4_IL 26 */ + 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, /* 2 bytes for 4 byte alignment */ + 0x00, 0x00, /* 2 bytes for 4 bytes alignment */ }; /* this is a recipe to profile association bitmap */ -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 02/12] net/ice/base: fix for NVGRE switch rule programming 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 00/12] net/ice: base code update Qi Zhang 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 01/12] net/ice/base: fix for adding PPPoE switch rule Qi Zhang @ 2019-10-08 1:50 ` Qi Zhang 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 03/12] net/ice/base: update flow ptype bitmaps Qi Zhang ` (10 subsequent siblings) 12 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-10-08 1:50 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Paul M Stillwell Jr Correct for GRE/NVGRE training packets to include the correct protocol IDs for TCP and UDP respectively. Fixes: b83a0c290322 ("net/ice/base: fix inner TCP and UDP support for GRE") Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Acked-by: Qiming Yang <qiming.yang@intel.com> --- drivers/net/ice/base/ice_switch.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 71d7f0737..334f1b5e0 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -93,7 +93,7 @@ u8 dummy_gre_tcp_packet[] = { 0x45, 0x00, 0x00, 0x14, /* ICE_IPV4_IL 56 */ 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, + 0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, @@ -140,7 +140,7 @@ u8 dummy_gre_udp_packet[] = { 0x45, 0x00, 0x00, 0x14, /* ICE_IPV4_IL 56 */ 0x00, 0x00, 0x00, 0x00, - 0x00, 0x00, 0x00, 0x00, + 0x00, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 03/12] net/ice/base: update flow ptype bitmaps 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 00/12] net/ice: base code update Qi Zhang 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 01/12] net/ice/base: fix for adding PPPoE switch rule Qi Zhang 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 02/12] net/ice/base: fix for NVGRE switch rule programming Qi Zhang @ 2019-10-08 1:50 ` Qi Zhang 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 04/12] net/ice/base: add GTPU TEID support for FD Qi Zhang ` (9 subsequent siblings) 12 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-10-08 1:50 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Paul M Stillwell Jr In the flow api, the outer first ptype bitmaps contained many references to inner ptypes. Because of PTG assignments, these were causing issues when programming rules on the inner ptypes. For example, in RSS when programming the outer IPV6 hash fields, it also programmed several inner IPV4 PTGs with the same extraction. There were several ptypes that have been removed, thus this patch removes those bits from the type bitmaps. Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Acked-by: Qiming Yang <qiming.yang@intel.com> --- drivers/net/ice/base/ice_flow.c | 38 +++++++++++++++++++------------------- 1 file changed, 19 insertions(+), 19 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index e03c5d0e7..8ed3f8eb7 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -141,9 +141,9 @@ struct ice_flow_field_info ice_flds_info[ICE_FLOW_FIELD_IDX_MAX] = { * Packet types for packets with an Outer/First/Single MAC header */ static const u32 ice_ptypes_mac_ofos[] = { - 0xFDC00CC6, 0xBFBF7F7E, 0xF7EFDFDF, 0xFEFDFDFB, - 0x03BF7F7E, 0x00000000, 0x00000000, 0x00000000, - 0x000B0F0F, 0x00003000, 0x00000000, 0x00000000, + 0xFDC00846, 0xBFBF7F7E, 0xF70001DF, 0xFEFDFDFB, + 0x0000077E, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00003000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -165,9 +165,9 @@ static const u32 ice_ptypes_macvlan_il[] = { /* Packet types for packets with an Outer/First/Single IPv4 header */ static const u32 ice_ptypes_ipv4_ofos[] = { - 0xFDC00000, 0xBFBF7F7E, 0x00EFDFDF, 0x00000000, + 0x1DC00000, 0x04000800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x0003000F, 0x000FC000, 0x00000000, 0x00000000, + 0x00000000, 0x000FC000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -189,9 +189,9 @@ static const u32 ice_ptypes_ipv4_il[] = { /* Packet types for packets with an Outer/First/Single IPv6 header */ static const u32 ice_ptypes_ipv6_ofos[] = { - 0x00000000, 0x00000000, 0xF7000000, 0xFEFDFDFB, - 0x03BF7F7E, 0x00000000, 0x00000000, 0x00000000, - 0x00080F00, 0x03F00000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x77000000, 0x10002000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x03F00000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -201,8 +201,8 @@ static const u32 ice_ptypes_ipv6_ofos[] = { /* Packet types for packets with an Innermost/Last IPv6 header */ static const u32 ice_ptypes_ipv6_il[] = { - 0x00000000, 0x03B80770, 0x00EE01DC, 0x0EE00000, - 0x03B80770, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x03B80770, 0x000001DC, 0x0EE00000, + 0x00000770, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x7FE00000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -228,7 +228,7 @@ static const u32 ice_ptypes_arp_of[] = { */ static const u32 ice_ptypes_udp_il[] = { 0x81000000, 0x20204040, 0x04000010, 0x80810102, - 0x00200040, 0x00000000, 0x00000000, 0x00000000, + 0x00000040, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00410000, 0x10842000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -240,7 +240,7 @@ static const u32 ice_ptypes_udp_il[] = { /* Packet types for packets with an Innermost/Last TCP header */ static const u32 ice_ptypes_tcp_il[] = { 0x04000000, 0x80810102, 0x10000040, 0x02040408, - 0x00810102, 0x00000000, 0x00000000, 0x00000000, + 0x00000102, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00820000, 0x21084000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -252,7 +252,7 @@ static const u32 ice_ptypes_tcp_il[] = { /* Packet types for packets with an Innermost/Last SCTP header */ static const u32 ice_ptypes_sctp_il[] = { 0x08000000, 0x01020204, 0x20000081, 0x04080810, - 0x01020204, 0x00000000, 0x00000000, 0x00000000, + 0x00000204, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x01040000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -275,8 +275,8 @@ static const u32 ice_ptypes_icmp_of[] = { /* Packet types for packets with an Innermost/Last ICMP header */ static const u32 ice_ptypes_icmp_il[] = { - 0x00000000, 0x02040408, 0x40810102, 0x08101020, - 0x02040408, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x02040408, 0x40000102, 0x08101020, + 0x00000408, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x42108000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -287,8 +287,8 @@ static const u32 ice_ptypes_icmp_il[] = { /* Packet types for packets with an Outermost/First GRE header */ static const u32 ice_ptypes_gre_of[] = { - 0x00000000, 0xBFBF7800, 0x00EFDFDF, 0xFEFDE000, - 0x03BF7F7E, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0xBFBF7800, 0x000001DF, 0xFEFDE000, + 0x0000017E, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -299,8 +299,8 @@ static const u32 ice_ptypes_gre_of[] = { /* Packet types for packets with an Innermost/Last MAC header */ static const u32 ice_ptypes_mac_il[] = { - 0x00000000, 0x00000000, 0x00EFDE00, 0x00000000, - 0x03BF7800, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, + 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 04/12] net/ice/base: add GTPU TEID support for FD 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 00/12] net/ice: base code update Qi Zhang ` (2 preceding siblings ...) 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 03/12] net/ice/base: update flow ptype bitmaps Qi Zhang @ 2019-10-08 1:50 ` Qi Zhang 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 05/12] net/ice/base: improvements to Flow Director masking Qi Zhang ` (8 subsequent siblings) 12 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-10-08 1:50 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Junfeng Guo, Paul M Stillwell Jr Added the training packet for GTPU TEID field to the Flow director to allow matching against this field. Signed-off-by: Junfeng Guo <junfeng.guo@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Acked-by: Qiming Yang <qiming.yang@intel.com> --- drivers/net/ice/base/ice_fdir.c | 2 ++ drivers/net/ice/base/ice_fdir.h | 1 + 2 files changed, 3 insertions(+) diff --git a/drivers/net/ice/base/ice_fdir.c b/drivers/net/ice/base/ice_fdir.c index 219588c46..37b388169 100644 --- a/drivers/net/ice/base/ice_fdir.c +++ b/drivers/net/ice/base/ice_fdir.c @@ -786,6 +786,8 @@ ice_fdir_get_gen_prgm_pkt(struct ice_hw *hw, struct ice_fdir_fltr *input, case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_TCP: case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_ICMP: case ICE_FLTR_PTYPE_NONF_IPV4_GTPU_IPV4_OTHER: + ice_pkt_insert_u32(loc, ICE_IPV4_GTPU_TEID_OFFSET, + input->gtpu_data.teid); ice_pkt_insert_u6_qfi(loc, ICE_IPV4_GTPU_QFI_OFFSET, input->gtpu_data.qfi); break; diff --git a/drivers/net/ice/base/ice_fdir.h b/drivers/net/ice/base/ice_fdir.h index 22e5bcf8c..db1f8351f 100644 --- a/drivers/net/ice/base/ice_fdir.h +++ b/drivers/net/ice/base/ice_fdir.h @@ -87,6 +87,7 @@ enum ice_status ice_clear_pf_fd_table(struct ice_hw *hw); #define ICE_IPV6_TC_OFFSET 14 #define ICE_IPV6_HLIM_OFFSET 21 #define ICE_IPV6_PROTO_OFFSET 20 +#define ICE_IPV4_GTPU_TEID_OFFSET 46 #define ICE_IPV4_GTPU_QFI_OFFSET 56 #define ICE_FDIR_MAX_FLTRS 16384 -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 05/12] net/ice/base: improvements to Flow Director masking 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 00/12] net/ice: base code update Qi Zhang ` (3 preceding siblings ...) 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 04/12] net/ice/base: add GTPU TEID support for FD Qi Zhang @ 2019-10-08 1:50 ` Qi Zhang 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 06/12] net/ice/base: remove dead error condition Qi Zhang ` (7 subsequent siblings) 12 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-10-08 1:50 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Paul M Stillwell Jr Currently, 3-tuple FD matching is implemented using masking. However, this is using up twenty-four of the thirty-two FD masks available. This patch uses the swap register more efficiently to implement the 3-tuple matches, which saves all FD masks for other uses. Added IPV6 versions of DSCP, TTL and Protocol fields for FD use. Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Acked-by: Qiming Yang <qiming.yang@intel.com> --- drivers/net/ice/base/ice_flex_pipe.c | 71 +++++++++------------ drivers/net/ice/base/ice_flex_type.h | 4 +- drivers/net/ice/base/ice_flow.c | 118 ++++++++++++++++++++--------------- drivers/net/ice/base/ice_flow.h | 10 ++- 4 files changed, 108 insertions(+), 95 deletions(-) diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 75bb87079..8f8cab86e 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -1248,25 +1248,6 @@ void ice_free_seg(struct ice_hw *hw) } /** - * ice_init_fd_mask_regs - initialize Flow Director mask registers - * @hw: pointer to the HW struct - * - * This function sets up the Flow Director mask registers to allow for complete - * masking off of any of the 24 Field Vector words. After this call, mask 0 will - * mask off all of FV index 0, mask 1 will mask off all of FV index 1, etc. - */ -static void ice_init_fd_mask_regs(struct ice_hw *hw) -{ - u16 i; - - for (i = 0; i < hw->blk[ICE_BLK_FD].es.fvw; i++) { - wr32(hw, GLQF_FDMASK(i), i); - ice_debug(hw, ICE_DBG_INIT, "init fd mask(%d): %x = %x\n", i, - GLQF_FDMASK(i), i); - } -} - -/** * ice_init_pkg_regs - initialize additional package registers * @hw: pointer to the hardware structure */ @@ -1279,8 +1260,6 @@ static void ice_init_pkg_regs(struct ice_hw *hw) /* setup Switch block input mask, which is 48-bits in two parts */ wr32(hw, GL_PREEXT_L2_PMASK0(ICE_SW_BLK_IDX), ICE_SW_BLK_INP_MASK_L); wr32(hw, GL_PREEXT_L2_PMASK1(ICE_SW_BLK_IDX), ICE_SW_BLK_INP_MASK_H); - /* setup default flow director masks */ - ice_init_fd_mask_regs(hw); } /** @@ -2643,7 +2622,8 @@ ice_prof_has_mask_idx(struct ice_hw *hw, enum ice_block blk, u8 prof, u16 idx, expect_no_mask = true; /* Scan the enabled masks on this profile, for the specified idx */ - for (i = 0; i < ICE_PROFILE_MASK_COUNT; i++) + for (i = hw->blk[blk].masks.first; i < hw->blk[blk].masks.first + + hw->blk[blk].masks.count; i++) if (hw->blk[blk].es.mask_ena[prof] & BIT(i)) if (hw->blk[blk].masks.masks[i].in_use && hw->blk[blk].masks.masks[i].idx == idx) { @@ -2981,14 +2961,15 @@ ice_write_prof_mask_enable_res(struct ice_hw *hw, enum ice_block blk, */ static void ice_init_prof_masks(struct ice_hw *hw, enum ice_block blk) { -#define MAX_NUM_PORTS 8 - u16 num_ports = MAX_NUM_PORTS; + u16 per_pf; u16 i; ice_init_lock(&hw->blk[blk].masks.lock); - hw->blk[blk].masks.count = ICE_PROFILE_MASK_COUNT / num_ports; - hw->blk[blk].masks.first = hw->pf_id * hw->blk[blk].masks.count; + per_pf = ICE_PROF_MASK_COUNT / hw->dev_caps.num_funcs; + + hw->blk[blk].masks.count = per_pf; + hw->blk[blk].masks.first = hw->pf_id * per_pf; ice_memset(hw->blk[blk].masks.masks, 0, sizeof(hw->blk[blk].masks.masks), ICE_NONDMA_MEM); @@ -4241,8 +4222,6 @@ ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es) ice_zero_bitmap(pair_list, ICE_FD_SRC_DST_PAIR_COUNT); - ice_init_fd_mask_regs(hw); - /* This code assumes that the Flow Director field vectors are assigned * from the end of the FV indexes working towards the zero index, that * only complete fields will be included and will be consecutive, and @@ -4298,7 +4277,7 @@ ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es) return ICE_ERR_OUT_OF_RANGE; /* keep track of non-relevant fields */ - mask_sel |= 1 << (first_free - k); + mask_sel |= BIT(first_free - k); } pair_start[index] = first_free; @@ -4342,29 +4321,39 @@ ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es) si -= indexes_used; } - /* for each set of 4 swap indexes, write the appropriate register */ + /* for each set of 4 swap and 4 inset indexes, write the appropriate + * register + */ for (j = 0; j < hw->blk[ICE_BLK_FD].es.fvw / 4; j++) { - u32 raw_entry = 0; + u32 raw_swap = 0; + u32 raw_in = 0; for (k = 0; k < 4; k++) { u8 idx; idx = (j * 4) + k; - if (used[idx]) - raw_entry |= used[idx] << (k * BITS_PER_BYTE); + if (used[idx] && !(mask_sel & BIT(idx))) { + raw_swap |= used[idx] << (k * BITS_PER_BYTE); +#define ICE_INSET_DFLT 0x9f + raw_in |= ICE_INSET_DFLT << (k * BITS_PER_BYTE); + } } - /* write the appropriate register set, based on HW block */ - wr32(hw, GLQF_FDSWAP(prof_id, j), raw_entry); + /* write the appropriate swap register set */ + wr32(hw, GLQF_FDSWAP(prof_id, j), raw_swap); + + ice_debug(hw, ICE_DBG_INIT, "swap wr(%d, %d): %x = %08x\n", + prof_id, j, GLQF_FDSWAP(prof_id, j), raw_swap); - ice_debug(hw, ICE_DBG_INIT, "swap wr(%d, %d): %x = %x\n", - prof_id, j, GLQF_FDSWAP(prof_id, j), raw_entry); + /* write the appropriate inset register set */ + wr32(hw, GLQF_FDINSET(prof_id, j), raw_in); + + ice_debug(hw, ICE_DBG_INIT, "inset wr(%d, %d): %x = %08x\n", + prof_id, j, GLQF_FDINSET(prof_id, j), raw_in); } - /* update the masks for this profile to be sure we ignore fields that - * are not relevant to our match criteria - */ - ice_update_fd_mask(hw, prof_id, mask_sel); + /* initially clear the mask select for this profile */ + ice_update_fd_mask(hw, prof_id, 0); return ICE_SUCCESS; } diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h index 48c1e5184..92d205ac7 100644 --- a/drivers/net/ice/base/ice_flex_type.h +++ b/drivers/net/ice/base/ice_flex_type.h @@ -668,8 +668,8 @@ struct ice_masks { struct ice_lock lock; /* lock to protect this structure */ u16 first; /* first mask owned by the PF */ u16 count; /* number of masks owned by the PF */ -#define ICE_PROFILE_MASK_COUNT 32 - struct ice_mask masks[ICE_PROFILE_MASK_COUNT]; +#define ICE_PROF_MASK_COUNT 32 + struct ice_mask masks[ICE_PROF_MASK_COUNT]; }; /* Tables per block */ diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 8ed3f8eb7..370ad9ba3 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -22,15 +22,6 @@ #define ICE_FLOW_FLD_SZ_GTP_TEID 4 #define ICE_FLOW_FLD_SZ_PPPOE_SESS_ID 2 -/* Protocol header fields are extracted at the word boundaries as word-sized - * values. Specify the displacement value of some non-word-aligned fields needed - * to compute the offset of words containing the fields in the corresponding - * protocol headers. Displacement values are expressed in number of bits. - */ -#define ICE_FLOW_FLD_IPV6_TTL_DSCP_DISP (-4) -#define ICE_FLOW_FLD_IPV6_TTL_PROT_DISP ((-2) * BITS_PER_BYTE) -#define ICE_FLOW_FLD_IPV6_TTL_TTL_DISP ((-1) * BITS_PER_BYTE) - /* Describe properties of a protocol header field */ struct ice_flow_field_info { enum ice_flow_seg_hdr hdr; @@ -67,18 +58,29 @@ struct ice_flow_field_info ice_flds_info[ICE_FLOW_FIELD_IDX_MAX] = { ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_VLAN, 14, ICE_FLOW_FLD_SZ_VLAN), /* ICE_FLOW_FIELD_IDX_ETH_TYPE */ ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_ETH, 12, ICE_FLOW_FLD_SZ_ETH_TYPE), - /* IPv4 */ - /* ICE_FLOW_FIELD_IDX_IP_DSCP */ - ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV4, 1, 1), - /* ICE_FLOW_FIELD_IDX_IP_TTL */ - ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_NONE, 8, 1), - /* ICE_FLOW_FIELD_IDX_IP_PROT */ - ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_NONE, 9, ICE_FLOW_FLD_SZ_IP_PROT), + /* IPv4 / IPv6 */ + /* ICE_FLOW_FIELD_IDX_IPV4_DSCP */ + ICE_FLOW_FLD_INFO_MSK(ICE_FLOW_SEG_HDR_IPV4, 0, ICE_FLOW_FLD_SZ_IP_DSCP, + 0x00fc), + /* ICE_FLOW_FIELD_IDX_IPV6_DSCP */ + ICE_FLOW_FLD_INFO_MSK(ICE_FLOW_SEG_HDR_IPV6, 0, ICE_FLOW_FLD_SZ_IP_DSCP, + 0x0ff0), + /* ICE_FLOW_FIELD_IDX_IPV4_TTL */ + ICE_FLOW_FLD_INFO_MSK(ICE_FLOW_SEG_HDR_NONE, 8, + ICE_FLOW_FLD_SZ_IP_TTL, 0xff00), + /* ICE_FLOW_FIELD_IDX_IPV4_PROT */ + ICE_FLOW_FLD_INFO_MSK(ICE_FLOW_SEG_HDR_NONE, 8, + ICE_FLOW_FLD_SZ_IP_PROT, 0x00ff), + /* ICE_FLOW_FIELD_IDX_IPV6_TTL */ + ICE_FLOW_FLD_INFO_MSK(ICE_FLOW_SEG_HDR_NONE, 6, + ICE_FLOW_FLD_SZ_IP_TTL, 0x00ff), + /* ICE_FLOW_FIELD_IDX_IPV6_PROT */ + ICE_FLOW_FLD_INFO_MSK(ICE_FLOW_SEG_HDR_NONE, 6, + ICE_FLOW_FLD_SZ_IP_PROT, 0xff00), /* ICE_FLOW_FIELD_IDX_IPV4_SA */ ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV4, 12, ICE_FLOW_FLD_SZ_IPV4_ADDR), /* ICE_FLOW_FIELD_IDX_IPV4_DA */ ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV4, 16, ICE_FLOW_FLD_SZ_IPV4_ADDR), - /* IPv6 */ /* ICE_FLOW_FIELD_IDX_IPV6_SA */ ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_IPV6, 8, ICE_FLOW_FLD_SZ_IPV6_ADDR), /* ICE_FLOW_FIELD_IDX_IPV6_DA */ @@ -608,6 +610,7 @@ ice_flow_xtract_pkt_flags(struct ice_hw *hw, * @params: information about the flow to be processed * @seg: packet segment index of the field to be extracted * @fld: ID of field to be extracted + * @match: bitfield of all fields * * This function determines the protocol ID, offset, and size of the given * field. It then allocates one or more extraction sequence entries for the @@ -615,13 +618,14 @@ ice_flow_xtract_pkt_flags(struct ice_hw *hw, */ static enum ice_status ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params, - u8 seg, enum ice_flow_field fld) + u8 seg, enum ice_flow_field fld, u64 match) { enum ice_flow_field sib = ICE_FLOW_FIELD_IDX_MAX; enum ice_prot_id prot_id = ICE_PROT_ID_INVAL; u8 fv_words = hw->blk[params->blk].es.fvw; struct ice_flow_fld_info *flds; u16 cnt, ese_bits, i; + u16 sib_mask = 0; s16 adj = 0; u16 mask; u16 off; @@ -638,35 +642,49 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params, case ICE_FLOW_FIELD_IDX_ETH_TYPE: prot_id = seg == 0 ? ICE_PROT_ETYPE_OL : ICE_PROT_ETYPE_IL; break; - case ICE_FLOW_FIELD_IDX_IP_DSCP: - if (params->prof->segs[seg].hdrs & ICE_FLOW_SEG_HDR_IPV6) - adj = ICE_FLOW_FLD_IPV6_TTL_DSCP_DISP; - /* Fall through */ - case ICE_FLOW_FIELD_IDX_IP_TTL: - case ICE_FLOW_FIELD_IDX_IP_PROT: - /* Some fields are located at different offsets in IPv4 and - * IPv6 + case ICE_FLOW_FIELD_IDX_IPV4_DSCP: + prot_id = seg == 0 ? ICE_PROT_IPV4_OF_OR_S : ICE_PROT_IPV4_IL; + break; + case ICE_FLOW_FIELD_IDX_IPV6_DSCP: + prot_id = seg == 0 ? ICE_PROT_IPV6_OF_OR_S : ICE_PROT_IPV6_IL; + break; + case ICE_FLOW_FIELD_IDX_IPV4_TTL: + case ICE_FLOW_FIELD_IDX_IPV4_PROT: + prot_id = seg == 0 ? ICE_PROT_IPV4_OF_OR_S : ICE_PROT_IPV4_IL; + + /* TTL and PROT share the same extraction seq. entry. + * Each is considered a sibling to the other in terms of sharing + * the same extraction sequence entry. */ - if (params->prof->segs[seg].hdrs & ICE_FLOW_SEG_HDR_IPV4) { - prot_id = seg == 0 ? ICE_PROT_IPV4_OF_OR_S : - ICE_PROT_IPV4_IL; - /* TTL and PROT share the same extraction seq. entry. - * Each is considered a sibling to the other in term - * sharing the same extraction sequence entry. - */ - if (fld == ICE_FLOW_FIELD_IDX_IP_TTL) - sib = ICE_FLOW_FIELD_IDX_IP_PROT; - else if (fld == ICE_FLOW_FIELD_IDX_IP_PROT) - sib = ICE_FLOW_FIELD_IDX_IP_TTL; - } else if (params->prof->segs[seg].hdrs & - ICE_FLOW_SEG_HDR_IPV6) { - prot_id = seg == 0 ? ICE_PROT_IPV6_OF_OR_S : - ICE_PROT_IPV6_IL; - if (fld == ICE_FLOW_FIELD_IDX_IP_TTL) - adj = ICE_FLOW_FLD_IPV6_TTL_TTL_DISP; - else if (fld == ICE_FLOW_FIELD_IDX_IP_PROT) - adj = ICE_FLOW_FLD_IPV6_TTL_PROT_DISP; - } + if (fld == ICE_FLOW_FIELD_IDX_IPV4_TTL) + sib = ICE_FLOW_FIELD_IDX_IPV4_PROT; + else if (fld == ICE_FLOW_FIELD_IDX_IPV4_PROT) + sib = ICE_FLOW_FIELD_IDX_IPV4_TTL; + + /* If the sibling field is also included, that field's + * mask needs to be included. + */ + if (match & BIT(sib)) + sib_mask = ice_flds_info[sib].mask; + break; + case ICE_FLOW_FIELD_IDX_IPV6_TTL: + case ICE_FLOW_FIELD_IDX_IPV6_PROT: + prot_id = seg == 0 ? ICE_PROT_IPV6_OF_OR_S : ICE_PROT_IPV6_IL; + + /* TTL and PROT share the same extraction seq. entry. + * Each is considered a sibling to the other in terms of sharing + * the same extraction sequence entry. + */ + if (fld == ICE_FLOW_FIELD_IDX_IPV6_TTL) + sib = ICE_FLOW_FIELD_IDX_IPV6_PROT; + else if (fld == ICE_FLOW_FIELD_IDX_IPV6_PROT) + sib = ICE_FLOW_FIELD_IDX_IPV6_TTL; + + /* If the sibling field is also included, that field's + * mask needs to be included. + */ + if (match & BIT(sib)) + sib_mask = ice_flds_info[sib].mask; break; case ICE_FLOW_FIELD_IDX_IPV4_SA: case ICE_FLOW_FIELD_IDX_IPV4_DA: @@ -733,6 +751,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params, ICE_FLOW_FV_EXTRACT_SZ; flds[fld].xtrct.disp = (u8)((ice_flds_info[fld].off + adj) % ese_bits); flds[fld].xtrct.idx = params->es_cnt; + flds[fld].xtrct.mask = ice_flds_info[fld].mask; /* Adjust the next field-entry index after accommodating the number of * entries this field consumes @@ -742,7 +761,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params, /* Fill in the extraction sequence entries needed for this field */ off = flds[fld].xtrct.off; - mask = ice_flds_info[fld].mask; + mask = flds[fld].xtrct.mask; for (i = 0; i < cnt; i++) { /* Only consume an extraction sequence entry if there is no * sibling field associated with this field or the sibling entry @@ -767,7 +786,7 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params, params->es[idx].prot_id = prot_id; params->es[idx].off = off; - params->mask[idx] = mask; + params->mask[idx] = mask | sib_mask; params->es_cnt++; } @@ -885,7 +904,8 @@ ice_flow_create_xtrct_seq(struct ice_hw *hw, if (match & bit) { status = ice_flow_xtract_fld - (hw, params, i, (enum ice_flow_field)j); + (hw, params, i, (enum ice_flow_field)j, + match); if (status) return status; match &= ~bit; diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h index 326ff6f81..c224e6ebf 100644 --- a/drivers/net/ice/base/ice_flow.h +++ b/drivers/net/ice/base/ice_flow.h @@ -114,9 +114,12 @@ enum ice_flow_field { ICE_FLOW_FIELD_IDX_C_VLAN, ICE_FLOW_FIELD_IDX_ETH_TYPE, /* L3 */ - ICE_FLOW_FIELD_IDX_IP_DSCP, - ICE_FLOW_FIELD_IDX_IP_TTL, - ICE_FLOW_FIELD_IDX_IP_PROT, + ICE_FLOW_FIELD_IDX_IPV4_DSCP, + ICE_FLOW_FIELD_IDX_IPV6_DSCP, + ICE_FLOW_FIELD_IDX_IPV4_TTL, + ICE_FLOW_FIELD_IDX_IPV4_PROT, + ICE_FLOW_FIELD_IDX_IPV6_TTL, + ICE_FLOW_FIELD_IDX_IPV6_PROT, ICE_FLOW_FIELD_IDX_IPV4_SA, ICE_FLOW_FIELD_IDX_IPV4_DA, ICE_FLOW_FIELD_IDX_IPV6_SA, @@ -232,6 +235,7 @@ struct ice_flow_seg_xtrct { u16 off; /* Starting offset of the field in header in bytes */ u8 idx; /* Index of FV entry used */ u8 disp; /* Displacement of field in bits fr. FV entry's start */ + u16 mask; /* Mask for field */ }; enum ice_flow_fld_match_type { -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 06/12] net/ice/base: remove dead error condition 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 00/12] net/ice: base code update Qi Zhang ` (4 preceding siblings ...) 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 05/12] net/ice/base: improvements to Flow Director masking Qi Zhang @ 2019-10-08 1:50 ` Qi Zhang 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 07/12] net/ice/base: zero initialize structures Qi Zhang ` (6 subsequent siblings) 12 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-10-08 1:50 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Jeb Cramer, Paul M Stillwell Jr The pointer cmd is set to an address of a structure, which can never be NULL. Remove the check-for-NULL lines since it's dead code anyway. Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Acked-by: Qiming Yang <qiming.yang@intel.com> --- drivers/net/ice/base/ice_common.c | 3 --- 1 file changed, 3 deletions(-) diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index 48ba160f7..4ba3ab202 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -176,9 +176,6 @@ ice_aq_get_link_topo_handle(struct ice_port_info *pi, u8 node_type, cmd = &desc.params.get_link_topo; - if (!cmd) - return ICE_ERR_PARAM; - ice_fill_dflt_direct_cmd_desc(&desc, ice_aqc_opc_get_link_topo); cmd->addr.node_type_ctx = (ICE_AQC_LINK_TOPO_NODE_CTX_PORT << -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 07/12] net/ice/base: zero initialize structures 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 00/12] net/ice: base code update Qi Zhang ` (5 preceding siblings ...) 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 06/12] net/ice/base: remove dead error condition Qi Zhang @ 2019-10-08 1:50 ` Qi Zhang 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 08/12] net/ice/base: fix unexpected switch rule overwrite Qi Zhang ` (5 subsequent siblings) 12 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-10-08 1:50 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Jeb Cramer, Jesse Brandeburg, Paul M Stillwell Jr Some functions create ice_pkg_enum structure, but it seems it's possible some of the members are used un-initialized. So we'll initialize all instantiations of this structure within ice_flex_pipe.c The patch also fix header comment mismatch issue for ice_init_prof_result_bm Signed-off-by: Jeb Cramer <jeb.j.cramer@intel.com> Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Acked-by: Qiming Yang <qiming.yang@intel.com> --- drivers/net/ice/base/ice_flex_pipe.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index 8f8cab86e..bf14149b8 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -470,6 +470,7 @@ static void ice_init_pkg_hints(struct ice_hw *hw, struct ice_seg *ice_seg) int i; ice_memset(&hw->tnl, 0, sizeof(hw->tnl), ICE_NONDMA_MEM); + ice_memset(&state, 0, sizeof(state), ICE_NONDMA_MEM); if (!ice_seg) return; @@ -1517,6 +1518,8 @@ ice_get_sw_fv_bitmap(struct ice_hw *hw, enum ice_prof_type type, struct ice_seg *ice_seg; struct ice_fv *fv; + ice_memset(&state, 0, sizeof(state), ICE_NONDMA_MEM); + if (type == ICE_PROF_ALL) { u16 i; @@ -1573,6 +1576,8 @@ ice_get_sw_fv_list(struct ice_hw *hw, u16 *prot_ids, u8 ids_cnt, struct ice_fv *fv; u32 offset; + ice_memset(&state, 0, sizeof(state), ICE_NONDMA_MEM); + if (!ids_cnt || !hw->seg) return ICE_ERR_PARAM; @@ -1633,16 +1638,17 @@ ice_get_sw_fv_list(struct ice_hw *hw, u16 *prot_ids, u8 ids_cnt, } /** - * ice_init_profile_to_result_bm - Initialize the profile result index bitmap + * ice_init_prof_result_bm - Initialize the profile result index bitmap * @hw: pointer to hardware structure */ -void -ice_init_prof_result_bm(struct ice_hw *hw) +void ice_init_prof_result_bm(struct ice_hw *hw) { struct ice_pkg_enum state; struct ice_seg *ice_seg; struct ice_fv *fv; + ice_memset(&state, 0, sizeof(state), ICE_NONDMA_MEM); + if (!hw->seg) return; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 08/12] net/ice/base: fix unexpected switch rule overwrite 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 00/12] net/ice: base code update Qi Zhang ` (6 preceding siblings ...) 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 07/12] net/ice/base: zero initialize structures Qi Zhang @ 2019-10-08 1:50 ` Qi Zhang 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 09/12] net/ice/base: fix flow raw field vector extraction Qi Zhang ` (4 subsequent siblings) 12 siblings, 0 replies; 166+ messages in thread From: Qi Zhang @ 2019-10-08 1:50 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang; +Cc: dev, xiaolong.ye, Qi Zhang, Paul M Stillwell Jr A switch rule with "drop" action will be overwritten by a rule with same pattern match but with a "to queue" action. While in an inversed flow creation sequence, the "to queue" can't be overwritten by the "drop" rule. The inconsistent behavior is not expected, the patch fix the issue by preventing rule overwrite in both cases. Fixes: fed0c5ca5f19 ("net/ice/base: support programming a new switch recipe") Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Acked-by: Qiming Yang <qiming.yang@intel.com> --- drivers/net/ice/base/ice_switch.c | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 334f1b5e0..2c02021b1 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -5977,13 +5977,10 @@ ice_adv_add_update_vsi_list(struct ice_hw *hw, u16 vsi_list_id = 0; if (cur_fltr->sw_act.fltr_act == ICE_FWD_TO_Q || - cur_fltr->sw_act.fltr_act == ICE_FWD_TO_QGRP) + cur_fltr->sw_act.fltr_act == ICE_FWD_TO_QGRP || + cur_fltr->sw_act.fltr_act == ICE_DROP_PACKET) return ICE_ERR_NOT_IMPL; - if (cur_fltr->sw_act.fltr_act == ICE_DROP_PACKET && - new_fltr->sw_act.fltr_act == ICE_DROP_PACKET) - return ICE_ERR_ALREADY_EXISTS; - if ((new_fltr->sw_act.fltr_act == ICE_FWD_TO_Q || new_fltr->sw_act.fltr_act == ICE_FWD_TO_QGRP) && (cur_fltr->sw_act.fltr_act == ICE_FWD_TO_VSI || -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 09/12] net/ice/base: fix flow raw field vector extraction 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 00/12] net/ice: base code update Qi Zhang ` (7 preceding siblings ...) 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 08/12] net/ice/base: fix unexpected switch rule overwrite Qi Zhang @ 2019-10-08 1:50 ` Qi Zhang 2019-10-10 3:07 ` Yang, Qiming 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 10/12] net/ice/base: fix switch rule programming for all profiles Qi Zhang ` (3 subsequent siblings) 12 siblings, 1 reply; 166+ messages in thread From: Qi Zhang @ 2019-10-08 1:50 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Paul M Stillwell Jr Correct the ordering of raw field extraction in the field vector by taking into account the ordering setting for requesting block. Fixes: aa1cd410fa64 ("net/ice/base: add flow module") Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 370ad9ba3..38c7c42f7 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -806,6 +806,7 @@ static enum ice_status ice_flow_xtract_raws(struct ice_hw *hw, struct ice_flow_prof_params *params, u8 seg) { + u16 fv_words; u16 hdrs_sz; u8 i; @@ -821,6 +822,8 @@ ice_flow_xtract_raws(struct ice_hw *hw, struct ice_flow_prof_params *params, if (!hdrs_sz) return ICE_ERR_PARAM; + fv_words = hw->blk[params->blk].es.fvw; + for (i = 0; i < params->prof->segs[seg].raws_cnt; i++) { struct ice_flow_seg_fld_raw *raw; u16 off, cnt, j; @@ -853,6 +856,8 @@ ice_flow_xtract_raws(struct ice_hw *hw, struct ice_flow_prof_params *params, BITS_PER_BYTE)); off = raw->info.xtrct.off; for (j = 0; j < cnt; j++) { + u16 idx; + /* Make sure the number of extraction sequence required * does not exceed the block's capability */ @@ -860,8 +865,14 @@ ice_flow_xtract_raws(struct ice_hw *hw, struct ice_flow_prof_params *params, params->es_cnt >= ICE_MAX_FV_WORDS) return ICE_ERR_MAX_LIMIT; - params->es[params->es_cnt].prot_id = ICE_PROT_PAY; - params->es[params->es_cnt].off = off; + /* some blocks require a reversed field vector layout */ + if (hw->blk[params->blk].es.reverse) + idx = fv_words - params->es_cnt - 1; + else + idx = params->es_cnt; + + params->es[idx].prot_id = ICE_PROT_PAY; + params->es[idx].off = off; params->es_cnt++; off += ICE_FLOW_FV_EXTRACT_SZ; } -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* Re: [dpdk-dev] [PATCH v3 09/12] net/ice/base: fix flow raw field vector extraction 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 09/12] net/ice/base: fix flow raw field vector extraction Qi Zhang @ 2019-10-10 3:07 ` Yang, Qiming 0 siblings, 0 replies; 166+ messages in thread From: Yang, Qiming @ 2019-10-10 3:07 UTC (permalink / raw) To: Zhang, Qi Z, Lu, Wenzhuo Cc: dev, Ye, Xiaolong, Nowlin, Dan, Stillwell Jr, Paul M -----Original Message----- From: Zhang, Qi Z Sent: Tuesday, October 8, 2019 09:50 To: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming <qiming.yang@intel.com> Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>; Nowlin, Dan <dan.nowlin@intel.com>; Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com> Subject: [PATCH v3 09/12] net/ice/base: fix flow raw field vector extraction Correct the ordering of raw field extraction in the field vector by taking into account the ordering setting for requesting block. Fixes: aa1cd410fa64 ("net/ice/base: add flow module") Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flow.c | 15 +++++++++++++-- 1 file changed, 13 insertions(+), 2 deletions(-) diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 370ad9ba3..38c7c42f7 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -806,6 +806,7 @@ static enum ice_status ice_flow_xtract_raws(struct ice_hw *hw, struct ice_flow_prof_params *params, u8 seg) { + u16 fv_words; u16 hdrs_sz; u8 i; @@ -821,6 +822,8 @@ ice_flow_xtract_raws(struct ice_hw *hw, struct ice_flow_prof_params *params, if (!hdrs_sz) return ICE_ERR_PARAM; + fv_words = hw->blk[params->blk].es.fvw; + for (i = 0; i < params->prof->segs[seg].raws_cnt; i++) { struct ice_flow_seg_fld_raw *raw; u16 off, cnt, j; @@ -853,6 +856,8 @@ ice_flow_xtract_raws(struct ice_hw *hw, struct ice_flow_prof_params *params, BITS_PER_BYTE)); off = raw->info.xtrct.off; for (j = 0; j < cnt; j++) { + u16 idx; + /* Make sure the number of extraction sequence required * does not exceed the block's capability */ @@ -860,8 +865,14 @@ ice_flow_xtract_raws(struct ice_hw *hw, struct ice_flow_prof_params *params, params->es_cnt >= ICE_MAX_FV_WORDS) return ICE_ERR_MAX_LIMIT; - params->es[params->es_cnt].prot_id = ICE_PROT_PAY; - params->es[params->es_cnt].off = off; + /* some blocks require a reversed field vector layout */ + if (hw->blk[params->blk].es.reverse) + idx = fv_words - params->es_cnt - 1; + else + idx = params->es_cnt; + + params->es[idx].prot_id = ICE_PROT_PAY; + params->es[idx].off = off; params->es_cnt++; off += ICE_FLOW_FV_EXTRACT_SZ; } -- 2.13.6 Acked-by: Qiming Yang <qiming.yang@intel.com> ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 10/12] net/ice/base: fix switch rule programming for all profiles 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 00/12] net/ice: base code update Qi Zhang ` (8 preceding siblings ...) 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 09/12] net/ice/base: fix flow raw field vector extraction Qi Zhang @ 2019-10-08 1:50 ` Qi Zhang 2019-10-10 3:08 ` Yang, Qiming 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 11/12] net/ice/base: add QFI for Flow Director Qi Zhang ` (2 subsequent siblings) 12 siblings, 1 reply; 166+ messages in thread From: Qi Zhang @ 2019-10-08 1:50 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Paul M Stillwell Jr In switch rule programming, if the caller requested tunnel type of ICE_SW_TUN_AND_NON_TUN, then the code would incorrectly attempt to add a tunneled UDP port in the training packet, this would cause the rule addition to fail. This patch does not attempt to add the UDP port so that the rule programming will succeed. Fixes: 75c06a770e25 ("net/ice/base: update switch training packets with open ports") Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_switch.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 2c02021b1..36da27f78 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -6214,7 +6214,8 @@ ice_add_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, if (status) goto err_ice_add_adv_rule; - if (rinfo->tun_type != ICE_NON_TUN) { + if (rinfo->tun_type != ICE_NON_TUN && + rinfo->tun_type != ICE_SW_TUN_AND_NON_TUN) { status = ice_fill_adv_packet_tun(hw, rinfo->tun_type, s_rule->pdata.lkup_tx_rx.hdr, pkt_offsets); -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* Re: [dpdk-dev] [PATCH v3 10/12] net/ice/base: fix switch rule programming for all profiles 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 10/12] net/ice/base: fix switch rule programming for all profiles Qi Zhang @ 2019-10-10 3:08 ` Yang, Qiming 0 siblings, 0 replies; 166+ messages in thread From: Yang, Qiming @ 2019-10-10 3:08 UTC (permalink / raw) To: Zhang, Qi Z, Lu, Wenzhuo Cc: dev, Ye, Xiaolong, Nowlin, Dan, Stillwell Jr, Paul M -----Original Message----- From: Zhang, Qi Z Sent: Tuesday, October 8, 2019 09:50 To: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming <qiming.yang@intel.com> Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>; Nowlin, Dan <dan.nowlin@intel.com>; Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com> Subject: [PATCH v3 10/12] net/ice/base: fix switch rule programming for all profiles In switch rule programming, if the caller requested tunnel type of ICE_SW_TUN_AND_NON_TUN, then the code would incorrectly attempt to add a tunneled UDP port in the training packet, this would cause the rule addition to fail. This patch does not attempt to add the UDP port so that the rule programming will succeed. Fixes: 75c06a770e25 ("net/ice/base: update switch training packets with open ports") Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_switch.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_switch.c b/drivers/net/ice/base/ice_switch.c index 2c02021b1..36da27f78 100644 --- a/drivers/net/ice/base/ice_switch.c +++ b/drivers/net/ice/base/ice_switch.c @@ -6214,7 +6214,8 @@ ice_add_adv_rule(struct ice_hw *hw, struct ice_adv_lkup_elem *lkups, if (status) goto err_ice_add_adv_rule; - if (rinfo->tun_type != ICE_NON_TUN) { + if (rinfo->tun_type != ICE_NON_TUN && + rinfo->tun_type != ICE_SW_TUN_AND_NON_TUN) { status = ice_fill_adv_packet_tun(hw, rinfo->tun_type, s_rule->pdata.lkup_tx_rx.hdr, pkt_offsets); -- 2.13.6 Acked-by: Qiming Yang <qiming.yang@intel.com> ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 11/12] net/ice/base: add QFI for Flow Director 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 00/12] net/ice: base code update Qi Zhang ` (9 preceding siblings ...) 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 10/12] net/ice/base: fix switch rule programming for all profiles Qi Zhang @ 2019-10-08 1:50 ` Qi Zhang 2019-10-10 3:09 ` Yang, Qiming 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 12/12] net/ice/base: improve misc code style Qi Zhang 2019-10-14 6:02 ` [dpdk-dev] [PATCH v3 00/12] net/ice: base code update Ye Xiaolong 12 siblings, 1 reply; 166+ messages in thread From: Qi Zhang @ 2019-10-08 1:50 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Dan Nowlin, Paul M Stillwell Jr Added the GTP QFI field to the Flow director interface to allow matching against this field. Since this field only appears in GTP packets with extension headers, this also requires adding profile TCAM mask matching capability. This allows comprehending different PTYPE attributes by examining flags from the parser. Using this method, different profiles can be used by examining flag values from the parser. Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flex_pipe.c | 245 ++++++++++++++--------------------- drivers/net/ice/base/ice_flex_pipe.h | 6 +- drivers/net/ice/base/ice_flex_type.h | 66 ++++++++++ drivers/net/ice/base/ice_flow.c | 57 +++++++- drivers/net/ice/base/ice_flow.h | 24 +++- 5 files changed, 238 insertions(+), 160 deletions(-) diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index bf14149b8..c2af1dfe8 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -2692,34 +2692,7 @@ ice_find_prof_id_with_mask(struct ice_hw *hw, enum ice_block blk, continue; /* check if masks settings are the same for this profile */ - if (!ice_prof_has_mask(hw, blk, i, masks)) - continue; - - *prof_id = i; - return ICE_SUCCESS; - } - - return ICE_ERR_DOES_NOT_EXIST; -} - -/** - * ice_find_prof_id - find profile ID for a given field vector - * @hw: pointer to the hardware structure - * @blk: HW block - * @fv: field vector to search for - * @prof_id: receives the profile ID - */ -static enum ice_status -ice_find_prof_id(struct ice_hw *hw, enum ice_block blk, - struct ice_fv_word *fv, u8 *prof_id) -{ - struct ice_es *es = &hw->blk[blk].es; - u16 off, i; - - for (i = 0; i < es->count; i++) { - off = i * es->fvw; - - if (memcmp(&es->t[off], fv, es->fvw * sizeof(*fv))) + if (masks && !ice_prof_has_mask(hw, blk, i, masks)) continue; *prof_id = i; @@ -4364,127 +4337,58 @@ ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es) return ICE_SUCCESS; } +/* The entries here needs to match the order of enum ice_ptype_attrib */ +static const struct ice_ptype_attrib_info ice_ptype_attributes[] = { + { ICE_GTP_PDU_EH, ICE_GTP_PDU_FLAG_MASK }, + { ICE_GTP_SESSION, ICE_GTP_FLAGS_MASK }, + { ICE_GTP_DOWNLINK, ICE_GTP_FLAGS_MASK }, + { ICE_GTP_UPLINK, ICE_GTP_FLAGS_MASK }, +}; + /** - * ice_add_prof_with_mask - add profile - * @hw: pointer to the HW struct - * @blk: hardware block - * @id: profile tracking ID - * @ptypes: array of bitmaps indicating ptypes (ICE_FLOW_PTYPE_MAX bits) - * @es: extraction sequence (length of array is determined by the block) - * @masks: extraction sequence (length of array is determined by the block) - * - * This function registers a profile, which matches a set of PTYPES with a - * particular extraction sequence. While the hardware profile is allocated - * it will not be written until the first call to ice_add_flow that specifies - * the ID value used here. + * ice_get_ptype_attrib_info - get ptype attribute information + * @type: attribute type + * @info: pointer to variable to the attribute information */ -enum ice_status -ice_add_prof_with_mask(struct ice_hw *hw, enum ice_block blk, u64 id, - u8 ptypes[], struct ice_fv_word *es, u16 *masks) +static void +ice_get_ptype_attrib_info(enum ice_ptype_attrib_type type, + struct ice_ptype_attrib_info *info) { - u32 bytes = DIVIDE_AND_ROUND_UP(ICE_FLOW_PTYPE_MAX, BITS_PER_BYTE); - ice_declare_bitmap(ptgs_used, ICE_XLT1_CNT); - struct ice_prof_map *prof; - enum ice_status status; - u32 byte = 0; - u8 prof_id; - - ice_zero_bitmap(ptgs_used, ICE_XLT1_CNT); - - ice_acquire_lock(&hw->blk[blk].es.prof_map_lock); - - /* search for existing profile */ - status = ice_find_prof_id_with_mask(hw, blk, es, masks, &prof_id); - if (status) { - /* allocate profile ID */ - status = ice_alloc_prof_id(hw, blk, &prof_id); - if (status) - goto err_ice_add_prof; - if (blk == ICE_BLK_FD) { - /* For Flow Director block, the extraction sequence may - * need to be altered in the case where there are paired - * fields that have no match. This is necessary because - * for Flow Director, src and dest fields need to paired - * for filter programming and these values are swapped - * during Tx. - */ - status = ice_update_fd_swap(hw, prof_id, es); - if (status) - goto err_ice_add_prof; - } - status = ice_update_prof_masking(hw, blk, prof_id, es, masks); - if (status) - goto err_ice_add_prof; - - /* and write new es */ - ice_write_es(hw, blk, prof_id, es); - } - - ice_prof_inc_ref(hw, blk, prof_id); - - /* add profile info */ - - prof = (struct ice_prof_map *)ice_malloc(hw, sizeof(*prof)); - if (!prof) - goto err_ice_add_prof; - - prof->profile_cookie = id; - prof->prof_id = prof_id; - prof->ptg_cnt = 0; - prof->context = 0; - - /* build list of ptgs */ - while (bytes && prof->ptg_cnt < ICE_MAX_PTG_PER_PROFILE) { - u32 bit; - - if (!ptypes[byte]) { - bytes--; - byte++; - continue; - } - /* Examine 8 bits per byte */ - for (bit = 0; bit < 8; bit++) { - if (ptypes[byte] & BIT(bit)) { - u16 ptype; - u8 ptg; - u8 m; - - ptype = byte * BITS_PER_BYTE + bit; - - /* The package should place all ptypes in a - * non-zero PTG, so the following call should - * never fail. - */ - if (ice_ptg_find_ptype(hw, blk, ptype, &ptg)) - continue; + *info = ice_ptype_attributes[type]; +} - /* If PTG is already added, skip and continue */ - if (ice_is_bit_set(ptgs_used, ptg)) - continue; +/** + * ice_add_prof_attrib - add any ptg with attributes to profile + * @prof: pointer to the profile to which ptg entries will be added + * @ptg: PTG to be added + * @ptype: PTYPE that needs to be looked up + * @attr: array of attributes that will be considered + * @attr_cnt: number of elements in the attribute array + */ +static enum ice_status +ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 ptype, + const struct ice_ptype_attributes *attr, u16 attr_cnt) +{ + bool found = false; + u16 i; - ice_set_bit(ptg, ptgs_used); - prof->ptg[prof->ptg_cnt] = ptg; + for (i = 0; i < attr_cnt; i++) { + if (attr[i].ptype == ptype) { + found = true; - if (++prof->ptg_cnt >= ICE_MAX_PTG_PER_PROFILE) - break; + prof->ptg[prof->ptg_cnt] = ptg; + ice_get_ptype_attrib_info(attr[i].attrib, + &prof->attr[prof->ptg_cnt]); - /* nothing left in byte, then exit */ - m = ~((1 << (bit + 1)) - 1); - if (!(ptypes[byte] & m)) - break; - } + if (++prof->ptg_cnt >= ICE_MAX_PTG_PER_PROFILE) + return ICE_ERR_MAX_LIMIT; } - - bytes--; - byte++; } - LIST_ADD(&prof->list, &hw->blk[blk].es.prof_map); - status = ICE_SUCCESS; + if (!found) + return ICE_ERR_DOES_NOT_EXIST; -err_ice_add_prof: - ice_release_lock(&hw->blk[blk].es.prof_map_lock); - return status; + return ICE_SUCCESS; } /** @@ -4493,16 +4397,20 @@ ice_add_prof_with_mask(struct ice_hw *hw, enum ice_block blk, u64 id, * @blk: hardware block * @id: profile tracking ID * @ptypes: array of bitmaps indicating ptypes (ICE_FLOW_PTYPE_MAX bits) + * @attr: array of attributes + * @attr_cnt: number of elements in attrib array * @es: extraction sequence (length of array is determined by the block) + * @masks: mask for extraction sequence * - * This function registers a profile, which matches a set of PTGs with a + * This function registers a profile, which matches a set of PTYPES with a * particular extraction sequence. While the hardware profile is allocated * it will not be written until the first call to ice_add_flow that specifies * the ID value used here. */ enum ice_status ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], - struct ice_fv_word *es) + const struct ice_ptype_attributes *attr, u16 attr_cnt, + struct ice_fv_word *es, u16 *masks) { u32 bytes = DIVIDE_AND_ROUND_UP(ICE_FLOW_PTYPE_MAX, BITS_PER_BYTE); ice_declare_bitmap(ptgs_used, ICE_XLT1_CNT); @@ -4516,7 +4424,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], ice_acquire_lock(&hw->blk[blk].es.prof_map_lock); /* search for existing profile */ - status = ice_find_prof_id(hw, blk, es, &prof_id); + status = ice_find_prof_id_with_mask(hw, blk, es, masks, &prof_id); if (status) { /* allocate profile ID */ status = ice_alloc_prof_id(hw, blk, &prof_id); @@ -4534,6 +4442,9 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], if (status) goto err_ice_add_prof; } + status = ice_update_prof_masking(hw, blk, prof_id, es, masks); + if (status) + goto err_ice_add_prof; /* and write new es */ ice_write_es(hw, blk, prof_id, es); @@ -4582,10 +4493,25 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], continue; ice_set_bit(ptg, ptgs_used); - prof->ptg[prof->ptg_cnt] = ptg; - - if (++prof->ptg_cnt >= ICE_MAX_PTG_PER_PROFILE) + /* Check to see there are any attributes for + * this ptype, and add them if found. + */ + status = ice_add_prof_attrib(prof, ptg, ptype, + attr, attr_cnt); + if (status == ICE_ERR_MAX_LIMIT) break; + if (status) { + /* This is simple a ptype/ptg with no + * attribute + */ + prof->ptg[prof->ptg_cnt] = ptg; + prof->attr[prof->ptg_cnt].flags = 0; + prof->attr[prof->ptg_cnt].mask = 0; + + if (++prof->ptg_cnt >= + ICE_MAX_PTG_PER_PROFILE) + break; + } /* nothing left in byte, then exit */ m = ~((1 << (bit + 1)) - 1); @@ -4928,6 +4854,7 @@ ice_get_prof(struct ice_hw *hw, enum ice_block blk, u64 hdl, p->type = ICE_PTG_ES_ADD; p->ptype = 0; p->ptg = map->ptg[i]; + p->attr = map->attr[i]; p->add_ptg = 0; p->add_prof = 1; @@ -5017,6 +4944,7 @@ ice_add_prof_to_lst(struct ice_hw *hw, enum ice_block blk, p->tcam[i].prof_id = map->prof_id; p->tcam[i].tcam_idx = ICE_INVALID_TCAM; p->tcam[i].ptg = map->ptg[i]; + p->tcam[i].attr = map->attr[i]; } LIST_ADD(&p->list, lst); @@ -5064,6 +4992,19 @@ ice_move_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig, } /** + * ice_set_tcam_flags - set tcam flag don't care mask + * @mask: mask for flags + * @dc_mask: pointer to the don't care mask + */ +static void ice_set_tcam_flags(u16 mask, u8 dc_mask[ICE_TCAM_KEY_VAL_SZ]) +{ + u16 *flag_word; + + /* flags are lowest u16 */ + flag_word = (u16 *)dc_mask; + *flag_word = ~mask; +} +/** * ice_prof_tcam_ena_dis - add enable or disable TCAM change * @hw: pointer to the HW struct * @blk: hardware block @@ -5105,9 +5046,12 @@ ice_prof_tcam_ena_dis(struct ice_hw *hw, enum ice_block blk, bool enable, if (!p) return ICE_ERR_NO_MEMORY; + /* set don't care masks for tcam flags */ + ice_set_tcam_flags(tcam->attr.mask, dc_msk); + status = ice_tcam_write_entry(hw, blk, tcam->tcam_idx, tcam->prof_id, - tcam->ptg, vsig, 0, 0, vl_msk, dc_msk, - nm_msk); + tcam->ptg, vsig, 0, tcam->attr.flags, + vl_msk, dc_msk, nm_msk); if (status) goto err_ice_prof_tcam_ena_dis; @@ -5258,6 +5202,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl, t->tcam[i].ptg = map->ptg[i]; t->tcam[i].prof_id = map->prof_id; t->tcam[i].tcam_idx = tcam_idx; + t->tcam[i].attr = map->attr[i]; t->tcam[i].in_use = true; p->type = ICE_TCAM_ADD; @@ -5267,11 +5212,15 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl, p->vsig = vsig; p->tcam_idx = t->tcam[i].tcam_idx; + /* set don't care masks for tcam flags */ + ice_set_tcam_flags(t->tcam[i].attr.mask, dc_msk); + /* write the TCAM entry */ status = ice_tcam_write_entry(hw, blk, t->tcam[i].tcam_idx, t->tcam[i].prof_id, - t->tcam[i].ptg, vsig, 0, 0, - vl_msk, dc_msk, nm_msk); + t->tcam[i].ptg, vsig, 0, + t->tcam[i].attr.flags, vl_msk, + dc_msk, nm_msk); if (status) goto err_ice_add_prof_id_vsig; diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h index e7d42e3de..b24a09b4d 100644 --- a/drivers/net/ice/base/ice_flex_pipe.h +++ b/drivers/net/ice/base/ice_flex_pipe.h @@ -52,11 +52,9 @@ ice_tunnel_get_type(struct ice_hw *hw, u16 port, enum ice_tunnel_type *type); enum ice_status ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig); enum ice_status -ice_add_prof_with_mask(struct ice_hw *hw, enum ice_block blk, u64 id, - u8 ptypes[], struct ice_fv_word *es, u16 *masks); -enum ice_status ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], - struct ice_fv_word *es); + const struct ice_ptype_attributes *attr, u16 attr_cnt, + struct ice_fv_word *es, u16 *masks); void ice_init_all_prof_masks(struct ice_hw *hw); void ice_shutdown_all_prof_masks(struct ice_hw *hw); struct ice_prof_map * diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h index 92d205ac7..1be98ea52 100644 --- a/drivers/net/ice/base/ice_flex_type.h +++ b/drivers/net/ice/base/ice_flex_type.h @@ -278,6 +278,69 @@ enum ice_sect { #define ICE_PTYPE_IPV6_TCP_PAY 92 #define ICE_PTYPE_IPV6_SCTP_PAY 93 #define ICE_PTYPE_IPV6_ICMP_PAY 94 +#define ICE_MAC_IPV4_GTPC_TEID 325 +#define ICE_MAC_IPV6_GTPC_TEID 326 +#define ICE_MAC_IPV4_GTPC 327 +#define ICE_MAC_IPV6_GTPC 328 +#define ICE_MAC_IPV4_GTPU 329 +#define ICE_MAC_IPV6_GTPU 330 +#define ICE_MAC_IPV4_GTPU_IPV4_FRAG 331 +#define ICE_MAC_IPV4_GTPU_IPV4_PAY 332 +#define ICE_MAC_IPV4_GTPU_IPV4_UDP_PAY 333 +#define ICE_MAC_IPV4_GTPU_IPV4_TCP 334 +#define ICE_MAC_IPV4_GTPU_IPV4_ICMP 335 +#define ICE_MAC_IPV6_GTPU_IPV4_FRAG 336 +#define ICE_MAC_IPV6_GTPU_IPV4_PAY 337 +#define ICE_MAC_IPV6_GTPU_IPV4_UDP_PAY 338 +#define ICE_MAC_IPV6_GTPU_IPV4_TCP 339 +#define ICE_MAC_IPV6_GTPU_IPV4_ICMP 340 +#define ICE_MAC_IPV4_GTPU_IPV6_FRAG 341 +#define ICE_MAC_IPV4_GTPU_IPV6_PAY 342 +#define ICE_MAC_IPV4_GTPU_IPV6_UDP_PAY 343 +#define ICE_MAC_IPV4_GTPU_IPV6_TCP 344 +#define ICE_MAC_IPV4_GTPU_IPV6_ICMPV6 345 +#define ICE_MAC_IPV6_GTPU_IPV6_FRAG 346 +#define ICE_MAC_IPV6_GTPU_IPV6_PAY 347 +#define ICE_MAC_IPV6_GTPU_IPV6_UDP_PAY 348 +#define ICE_MAC_IPV6_GTPU_IPV6_TCP 349 +#define ICE_MAC_IPV6_GTPU_IPV6_ICMPV6 350 + +/* Attributes that can modify PTYPE definitions. + * + * These values will represent special attributes for PTYPES, which will + * resolve into metadata packet flags definitions that can be used in the TCAM + * for identifying a PTYPE with specific characteristics. + */ +enum ice_ptype_attrib_type { + /* GTP PTYPES */ + ICE_PTYPE_ATTR_GTP_PDU_EH, + ICE_PTYPE_ATTR_GTP_SESSION, + ICE_PTYPE_ATTR_GTP_DOWNLINK, + ICE_PTYPE_ATTR_GTP_UPLINK, +}; + +struct ice_ptype_attrib_info { + u16 flags; + u16 mask; +}; + +/* TCAM flag definitions */ +#define ICE_GTP_PDU BIT(14) +#define ICE_GTP_PDU_LINK BIT(13) + +/* GTP attributes */ +#define ICE_GTP_PDU_FLAG_MASK (ICE_GTP_PDU) +#define ICE_GTP_PDU_EH ICE_GTP_PDU + +#define ICE_GTP_FLAGS_MASK (ICE_GTP_PDU | ICE_GTP_PDU_LINK) +#define ICE_GTP_SESSION 0 +#define ICE_GTP_DOWNLINK ICE_GTP_PDU +#define ICE_GTP_UPLINK (ICE_GTP_PDU | ICE_GTP_PDU_LINK) + +struct ice_ptype_attributes { + u16 ptype; + enum ice_ptype_attrib_type attrib; +}; /* Packet Type Groups (PTG) - Inner Most fields (IM) */ #define ICE_PTG_IM_IPV4_TCP 16 @@ -530,12 +593,14 @@ struct ice_prof_map { u8 prof_id; u8 ptg_cnt; u8 ptg[ICE_MAX_PTG_PER_PROFILE]; + struct ice_ptype_attrib_info attr[ICE_MAX_PTG_PER_PROFILE]; }; #define ICE_INVALID_TCAM 0xFFFF struct ice_tcam_inf { u16 tcam_idx; + struct ice_ptype_attrib_info attr; u8 ptg; u8 prof_id; u8 in_use; @@ -708,6 +773,7 @@ struct ice_chs_chg { u16 vsig; u16 orig_vsig; u16 tcam_idx; + struct ice_ptype_attrib_info attr; }; #define ICE_FLOW_PTYPE_MAX ICE_XLT1_CNT diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 38c7c42f7..f4f961167 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -20,6 +20,7 @@ #define ICE_FLOW_FLD_SZ_ARP_OPER 2 #define ICE_FLOW_FLD_SZ_GRE_KEYID 4 #define ICE_FLOW_FLD_SZ_GTP_TEID 4 +#define ICE_FLOW_FLD_SZ_GTP_QFI 2 #define ICE_FLOW_FLD_SZ_PPPOE_SESS_ID 2 /* Describe properties of a protocol header field */ @@ -126,6 +127,12 @@ struct ice_flow_field_info ice_flds_info[ICE_FLOW_FIELD_IDX_MAX] = { /* ICE_FLOW_FIELD_IDX_GTPU_IP_TEID */ ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_GTPU_IP, 12, ICE_FLOW_FLD_SZ_GTP_TEID), + /* ICE_FLOW_FIELD_IDX_GTPU_EH_TEID */ + ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_GTPU_EH, 12, + ICE_FLOW_FLD_SZ_GTP_TEID), + /* ICE_FLOW_FIELD_IDX_GTPU_EH_QFI */ + ICE_FLOW_FLD_INFO_MSK(ICE_FLOW_SEG_HDR_GTPU_EH, 20, + ICE_FLOW_FLD_SZ_GTP_QFI, 0x003f), /* ICE_FLOW_FIELD_IDX_GTPU_UP_TEID */ ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_GTPU_UP, 12, ICE_FLOW_FLD_SZ_GTP_TEID), @@ -169,7 +176,7 @@ static const u32 ice_ptypes_macvlan_il[] = { static const u32 ice_ptypes_ipv4_ofos[] = { 0x1DC00000, 0x04000800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x000FC000, 0x00000000, 0x00000000, + 0x0003000F, 0x000FC000, 0x03E0F800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -193,7 +200,7 @@ static const u32 ice_ptypes_ipv4_il[] = { static const u32 ice_ptypes_ipv6_ofos[] = { 0x00000000, 0x00000000, 0x77000000, 0x10002000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x03F00000, 0x00000000, 0x00000000, + 0x00080F00, 0x03F00000, 0x7C1F0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -336,10 +343,33 @@ static const u32 ice_ptypes_gtpc_tid[] = { }; /* Packet types for GTPU */ +static const struct ice_ptype_attributes ice_attr_gtpu_eh[] = { + { ICE_MAC_IPV4_GTPU_IPV4_FRAG, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV4_GTPU_IPV4_PAY, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV4_GTPU_IPV4_UDP_PAY, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV4_GTPU_IPV4_TCP, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV4_GTPU_IPV4_ICMP, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV4_FRAG, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV4_PAY, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV4_UDP_PAY, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV4_TCP, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV4_ICMP, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV4_GTPU_IPV6_FRAG, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV4_GTPU_IPV6_PAY, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV4_GTPU_IPV6_UDP_PAY, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV4_GTPU_IPV6_TCP, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV4_GTPU_IPV6_ICMPV6, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV6_FRAG, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV6_PAY, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV6_UDP_PAY, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV6_TCP, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV6_ICMPV6, ICE_PTYPE_ATTR_GTP_PDU_EH }, +}; + static const u32 ice_ptypes_gtpu[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x7FFFF800, 0x00000000, + 0x00000000, 0x00000000, 0x7FFFFE00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -370,6 +400,10 @@ struct ice_flow_prof_params { * This will give us the direction flags. */ struct ice_fv_word es[ICE_MAX_FV_WORDS]; + /* attributes can be used to add attributes to a particular PTYPE */ + const struct ice_ptype_attributes *attr; + u16 attr_cnt; + u16 mask[ICE_MAX_FV_WORDS]; ice_declare_bitmap(ptypes, ICE_FLOW_PTYPE_MAX); }; @@ -562,6 +596,16 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params) ice_and_bitmap(params->ptypes, params->ptypes, src, ICE_FLOW_PTYPE_MAX); } + } else if (hdrs & ICE_FLOW_SEG_HDR_GTPU_EH) { + if (!i) { + src = (const ice_bitmap_t *)ice_ptypes_gtpu; + ice_and_bitmap(params->ptypes, params->ptypes, + src, ICE_FLOW_PTYPE_MAX); + } + + /* Attributes for GTP packet with Extension Header */ + params->attr = ice_attr_gtpu_eh; + params->attr_cnt = ARRAY_SIZE(ice_attr_gtpu_eh); } } @@ -711,6 +755,8 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params, case ICE_FLOW_FIELD_IDX_GTPU_IP_TEID: case ICE_FLOW_FIELD_IDX_GTPU_UP_TEID: case ICE_FLOW_FIELD_IDX_GTPU_DWN_TEID: + case ICE_FLOW_FIELD_IDX_GTPU_EH_TEID: + case ICE_FLOW_FIELD_IDX_GTPU_EH_QFI: /* GTP is accessed through UDP OF protocol */ prot_id = ICE_PROT_UDP_OF; break; @@ -1176,8 +1222,9 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk, } /* Add a HW profile for this flow profile */ - status = ice_add_prof_with_mask(hw, blk, prof_id, (u8 *)params.ptypes, - params.es, params.mask); + status = ice_add_prof(hw, blk, prof_id, (u8 *)params.ptypes, + params.attr, params.attr_cnt, params.es, + params.mask); if (status) { ice_debug(hw, ICE_DBG_FLOW, "Error adding a HW flow profile\n"); goto out; diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h index c224e6ebf..4686274af 100644 --- a/drivers/net/ice/base/ice_flow.h +++ b/drivers/net/ice/base/ice_flow.h @@ -58,6 +58,19 @@ #define ICE_FLOW_HASH_GTP_U_IPV6_TEID \ (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_GTP_U_TEID) +#define ICE_FLOW_HASH_GTP_U_EH_TEID \ + (BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_EH_TEID)) + +#define ICE_FLOW_HASH_GTP_U_EH_QFI \ + (BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_EH_QFI)) + +#define ICE_FLOW_HASH_GTP_U_IPV4_EH \ + (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_GTP_U_EH_TEID | \ + ICE_FLOW_HASH_GTP_U_EH_QFI) +#define ICE_FLOW_HASH_GTP_U_IPV6_EH \ + (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_GTP_U_EH_TEID | \ + ICE_FLOW_HASH_GTP_U_EH_QFI) + #define ICE_FLOW_HASH_PPPOE_SESS_ID \ (BIT_ULL(ICE_FLOW_FIELD_IDX_PPPOE_SESS_ID)) @@ -89,9 +102,10 @@ enum ice_flow_seg_hdr { ICE_FLOW_SEG_HDR_GTPC = 0x00000400, ICE_FLOW_SEG_HDR_GTPC_TEID = 0x00000800, ICE_FLOW_SEG_HDR_GTPU_IP = 0x00001000, - ICE_FLOW_SEG_HDR_GTPU_DWN = 0x00002000, - ICE_FLOW_SEG_HDR_GTPU_UP = 0x00004000, - ICE_FLOW_SEG_HDR_PPPOE = 0x00008000, + ICE_FLOW_SEG_HDR_GTPU_EH = 0x00002000, + ICE_FLOW_SEG_HDR_GTPU_DWN = 0x00004000, + ICE_FLOW_SEG_HDR_GTPU_UP = 0x00008000, + ICE_FLOW_SEG_HDR_PPPOE = 0x00010000, }; /* These segements all have the same PTYPES, but are otherwise distinguished by @@ -99,6 +113,7 @@ enum ice_flow_seg_hdr { * * gtp_eh_pdu gtp_eh_pdu_link * ICE_FLOW_SEG_HDR_GTPU_IP 0 0 + * ICE_FLOW_SEG_HDR_GTPU_EH 1 don't care * ICE_FLOW_SEG_HDR_GTPU_DWN 1 0 * ICE_FLOW_SEG_HDR_GTPU_UP 1 1 */ @@ -147,6 +162,9 @@ enum ice_flow_field { ICE_FLOW_FIELD_IDX_GTPC_TEID, /* GTPU_IP */ ICE_FLOW_FIELD_IDX_GTPU_IP_TEID, + /* GTPU_EH */ + ICE_FLOW_FIELD_IDX_GTPU_EH_TEID, + ICE_FLOW_FIELD_IDX_GTPU_EH_QFI, /* GTPU_UP */ ICE_FLOW_FIELD_IDX_GTPU_UP_TEID, /* GTPU_DWN */ -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* Re: [dpdk-dev] [PATCH v3 11/12] net/ice/base: add QFI for Flow Director 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 11/12] net/ice/base: add QFI for Flow Director Qi Zhang @ 2019-10-10 3:09 ` Yang, Qiming 0 siblings, 0 replies; 166+ messages in thread From: Yang, Qiming @ 2019-10-10 3:09 UTC (permalink / raw) To: Zhang, Qi Z, Lu, Wenzhuo Cc: dev, Ye, Xiaolong, Nowlin, Dan, Stillwell Jr, Paul M -----Original Message----- From: Zhang, Qi Z Sent: Tuesday, October 8, 2019 09:50 To: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming <qiming.yang@intel.com> Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>; Nowlin, Dan <dan.nowlin@intel.com>; Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com> Subject: [PATCH v3 11/12] net/ice/base: add QFI for Flow Director Added the GTP QFI field to the Flow director interface to allow matching against this field. Since this field only appears in GTP packets with extension headers, this also requires adding profile TCAM mask matching capability. This allows comprehending different PTYPE attributes by examining flags from the parser. Using this method, different profiles can be used by examining flag values from the parser. Signed-off-by: Dan Nowlin <dan.nowlin@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flex_pipe.c | 245 ++++++++++++++--------------------- drivers/net/ice/base/ice_flex_pipe.h | 6 +- drivers/net/ice/base/ice_flex_type.h | 66 ++++++++++ drivers/net/ice/base/ice_flow.c | 57 +++++++- drivers/net/ice/base/ice_flow.h | 24 +++- 5 files changed, 238 insertions(+), 160 deletions(-) diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index bf14149b8..c2af1dfe8 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -2692,34 +2692,7 @@ ice_find_prof_id_with_mask(struct ice_hw *hw, enum ice_block blk, continue; /* check if masks settings are the same for this profile */ - if (!ice_prof_has_mask(hw, blk, i, masks)) - continue; - - *prof_id = i; - return ICE_SUCCESS; - } - - return ICE_ERR_DOES_NOT_EXIST; -} - -/** - * ice_find_prof_id - find profile ID for a given field vector - * @hw: pointer to the hardware structure - * @blk: HW block - * @fv: field vector to search for - * @prof_id: receives the profile ID - */ -static enum ice_status -ice_find_prof_id(struct ice_hw *hw, enum ice_block blk, - struct ice_fv_word *fv, u8 *prof_id) -{ - struct ice_es *es = &hw->blk[blk].es; - u16 off, i; - - for (i = 0; i < es->count; i++) { - off = i * es->fvw; - - if (memcmp(&es->t[off], fv, es->fvw * sizeof(*fv))) + if (masks && !ice_prof_has_mask(hw, blk, i, masks)) continue; *prof_id = i; @@ -4364,127 +4337,58 @@ ice_update_fd_swap(struct ice_hw *hw, u16 prof_id, struct ice_fv_word *es) return ICE_SUCCESS; } +/* The entries here needs to match the order of enum ice_ptype_attrib +*/ static const struct ice_ptype_attrib_info ice_ptype_attributes[] = { + { ICE_GTP_PDU_EH, ICE_GTP_PDU_FLAG_MASK }, + { ICE_GTP_SESSION, ICE_GTP_FLAGS_MASK }, + { ICE_GTP_DOWNLINK, ICE_GTP_FLAGS_MASK }, + { ICE_GTP_UPLINK, ICE_GTP_FLAGS_MASK }, +}; + /** - * ice_add_prof_with_mask - add profile - * @hw: pointer to the HW struct - * @blk: hardware block - * @id: profile tracking ID - * @ptypes: array of bitmaps indicating ptypes (ICE_FLOW_PTYPE_MAX bits) - * @es: extraction sequence (length of array is determined by the block) - * @masks: extraction sequence (length of array is determined by the block) - * - * This function registers a profile, which matches a set of PTYPES with a - * particular extraction sequence. While the hardware profile is allocated - * it will not be written until the first call to ice_add_flow that specifies - * the ID value used here. + * ice_get_ptype_attrib_info - get ptype attribute information + * @type: attribute type + * @info: pointer to variable to the attribute information */ -enum ice_status -ice_add_prof_with_mask(struct ice_hw *hw, enum ice_block blk, u64 id, - u8 ptypes[], struct ice_fv_word *es, u16 *masks) +static void +ice_get_ptype_attrib_info(enum ice_ptype_attrib_type type, + struct ice_ptype_attrib_info *info) { - u32 bytes = DIVIDE_AND_ROUND_UP(ICE_FLOW_PTYPE_MAX, BITS_PER_BYTE); - ice_declare_bitmap(ptgs_used, ICE_XLT1_CNT); - struct ice_prof_map *prof; - enum ice_status status; - u32 byte = 0; - u8 prof_id; - - ice_zero_bitmap(ptgs_used, ICE_XLT1_CNT); - - ice_acquire_lock(&hw->blk[blk].es.prof_map_lock); - - /* search for existing profile */ - status = ice_find_prof_id_with_mask(hw, blk, es, masks, &prof_id); - if (status) { - /* allocate profile ID */ - status = ice_alloc_prof_id(hw, blk, &prof_id); - if (status) - goto err_ice_add_prof; - if (blk == ICE_BLK_FD) { - /* For Flow Director block, the extraction sequence may - * need to be altered in the case where there are paired - * fields that have no match. This is necessary because - * for Flow Director, src and dest fields need to paired - * for filter programming and these values are swapped - * during Tx. - */ - status = ice_update_fd_swap(hw, prof_id, es); - if (status) - goto err_ice_add_prof; - } - status = ice_update_prof_masking(hw, blk, prof_id, es, masks); - if (status) - goto err_ice_add_prof; - - /* and write new es */ - ice_write_es(hw, blk, prof_id, es); - } - - ice_prof_inc_ref(hw, blk, prof_id); - - /* add profile info */ - - prof = (struct ice_prof_map *)ice_malloc(hw, sizeof(*prof)); - if (!prof) - goto err_ice_add_prof; - - prof->profile_cookie = id; - prof->prof_id = prof_id; - prof->ptg_cnt = 0; - prof->context = 0; - - /* build list of ptgs */ - while (bytes && prof->ptg_cnt < ICE_MAX_PTG_PER_PROFILE) { - u32 bit; - - if (!ptypes[byte]) { - bytes--; - byte++; - continue; - } - /* Examine 8 bits per byte */ - for (bit = 0; bit < 8; bit++) { - if (ptypes[byte] & BIT(bit)) { - u16 ptype; - u8 ptg; - u8 m; - - ptype = byte * BITS_PER_BYTE + bit; - - /* The package should place all ptypes in a - * non-zero PTG, so the following call should - * never fail. - */ - if (ice_ptg_find_ptype(hw, blk, ptype, &ptg)) - continue; + *info = ice_ptype_attributes[type]; +} - /* If PTG is already added, skip and continue */ - if (ice_is_bit_set(ptgs_used, ptg)) - continue; +/** + * ice_add_prof_attrib - add any ptg with attributes to profile + * @prof: pointer to the profile to which ptg entries will be added + * @ptg: PTG to be added + * @ptype: PTYPE that needs to be looked up + * @attr: array of attributes that will be considered + * @attr_cnt: number of elements in the attribute array */ static enum +ice_status ice_add_prof_attrib(struct ice_prof_map *prof, u8 ptg, u16 +ptype, + const struct ice_ptype_attributes *attr, u16 attr_cnt) { + bool found = false; + u16 i; - ice_set_bit(ptg, ptgs_used); - prof->ptg[prof->ptg_cnt] = ptg; + for (i = 0; i < attr_cnt; i++) { + if (attr[i].ptype == ptype) { + found = true; - if (++prof->ptg_cnt >= ICE_MAX_PTG_PER_PROFILE) - break; + prof->ptg[prof->ptg_cnt] = ptg; + ice_get_ptype_attrib_info(attr[i].attrib, + &prof->attr[prof->ptg_cnt]); - /* nothing left in byte, then exit */ - m = ~((1 << (bit + 1)) - 1); - if (!(ptypes[byte] & m)) - break; - } + if (++prof->ptg_cnt >= ICE_MAX_PTG_PER_PROFILE) + return ICE_ERR_MAX_LIMIT; } - - bytes--; - byte++; } - LIST_ADD(&prof->list, &hw->blk[blk].es.prof_map); - status = ICE_SUCCESS; + if (!found) + return ICE_ERR_DOES_NOT_EXIST; -err_ice_add_prof: - ice_release_lock(&hw->blk[blk].es.prof_map_lock); - return status; + return ICE_SUCCESS; } /** @@ -4493,16 +4397,20 @@ ice_add_prof_with_mask(struct ice_hw *hw, enum ice_block blk, u64 id, * @blk: hardware block * @id: profile tracking ID * @ptypes: array of bitmaps indicating ptypes (ICE_FLOW_PTYPE_MAX bits) + * @attr: array of attributes + * @attr_cnt: number of elements in attrib array * @es: extraction sequence (length of array is determined by the block) + * @masks: mask for extraction sequence * - * This function registers a profile, which matches a set of PTGs with a + * This function registers a profile, which matches a set of PTYPES + with a * particular extraction sequence. While the hardware profile is allocated * it will not be written until the first call to ice_add_flow that specifies * the ID value used here. */ enum ice_status ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], - struct ice_fv_word *es) + const struct ice_ptype_attributes *attr, u16 attr_cnt, + struct ice_fv_word *es, u16 *masks) { u32 bytes = DIVIDE_AND_ROUND_UP(ICE_FLOW_PTYPE_MAX, BITS_PER_BYTE); ice_declare_bitmap(ptgs_used, ICE_XLT1_CNT); @@ -4516,7 +4424,7 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], ice_acquire_lock(&hw->blk[blk].es.prof_map_lock); /* search for existing profile */ - status = ice_find_prof_id(hw, blk, es, &prof_id); + status = ice_find_prof_id_with_mask(hw, blk, es, masks, &prof_id); if (status) { /* allocate profile ID */ status = ice_alloc_prof_id(hw, blk, &prof_id); @@ -4534,6 +4442,9 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], if (status) goto err_ice_add_prof; } + status = ice_update_prof_masking(hw, blk, prof_id, es, masks); + if (status) + goto err_ice_add_prof; /* and write new es */ ice_write_es(hw, blk, prof_id, es); @@ -4582,10 +4493,25 @@ ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], continue; ice_set_bit(ptg, ptgs_used); - prof->ptg[prof->ptg_cnt] = ptg; - - if (++prof->ptg_cnt >= ICE_MAX_PTG_PER_PROFILE) + /* Check to see there are any attributes for + * this ptype, and add them if found. + */ + status = ice_add_prof_attrib(prof, ptg, ptype, + attr, attr_cnt); + if (status == ICE_ERR_MAX_LIMIT) break; + if (status) { + /* This is simple a ptype/ptg with no + * attribute + */ + prof->ptg[prof->ptg_cnt] = ptg; + prof->attr[prof->ptg_cnt].flags = 0; + prof->attr[prof->ptg_cnt].mask = 0; + + if (++prof->ptg_cnt >= + ICE_MAX_PTG_PER_PROFILE) + break; + } /* nothing left in byte, then exit */ m = ~((1 << (bit + 1)) - 1); @@ -4928,6 +4854,7 @@ ice_get_prof(struct ice_hw *hw, enum ice_block blk, u64 hdl, p->type = ICE_PTG_ES_ADD; p->ptype = 0; p->ptg = map->ptg[i]; + p->attr = map->attr[i]; p->add_ptg = 0; p->add_prof = 1; @@ -5017,6 +4944,7 @@ ice_add_prof_to_lst(struct ice_hw *hw, enum ice_block blk, p->tcam[i].prof_id = map->prof_id; p->tcam[i].tcam_idx = ICE_INVALID_TCAM; p->tcam[i].ptg = map->ptg[i]; + p->tcam[i].attr = map->attr[i]; } LIST_ADD(&p->list, lst); @@ -5064,6 +4992,19 @@ ice_move_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 vsig, } /** + * ice_set_tcam_flags - set tcam flag don't care mask + * @mask: mask for flags + * @dc_mask: pointer to the don't care mask */ static void +ice_set_tcam_flags(u16 mask, u8 dc_mask[ICE_TCAM_KEY_VAL_SZ]) { + u16 *flag_word; + + /* flags are lowest u16 */ + flag_word = (u16 *)dc_mask; + *flag_word = ~mask; +} +/** * ice_prof_tcam_ena_dis - add enable or disable TCAM change * @hw: pointer to the HW struct * @blk: hardware block @@ -5105,9 +5046,12 @@ ice_prof_tcam_ena_dis(struct ice_hw *hw, enum ice_block blk, bool enable, if (!p) return ICE_ERR_NO_MEMORY; + /* set don't care masks for tcam flags */ + ice_set_tcam_flags(tcam->attr.mask, dc_msk); + status = ice_tcam_write_entry(hw, blk, tcam->tcam_idx, tcam->prof_id, - tcam->ptg, vsig, 0, 0, vl_msk, dc_msk, - nm_msk); + tcam->ptg, vsig, 0, tcam->attr.flags, + vl_msk, dc_msk, nm_msk); if (status) goto err_ice_prof_tcam_ena_dis; @@ -5258,6 +5202,7 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl, t->tcam[i].ptg = map->ptg[i]; t->tcam[i].prof_id = map->prof_id; t->tcam[i].tcam_idx = tcam_idx; + t->tcam[i].attr = map->attr[i]; t->tcam[i].in_use = true; p->type = ICE_TCAM_ADD; @@ -5267,11 +5212,15 @@ ice_add_prof_id_vsig(struct ice_hw *hw, enum ice_block blk, u16 vsig, u64 hdl, p->vsig = vsig; p->tcam_idx = t->tcam[i].tcam_idx; + /* set don't care masks for tcam flags */ + ice_set_tcam_flags(t->tcam[i].attr.mask, dc_msk); + /* write the TCAM entry */ status = ice_tcam_write_entry(hw, blk, t->tcam[i].tcam_idx, t->tcam[i].prof_id, - t->tcam[i].ptg, vsig, 0, 0, - vl_msk, dc_msk, nm_msk); + t->tcam[i].ptg, vsig, 0, + t->tcam[i].attr.flags, vl_msk, + dc_msk, nm_msk); if (status) goto err_ice_add_prof_id_vsig; diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h index e7d42e3de..b24a09b4d 100644 --- a/drivers/net/ice/base/ice_flex_pipe.h +++ b/drivers/net/ice/base/ice_flex_pipe.h @@ -52,11 +52,9 @@ ice_tunnel_get_type(struct ice_hw *hw, u16 port, enum ice_tunnel_type *type); enum ice_status ice_vsig_find_vsi(struct ice_hw *hw, enum ice_block blk, u16 vsi, u16 *vsig); enum ice_status -ice_add_prof_with_mask(struct ice_hw *hw, enum ice_block blk, u64 id, - u8 ptypes[], struct ice_fv_word *es, u16 *masks); -enum ice_status ice_add_prof(struct ice_hw *hw, enum ice_block blk, u64 id, u8 ptypes[], - struct ice_fv_word *es); + const struct ice_ptype_attributes *attr, u16 attr_cnt, + struct ice_fv_word *es, u16 *masks); void ice_init_all_prof_masks(struct ice_hw *hw); void ice_shutdown_all_prof_masks(struct ice_hw *hw); struct ice_prof_map * diff --git a/drivers/net/ice/base/ice_flex_type.h b/drivers/net/ice/base/ice_flex_type.h index 92d205ac7..1be98ea52 100644 --- a/drivers/net/ice/base/ice_flex_type.h +++ b/drivers/net/ice/base/ice_flex_type.h @@ -278,6 +278,69 @@ enum ice_sect { #define ICE_PTYPE_IPV6_TCP_PAY 92 #define ICE_PTYPE_IPV6_SCTP_PAY 93 #define ICE_PTYPE_IPV6_ICMP_PAY 94 +#define ICE_MAC_IPV4_GTPC_TEID 325 +#define ICE_MAC_IPV6_GTPC_TEID 326 +#define ICE_MAC_IPV4_GTPC 327 +#define ICE_MAC_IPV6_GTPC 328 +#define ICE_MAC_IPV4_GTPU 329 +#define ICE_MAC_IPV6_GTPU 330 +#define ICE_MAC_IPV4_GTPU_IPV4_FRAG 331 +#define ICE_MAC_IPV4_GTPU_IPV4_PAY 332 +#define ICE_MAC_IPV4_GTPU_IPV4_UDP_PAY 333 +#define ICE_MAC_IPV4_GTPU_IPV4_TCP 334 +#define ICE_MAC_IPV4_GTPU_IPV4_ICMP 335 +#define ICE_MAC_IPV6_GTPU_IPV4_FRAG 336 +#define ICE_MAC_IPV6_GTPU_IPV4_PAY 337 +#define ICE_MAC_IPV6_GTPU_IPV4_UDP_PAY 338 +#define ICE_MAC_IPV6_GTPU_IPV4_TCP 339 +#define ICE_MAC_IPV6_GTPU_IPV4_ICMP 340 +#define ICE_MAC_IPV4_GTPU_IPV6_FRAG 341 +#define ICE_MAC_IPV4_GTPU_IPV6_PAY 342 +#define ICE_MAC_IPV4_GTPU_IPV6_UDP_PAY 343 +#define ICE_MAC_IPV4_GTPU_IPV6_TCP 344 +#define ICE_MAC_IPV4_GTPU_IPV6_ICMPV6 345 +#define ICE_MAC_IPV6_GTPU_IPV6_FRAG 346 +#define ICE_MAC_IPV6_GTPU_IPV6_PAY 347 +#define ICE_MAC_IPV6_GTPU_IPV6_UDP_PAY 348 +#define ICE_MAC_IPV6_GTPU_IPV6_TCP 349 +#define ICE_MAC_IPV6_GTPU_IPV6_ICMPV6 350 + +/* Attributes that can modify PTYPE definitions. + * + * These values will represent special attributes for PTYPES, which +will + * resolve into metadata packet flags definitions that can be used in +the TCAM + * for identifying a PTYPE with specific characteristics. + */ +enum ice_ptype_attrib_type { + /* GTP PTYPES */ + ICE_PTYPE_ATTR_GTP_PDU_EH, + ICE_PTYPE_ATTR_GTP_SESSION, + ICE_PTYPE_ATTR_GTP_DOWNLINK, + ICE_PTYPE_ATTR_GTP_UPLINK, +}; + +struct ice_ptype_attrib_info { + u16 flags; + u16 mask; +}; + +/* TCAM flag definitions */ +#define ICE_GTP_PDU BIT(14) +#define ICE_GTP_PDU_LINK BIT(13) + +/* GTP attributes */ +#define ICE_GTP_PDU_FLAG_MASK (ICE_GTP_PDU) +#define ICE_GTP_PDU_EH ICE_GTP_PDU + +#define ICE_GTP_FLAGS_MASK (ICE_GTP_PDU | ICE_GTP_PDU_LINK) +#define ICE_GTP_SESSION 0 +#define ICE_GTP_DOWNLINK ICE_GTP_PDU +#define ICE_GTP_UPLINK (ICE_GTP_PDU | ICE_GTP_PDU_LINK) + +struct ice_ptype_attributes { + u16 ptype; + enum ice_ptype_attrib_type attrib; +}; /* Packet Type Groups (PTG) - Inner Most fields (IM) */ #define ICE_PTG_IM_IPV4_TCP 16 @@ -530,12 +593,14 @@ struct ice_prof_map { u8 prof_id; u8 ptg_cnt; u8 ptg[ICE_MAX_PTG_PER_PROFILE]; + struct ice_ptype_attrib_info attr[ICE_MAX_PTG_PER_PROFILE]; }; #define ICE_INVALID_TCAM 0xFFFF struct ice_tcam_inf { u16 tcam_idx; + struct ice_ptype_attrib_info attr; u8 ptg; u8 prof_id; u8 in_use; @@ -708,6 +773,7 @@ struct ice_chs_chg { u16 vsig; u16 orig_vsig; u16 tcam_idx; + struct ice_ptype_attrib_info attr; }; #define ICE_FLOW_PTYPE_MAX ICE_XLT1_CNT diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c index 38c7c42f7..f4f961167 100644 --- a/drivers/net/ice/base/ice_flow.c +++ b/drivers/net/ice/base/ice_flow.c @@ -20,6 +20,7 @@ #define ICE_FLOW_FLD_SZ_ARP_OPER 2 #define ICE_FLOW_FLD_SZ_GRE_KEYID 4 #define ICE_FLOW_FLD_SZ_GTP_TEID 4 +#define ICE_FLOW_FLD_SZ_GTP_QFI 2 #define ICE_FLOW_FLD_SZ_PPPOE_SESS_ID 2 /* Describe properties of a protocol header field */ @@ -126,6 +127,12 @@ struct ice_flow_field_info ice_flds_info[ICE_FLOW_FIELD_IDX_MAX] = { /* ICE_FLOW_FIELD_IDX_GTPU_IP_TEID */ ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_GTPU_IP, 12, ICE_FLOW_FLD_SZ_GTP_TEID), + /* ICE_FLOW_FIELD_IDX_GTPU_EH_TEID */ + ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_GTPU_EH, 12, + ICE_FLOW_FLD_SZ_GTP_TEID), + /* ICE_FLOW_FIELD_IDX_GTPU_EH_QFI */ + ICE_FLOW_FLD_INFO_MSK(ICE_FLOW_SEG_HDR_GTPU_EH, 20, + ICE_FLOW_FLD_SZ_GTP_QFI, 0x003f), /* ICE_FLOW_FIELD_IDX_GTPU_UP_TEID */ ICE_FLOW_FLD_INFO(ICE_FLOW_SEG_HDR_GTPU_UP, 12, ICE_FLOW_FLD_SZ_GTP_TEID), @@ -169,7 +176,7 @@ static const u32 ice_ptypes_macvlan_il[] = { static const u32 ice_ptypes_ipv4_ofos[] = { 0x1DC00000, 0x04000800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x000FC000, 0x00000000, 0x00000000, + 0x0003000F, 0x000FC000, 0x03E0F800, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -193,7 +200,7 @@ static const u32 ice_ptypes_ipv4_il[] = { static const u32 ice_ptypes_ipv6_ofos[] = { 0x00000000, 0x00000000, 0x77000000, 0x10002000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x03F00000, 0x00000000, 0x00000000, + 0x00080F00, 0x03F00000, 0x7C1F0000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -336,10 +343,33 @@ static const u32 ice_ptypes_gtpc_tid[] = { }; /* Packet types for GTPU */ +static const struct ice_ptype_attributes ice_attr_gtpu_eh[] = { + { ICE_MAC_IPV4_GTPU_IPV4_FRAG, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV4_GTPU_IPV4_PAY, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV4_GTPU_IPV4_UDP_PAY, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV4_GTPU_IPV4_TCP, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV4_GTPU_IPV4_ICMP, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV4_FRAG, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV4_PAY, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV4_UDP_PAY, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV4_TCP, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV4_ICMP, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV4_GTPU_IPV6_FRAG, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV4_GTPU_IPV6_PAY, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV4_GTPU_IPV6_UDP_PAY, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV4_GTPU_IPV6_TCP, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV4_GTPU_IPV6_ICMPV6, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV6_FRAG, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV6_PAY, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV6_UDP_PAY, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV6_TCP, ICE_PTYPE_ATTR_GTP_PDU_EH }, + { ICE_MAC_IPV6_GTPU_IPV6_ICMPV6, ICE_PTYPE_ATTR_GTP_PDU_EH }, }; + static const u32 ice_ptypes_gtpu[] = { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, - 0x00000000, 0x00000000, 0x7FFFF800, 0x00000000, + 0x00000000, 0x00000000, 0x7FFFFE00, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000, @@ -370,6 +400,10 @@ struct ice_flow_prof_params { * This will give us the direction flags. */ struct ice_fv_word es[ICE_MAX_FV_WORDS]; + /* attributes can be used to add attributes to a particular PTYPE */ + const struct ice_ptype_attributes *attr; + u16 attr_cnt; + u16 mask[ICE_MAX_FV_WORDS]; ice_declare_bitmap(ptypes, ICE_FLOW_PTYPE_MAX); }; @@ -562,6 +596,16 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params) ice_and_bitmap(params->ptypes, params->ptypes, src, ICE_FLOW_PTYPE_MAX); } + } else if (hdrs & ICE_FLOW_SEG_HDR_GTPU_EH) { + if (!i) { + src = (const ice_bitmap_t *)ice_ptypes_gtpu; + ice_and_bitmap(params->ptypes, params->ptypes, + src, ICE_FLOW_PTYPE_MAX); + } + + /* Attributes for GTP packet with Extension Header */ + params->attr = ice_attr_gtpu_eh; + params->attr_cnt = ARRAY_SIZE(ice_attr_gtpu_eh); } } @@ -711,6 +755,8 @@ ice_flow_xtract_fld(struct ice_hw *hw, struct ice_flow_prof_params *params, case ICE_FLOW_FIELD_IDX_GTPU_IP_TEID: case ICE_FLOW_FIELD_IDX_GTPU_UP_TEID: case ICE_FLOW_FIELD_IDX_GTPU_DWN_TEID: + case ICE_FLOW_FIELD_IDX_GTPU_EH_TEID: + case ICE_FLOW_FIELD_IDX_GTPU_EH_QFI: /* GTP is accessed through UDP OF protocol */ prot_id = ICE_PROT_UDP_OF; break; @@ -1176,8 +1222,9 @@ ice_flow_add_prof_sync(struct ice_hw *hw, enum ice_block blk, } /* Add a HW profile for this flow profile */ - status = ice_add_prof_with_mask(hw, blk, prof_id, (u8 *)params.ptypes, - params.es, params.mask); + status = ice_add_prof(hw, blk, prof_id, (u8 *)params.ptypes, + params.attr, params.attr_cnt, params.es, + params.mask); if (status) { ice_debug(hw, ICE_DBG_FLOW, "Error adding a HW flow profile\n"); goto out; diff --git a/drivers/net/ice/base/ice_flow.h b/drivers/net/ice/base/ice_flow.h index c224e6ebf..4686274af 100644 --- a/drivers/net/ice/base/ice_flow.h +++ b/drivers/net/ice/base/ice_flow.h @@ -58,6 +58,19 @@ #define ICE_FLOW_HASH_GTP_U_IPV6_TEID \ (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_GTP_U_TEID) +#define ICE_FLOW_HASH_GTP_U_EH_TEID \ + (BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_EH_TEID)) + +#define ICE_FLOW_HASH_GTP_U_EH_QFI \ + (BIT_ULL(ICE_FLOW_FIELD_IDX_GTPU_EH_QFI)) + +#define ICE_FLOW_HASH_GTP_U_IPV4_EH \ + (ICE_FLOW_HASH_IPV4 | ICE_FLOW_HASH_GTP_U_EH_TEID | \ + ICE_FLOW_HASH_GTP_U_EH_QFI) +#define ICE_FLOW_HASH_GTP_U_IPV6_EH \ + (ICE_FLOW_HASH_IPV6 | ICE_FLOW_HASH_GTP_U_EH_TEID | \ + ICE_FLOW_HASH_GTP_U_EH_QFI) + #define ICE_FLOW_HASH_PPPOE_SESS_ID \ (BIT_ULL(ICE_FLOW_FIELD_IDX_PPPOE_SESS_ID)) @@ -89,9 +102,10 @@ enum ice_flow_seg_hdr { ICE_FLOW_SEG_HDR_GTPC = 0x00000400, ICE_FLOW_SEG_HDR_GTPC_TEID = 0x00000800, ICE_FLOW_SEG_HDR_GTPU_IP = 0x00001000, - ICE_FLOW_SEG_HDR_GTPU_DWN = 0x00002000, - ICE_FLOW_SEG_HDR_GTPU_UP = 0x00004000, - ICE_FLOW_SEG_HDR_PPPOE = 0x00008000, + ICE_FLOW_SEG_HDR_GTPU_EH = 0x00002000, + ICE_FLOW_SEG_HDR_GTPU_DWN = 0x00004000, + ICE_FLOW_SEG_HDR_GTPU_UP = 0x00008000, + ICE_FLOW_SEG_HDR_PPPOE = 0x00010000, }; /* These segements all have the same PTYPES, but are otherwise distinguished by @@ -99,6 +113,7 @@ enum ice_flow_seg_hdr { * * gtp_eh_pdu gtp_eh_pdu_link * ICE_FLOW_SEG_HDR_GTPU_IP 0 0 + * ICE_FLOW_SEG_HDR_GTPU_EH 1 don't care * ICE_FLOW_SEG_HDR_GTPU_DWN 1 0 * ICE_FLOW_SEG_HDR_GTPU_UP 1 1 */ @@ -147,6 +162,9 @@ enum ice_flow_field { ICE_FLOW_FIELD_IDX_GTPC_TEID, /* GTPU_IP */ ICE_FLOW_FIELD_IDX_GTPU_IP_TEID, + /* GTPU_EH */ + ICE_FLOW_FIELD_IDX_GTPU_EH_TEID, + ICE_FLOW_FIELD_IDX_GTPU_EH_QFI, /* GTPU_UP */ ICE_FLOW_FIELD_IDX_GTPU_UP_TEID, /* GTPU_DWN */ -- 2.13.6 Acked-by: Qiming Yang <qiming.yang@intel.com> ^ permalink raw reply [flat|nested] 166+ messages in thread
* [dpdk-dev] [PATCH v3 12/12] net/ice/base: improve misc code style 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 00/12] net/ice: base code update Qi Zhang ` (10 preceding siblings ...) 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 11/12] net/ice/base: add QFI for Flow Director Qi Zhang @ 2019-10-08 1:50 ` Qi Zhang 2019-10-10 3:09 ` Yang, Qiming 2019-10-14 6:02 ` [dpdk-dev] [PATCH v3 00/12] net/ice: base code update Ye Xiaolong 12 siblings, 1 reply; 166+ messages in thread From: Qi Zhang @ 2019-10-08 1:50 UTC (permalink / raw) To: wenzhuo.lu, qiming.yang Cc: dev, xiaolong.ye, Qi Zhang, Tony Nguyen, Paul M Stillwell Jr Combine a couple of function definitions that can fit on one line. RCT a variable declaration. Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flex_pipe.c | 6 ++---- drivers/net/ice/base/ice_flex_pipe.h | 3 +-- drivers/net/ice/base/ice_nvm.c | 2 +- 3 files changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index c2af1dfe8..dd098f529 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -2131,8 +2131,7 @@ ice_ptg_find_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 *ptg) * This function allocates a given packet type group ID specified by the ptg * parameter. */ -static -void ice_ptg_alloc_val(struct ice_hw *hw, enum ice_block blk, u8 ptg) +static void ice_ptg_alloc_val(struct ice_hw *hw, enum ice_block blk, u8 ptg) { hw->blk[blk].xlt1.ptg_tbl[ptg].in_use = true; } @@ -3286,8 +3285,7 @@ static const u32 ice_blk_sids[ICE_BLK_COUNT][ICE_SID_OFF_COUNT] = { * @hw: pointer to the hardware structure * @blk: the HW block to initialize */ -static -void ice_init_sw_xlt1_db(struct ice_hw *hw, enum ice_block blk) +static void ice_init_sw_xlt1_db(struct ice_hw *hw, enum ice_block blk) { u16 pt; diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h index b24a09b4d..ee606af15 100644 --- a/drivers/net/ice/base/ice_flex_pipe.h +++ b/drivers/net/ice/base/ice_flex_pipe.h @@ -65,8 +65,7 @@ enum ice_status ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl); enum ice_status ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl); -enum ice_status -ice_init_pkg(struct ice_hw *hw, u8 *buff, u32 len); +enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buff, u32 len); enum ice_status ice_copy_and_init_pkg(struct ice_hw *hw, const u8 *buf, u32 len); enum ice_status ice_init_hw_tbls(struct ice_hw *hw); diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c index e00942528..1dbfc2dcc 100644 --- a/drivers/net/ice/base/ice_nvm.c +++ b/drivers/net/ice/base/ice_nvm.c @@ -260,8 +260,8 @@ enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data) */ enum ice_status ice_init_nvm(struct ice_hw *hw) { - struct ice_nvm_info *nvm = &hw->nvm; u16 oem_hi, oem_lo, boot_cfg_tlv, boot_cfg_tlv_len; + struct ice_nvm_info *nvm = &hw->nvm; u16 eetrack_lo, eetrack_hi; enum ice_status status; u32 fla, gens_stat; -- 2.13.6 ^ permalink raw reply [flat|nested] 166+ messages in thread
* Re: [dpdk-dev] [PATCH v3 12/12] net/ice/base: improve misc code style 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 12/12] net/ice/base: improve misc code style Qi Zhang @ 2019-10-10 3:09 ` Yang, Qiming 0 siblings, 0 replies; 166+ messages in thread From: Yang, Qiming @ 2019-10-10 3:09 UTC (permalink / raw) To: Zhang, Qi Z, Lu, Wenzhuo Cc: dev, Ye, Xiaolong, Nguyen, Anthony L, Stillwell Jr, Paul M -----Original Message----- From: Zhang, Qi Z Sent: Tuesday, October 8, 2019 09:50 To: Lu, Wenzhuo <wenzhuo.lu@intel.com>; Yang, Qiming <qiming.yang@intel.com> Cc: dev@dpdk.org; Ye, Xiaolong <xiaolong.ye@intel.com>; Zhang, Qi Z <qi.z.zhang@intel.com>; Nguyen, Anthony L <anthony.l.nguyen@intel.com>; Stillwell Jr, Paul M <paul.m.stillwell.jr@intel.com> Subject: [PATCH v3 12/12] net/ice/base: improve misc code style Combine a couple of function definitions that can fit on one line. RCT a variable declaration. Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com> Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com> Signed-off-by: Qi Zhang <qi.z.zhang@intel.com> --- drivers/net/ice/base/ice_flex_pipe.c | 6 ++---- drivers/net/ice/base/ice_flex_pipe.h | 3 +-- drivers/net/ice/base/ice_nvm.c | 2 +- 3 files changed, 4 insertions(+), 7 deletions(-) diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c index c2af1dfe8..dd098f529 100644 --- a/drivers/net/ice/base/ice_flex_pipe.c +++ b/drivers/net/ice/base/ice_flex_pipe.c @@ -2131,8 +2131,7 @@ ice_ptg_find_ptype(struct ice_hw *hw, enum ice_block blk, u16 ptype, u8 *ptg) * This function allocates a given packet type group ID specified by the ptg * parameter. */ -static -void ice_ptg_alloc_val(struct ice_hw *hw, enum ice_block blk, u8 ptg) +static void ice_ptg_alloc_val(struct ice_hw *hw, enum ice_block blk, u8 +ptg) { hw->blk[blk].xlt1.ptg_tbl[ptg].in_use = true; } @@ -3286,8 +3285,7 @@ static const u32 ice_blk_sids[ICE_BLK_COUNT][ICE_SID_OFF_COUNT] = { * @hw: pointer to the hardware structure * @blk: the HW block to initialize */ -static -void ice_init_sw_xlt1_db(struct ice_hw *hw, enum ice_block blk) +static void ice_init_sw_xlt1_db(struct ice_hw *hw, enum ice_block blk) { u16 pt; diff --git a/drivers/net/ice/base/ice_flex_pipe.h b/drivers/net/ice/base/ice_flex_pipe.h index b24a09b4d..ee606af15 100644 --- a/drivers/net/ice/base/ice_flex_pipe.h +++ b/drivers/net/ice/base/ice_flex_pipe.h @@ -65,8 +65,7 @@ enum ice_status ice_add_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl); enum ice_status ice_rem_prof_id_flow(struct ice_hw *hw, enum ice_block blk, u16 vsi, u64 hdl); -enum ice_status -ice_init_pkg(struct ice_hw *hw, u8 *buff, u32 len); +enum ice_status ice_init_pkg(struct ice_hw *hw, u8 *buff, u32 len); enum ice_status ice_copy_and_init_pkg(struct ice_hw *hw, const u8 *buf, u32 len); enum ice_status ice_init_hw_tbls(struct ice_hw *hw); diff --git a/drivers/net/ice/base/ice_nvm.c b/drivers/net/ice/base/ice_nvm.c index e00942528..1dbfc2dcc 100644 --- a/drivers/net/ice/base/ice_nvm.c +++ b/drivers/net/ice/base/ice_nvm.c @@ -260,8 +260,8 @@ enum ice_status ice_read_sr_word(struct ice_hw *hw, u16 offset, u16 *data) */ enum ice_status ice_init_nvm(struct ice_hw *hw) { - struct ice_nvm_info *nvm = &hw->nvm; u16 oem_hi, oem_lo, boot_cfg_tlv, boot_cfg_tlv_len; + struct ice_nvm_info *nvm = &hw->nvm; u16 eetrack_lo, eetrack_hi; enum ice_status status; u32 fla, gens_stat; -- 2.13.6 Acked-by: Qiming Yang <qiming.yang@intel.com> ^ permalink raw reply [flat|nested] 166+ messages in thread
* Re: [dpdk-dev] [PATCH v3 00/12] net/ice: base code update 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 00/12] net/ice: base code update Qi Zhang ` (11 preceding siblings ...) 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 12/12] net/ice/base: improve misc code style Qi Zhang @ 2019-10-14 6:02 ` Ye Xiaolong 12 siblings, 0 replies; 166+ messages in thread From: Ye Xiaolong @ 2019-10-14 6:02 UTC (permalink / raw) To: Qi Zhang; +Cc: wenzhuo.lu, qiming.yang, dev On 10/08, Qi Zhang wrote: >Changes in summary >1. add GTP TEID support for fdir >2. improve fdir mask support. >3. couple fixes. >4. support QFI match in fdir > >v2: >- add QFI match support in fdir >- couple fixes and code clean > >v3: >- fix title in patch 12/12 > >Qi Zhang (12): > net/ice/base: fix for adding PPPoE switch rule > net/ice/base: fix for NVGRE switch rule programming > net/ice/base: update flow ptype bitmaps > net/ice/base: add GTPU TEID support for FD > net/ice/base: improvements to Flow Director masking > net/ice/base: remove dead error condition > net/ice/base: zero initialize structures > net/ice/base: fix unexpected switch rule overwrite > net/ice/base: fix flow raw field vector extraction > net/ice/base: fix switch rule programming for all profiles > net/ice/base: add QFI for Flow Director > net/ice/base: improve misc code style > > drivers/net/ice/base/ice_common.c | 3 - > drivers/net/ice/base/ice_fdir.c | 2 + > drivers/net/ice/base/ice_fdir.h | 1 + > drivers/net/ice/base/ice_flex_pipe.c | 334 +++++++++++++------------------ > drivers/net/ice/base/ice_flex_pipe.h | 9 +- > drivers/net/ice/base/ice_flex_type.h | 70 ++++++- > drivers/net/ice/base/ice_flow.c | 224 ++++++++++++++------- > drivers/net/ice/base/ice_flow.h | 34 +++- > drivers/net/ice/base/ice_nvm.c | 2 +- > drivers/net/ice/base/ice_protocol_type.h | 2 +- > drivers/net/ice/base/ice_switch.c | 30 +-- > 11 files changed, 409 insertions(+), 302 deletions(-) > >-- >2.13.6 > Series applied to dpdk-next-net-intel. ^ permalink raw reply [flat|nested] 166+ messages in thread
end of thread, other threads:[~2019-10-14 6:05 UTC | newest] Thread overview: 166+ messages (download: mbox.gz / follow: Atom feed) -- links below jump to the message on this page -- 2019-09-02 3:55 [dpdk-dev] [PATCH 0/8] net/ice/base: share code update secend batch Qi Zhang 2019-09-02 3:55 ` [dpdk-dev] [PATCH 1/8] net/ice/base: remove redundant empty lines Qi Zhang 2019-09-02 3:55 ` [dpdk-dev] [PATCH 2/8] net/ice/base: add support for tunnel packets Qi Zhang 2019-09-02 3:55 ` [dpdk-dev] [PATCH 3/8] net/ice/base: add non-word aligned ip field support Qi Zhang 2019-09-02 3:55 ` [dpdk-dev] [PATCH 4/8] net/ice/base: add non-word aligned ipv6 " Qi Zhang 2019-09-02 3:55 ` [dpdk-dev] [PATCH 5/8] net/ice/base: correct the mask for checking protocol header Qi Zhang 2019-09-02 3:55 ` [dpdk-dev] [PATCH 6/8] net/ice/base: propagate errors from functions Qi Zhang 2019-09-02 3:55 ` [dpdk-dev] [PATCH 7/8] net/ice/base: remove pointless NULL check of port info Qi Zhang 2019-09-02 3:55 ` [dpdk-dev] [PATCH 8/8] net/ice/base: remove RSS code as iavf host Qi Zhang 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 00/16] net/ice/base: share code update secend batch Qi Zhang 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 01/16] net/ice/base: remove redundant empty lines Qi Zhang 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 02/16] net/ice/base: add support for tunnel packets Qi Zhang 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 03/16] net/ice/base: add non-word aligned ip field support Qi Zhang 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 04/16] net/ice/base: add non-word aligned ipv6 " Qi Zhang 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 05/16] net/ice/base: correct the mask for checking protocol header Qi Zhang 2019-09-05 3:48 ` [dpdk-dev] [PATCH v2 06/16] net/ice/base: propagate errors from functions Qi Zhang 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 07/16] net/ice/base: remove pointless NULL check of port info Qi Zhang 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 08/16] net/ice/base: remove RSS code as iavf host Qi Zhang 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 09/16] net/ice/base: add support for switch rule about VLAN PPPoE Qi Zhang 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 10/16] net/ice/base: minor structure refactor Qi Zhang 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 11/16] net/ice/base: associate switch recipe to profiles Qi Zhang 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 12/16] net/ice/base: enable RSS for PPPoE with SCTP Qi Zhang 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 13/16] net/ice/base: enable fdir queue region Qi Zhang 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 14/16] net/ice/base: enable setting up FDIR counters Qi Zhang 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 15/16] net/ice/base: add dest MAC field support for FDIR Qi Zhang 2019-09-05 3:49 ` [dpdk-dev] [PATCH v2 16/16] net/ice/base: update FW API minor version Qi Zhang 2019-09-05 6:55 ` [dpdk-dev] [PATCH v2 00/16] net/ice/base: share code update secend batch Yang, Qiming 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 00/22] " Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 01/22] net/ice/base: remove redundant empty lines Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 02/22] net/ice/base: add support for tunnel packets Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 03/22] net/ice/base: add non-word aligned ip field support Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 04/22] net/ice/base: add non-word aligned ipv6 " Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 05/22] net/ice/base: correct the mask for checking protocol header Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 06/22] net/ice/base: propagate errors from functions Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 07/22] net/ice/base: remove pointless NULL check of port info Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 08/22] net/ice/base: remove RSS code as iavf host Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 09/22] net/ice/base: add support for switch rule about VLAN PPPoE Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 10/22] net/ice/base: minor structure refactor Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 11/22] net/ice/base: associate switch recipe to profiles Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 12/22] net/ice/base: enable RSS for PPPoE with SCTP Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 13/22] net/ice/base: enable fdir queue region Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 14/22] net/ice/base: enable setting up FDIR counters Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 15/22] net/ice/base: add dest MAC field support for FDIR Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 16/22] net/ice/base: update FW API minor version Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 17/22] net/ice/base: enable symmetric hash for RSS Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 18/22] net/ice/base: replace alloc-followed-by-copy with memdup Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 19/22] net/ice/base: add FDIR support for GTPU qfi field Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 20/22] net/ice/base: fix the bitmap for TCP in RSS Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 21/22] net/ice/base: fix segment in remove existing RSS rule Qi Zhang 2019-09-07 3:16 ` [dpdk-dev] [PATCH v3 22/22] net/ice/base: remove unused DDP package macros Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 00/30] net/ice/base: share code update secend batch Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 01/30] net/ice/base: remove redundant empty lines Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 02/30] net/ice/base: add support for tunnel packets Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 03/30] net/ice/base: add non-word aligned ip field support Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 04/30] net/ice/base: add non-word aligned ipv6 " Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 05/30] net/ice/base: correct the mask for checking protocol header Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 06/30] net/ice/base: propagate errors from functions Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 07/30] net/ice/base: remove pointless NULL check of port info Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 08/30] net/ice/base: remove RSS code as iavf host Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 09/30] net/ice/base: add support for switch rule about VLAN PPPoE Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 10/30] net/ice/base: minor structure refactor Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 11/30] net/ice/base: associate switch recipe to profiles Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 12/30] net/ice/base: enable RSS for PPPoE with SCTP Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 13/30] net/ice/base: enable fdir queue region Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 14/30] net/ice/base: enable setting up FDIR counters Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 15/30] net/ice/base: add dest MAC field support for FDIR Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 16/30] net/ice/base: update FW API minor version Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 17/30] net/ice/base: enable symmetric hash for RSS Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 18/30] net/ice/base: replace alloc-followed-by-copy with memdup Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 19/30] net/ice/base: add FDIR support for GTPU qfi field Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 20/30] net/ice/base: fix the bitmap for TCP in RSS Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 21/30] net/ice/base: fix segment in remove existing RSS rule Qi Zhang 2019-09-23 7:19 ` Yang, Qiming 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 22/30] net/ice/base: remove unused DDP package macros Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 23/30] net/ice/base: search field vector indices for result slots Qi Zhang 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 24/30] net/ice/base: fix 4 byte alignment for pppoe dummy packet Qi Zhang 2019-09-23 7:13 ` Yang, Qiming 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 25/30] net/ice/base: remove unnecessary error log Qi Zhang 2019-09-23 7:11 ` Yang, Qiming 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 26/30] net/ice/base: use bitmap copy where appropriate Qi Zhang 2019-09-23 7:10 ` Yang, Qiming 2019-09-23 6:26 ` [dpdk-dev] [PATCH v4 27/30] net/ice/base: fix alignment isue Qi Zhang 2019-09-23 6:26 ` Qi Zhang 2019-09-23 6:27 ` [dpdk-dev] [PATCH v4 28/30] net/ice/base: fix PTYPE bitmap Qi Zhang 2019-09-23 6:27 ` [dpdk-dev] [PATCH v4 29/30] net/ice/base: add switch support for IPv6 tc field Qi Zhang 2019-09-23 6:27 ` [dpdk-dev] [PATCH v4 30/30] net/ice/base: remove unused code Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 01/30] net/ice/base: remove redundant empty lines Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 02/30] net/ice/base: add support for tunnel packets Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 03/30] net/ice/base: add non-word aligned ip field support Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 04/30] net/ice/base: add non-word aligned ipv6 " Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 05/30] net/ice/base: correct the mask for checking protocol header Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 06/30] net/ice/base: propagate errors from functions Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 07/30] net/ice/base: remove pointless NULL check of port info Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 08/30] net/ice/base: remove RSS code as iavf host Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 09/30] net/ice/base: add support for switch rule about VLAN PPPoE Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 10/30] net/ice/base: minor structure refactor Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 11/30] net/ice/base: associate switch recipe to profiles Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 12/30] net/ice/base: enable RSS for PPPoE with SCTP Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 13/30] net/ice/base: enable fdir queue region Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 14/30] net/ice/base: enable setting up FDIR counters Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 15/30] net/ice/base: add dest MAC field support for FDIR Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 16/30] net/ice/base: update FW API minor version Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 17/30] net/ice/base: enable symmetric hash for RSS Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 18/30] net/ice/base: replace alloc-followed-by-copy with memdup Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 19/30] net/ice/base: add FDIR support for GTPU qfi field Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 20/30] net/ice/base: fix the bitmap for TCP in RSS Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 21/30] net/ice/base: fix segment in remove existing RSS rule Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 22/30] net/ice/base: remove unused DDP package macros Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 23/30] net/ice/base: search field vector indices for result slots Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 24/30] net/ice/base: fix 4 bytes alignment for pppoe dummy packet Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 25/30] net/ice/base: remove unnecessary error log Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 26/30] net/ice/base: use bitmap copy where appropriate Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 27/30] net/ice/base: fix alignment isue Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 28/30] net/ice/base: fix PTYPE bitmap Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 29/30] net/ice/base: add switch support for IPv6 tc field Qi Zhang 2019-09-23 7:44 ` [dpdk-dev] [PATCH v5 30/30] net/ice/base: remove unused code Qi Zhang 2019-09-23 9:31 ` [dpdk-dev] [PATCH v5 00/30] net/ice/base: share code update secend batch Yang, Qiming 2019-09-23 22:21 ` Ye Xiaolong 2019-09-27 4:16 ` [dpdk-dev] [PATCH 0/8] net/ice: base code update Qi Zhang 2019-09-27 4:16 ` [dpdk-dev] [PATCH 1/8] net/ice/base: fix for adding PPPoE switch rule Qi Zhang 2019-09-27 5:30 ` Yang, Qiming 2019-09-27 6:18 ` Zhang, Qi Z 2019-09-27 6:01 ` Zhao1, Wei 2019-09-27 4:16 ` [dpdk-dev] [PATCH 2/8] net/ice/base: fix for NVGRE switch rule programming Qi Zhang 2019-09-27 6:01 ` Zhao1, Wei 2019-09-27 4:16 ` [dpdk-dev] [PATCH 3/8] net/ice/base: update flow ptype bitmaps Qi Zhang 2019-09-27 4:16 ` [dpdk-dev] [PATCH 4/8] net/ice/base: add GTPU TEID support for FD Qi Zhang 2019-09-27 4:16 ` [dpdk-dev] [PATCH 5/8] net/ice/base: improvements to Flow Director masking Qi Zhang 2019-09-27 5:27 ` Yang, Qiming 2019-09-27 6:22 ` Zhang, Qi Z 2019-09-27 4:16 ` [dpdk-dev] [PATCH 6/8] net/ice/base: remove dead error condition Qi Zhang 2019-09-27 4:16 ` [dpdk-dev] [PATCH 7/8] net/ice/base: zero initialize structures Qi Zhang 2019-09-27 4:16 ` [dpdk-dev] [PATCH 8/8] net/ice/base: fix unexpected switch rule overwrite Qi Zhang 2019-09-27 6:24 ` [dpdk-dev] [PATCH 0/8] net/ice: base code update Yang, Qiming 2019-10-06 3:13 ` [dpdk-dev] [PATCH v2 00/12] " Qi Zhang 2019-10-06 3:13 ` [dpdk-dev] [PATCH v2 01/12] net/ice/base: fix for adding PPPoE switch rule Qi Zhang 2019-10-06 3:13 ` [dpdk-dev] [PATCH v2 02/12] net/ice/base: fix for NVGRE switch rule programming Qi Zhang 2019-10-06 3:13 ` [dpdk-dev] [PATCH v2 03/12] net/ice/base: update flow ptype bitmaps Qi Zhang 2019-10-06 3:14 ` [dpdk-dev] [PATCH v2 04/12] net/ice/base: add GTPU TEID support for FD Qi Zhang 2019-10-06 3:14 ` [dpdk-dev] [PATCH v2 05/12] net/ice/base: improvements to Flow Director masking Qi Zhang 2019-10-06 3:14 ` [dpdk-dev] [PATCH v2 06/12] net/ice/base: remove dead error condition Qi Zhang 2019-10-06 3:14 ` [dpdk-dev] [PATCH v2 07/12] net/ice/base: zero initialize structures Qi Zhang 2019-10-06 3:14 ` [dpdk-dev] [PATCH v2 08/12] net/ice/base: fix unexpected switch rule overwrite Qi Zhang 2019-10-06 3:14 ` [dpdk-dev] [PATCH v2 09/12] net/ice/base: fix flow raw field vector extraction Qi Zhang 2019-10-06 3:14 ` [dpdk-dev] [PATCH v2 10/12] net/ice/base: fix switch rule programming for all profiles Qi Zhang 2019-10-06 3:14 ` [dpdk-dev] [PATCH v2 11/12] net/ice/base: add QFI for Flow Director Qi Zhang 2019-10-06 3:14 ` [dpdk-dev] [PATCH v2 12/12] net/base/ice: improve misc code style Qi Zhang 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 00/12] net/ice: base code update Qi Zhang 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 01/12] net/ice/base: fix for adding PPPoE switch rule Qi Zhang 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 02/12] net/ice/base: fix for NVGRE switch rule programming Qi Zhang 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 03/12] net/ice/base: update flow ptype bitmaps Qi Zhang 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 04/12] net/ice/base: add GTPU TEID support for FD Qi Zhang 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 05/12] net/ice/base: improvements to Flow Director masking Qi Zhang 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 06/12] net/ice/base: remove dead error condition Qi Zhang 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 07/12] net/ice/base: zero initialize structures Qi Zhang 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 08/12] net/ice/base: fix unexpected switch rule overwrite Qi Zhang 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 09/12] net/ice/base: fix flow raw field vector extraction Qi Zhang 2019-10-10 3:07 ` Yang, Qiming 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 10/12] net/ice/base: fix switch rule programming for all profiles Qi Zhang 2019-10-10 3:08 ` Yang, Qiming 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 11/12] net/ice/base: add QFI for Flow Director Qi Zhang 2019-10-10 3:09 ` Yang, Qiming 2019-10-08 1:50 ` [dpdk-dev] [PATCH v3 12/12] net/ice/base: improve misc code style Qi Zhang 2019-10-10 3:09 ` Yang, Qiming 2019-10-14 6:02 ` [dpdk-dev] [PATCH v3 00/12] net/ice: base code update Ye Xiaolong
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