From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 7785FA0613 for ; Tue, 24 Sep 2019 18:39:14 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 1A12E2C16; Tue, 24 Sep 2019 18:39:14 +0200 (CEST) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id 7D2FF2C08 for ; Tue, 24 Sep 2019 18:39:12 +0200 (CEST) X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 24 Sep 2019 09:39:11 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.64,544,1559545200"; d="scan'208";a="218691156" Received: from yexl-server.sh.intel.com (HELO localhost) ([10.67.117.17]) by fmsmga002.fm.intel.com with ESMTP; 24 Sep 2019 09:39:09 -0700 Date: Wed, 25 Sep 2019 00:37:02 +0800 From: Ye Xiaolong To: Andy Pei Cc: dev@dpdk.org, rosen.xu@intel.com, tianfei.zhang@intel.com, qi.z.zhang@intel.com, david.lomartire@intel.com, ferruh.yigit@intel.com Message-ID: <20190924163702.GA73513@intel.com> References: <1568881185-89233-2-git-send-email-andy.pei@intel.com> <1568883774-92149-1-git-send-email-andy.pei@intel.com> <1568883774-92149-5-git-send-email-andy.pei@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1568883774-92149-5-git-send-email-andy.pei@intel.com> User-Agent: Mutt/1.9.4 (2018-02-28) Subject: Re: [dpdk-dev] [PATCH v6 04/17] raw/ifpga/base: add SEU error support X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 09/19, Andy Pei wrote: >From: Tianfei zhang > >This patch exposes SEU error information to application then application >could compare this information (128bit) with its own SMH file to know >if this SEU is a fatal error or not. > >Signed-off-by: Tianfei zhang >Signed-off-by: Andy Pei >--- > drivers/raw/ifpga/base/ifpga_defines.h | 5 +++- > drivers/raw/ifpga/base/ifpga_fme_error.c | 43 ++++++++++++++++++++++++++++++ > drivers/raw/ifpga/base/opae_ifpga_hw_api.h | 2 ++ > 3 files changed, 49 insertions(+), 1 deletion(-) > >diff --git a/drivers/raw/ifpga/base/ifpga_defines.h b/drivers/raw/ifpga/base/ifpga_defines.h >index 4216128..b450cb1 100644 >--- a/drivers/raw/ifpga/base/ifpga_defines.h >+++ b/drivers/raw/ifpga/base/ifpga_defines.h >@@ -1149,7 +1149,8 @@ struct feature_fme_error_capability { > u8 support_intr:1; > /* MSI-X vector table entry number */ > u16 intr_vector_num:12; >- u64 rsvd:51; /* Reserved */ >+ u64 rsvd:50; /* Reserved */ >+ u64 seu_support:1; > }; > }; > }; >@@ -1171,6 +1172,8 @@ struct feature_fme_err { > struct feature_fme_ras_catfaterror ras_catfaterr; > struct feature_fme_ras_error_inj ras_error_inj; > struct feature_fme_error_capability fme_err_capability; >+ u64 seu_emr_l; >+ u64 seu_emr_h; > }; > > /* FME Partial Reconfiguration Control */ >diff --git a/drivers/raw/ifpga/base/ifpga_fme_error.c b/drivers/raw/ifpga/base/ifpga_fme_error.c >index a6d3dab..c9bac15 100644 >--- a/drivers/raw/ifpga/base/ifpga_fme_error.c >+++ b/drivers/raw/ifpga/base/ifpga_fme_error.c >@@ -257,6 +257,45 @@ static void fme_global_error_uinit(struct ifpga_feature *feature) > UNUSED(feature); > } > >+static int fme_err_check_seu(struct feature_fme_err *fme_err) >+{ >+ struct feature_fme_error_capability error_cap; >+ >+ error_cap.csr = readq(&fme_err->fme_err_capability); >+ >+ return error_cap.seu_support ? 1 : 0; >+} >+ >+static int fme_err_get_seu_emr_low(struct ifpga_fme_hw *fme, >+ u64 *val) >+{ >+ struct feature_fme_err *fme_err >+ = get_fme_feature_ioaddr_by_index(fme, >+ FME_FEATURE_ID_GLOBAL_ERR); >+ >+ if (!fme_err_check_seu(fme_err)) >+ return -ENODEV; >+ >+ *val = readq(&fme_err->seu_emr_l); >+ >+ return 0; >+} >+ >+static int fme_err_get_seu_emr_high(struct ifpga_fme_hw *fme, >+ u64 *val) >+{ >+ struct feature_fme_err *fme_err >+ = get_fme_feature_ioaddr_by_index(fme, >+ FME_FEATURE_ID_GLOBAL_ERR); >+ >+ if (!fme_err_check_seu(fme_err)) >+ return -ENODEV; >+ >+ *val = readq(&fme_err->seu_emr_h); >+ >+ return 0; >+} Above 2 functions can be combined to reduce duplication. >+ > static int fme_err_fme_err_get_prop(struct ifpga_feature *feature, > struct feature_prop *prop) > { >@@ -270,6 +309,10 @@ static int fme_err_fme_err_get_prop(struct ifpga_feature *feature, > return fme_err_get_first_error(fme, &prop->data); > case 0x3: /* NEXT_ERROR */ > return fme_err_get_next_error(fme, &prop->data); >+ case 0x5: /* SEU EMR LOW */ >+ return fme_err_get_seu_emr_low(fme, &prop->data); >+ case 0x6: /* SEU EMR HIGH */ >+ return fme_err_get_seu_emr_high(fme, &prop->data); > } > > return -ENOENT; >diff --git a/drivers/raw/ifpga/base/opae_ifpga_hw_api.h b/drivers/raw/ifpga/base/opae_ifpga_hw_api.h >index 4c2c990..bab3386 100644 >--- a/drivers/raw/ifpga/base/opae_ifpga_hw_api.h >+++ b/drivers/raw/ifpga/base/opae_ifpga_hw_api.h >@@ -74,6 +74,8 @@ struct feature_prop { > #define FME_ERR_PROP_FIRST_ERROR ERR_PROP_FME_ERR(0x2) > #define FME_ERR_PROP_NEXT_ERROR ERR_PROP_FME_ERR(0x3) > #define FME_ERR_PROP_CLEAR ERR_PROP_FME_ERR(0x4) /* WO */ >+#define FME_ERR_PROP_SEU_EMR_LOW ERR_PROP_FME_ERR(0x5) >+#define FME_ERR_PROP_SEU_EMR_HIGH ERR_PROP_FME_ERR(0x6) > #define FME_ERR_PROP_REVISION ERR_PROP_ROOT(0x5) > #define FME_ERR_PROP_PCIE0_ERRORS ERR_PROP_ROOT(0x6) /* RW */ > #define FME_ERR_PROP_PCIE1_ERRORS ERR_PROP_ROOT(0x7) /* RW */ >-- >1.8.3.1 >