[dpdk-dev] [PATCH 1/2] crypto/dpaa_sec: support event crypto adapter

[dpdk-dev] [PATCH 1/2] crypto/dpaa_sec: support event crypto adapter

[Akhil Goyal]

dpaa_sec hw queues can be attached to a hw dpaa event
device and the application can configure the event
crypto adapter to access the dpaa_sec packets using
hardware events.
This patch defines APIs which can be used by the
dpaa event device to attach/detach dpaa_sec queues.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
---
 drivers/bus/dpaa/base/qbman/qman.c            |   9 +-
 drivers/bus/dpaa/include/fsl_qman.h           |   2 +-
 drivers/crypto/dpaa_sec/Makefile              |   1 +
 drivers/crypto/dpaa_sec/dpaa_sec.c            | 200 +++++++++++++++++-
 drivers/crypto/dpaa_sec/dpaa_sec_event.h      |  19 ++
 .../dpaa_sec/rte_pmd_dpaa_sec_version.map     |   8 +
 6 files changed, 231 insertions(+), 8 deletions(-)
 create mode 100644 drivers/crypto/dpaa_sec/dpaa_sec_event.h

diff --git a/drivers/bus/dpaa/base/qbman/qman.c b/drivers/bus/dpaa/base/qbman/qman.c
index c6f7d7bb3..e43fc65ef 100644
--- a/drivers/bus/dpaa/base/qbman/qman.c
+++ b/drivers/bus/dpaa/base/qbman/qman.c
@@ -2286,7 +2286,7 @@ int qman_enqueue_multi(struct qman_fq *fq,
 
 int
 qman_enqueue_multi_fq(struct qman_fq *fq[], const struct qm_fd *fd,
-		      int frames_to_send)
+		      u32 *flags, int frames_to_send)
 {
 	struct qman_portal *p = get_affine_portal();
 	struct qm_portal *portal = &p->p;
@@ -2294,7 +2294,7 @@ qman_enqueue_multi_fq(struct qman_fq *fq[], const struct qm_fd *fd,
 	register struct qm_eqcr *eqcr = &portal->eqcr;
 	struct qm_eqcr_entry *eq = eqcr->cursor, *prev_eq;
 
-	u8 i, diff, old_ci, sent = 0;
+	u8 i = 0, diff, old_ci, sent = 0;
 
 	/* Update the available entries if no entry is free */
 	if (!eqcr->available) {
@@ -2313,6 +2313,11 @@ qman_enqueue_multi_fq(struct qman_fq *fq[], const struct qm_fd *fd,
 		eq->fd.addr = cpu_to_be40(fd->addr);
 		eq->fd.status = cpu_to_be32(fd->status);
 		eq->fd.opaque = cpu_to_be32(fd->opaque);
+		if (flags && (flags[i] & QMAN_ENQUEUE_FLAG_DCA)) {
+			eq->dca = QM_EQCR_DCA_ENABLE |
+				((flags[i] >> 8) & QM_EQCR_DCA_IDXMASK);
+		}
+		i++;
 
 		eq = (void *)((unsigned long)(eq + 1) &
 			(~(unsigned long)(QM_EQCR_SIZE << 6)));
diff --git a/drivers/bus/dpaa/include/fsl_qman.h b/drivers/bus/dpaa/include/fsl_qman.h
index e5cccbbea..29fb2eb9d 100644
--- a/drivers/bus/dpaa/include/fsl_qman.h
+++ b/drivers/bus/dpaa/include/fsl_qman.h
@@ -1773,7 +1773,7 @@ int qman_enqueue_multi(struct qman_fq *fq, const struct qm_fd *fd, u32 *flags,
  */
 int
 qman_enqueue_multi_fq(struct qman_fq *fq[], const struct qm_fd *fd,
-		      int frames_to_send);
+		      u32 *flags, int frames_to_send);
 
 typedef int (*qman_cb_precommit) (void *arg);
 
diff --git a/drivers/crypto/dpaa_sec/Makefile b/drivers/crypto/dpaa_sec/Makefile
index 1d8b7bec1..353c2549f 100644
--- a/drivers/crypto/dpaa_sec/Makefile
+++ b/drivers/crypto/dpaa_sec/Makefile
@@ -16,6 +16,7 @@ CFLAGS += $(WERROR_FLAGS)
 
 CFLAGS += -I$(RTE_SDK)/drivers/bus/dpaa
 CFLAGS += -I$(RTE_SDK)/drivers/bus/dpaa/include
+CFLAGS += -I$(RTE_SDK)/drivers/bus/dpaa/base/qbman
 CFLAGS += -I$(RTE_SDK)/drivers/crypto/dpaa_sec/
 #sharing the hw flib headers from dpaa2_sec pmd
 CFLAGS += -I$(RTE_SDK)/drivers/crypto/dpaa2_sec/
diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c b/drivers/crypto/dpaa_sec/dpaa_sec.c
index e6f57ce3d..e96307a8a 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.c
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
@@ -37,6 +37,7 @@
 
 #include <rte_dpaa_bus.h>
 #include <dpaa_sec.h>
+#include <dpaa_sec_event.h>
 #include <dpaa_sec_log.h>
 
 enum rta_sec_era rta_sec_era;
@@ -60,9 +61,6 @@ dpaa_sec_op_ending(struct dpaa_sec_op_ctx *ctx)
 		DPAA_SEC_DP_WARN("SEC return err: 0x%x", ctx->fd_status);
 		ctx->op->status = RTE_CRYPTO_OP_STATUS_ERROR;
 	}
-
-	/* report op status to sym->op and then free the ctx memory  */
-	rte_mempool_put(ctx->ctx_pool, (void *)ctx);
 }
 
 static inline struct dpaa_sec_op_ctx *
@@ -1656,7 +1654,7 @@ dpaa_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
 	struct rte_crypto_op *op;
 	struct dpaa_sec_job *cf;
 	dpaa_sec_session *ses;
-	uint32_t auth_only_len;
+	uint32_t auth_only_len, index, flags[DPAA_SEC_BURST] = {0};
 	struct qman_fq *inq[DPAA_SEC_BURST];
 
 	while (nb_ops) {
@@ -1664,6 +1662,18 @@ dpaa_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
 				DPAA_SEC_BURST : nb_ops;
 		for (loop = 0; loop < frames_to_send; loop++) {
 			op = *(ops++);
+			if (op->sym->m_src->seqn != 0) {
+				index = op->sym->m_src->seqn - 1;
+				if (DPAA_PER_LCORE_DQRR_HELD & (1 << index)) {
+					/* QM_EQCR_DCA_IDXMASK = 0x0f */
+					flags[loop] = ((index & 0x0f) << 8);
+					flags[loop] |= QMAN_ENQUEUE_FLAG_DCA;
+					DPAA_PER_LCORE_DQRR_SIZE--;
+					DPAA_PER_LCORE_DQRR_HELD &=
+								~(1 << index);
+				}
+			}
+
 			switch (op->sess_type) {
 			case RTE_CRYPTO_OP_WITH_SESSION:
 				ses = (dpaa_sec_session *)
@@ -1764,7 +1774,7 @@ dpaa_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
 		loop = 0;
 		while (loop < frames_to_send) {
 			loop += qman_enqueue_multi_fq(&inq[loop], &fds[loop],
-					frames_to_send - loop);
+					&flags[loop], frames_to_send - loop);
 		}
 		nb_ops -= frames_to_send;
 		num_tx += frames_to_send;
@@ -2572,6 +2582,186 @@ dpaa_sec_dev_infos_get(struct rte_cryptodev *dev,
 	}
 }
 
+static enum qman_cb_dqrr_result
+dpaa_sec_process_parallel_event(void *event,
+			struct qman_portal *qm __always_unused,
+			struct qman_fq *outq,
+			const struct qm_dqrr_entry *dqrr,
+			void **bufs)
+{
+	const struct qm_fd *fd;
+	struct dpaa_sec_job *job;
+	struct dpaa_sec_op_ctx *ctx;
+	struct rte_event *ev = (struct rte_event *)event;
+
+	fd = &dqrr->fd;
+
+	/* sg is embedded in an op ctx,
+	 * sg[0] is for output
+	 * sg[1] for input
+	 */
+	job = dpaa_mem_ptov(qm_fd_addr_get64(fd));
+
+	ctx = container_of(job, struct dpaa_sec_op_ctx, job);
+	ctx->fd_status = fd->status;
+	if (ctx->op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
+		struct qm_sg_entry *sg_out;
+		uint32_t len;
+
+		sg_out = &job->sg[0];
+		hw_sg_to_cpu(sg_out);
+		len = sg_out->length;
+		ctx->op->sym->m_src->pkt_len = len;
+		ctx->op->sym->m_src->data_len = len;
+	}
+	if (!ctx->fd_status) {
+		ctx->op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
+	} else {
+		DPAA_SEC_DP_WARN("SEC return err: 0x%x", ctx->fd_status);
+		ctx->op->status = RTE_CRYPTO_OP_STATUS_ERROR;
+	}
+	ev->event_ptr = (void *)ctx->op;
+
+	ev->flow_id = outq->ev.flow_id;
+	ev->sub_event_type = outq->ev.sub_event_type;
+	ev->event_type = RTE_EVENT_TYPE_CRYPTODEV;
+	ev->op = RTE_EVENT_OP_NEW;
+	ev->sched_type = outq->ev.sched_type;
+	ev->queue_id = outq->ev.queue_id;
+	ev->priority = outq->ev.priority;
+	*bufs = (void *)ctx->op;
+
+	rte_mempool_put(ctx->ctx_pool, (void *)ctx);
+
+	return qman_cb_dqrr_consume;
+}
+
+static enum qman_cb_dqrr_result
+dpaa_sec_process_atomic_event(void *event,
+			struct qman_portal *qm __rte_unused,
+			struct qman_fq *outq,
+			const struct qm_dqrr_entry *dqrr,
+			void **bufs)
+{
+	u8 index;
+	const struct qm_fd *fd;
+	struct dpaa_sec_job *job;
+	struct dpaa_sec_op_ctx *ctx;
+	struct rte_event *ev = (struct rte_event *)event;
+
+	fd = &dqrr->fd;
+
+	/* sg is embedded in an op ctx,
+	 * sg[0] is for output
+	 * sg[1] for input
+	 */
+	job = dpaa_mem_ptov(qm_fd_addr_get64(fd));
+
+	ctx = container_of(job, struct dpaa_sec_op_ctx, job);
+	ctx->fd_status = fd->status;
+	if (ctx->op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
+		struct qm_sg_entry *sg_out;
+		uint32_t len;
+
+		sg_out = &job->sg[0];
+		hw_sg_to_cpu(sg_out);
+		len = sg_out->length;
+		ctx->op->sym->m_src->pkt_len = len;
+		ctx->op->sym->m_src->data_len = len;
+	}
+	if (!ctx->fd_status) {
+		ctx->op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
+	} else {
+		DPAA_SEC_DP_WARN("SEC return err: 0x%x", ctx->fd_status);
+		ctx->op->status = RTE_CRYPTO_OP_STATUS_ERROR;
+	}
+	ev->event_ptr = (void *)ctx->op;
+	ev->flow_id = outq->ev.flow_id;
+	ev->sub_event_type = outq->ev.sub_event_type;
+	ev->event_type = RTE_EVENT_TYPE_CRYPTODEV;
+	ev->op = RTE_EVENT_OP_NEW;
+	ev->sched_type = outq->ev.sched_type;
+	ev->queue_id = outq->ev.queue_id;
+	ev->priority = outq->ev.priority;
+
+	/* Save active dqrr entries */
+	index = ((uintptr_t)dqrr >> 6) & (16/*QM_DQRR_SIZE*/ - 1);
+	DPAA_PER_LCORE_DQRR_SIZE++;
+	DPAA_PER_LCORE_DQRR_HELD |= 1 << index;
+	DPAA_PER_LCORE_DQRR_MBUF(index) = ctx->op->sym->m_src;
+	ev->impl_opaque = index + 1;
+	ctx->op->sym->m_src->seqn = (uint32_t)index + 1;
+	*bufs = (void *)ctx->op;
+
+	rte_mempool_put(ctx->ctx_pool, (void *)ctx);
+
+	return qman_cb_dqrr_defer;
+}
+
+int
+dpaa_sec_eventq_attach(const struct rte_cryptodev *dev,
+		int qp_id,
+		uint16_t ch_id,
+		const struct rte_event *event)
+{
+	struct dpaa_sec_qp *qp = dev->data->queue_pairs[qp_id];
+	struct qm_mcc_initfq opts = {0};
+
+	int ret;
+
+	opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL |
+		       QM_INITFQ_WE_CONTEXTA | QM_INITFQ_WE_CONTEXTB;
+	opts.fqd.dest.channel = ch_id;
+
+	switch (event->sched_type) {
+	case RTE_SCHED_TYPE_ATOMIC:
+		opts.fqd.fq_ctrl |= QM_FQCTRL_HOLDACTIVE;
+		/* Reset FQCTRL_AVOIDBLOCK bit as it is unnecessary
+		 * configuration with HOLD_ACTIVE setting
+		 */
+		opts.fqd.fq_ctrl &= (~QM_FQCTRL_AVOIDBLOCK);
+		qp->outq.cb.dqrr_dpdk_cb = dpaa_sec_process_atomic_event;
+		break;
+	case RTE_SCHED_TYPE_ORDERED:
+		DPAA_SEC_ERR("Ordered queue schedule type is not supported\n");
+		return -1;
+	default:
+		opts.fqd.fq_ctrl |= QM_FQCTRL_AVOIDBLOCK;
+		qp->outq.cb.dqrr_dpdk_cb = dpaa_sec_process_parallel_event;
+		break;
+	}
+
+	ret = qman_init_fq(&qp->outq, QMAN_INITFQ_FLAG_SCHED, &opts);
+	if (unlikely(ret)) {
+		DPAA_SEC_ERR("unable to init caam source fq!");
+		return ret;
+	}
+
+	memcpy(&qp->outq.ev, event, sizeof(struct rte_event));
+
+	return 0;
+}
+
+int
+dpaa_sec_eventq_detach(const struct rte_cryptodev *dev,
+			int qp_id)
+{
+	struct qm_mcc_initfq opts = {0};
+	int ret;
+	struct dpaa_sec_qp *qp = dev->data->queue_pairs[qp_id];
+
+	opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL |
+		       QM_INITFQ_WE_CONTEXTA | QM_INITFQ_WE_CONTEXTB;
+	qp->outq.cb.dqrr = dqrr_out_fq_cb_rx;
+	qp->outq.cb.ern  = ern_sec_fq_handler;
+	ret = qman_init_fq(&qp->outq, 0, &opts);
+	if (ret)
+		RTE_LOG(ERR, PMD, "Error in qman_init_fq: ret: %d\n", ret);
+	qp->outq.cb.dqrr = NULL;
+
+	return ret;
+}
+
 static struct rte_cryptodev_ops crypto_ops = {
 	.dev_configure	      = dpaa_sec_dev_configure,
 	.dev_start	      = dpaa_sec_dev_start,
diff --git a/drivers/crypto/dpaa_sec/dpaa_sec_event.h b/drivers/crypto/dpaa_sec/dpaa_sec_event.h
new file mode 100644
index 000000000..8d1a01809
--- /dev/null
+++ b/drivers/crypto/dpaa_sec/dpaa_sec_event.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2019 NXP
+ *
+ */
+
+#ifndef _DPAA_SEC_EVENT_H_
+#define _DPAA_SEC_EVENT_H_
+
+int
+dpaa_sec_eventq_attach(const struct rte_cryptodev *dev,
+		int qp_id,
+		uint16_t ch_id,
+		const struct rte_event *event);
+
+int
+dpaa_sec_eventq_detach(const struct rte_cryptodev *dev,
+		int qp_id);
+
+#endif /* _DPAA_SEC_EVENT_H_ */
diff --git a/drivers/crypto/dpaa_sec/rte_pmd_dpaa_sec_version.map b/drivers/crypto/dpaa_sec/rte_pmd_dpaa_sec_version.map
index a70bd197b..cc7f2162e 100644
--- a/drivers/crypto/dpaa_sec/rte_pmd_dpaa_sec_version.map
+++ b/drivers/crypto/dpaa_sec/rte_pmd_dpaa_sec_version.map
@@ -2,3 +2,11 @@ DPDK_17.11 {
 
 	local: *;
 };
+
+DPDK_19.11 {
+	global:
+
+	dpaa_sec_eventq_attach;
+	dpaa_sec_eventq_detach;
+
+} DPDK_17.11;
-- 
2.17.1

[dpdk-dev] [PATCH 2/2] event/dpaa: support event crypto adapter

[Akhil Goyal]

event dpaa device support both ethernet as well as
crypto queues to be attached to it. eth_rx_adapter
provide infrastructure to attach ethernet queues and
crypto_adapter provide support for crypto queues.

This patch add support for dpaa_eventdev to attach
dpaa_sec queues.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
---
 drivers/event/dpaa/Makefile        |   3 +
 drivers/event/dpaa/dpaa_eventdev.c | 154 ++++++++++++++++++++++++++++-
 drivers/event/dpaa/dpaa_eventdev.h |   5 +
 3 files changed, 161 insertions(+), 1 deletion(-)

diff --git a/drivers/event/dpaa/Makefile b/drivers/event/dpaa/Makefile
index cf9626495..1856fa468 100644
--- a/drivers/event/dpaa/Makefile
+++ b/drivers/event/dpaa/Makefile
@@ -21,6 +21,9 @@ CFLAGS += -I$(RTE_SDK)/drivers/bus/dpaa/include/
 CFLAGS += -I$(RTE_SDK)/drivers/mempool/dpaa
 CFLAGS += -I$(RTE_SDK)/lib/librte_eal/common/include
 
+LDLIBS += -lrte_pmd_dpaa_sec
+CFLAGS += -I$(RTE_SDK)/drivers/crypto/dpaa_sec
+
 EXPORT_MAP := rte_pmd_dpaa_event_version.map
 
 LIBABIVER := 1
diff --git a/drivers/event/dpaa/dpaa_eventdev.c b/drivers/event/dpaa/dpaa_eventdev.c
index 1e247e4f4..d02b8694e 100644
--- a/drivers/event/dpaa/dpaa_eventdev.c
+++ b/drivers/event/dpaa/dpaa_eventdev.c
@@ -27,12 +27,14 @@
 #include <rte_eventdev_pmd_vdev.h>
 #include <rte_ethdev.h>
 #include <rte_event_eth_rx_adapter.h>
+#include <rte_cryptodev.h>
 #include <rte_dpaa_bus.h>
 #include <rte_dpaa_logs.h>
 #include <rte_cycles.h>
 #include <rte_kvargs.h>
 
 #include <dpaa_ethdev.h>
+#include <dpaa_sec_event.h>
 #include "dpaa_eventdev.h"
 #include <dpaa_mempool.h>
 
@@ -322,7 +324,7 @@ dpaa_event_dev_info_get(struct rte_eventdev *dev,
 	EVENTDEV_INIT_FUNC_TRACE();
 
 	RTE_SET_USED(dev);
-	dev_info->driver_name = "event_dpaa";
+	dev_info->driver_name = "event_dpaa1";
 	dev_info->min_dequeue_timeout_ns =
 		DPAA_EVENT_MIN_DEQUEUE_TIMEOUT;
 	dev_info->max_dequeue_timeout_ns =
@@ -718,6 +720,149 @@ dpaa_event_eth_rx_adapter_stop(const struct rte_eventdev *dev,
 	return 0;
 }
 
+static int
+dpaa_eventdev_crypto_caps_get(const struct rte_eventdev *dev,
+			    const struct rte_cryptodev *cdev,
+			    uint32_t *caps)
+{
+	const char *name = cdev->data->name;
+
+	EVENTDEV_INIT_FUNC_TRACE();
+
+	RTE_SET_USED(dev);
+
+	if (!strncmp(name, "dpaa_sec-", 9))
+		*caps = RTE_EVENT_CRYPTO_ADAPTER_DPAA_CAP;
+	else
+		return -1;
+
+	return 0;
+}
+
+static int
+dpaa_eventdev_crypto_queue_add_all(const struct rte_eventdev *dev,
+		const struct rte_cryptodev *cryptodev,
+		const struct rte_event *ev)
+{
+	struct dpaa_eventdev *priv = dev->data->dev_private;
+	uint8_t ev_qid = ev->queue_id;
+	u16 ch_id = priv->evq_info[ev_qid].ch_id;
+	int i, ret;
+
+	EVENTDEV_INIT_FUNC_TRACE();
+
+	for (i = 0; i < cryptodev->data->nb_queue_pairs; i++) {
+		ret = dpaa_sec_eventq_attach(cryptodev, i,
+				ch_id, ev);
+		if (ret) {
+			DPAA_EVENTDEV_ERR("dpaa_sec_eventq_attach failed: ret %d\n",
+				    ret);
+			goto fail;
+		}
+	}
+	return 0;
+fail:
+	for (i = (i - 1); i >= 0 ; i--)
+		dpaa_sec_eventq_detach(cryptodev, i);
+
+	return ret;
+}
+
+static int
+dpaa_eventdev_crypto_queue_add(const struct rte_eventdev *dev,
+		const struct rte_cryptodev *cryptodev,
+		int32_t rx_queue_id,
+		const struct rte_event *ev)
+{
+	struct dpaa_eventdev *priv = dev->data->dev_private;
+	uint8_t ev_qid = ev->queue_id;
+	u16 ch_id = priv->evq_info[ev_qid].ch_id;
+	int ret;
+
+	EVENTDEV_INIT_FUNC_TRACE();
+
+	if (rx_queue_id == -1)
+		return dpaa_eventdev_crypto_queue_add_all(dev,
+				cryptodev, ev);
+
+	ret = dpaa_sec_eventq_attach(cryptodev, rx_queue_id,
+			ch_id, ev);
+	if (ret) {
+		DPAA_EVENTDEV_ERR(
+			"dpaa_sec_eventq_attach failed: ret: %d\n", ret);
+		return ret;
+	}
+	return 0;
+}
+
+static int
+dpaa_eventdev_crypto_queue_del_all(const struct rte_eventdev *dev,
+			     const struct rte_cryptodev *cdev)
+{
+	int i, ret;
+
+	EVENTDEV_INIT_FUNC_TRACE();
+
+	RTE_SET_USED(dev);
+
+	for (i = 0; i < cdev->data->nb_queue_pairs; i++) {
+		ret = dpaa_sec_eventq_detach(cdev, i);
+		if (ret) {
+			DPAA_EVENTDEV_ERR(
+				"dpaa_sec_eventq_detach failed:ret %d\n", ret);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+static int
+dpaa_eventdev_crypto_queue_del(const struct rte_eventdev *dev,
+			     const struct rte_cryptodev *cryptodev,
+			     int32_t rx_queue_id)
+{
+	int ret;
+
+	EVENTDEV_INIT_FUNC_TRACE();
+
+	if (rx_queue_id == -1)
+		return dpaa_eventdev_crypto_queue_del_all(dev, cryptodev);
+
+	ret = dpaa_sec_eventq_detach(cryptodev, rx_queue_id);
+	if (ret) {
+		DPAA_EVENTDEV_ERR(
+			"dpaa_sec_eventq_detach failed: ret: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int
+dpaa_eventdev_crypto_start(const struct rte_eventdev *dev,
+			   const struct rte_cryptodev *cryptodev)
+{
+	EVENTDEV_INIT_FUNC_TRACE();
+
+	RTE_SET_USED(dev);
+	RTE_SET_USED(cryptodev);
+
+	return 0;
+}
+
+static int
+dpaa_eventdev_crypto_stop(const struct rte_eventdev *dev,
+			  const struct rte_cryptodev *cryptodev)
+{
+	EVENTDEV_INIT_FUNC_TRACE();
+
+	RTE_SET_USED(dev);
+	RTE_SET_USED(cryptodev);
+
+	return 0;
+}
+
 static struct rte_eventdev_ops dpaa_eventdev_ops = {
 	.dev_infos_get    = dpaa_event_dev_info_get,
 	.dev_configure    = dpaa_event_dev_configure,
@@ -738,6 +883,11 @@ static struct rte_eventdev_ops dpaa_eventdev_ops = {
 	.eth_rx_adapter_queue_del = dpaa_event_eth_rx_adapter_queue_del,
 	.eth_rx_adapter_start = dpaa_event_eth_rx_adapter_start,
 	.eth_rx_adapter_stop = dpaa_event_eth_rx_adapter_stop,
+	.crypto_adapter_caps_get	= dpaa_eventdev_crypto_caps_get,
+	.crypto_adapter_queue_pair_add	= dpaa_eventdev_crypto_queue_add,
+	.crypto_adapter_queue_pair_del	= dpaa_eventdev_crypto_queue_del,
+	.crypto_adapter_start		= dpaa_eventdev_crypto_start,
+	.crypto_adapter_stop		= dpaa_eventdev_crypto_stop,
 };
 
 static int flag_check_handler(__rte_unused const char *key,
@@ -806,6 +956,8 @@ dpaa_event_dev_create(const char *name, const char *params)
 		eventdev->dequeue_burst = dpaa_event_dequeue_burst_intr;
 	}
 
+	RTE_LOG(INFO, PMD, "%s eventdev added", name);
+
 	/* For secondary processes, the primary has done all the work */
 	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 		return 0;
diff --git a/drivers/event/dpaa/dpaa_eventdev.h b/drivers/event/dpaa/dpaa_eventdev.h
index 8134e6ba9..b8f247c61 100644
--- a/drivers/event/dpaa/dpaa_eventdev.h
+++ b/drivers/event/dpaa/dpaa_eventdev.h
@@ -40,6 +40,11 @@ do {						\
 		RTE_EVENT_ETH_RX_ADAPTER_CAP_MULTI_EVENTQ | \
 		RTE_EVENT_ETH_RX_ADAPTER_CAP_OVERRIDE_FLOW_ID)
 
+#define RTE_EVENT_CRYPTO_ADAPTER_DPAA_CAP \
+		(RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_NEW | \
+		RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_QP_EV_BIND | \
+		RTE_EVENT_CRYPTO_ADAPTER_CAP_SESSION_PRIVATE_DATA)
+
 struct dpaa_eventq {
 	/* Channel Id */
 	uint16_t ch_id;
-- 
2.17.1

Re: [dpdk-dev] [PATCH 2/2] event/dpaa: support event crypto adapter

[Jerin Jacob]

On Fri, Sep 6, 2019 at 6:57 PM Akhil Goyal <akhil.goyal@nxp.com> wrote:
>
> event dpaa device support both ethernet as well as
> crypto queues to be attached to it. eth_rx_adapter
> provide infrastructure to attach ethernet queues and
> crypto_adapter provide support for crypto queues.
>
> This patch add support for dpaa_eventdev to attach
> dpaa_sec queues.
>
> Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
> ---
>  drivers/event/dpaa/Makefile        |   3 +
>  drivers/event/dpaa/dpaa_eventdev.c | 154 ++++++++++++++++++++++++++++-
>  drivers/event/dpaa/dpaa_eventdev.h |   5 +
>  3 files changed, 161 insertions(+), 1 deletion(-)

In general looks good to me.

Hi Abhinandan,

As a crypto event adapter maintainer, any comments on this patch?

Re: [dpdk-dev] [PATCH 1/2] crypto/dpaa_sec: support event crypto adapter

[Jerin Jacob]

On Fri, Sep 6, 2019 at 6:57 PM Akhil Goyal <akhil.goyal@nxp.com> wrote:
>
> dpaa_sec hw queues can be attached to a hw dpaa event
> device and the application can configure the event
> crypto adapter to access the dpaa_sec packets using
> hardware events.
> This patch defines APIs which can be used by the
> dpaa event device to attach/detach dpaa_sec queues.
>
> Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>

meson cross-build is failing with this patch. Please fix it in v2 and
If it makes sense then add this new feature in release notes.

Commands to reproduce:

meson build --cross=config/arm/arm64_armv8_linux_gcc
ninja -C build

FAILED: drivers/a715181@@tmp_rte_pmd_dpaa_event@sta/event_dpaa_dpaa_eventdev.c.o
aarch64-linux-gnu-gcc -Idrivers/a715181@@tmp_rte_pmd_dpaa_event@sta
-Idrivers -I../drivers -Idrivers/event/dpaa -I../drivers/event/dpaa
-Ilib/librte_eventdev -I../lib/librte_eventdev -I. -I../ -Iconfig
-I../config -Ilib/librte_eal/common/in
clude -I../lib/librte_eal/common/include
-I../lib/librte_eal/linux/eal/include -Ilib/librte_eal/common
-I../lib/librte_eal/common -Ilib/librte_eal/common/include/arch/arm
-I../lib/librte_eal/common/include/arch/arm -Ilib/librte_eal -I../lib
/librte_eal -Ilib/librte_kvargs -I../lib/librte_kvargs
-Ilib/librte_ring -I../lib/librte_ring -Ilib/librte_ethdev
-I../lib/librte_ethdev -Ilib/librte_net -I../lib/librte_net
-Ilib/librte_mbuf -I../lib/librte_mbuf -Ilib/librte_mempool -I../l
ib/librte_mempool -Ilib/librte_meter -I../lib/librte_meter
-Ilib/librte_hash -I../lib/librte_hash -Ilib/librte_timer
-I../lib/librte_timer -Ilib/librte_cryptodev -I../lib/librte_cryptodev
-Idrivers/net/dpaa -I../drivers/net/dpaa -Idrivers/b
us/pci -I../drivers/bus/pci -I../drivers/bus/pci/linux
-Ilib/librte_pci -I../lib/librte_pci -Idrivers/bus/vdev
-I../drivers/bus/vdev -Idrivers/mempool/dpaa -I../drivers/mempool/dpaa
-Idrivers/bus/dpaa -I../drivers/bus/dpaa -I../drivers/bus/
dpaa/include -I../drivers/bus/dpaa/base/qbman -Idrivers/common/dpaax
-I../drivers/common/dpaax -fdiagnostics-color=always -pipe
-D_FILE_OFFSET_BITS=64 -Wall -Winvalid-pch -O3 -include rte_config.h
-Wunused-parameter -Wsign-compare -Wcast-qu
al -Wno-address-of-packed-member -D_GNU_SOURCE -fPIC
-march=armv8-a+crc -Wno-format-truncation -DALLOW_EXPERIMENTAL_API -MD
-MQ 'drivers/a715181@@tmp_rte_pmd_dpaa_event@sta/event_dpaa_dpaa_eventdev.c.o'
-MF 'drivers/a715181@@tmp_rte_pmd_dpa
a_event@sta/event_dpaa_dpaa_eventdev.c.o.d' -o
'drivers/a715181@@tmp_rte_pmd_dpaa_event@sta/event_dpaa_dpaa_eventdev.c.o'
-c ../drivers/event/dpaa/dpaa_eventdev.c
../drivers/event/dpaa/dpaa_eventdev.c:37:10: fatal error:
dpaa_sec_event.h: No such file or directory
   37 | #include <dpaa_sec_event.h>
      |          ^~~~~~~~~~~~~~~~~~

Re: [dpdk-dev] [PATCH 1/2] crypto/dpaa_sec: support event crypto adapter

[Akhil Goyal]

Hi Jerin,

> 
> On Fri, Sep 6, 2019 at 6:57 PM Akhil Goyal <akhil.goyal@nxp.com> wrote:
> >
> > dpaa_sec hw queues can be attached to a hw dpaa event
> > device and the application can configure the event
> > crypto adapter to access the dpaa_sec packets using
> > hardware events.
> > This patch defines APIs which can be used by the
> > dpaa event device to attach/detach dpaa_sec queues.
> >
> > Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
> 
> meson cross-build is failing with this patch. Please fix it in v2 and
> If it makes sense then add this new feature in release notes.

V2 sent with the required changes.
It will be added when we have complete support including application.

> 
> Commands to reproduce:
> 
> meson build --cross=config/arm/arm64_armv8_linux_gcc
> ninja -C build
> 
> FAILED:
> drivers/a715181@@tmp_rte_pmd_dpaa_event@sta/event_dpaa_dpaa_eventd
> ev.c.o
> aarch64-linux-gnu-gcc -Idrivers/a715181@@tmp_rte_pmd_dpaa_event@sta
> -Idrivers -I../drivers -Idrivers/event/dpaa -I../drivers/event/dpaa
> -Ilib/librte_eventdev -I../lib/librte_eventdev -I. -I../ -Iconfig
> -I../config -Ilib/librte_eal/common/in
> clude -I../lib/librte_eal/common/include
> -I../lib/librte_eal/linux/eal/include -Ilib/librte_eal/common
> -I../lib/librte_eal/common -Ilib/librte_eal/common/include/arch/arm
> -I../lib/librte_eal/common/include/arch/arm -Ilib/librte_eal -I../lib
> /librte_eal -Ilib/librte_kvargs -I../lib/librte_kvargs
> -Ilib/librte_ring -I../lib/librte_ring -Ilib/librte_ethdev
> -I../lib/librte_ethdev -Ilib/librte_net -I../lib/librte_net
> -Ilib/librte_mbuf -I../lib/librte_mbuf -Ilib/librte_mempool -I../l
> ib/librte_mempool -Ilib/librte_meter -I../lib/librte_meter
> -Ilib/librte_hash -I../lib/librte_hash -Ilib/librte_timer
> -I../lib/librte_timer -Ilib/librte_cryptodev -I../lib/librte_cryptodev
> -Idrivers/net/dpaa -I../drivers/net/dpaa -Idrivers/b
> us/pci -I../drivers/bus/pci -I../drivers/bus/pci/linux
> -Ilib/librte_pci -I../lib/librte_pci -Idrivers/bus/vdev
> -I../drivers/bus/vdev -Idrivers/mempool/dpaa -I../drivers/mempool/dpaa
> -Idrivers/bus/dpaa -I../drivers/bus/dpaa -I../drivers/bus/
> dpaa/include -I../drivers/bus/dpaa/base/qbman -Idrivers/common/dpaax
> -I../drivers/common/dpaax -fdiagnostics-color=always -pipe
> -D_FILE_OFFSET_BITS=64 -Wall -Winvalid-pch -O3 -include rte_config.h
> -Wunused-parameter -Wsign-compare -Wcast-qu
> al -Wno-address-of-packed-member -D_GNU_SOURCE -fPIC
> -march=armv8-a+crc -Wno-format-truncation -DALLOW_EXPERIMENTAL_API -
> MD
> -MQ
> 'drivers/a715181@@tmp_rte_pmd_dpaa_event@sta/event_dpaa_dpaa_eventd
> ev.c.o'
> -MF 'drivers/a715181@@tmp_rte_pmd_dpa
> a_event@sta/event_dpaa_dpaa_eventdev.c.o.d' -o
> 'drivers/a715181@@tmp_rte_pmd_dpaa_event@sta/event_dpaa_dpaa_eventd
> ev.c.o'
> -c ../drivers/event/dpaa/dpaa_eventdev.c
> ../drivers/event/dpaa/dpaa_eventdev.c:37:10: fatal error:
> dpaa_sec_event.h: No such file or directory
>    37 | #include <dpaa_sec_event.h>
>       |          ^~~~~~~~~~~~~~~~~~

Re: [dpdk-dev] [PATCH 1/2] crypto/dpaa_sec: support event crypto adapter

[Jerin Jacob]

On Tue, Oct 1, 2019 at 1:43 AM Akhil Goyal <akhil.goyal@nxp.com> wrote:
>
> Hi Jerin,

Hi Akhil,

>
> >
> > On Fri, Sep 6, 2019 at 6:57 PM Akhil Goyal <akhil.goyal@nxp.com> wrote:
> > >
> > > dpaa_sec hw queues can be attached to a hw dpaa event
> > > device and the application can configure the event
> > > crypto adapter to access the dpaa_sec packets using
> > > hardware events.
> > > This patch defines APIs which can be used by the
> > > dpaa event device to attach/detach dpaa_sec queues.
> > >
> > > Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
> >
> > meson cross-build is failing with this patch. Please fix it in v2 and
> > If it makes sense then add this new feature in release notes.
>
> V2 sent with the required changes.

Looks like there are still errors, please check

http://mails.dpdk.org/archives/test-report/2019-September/100328.html

> It will be added when we have complete support including application.
>
> >
> > Commands to reproduce:
> >
> > meson build --cross=config/arm/arm64_armv8_linux_gcc
> > ninja -C build
> >
> > FAILED:
> > drivers/a715181@@tmp_rte_pmd_dpaa_event@sta/event_dpaa_dpaa_eventd
> > ev.c.o
> > aarch64-linux-gnu-gcc -Idrivers/a715181@@tmp_rte_pmd_dpaa_event@sta
> > -Idrivers -I../drivers -Idrivers/event/dpaa -I../drivers/event/dpaa
> > -Ilib/librte_eventdev -I../lib/librte_eventdev -I. -I../ -Iconfig
> > -I../config -Ilib/librte_eal/common/in
> > clude -I../lib/librte_eal/common/include
> > -I../lib/librte_eal/linux/eal/include -Ilib/librte_eal/common
> > -I../lib/librte_eal/common -Ilib/librte_eal/common/include/arch/arm
> > -I../lib/librte_eal/common/include/arch/arm -Ilib/librte_eal -I../lib
> > /librte_eal -Ilib/librte_kvargs -I../lib/librte_kvargs
> > -Ilib/librte_ring -I../lib/librte_ring -Ilib/librte_ethdev
> > -I../lib/librte_ethdev -Ilib/librte_net -I../lib/librte_net
> > -Ilib/librte_mbuf -I../lib/librte_mbuf -Ilib/librte_mempool -I../l
> > ib/librte_mempool -Ilib/librte_meter -I../lib/librte_meter
> > -Ilib/librte_hash -I../lib/librte_hash -Ilib/librte_timer
> > -I../lib/librte_timer -Ilib/librte_cryptodev -I../lib/librte_cryptodev
> > -Idrivers/net/dpaa -I../drivers/net/dpaa -Idrivers/b
> > us/pci -I../drivers/bus/pci -I../drivers/bus/pci/linux
> > -Ilib/librte_pci -I../lib/librte_pci -Idrivers/bus/vdev
> > -I../drivers/bus/vdev -Idrivers/mempool/dpaa -I../drivers/mempool/dpaa
> > -Idrivers/bus/dpaa -I../drivers/bus/dpaa -I../drivers/bus/
> > dpaa/include -I../drivers/bus/dpaa/base/qbman -Idrivers/common/dpaax
> > -I../drivers/common/dpaax -fdiagnostics-color=always -pipe
> > -D_FILE_OFFSET_BITS=64 -Wall -Winvalid-pch -O3 -include rte_config.h
> > -Wunused-parameter -Wsign-compare -Wcast-qu
> > al -Wno-address-of-packed-member -D_GNU_SOURCE -fPIC
> > -march=armv8-a+crc -Wno-format-truncation -DALLOW_EXPERIMENTAL_API -
> > MD
> > -MQ
> > 'drivers/a715181@@tmp_rte_pmd_dpaa_event@sta/event_dpaa_dpaa_eventd
> > ev.c.o'
> > -MF 'drivers/a715181@@tmp_rte_pmd_dpa
> > a_event@sta/event_dpaa_dpaa_eventdev.c.o.d' -o
> > 'drivers/a715181@@tmp_rte_pmd_dpaa_event@sta/event_dpaa_dpaa_eventd
> > ev.c.o'
> > -c ../drivers/event/dpaa/dpaa_eventdev.c
> > ../drivers/event/dpaa/dpaa_eventdev.c:37:10: fatal error:
> > dpaa_sec_event.h: No such file or directory
> >    37 | #include <dpaa_sec_event.h>
> >       |          ^~~~~~~~~~~~~~~~~~

Re: [dpdk-dev] [PATCH 1/2] crypto/dpaa_sec: support event crypto adapter

[Akhil Goyal]

> > >
> > > meson cross-build is failing with this patch. Please fix it in v2 and
> > > If it makes sense then add this new feature in release notes.
> >
> > V2 sent with the required changes.
> 
> Looks like there are still errors, please check
> 
> http://mails.dpdk.org/archives/test-report/2019-September/100328.html

I am not able to get why these errors are reported. It works fine on my machine.

Not sure why it is showing error on both the patches.
The 1st patch has that file and the 2nd patch uses that.

Is it possible that the CI has rearranged the patchset?
Can you try it manually on your system?

Regards,
Akhil

> 
> > It will be added when we have complete support including application.
> >
> > >
> > > Commands to reproduce:
> > >
> > > meson build --cross=config/arm/arm64_armv8_linux_gcc
> > > ninja -C build
> > >
> > > FAILED:
> > >
> drivers/a715181@@tmp_rte_pmd_dpaa_event@sta/event_dpaa_dpaa_eventd
> > > ev.c.o
> > > aarch64-linux-gnu-gcc -Idrivers/a715181@@tmp_rte_pmd_dpaa_event@sta
> > > -Idrivers -I../drivers -Idrivers/event/dpaa -I../drivers/event/dpaa
> > > -Ilib/librte_eventdev -I../lib/librte_eventdev -I. -I../ -Iconfig
> > > -I../config -Ilib/librte_eal/common/in
> > > clude -I../lib/librte_eal/common/include
> > > -I../lib/librte_eal/linux/eal/include -Ilib/librte_eal/common
> > > -I../lib/librte_eal/common -Ilib/librte_eal/common/include/arch/arm
> > > -I../lib/librte_eal/common/include/arch/arm -Ilib/librte_eal -I../lib
> > > /librte_eal -Ilib/librte_kvargs -I../lib/librte_kvargs
> > > -Ilib/librte_ring -I../lib/librte_ring -Ilib/librte_ethdev
> > > -I../lib/librte_ethdev -Ilib/librte_net -I../lib/librte_net
> > > -Ilib/librte_mbuf -I../lib/librte_mbuf -Ilib/librte_mempool -I../l
> > > ib/librte_mempool -Ilib/librte_meter -I../lib/librte_meter
> > > -Ilib/librte_hash -I../lib/librte_hash -Ilib/librte_timer
> > > -I../lib/librte_timer -Ilib/librte_cryptodev -I../lib/librte_cryptodev
> > > -Idrivers/net/dpaa -I../drivers/net/dpaa -Idrivers/b
> > > us/pci -I../drivers/bus/pci -I../drivers/bus/pci/linux
> > > -Ilib/librte_pci -I../lib/librte_pci -Idrivers/bus/vdev
> > > -I../drivers/bus/vdev -Idrivers/mempool/dpaa -I../drivers/mempool/dpaa
> > > -Idrivers/bus/dpaa -I../drivers/bus/dpaa -I../drivers/bus/
> > > dpaa/include -I../drivers/bus/dpaa/base/qbman -Idrivers/common/dpaax
> > > -I../drivers/common/dpaax -fdiagnostics-color=always -pipe
> > > -D_FILE_OFFSET_BITS=64 -Wall -Winvalid-pch -O3 -include rte_config.h
> > > -Wunused-parameter -Wsign-compare -Wcast-qu
> > > al -Wno-address-of-packed-member -D_GNU_SOURCE -fPIC
> > > -march=armv8-a+crc -Wno-format-truncation -
> DALLOW_EXPERIMENTAL_API -
> > > MD
> > > -MQ
> > >
> 'drivers/a715181@@tmp_rte_pmd_dpaa_event@sta/event_dpaa_dpaa_eventd
> > > ev.c.o'
> > > -MF 'drivers/a715181@@tmp_rte_pmd_dpa
> > > a_event@sta/event_dpaa_dpaa_eventdev.c.o.d' -o
> > >
> 'drivers/a715181@@tmp_rte_pmd_dpaa_event@sta/event_dpaa_dpaa_eventd
> > > ev.c.o'
> > > -c ../drivers/event/dpaa/dpaa_eventdev.c
> > > ../drivers/event/dpaa/dpaa_eventdev.c:37:10: fatal error:
> > > dpaa_sec_event.h: No such file or directory
> > >    37 | #include <dpaa_sec_event.h>
> > >       |          ^~~~~~~~~~~~~~~~~~

Re: [dpdk-dev] [PATCH 1/2] crypto/dpaa_sec: support event crypto adapter

[Jerin Jacob]

On Tue, Oct 1, 2019 at 12:01 PM Akhil Goyal <akhil.goyal@nxp.com> wrote:
>
>
> > > >
> > > > meson cross-build is failing with this patch. Please fix it in v2 and
> > > > If it makes sense then add this new feature in release notes.
> > >
> > > V2 sent with the required changes.
> >
> > Looks like there are still errors, please check
> >
> > http://mails.dpdk.org/archives/test-report/2019-September/100328.html
>
> I am not able to get why these errors are reported. It works fine on my machine.
>
> Not sure why it is showing error on both the patches.
> The 1st patch has that file and the 2nd patch uses that.
>
> Is it possible that the CI has rearranged the patchset?
> Can you try it manually on your system?


It looks like, We need to sync up crypto and eventdev tree for the
proper merging of this patch[1].
Please take this crypto adapter patch through your next crypto tree.
I will update the "Delegate to" field in the patchwork to your name.

[1]
[master][dpdk-next-eventdev] $ git am -3
/tmp/r/v2-1-2-crypto-dpaa_sec-support-event-crypto-adapter
Applying: crypto/dpaa_sec: support event crypto adapter
error: sha1 information is lacking or useless
(drivers/crypto/dpaa_sec/dpaa_sec.c).
error: could not build fake ancestor
Patch failed at 0001 crypto/dpaa_sec: support event crypto adapter
hint: Use 'git am --show-current-patch' to see the failed patch
When you have resolved this problem, run "git am --continue".
If you prefer to skip this patch, run "git am --skip" instead.
To restore the original branch and stop patching, run "git am --abort".
[master]dell[dpdk-next-eventdev] $



>
> Regards,
> Akhil
>
> >
> > > It will be added when we have complete support including application.
> > >
> > > >
> > > > Commands to reproduce:
> > > >
> > > > meson build --cross=config/arm/arm64_armv8_linux_gcc
> > > > ninja -C build
> > > >
> > > > FAILED:
> > > >
> > drivers/a715181@@tmp_rte_pmd_dpaa_event@sta/event_dpaa_dpaa_eventd
> > > > ev.c.o
> > > > aarch64-linux-gnu-gcc -Idrivers/a715181@@tmp_rte_pmd_dpaa_event@sta
> > > > -Idrivers -I../drivers -Idrivers/event/dpaa -I../drivers/event/dpaa
> > > > -Ilib/librte_eventdev -I../lib/librte_eventdev -I. -I../ -Iconfig
> > > > -I../config -Ilib/librte_eal/common/in
> > > > clude -I../lib/librte_eal/common/include
> > > > -I../lib/librte_eal/linux/eal/include -Ilib/librte_eal/common
> > > > -I../lib/librte_eal/common -Ilib/librte_eal/common/include/arch/arm
> > > > -I../lib/librte_eal/common/include/arch/arm -Ilib/librte_eal -I../lib
> > > > /librte_eal -Ilib/librte_kvargs -I../lib/librte_kvargs
> > > > -Ilib/librte_ring -I../lib/librte_ring -Ilib/librte_ethdev
> > > > -I../lib/librte_ethdev -Ilib/librte_net -I../lib/librte_net
> > > > -Ilib/librte_mbuf -I../lib/librte_mbuf -Ilib/librte_mempool -I../l
> > > > ib/librte_mempool -Ilib/librte_meter -I../lib/librte_meter
> > > > -Ilib/librte_hash -I../lib/librte_hash -Ilib/librte_timer
> > > > -I../lib/librte_timer -Ilib/librte_cryptodev -I../lib/librte_cryptodev
> > > > -Idrivers/net/dpaa -I../drivers/net/dpaa -Idrivers/b
> > > > us/pci -I../drivers/bus/pci -I../drivers/bus/pci/linux
> > > > -Ilib/librte_pci -I../lib/librte_pci -Idrivers/bus/vdev
> > > > -I../drivers/bus/vdev -Idrivers/mempool/dpaa -I../drivers/mempool/dpaa
> > > > -Idrivers/bus/dpaa -I../drivers/bus/dpaa -I../drivers/bus/
> > > > dpaa/include -I../drivers/bus/dpaa/base/qbman -Idrivers/common/dpaax
> > > > -I../drivers/common/dpaax -fdiagnostics-color=always -pipe
> > > > -D_FILE_OFFSET_BITS=64 -Wall -Winvalid-pch -O3 -include rte_config.h
> > > > -Wunused-parameter -Wsign-compare -Wcast-qu
> > > > al -Wno-address-of-packed-member -D_GNU_SOURCE -fPIC
> > > > -march=armv8-a+crc -Wno-format-truncation -
> > DALLOW_EXPERIMENTAL_API -
> > > > MD
> > > > -MQ
> > > >
> > 'drivers/a715181@@tmp_rte_pmd_dpaa_event@sta/event_dpaa_dpaa_eventd
> > > > ev.c.o'
> > > > -MF 'drivers/a715181@@tmp_rte_pmd_dpa
> > > > a_event@sta/event_dpaa_dpaa_eventdev.c.o.d' -o
> > > >
> > 'drivers/a715181@@tmp_rte_pmd_dpaa_event@sta/event_dpaa_dpaa_eventd
> > > > ev.c.o'
> > > > -c ../drivers/event/dpaa/dpaa_eventdev.c
> > > > ../drivers/event/dpaa/dpaa_eventdev.c:37:10: fatal error:
> > > > dpaa_sec_event.h: No such file or directory
> > > >    37 | #include <dpaa_sec_event.h>
> > > >       |          ^~~~~~~~~~~~~~~~~~

[dpdk-dev] [PATCH v2 0/2] dpaa_sec: support event crypto adapter

[Akhil Goyal]

changes in v2:
fix meson build

Akhil Goyal (2):
  crypto/dpaa_sec: support event crypto adapter
  event/dpaa: support event crypto adapter

 drivers/bus/dpaa/base/qbman/qman.c            |   9 +-
 drivers/bus/dpaa/include/fsl_qman.h           |   2 +-
 drivers/crypto/dpaa_sec/Makefile              |   1 +
 drivers/crypto/dpaa_sec/dpaa_sec.c            | 200 +++++++++++++++++-
 drivers/crypto/dpaa_sec/dpaa_sec_event.h      |  19 ++
 .../dpaa_sec/rte_pmd_dpaa_sec_version.map     |   8 +
 drivers/event/dpaa/Makefile                   |   3 +
 drivers/event/dpaa/dpaa_eventdev.c            | 154 +++++++++++++-
 drivers/event/dpaa/dpaa_eventdev.h            |   5 +
 drivers/event/dpaa/meson.build                |   3 +-
 10 files changed, 394 insertions(+), 10 deletions(-)
 create mode 100644 drivers/crypto/dpaa_sec/dpaa_sec_event.h

-- 
2.17.1

[dpdk-dev] [PATCH v2 1/2] crypto/dpaa_sec: support event crypto adapter

[Akhil Goyal]

dpaa_sec hw queues can be attached to a hw dpaa event
device and the application can configure the event
crypto adapter to access the dpaa_sec packets using
hardware events.
This patch defines APIs which can be used by the
dpaa event device to attach/detach dpaa_sec queues.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
---
 drivers/bus/dpaa/base/qbman/qman.c            |   9 +-
 drivers/bus/dpaa/include/fsl_qman.h           |   2 +-
 drivers/crypto/dpaa_sec/Makefile              |   1 +
 drivers/crypto/dpaa_sec/dpaa_sec.c            | 200 +++++++++++++++++-
 drivers/crypto/dpaa_sec/dpaa_sec_event.h      |  19 ++
 .../dpaa_sec/rte_pmd_dpaa_sec_version.map     |   8 +
 6 files changed, 231 insertions(+), 8 deletions(-)
 create mode 100644 drivers/crypto/dpaa_sec/dpaa_sec_event.h

diff --git a/drivers/bus/dpaa/base/qbman/qman.c b/drivers/bus/dpaa/base/qbman/qman.c
index c6f7d7bb3..e43fc65ef 100644
--- a/drivers/bus/dpaa/base/qbman/qman.c
+++ b/drivers/bus/dpaa/base/qbman/qman.c
@@ -2286,7 +2286,7 @@ int qman_enqueue_multi(struct qman_fq *fq,
 
 int
 qman_enqueue_multi_fq(struct qman_fq *fq[], const struct qm_fd *fd,
-		      int frames_to_send)
+		      u32 *flags, int frames_to_send)
 {
 	struct qman_portal *p = get_affine_portal();
 	struct qm_portal *portal = &p->p;
@@ -2294,7 +2294,7 @@ qman_enqueue_multi_fq(struct qman_fq *fq[], const struct qm_fd *fd,
 	register struct qm_eqcr *eqcr = &portal->eqcr;
 	struct qm_eqcr_entry *eq = eqcr->cursor, *prev_eq;
 
-	u8 i, diff, old_ci, sent = 0;
+	u8 i = 0, diff, old_ci, sent = 0;
 
 	/* Update the available entries if no entry is free */
 	if (!eqcr->available) {
@@ -2313,6 +2313,11 @@ qman_enqueue_multi_fq(struct qman_fq *fq[], const struct qm_fd *fd,
 		eq->fd.addr = cpu_to_be40(fd->addr);
 		eq->fd.status = cpu_to_be32(fd->status);
 		eq->fd.opaque = cpu_to_be32(fd->opaque);
+		if (flags && (flags[i] & QMAN_ENQUEUE_FLAG_DCA)) {
+			eq->dca = QM_EQCR_DCA_ENABLE |
+				((flags[i] >> 8) & QM_EQCR_DCA_IDXMASK);
+		}
+		i++;
 
 		eq = (void *)((unsigned long)(eq + 1) &
 			(~(unsigned long)(QM_EQCR_SIZE << 6)));
diff --git a/drivers/bus/dpaa/include/fsl_qman.h b/drivers/bus/dpaa/include/fsl_qman.h
index e5cccbbea..29fb2eb9d 100644
--- a/drivers/bus/dpaa/include/fsl_qman.h
+++ b/drivers/bus/dpaa/include/fsl_qman.h
@@ -1773,7 +1773,7 @@ int qman_enqueue_multi(struct qman_fq *fq, const struct qm_fd *fd, u32 *flags,
  */
 int
 qman_enqueue_multi_fq(struct qman_fq *fq[], const struct qm_fd *fd,
-		      int frames_to_send);
+		      u32 *flags, int frames_to_send);
 
 typedef int (*qman_cb_precommit) (void *arg);
 
diff --git a/drivers/crypto/dpaa_sec/Makefile b/drivers/crypto/dpaa_sec/Makefile
index 1d8b7bec1..353c2549f 100644
--- a/drivers/crypto/dpaa_sec/Makefile
+++ b/drivers/crypto/dpaa_sec/Makefile
@@ -16,6 +16,7 @@ CFLAGS += $(WERROR_FLAGS)
 
 CFLAGS += -I$(RTE_SDK)/drivers/bus/dpaa
 CFLAGS += -I$(RTE_SDK)/drivers/bus/dpaa/include
+CFLAGS += -I$(RTE_SDK)/drivers/bus/dpaa/base/qbman
 CFLAGS += -I$(RTE_SDK)/drivers/crypto/dpaa_sec/
 #sharing the hw flib headers from dpaa2_sec pmd
 CFLAGS += -I$(RTE_SDK)/drivers/crypto/dpaa2_sec/
diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c b/drivers/crypto/dpaa_sec/dpaa_sec.c
index ea0b2054a..32c7392d8 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.c
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
@@ -37,6 +37,7 @@
 
 #include <rte_dpaa_bus.h>
 #include <dpaa_sec.h>
+#include <dpaa_sec_event.h>
 #include <dpaa_sec_log.h>
 #include <dpaax_iova_table.h>
 
@@ -61,9 +62,6 @@ dpaa_sec_op_ending(struct dpaa_sec_op_ctx *ctx)
 		DPAA_SEC_DP_WARN("SEC return err: 0x%x", ctx->fd_status);
 		ctx->op->status = RTE_CRYPTO_OP_STATUS_ERROR;
 	}
-
-	/* report op status to sym->op and then free the ctx memory  */
-	rte_mempool_put(ctx->ctx_pool, (void *)ctx);
 }
 
 static inline struct dpaa_sec_op_ctx *
@@ -1756,7 +1754,7 @@ dpaa_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
 	struct rte_crypto_op *op;
 	struct dpaa_sec_job *cf;
 	dpaa_sec_session *ses;
-	uint32_t auth_only_len;
+	uint32_t auth_only_len, index, flags[DPAA_SEC_BURST] = {0};
 	struct qman_fq *inq[DPAA_SEC_BURST];
 
 	while (nb_ops) {
@@ -1764,6 +1762,18 @@ dpaa_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
 				DPAA_SEC_BURST : nb_ops;
 		for (loop = 0; loop < frames_to_send; loop++) {
 			op = *(ops++);
+			if (op->sym->m_src->seqn != 0) {
+				index = op->sym->m_src->seqn - 1;
+				if (DPAA_PER_LCORE_DQRR_HELD & (1 << index)) {
+					/* QM_EQCR_DCA_IDXMASK = 0x0f */
+					flags[loop] = ((index & 0x0f) << 8);
+					flags[loop] |= QMAN_ENQUEUE_FLAG_DCA;
+					DPAA_PER_LCORE_DQRR_SIZE--;
+					DPAA_PER_LCORE_DQRR_HELD &=
+								~(1 << index);
+				}
+			}
+
 			switch (op->sess_type) {
 			case RTE_CRYPTO_OP_WITH_SESSION:
 				ses = (dpaa_sec_session *)
@@ -1882,7 +1892,7 @@ dpaa_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
 		loop = 0;
 		while (loop < frames_to_send) {
 			loop += qman_enqueue_multi_fq(&inq[loop], &fds[loop],
-					frames_to_send - loop);
+					&flags[loop], frames_to_send - loop);
 		}
 		nb_ops -= frames_to_send;
 		num_tx += frames_to_send;
@@ -2679,6 +2689,186 @@ dpaa_sec_dev_infos_get(struct rte_cryptodev *dev,
 	}
 }
 
+static enum qman_cb_dqrr_result
+dpaa_sec_process_parallel_event(void *event,
+			struct qman_portal *qm __always_unused,
+			struct qman_fq *outq,
+			const struct qm_dqrr_entry *dqrr,
+			void **bufs)
+{
+	const struct qm_fd *fd;
+	struct dpaa_sec_job *job;
+	struct dpaa_sec_op_ctx *ctx;
+	struct rte_event *ev = (struct rte_event *)event;
+
+	fd = &dqrr->fd;
+
+	/* sg is embedded in an op ctx,
+	 * sg[0] is for output
+	 * sg[1] for input
+	 */
+	job = dpaa_mem_ptov(qm_fd_addr_get64(fd));
+
+	ctx = container_of(job, struct dpaa_sec_op_ctx, job);
+	ctx->fd_status = fd->status;
+	if (ctx->op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
+		struct qm_sg_entry *sg_out;
+		uint32_t len;
+
+		sg_out = &job->sg[0];
+		hw_sg_to_cpu(sg_out);
+		len = sg_out->length;
+		ctx->op->sym->m_src->pkt_len = len;
+		ctx->op->sym->m_src->data_len = len;
+	}
+	if (!ctx->fd_status) {
+		ctx->op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
+	} else {
+		DPAA_SEC_DP_WARN("SEC return err: 0x%x", ctx->fd_status);
+		ctx->op->status = RTE_CRYPTO_OP_STATUS_ERROR;
+	}
+	ev->event_ptr = (void *)ctx->op;
+
+	ev->flow_id = outq->ev.flow_id;
+	ev->sub_event_type = outq->ev.sub_event_type;
+	ev->event_type = RTE_EVENT_TYPE_CRYPTODEV;
+	ev->op = RTE_EVENT_OP_NEW;
+	ev->sched_type = outq->ev.sched_type;
+	ev->queue_id = outq->ev.queue_id;
+	ev->priority = outq->ev.priority;
+	*bufs = (void *)ctx->op;
+
+	rte_mempool_put(ctx->ctx_pool, (void *)ctx);
+
+	return qman_cb_dqrr_consume;
+}
+
+static enum qman_cb_dqrr_result
+dpaa_sec_process_atomic_event(void *event,
+			struct qman_portal *qm __rte_unused,
+			struct qman_fq *outq,
+			const struct qm_dqrr_entry *dqrr,
+			void **bufs)
+{
+	u8 index;
+	const struct qm_fd *fd;
+	struct dpaa_sec_job *job;
+	struct dpaa_sec_op_ctx *ctx;
+	struct rte_event *ev = (struct rte_event *)event;
+
+	fd = &dqrr->fd;
+
+	/* sg is embedded in an op ctx,
+	 * sg[0] is for output
+	 * sg[1] for input
+	 */
+	job = dpaa_mem_ptov(qm_fd_addr_get64(fd));
+
+	ctx = container_of(job, struct dpaa_sec_op_ctx, job);
+	ctx->fd_status = fd->status;
+	if (ctx->op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
+		struct qm_sg_entry *sg_out;
+		uint32_t len;
+
+		sg_out = &job->sg[0];
+		hw_sg_to_cpu(sg_out);
+		len = sg_out->length;
+		ctx->op->sym->m_src->pkt_len = len;
+		ctx->op->sym->m_src->data_len = len;
+	}
+	if (!ctx->fd_status) {
+		ctx->op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
+	} else {
+		DPAA_SEC_DP_WARN("SEC return err: 0x%x", ctx->fd_status);
+		ctx->op->status = RTE_CRYPTO_OP_STATUS_ERROR;
+	}
+	ev->event_ptr = (void *)ctx->op;
+	ev->flow_id = outq->ev.flow_id;
+	ev->sub_event_type = outq->ev.sub_event_type;
+	ev->event_type = RTE_EVENT_TYPE_CRYPTODEV;
+	ev->op = RTE_EVENT_OP_NEW;
+	ev->sched_type = outq->ev.sched_type;
+	ev->queue_id = outq->ev.queue_id;
+	ev->priority = outq->ev.priority;
+
+	/* Save active dqrr entries */
+	index = ((uintptr_t)dqrr >> 6) & (16/*QM_DQRR_SIZE*/ - 1);
+	DPAA_PER_LCORE_DQRR_SIZE++;
+	DPAA_PER_LCORE_DQRR_HELD |= 1 << index;
+	DPAA_PER_LCORE_DQRR_MBUF(index) = ctx->op->sym->m_src;
+	ev->impl_opaque = index + 1;
+	ctx->op->sym->m_src->seqn = (uint32_t)index + 1;
+	*bufs = (void *)ctx->op;
+
+	rte_mempool_put(ctx->ctx_pool, (void *)ctx);
+
+	return qman_cb_dqrr_defer;
+}
+
+int
+dpaa_sec_eventq_attach(const struct rte_cryptodev *dev,
+		int qp_id,
+		uint16_t ch_id,
+		const struct rte_event *event)
+{
+	struct dpaa_sec_qp *qp = dev->data->queue_pairs[qp_id];
+	struct qm_mcc_initfq opts = {0};
+
+	int ret;
+
+	opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL |
+		       QM_INITFQ_WE_CONTEXTA | QM_INITFQ_WE_CONTEXTB;
+	opts.fqd.dest.channel = ch_id;
+
+	switch (event->sched_type) {
+	case RTE_SCHED_TYPE_ATOMIC:
+		opts.fqd.fq_ctrl |= QM_FQCTRL_HOLDACTIVE;
+		/* Reset FQCTRL_AVOIDBLOCK bit as it is unnecessary
+		 * configuration with HOLD_ACTIVE setting
+		 */
+		opts.fqd.fq_ctrl &= (~QM_FQCTRL_AVOIDBLOCK);
+		qp->outq.cb.dqrr_dpdk_cb = dpaa_sec_process_atomic_event;
+		break;
+	case RTE_SCHED_TYPE_ORDERED:
+		DPAA_SEC_ERR("Ordered queue schedule type is not supported\n");
+		return -1;
+	default:
+		opts.fqd.fq_ctrl |= QM_FQCTRL_AVOIDBLOCK;
+		qp->outq.cb.dqrr_dpdk_cb = dpaa_sec_process_parallel_event;
+		break;
+	}
+
+	ret = qman_init_fq(&qp->outq, QMAN_INITFQ_FLAG_SCHED, &opts);
+	if (unlikely(ret)) {
+		DPAA_SEC_ERR("unable to init caam source fq!");
+		return ret;
+	}
+
+	memcpy(&qp->outq.ev, event, sizeof(struct rte_event));
+
+	return 0;
+}
+
+int
+dpaa_sec_eventq_detach(const struct rte_cryptodev *dev,
+			int qp_id)
+{
+	struct qm_mcc_initfq opts = {0};
+	int ret;
+	struct dpaa_sec_qp *qp = dev->data->queue_pairs[qp_id];
+
+	opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL |
+		       QM_INITFQ_WE_CONTEXTA | QM_INITFQ_WE_CONTEXTB;
+	qp->outq.cb.dqrr = dqrr_out_fq_cb_rx;
+	qp->outq.cb.ern  = ern_sec_fq_handler;
+	ret = qman_init_fq(&qp->outq, 0, &opts);
+	if (ret)
+		RTE_LOG(ERR, PMD, "Error in qman_init_fq: ret: %d\n", ret);
+	qp->outq.cb.dqrr = NULL;
+
+	return ret;
+}
+
 static struct rte_cryptodev_ops crypto_ops = {
 	.dev_configure	      = dpaa_sec_dev_configure,
 	.dev_start	      = dpaa_sec_dev_start,
diff --git a/drivers/crypto/dpaa_sec/dpaa_sec_event.h b/drivers/crypto/dpaa_sec/dpaa_sec_event.h
new file mode 100644
index 000000000..8d1a01809
--- /dev/null
+++ b/drivers/crypto/dpaa_sec/dpaa_sec_event.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2019 NXP
+ *
+ */
+
+#ifndef _DPAA_SEC_EVENT_H_
+#define _DPAA_SEC_EVENT_H_
+
+int
+dpaa_sec_eventq_attach(const struct rte_cryptodev *dev,
+		int qp_id,
+		uint16_t ch_id,
+		const struct rte_event *event);
+
+int
+dpaa_sec_eventq_detach(const struct rte_cryptodev *dev,
+		int qp_id);
+
+#endif /* _DPAA_SEC_EVENT_H_ */
diff --git a/drivers/crypto/dpaa_sec/rte_pmd_dpaa_sec_version.map b/drivers/crypto/dpaa_sec/rte_pmd_dpaa_sec_version.map
index a70bd197b..cc7f2162e 100644
--- a/drivers/crypto/dpaa_sec/rte_pmd_dpaa_sec_version.map
+++ b/drivers/crypto/dpaa_sec/rte_pmd_dpaa_sec_version.map
@@ -2,3 +2,11 @@ DPDK_17.11 {
 
 	local: *;
 };
+
+DPDK_19.11 {
+	global:
+
+	dpaa_sec_eventq_attach;
+	dpaa_sec_eventq_detach;
+
+} DPDK_17.11;
-- 
2.17.1

[dpdk-dev] [PATCH v2 2/2] event/dpaa: support event crypto adapter

[Akhil Goyal]

event dpaa device support both ethernet as well as
crypto queues to be attached to it. eth_rx_adapter
provide infrastructure to attach ethernet queues and
crypto_adapter provide support for crypto queues.

This patch add support for dpaa_eventdev to attach
dpaa_sec queues.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
---
 drivers/event/dpaa/Makefile        |   3 +
 drivers/event/dpaa/dpaa_eventdev.c | 154 ++++++++++++++++++++++++++++-
 drivers/event/dpaa/dpaa_eventdev.h |   5 +
 drivers/event/dpaa/meson.build     |   3 +-
 4 files changed, 163 insertions(+), 2 deletions(-)

diff --git a/drivers/event/dpaa/Makefile b/drivers/event/dpaa/Makefile
index cf9626495..1856fa468 100644
--- a/drivers/event/dpaa/Makefile
+++ b/drivers/event/dpaa/Makefile
@@ -21,6 +21,9 @@ CFLAGS += -I$(RTE_SDK)/drivers/bus/dpaa/include/
 CFLAGS += -I$(RTE_SDK)/drivers/mempool/dpaa
 CFLAGS += -I$(RTE_SDK)/lib/librte_eal/common/include
 
+LDLIBS += -lrte_pmd_dpaa_sec
+CFLAGS += -I$(RTE_SDK)/drivers/crypto/dpaa_sec
+
 EXPORT_MAP := rte_pmd_dpaa_event_version.map
 
 LIBABIVER := 1
diff --git a/drivers/event/dpaa/dpaa_eventdev.c b/drivers/event/dpaa/dpaa_eventdev.c
index 1e247e4f4..d02b8694e 100644
--- a/drivers/event/dpaa/dpaa_eventdev.c
+++ b/drivers/event/dpaa/dpaa_eventdev.c
@@ -27,12 +27,14 @@
 #include <rte_eventdev_pmd_vdev.h>
 #include <rte_ethdev.h>
 #include <rte_event_eth_rx_adapter.h>
+#include <rte_cryptodev.h>
 #include <rte_dpaa_bus.h>
 #include <rte_dpaa_logs.h>
 #include <rte_cycles.h>
 #include <rte_kvargs.h>
 
 #include <dpaa_ethdev.h>
+#include <dpaa_sec_event.h>
 #include "dpaa_eventdev.h"
 #include <dpaa_mempool.h>
 
@@ -322,7 +324,7 @@ dpaa_event_dev_info_get(struct rte_eventdev *dev,
 	EVENTDEV_INIT_FUNC_TRACE();
 
 	RTE_SET_USED(dev);
-	dev_info->driver_name = "event_dpaa";
+	dev_info->driver_name = "event_dpaa1";
 	dev_info->min_dequeue_timeout_ns =
 		DPAA_EVENT_MIN_DEQUEUE_TIMEOUT;
 	dev_info->max_dequeue_timeout_ns =
@@ -718,6 +720,149 @@ dpaa_event_eth_rx_adapter_stop(const struct rte_eventdev *dev,
 	return 0;
 }
 
+static int
+dpaa_eventdev_crypto_caps_get(const struct rte_eventdev *dev,
+			    const struct rte_cryptodev *cdev,
+			    uint32_t *caps)
+{
+	const char *name = cdev->data->name;
+
+	EVENTDEV_INIT_FUNC_TRACE();
+
+	RTE_SET_USED(dev);
+
+	if (!strncmp(name, "dpaa_sec-", 9))
+		*caps = RTE_EVENT_CRYPTO_ADAPTER_DPAA_CAP;
+	else
+		return -1;
+
+	return 0;
+}
+
+static int
+dpaa_eventdev_crypto_queue_add_all(const struct rte_eventdev *dev,
+		const struct rte_cryptodev *cryptodev,
+		const struct rte_event *ev)
+{
+	struct dpaa_eventdev *priv = dev->data->dev_private;
+	uint8_t ev_qid = ev->queue_id;
+	u16 ch_id = priv->evq_info[ev_qid].ch_id;
+	int i, ret;
+
+	EVENTDEV_INIT_FUNC_TRACE();
+
+	for (i = 0; i < cryptodev->data->nb_queue_pairs; i++) {
+		ret = dpaa_sec_eventq_attach(cryptodev, i,
+				ch_id, ev);
+		if (ret) {
+			DPAA_EVENTDEV_ERR("dpaa_sec_eventq_attach failed: ret %d\n",
+				    ret);
+			goto fail;
+		}
+	}
+	return 0;
+fail:
+	for (i = (i - 1); i >= 0 ; i--)
+		dpaa_sec_eventq_detach(cryptodev, i);
+
+	return ret;
+}
+
+static int
+dpaa_eventdev_crypto_queue_add(const struct rte_eventdev *dev,
+		const struct rte_cryptodev *cryptodev,
+		int32_t rx_queue_id,
+		const struct rte_event *ev)
+{
+	struct dpaa_eventdev *priv = dev->data->dev_private;
+	uint8_t ev_qid = ev->queue_id;
+	u16 ch_id = priv->evq_info[ev_qid].ch_id;
+	int ret;
+
+	EVENTDEV_INIT_FUNC_TRACE();
+
+	if (rx_queue_id == -1)
+		return dpaa_eventdev_crypto_queue_add_all(dev,
+				cryptodev, ev);
+
+	ret = dpaa_sec_eventq_attach(cryptodev, rx_queue_id,
+			ch_id, ev);
+	if (ret) {
+		DPAA_EVENTDEV_ERR(
+			"dpaa_sec_eventq_attach failed: ret: %d\n", ret);
+		return ret;
+	}
+	return 0;
+}
+
+static int
+dpaa_eventdev_crypto_queue_del_all(const struct rte_eventdev *dev,
+			     const struct rte_cryptodev *cdev)
+{
+	int i, ret;
+
+	EVENTDEV_INIT_FUNC_TRACE();
+
+	RTE_SET_USED(dev);
+
+	for (i = 0; i < cdev->data->nb_queue_pairs; i++) {
+		ret = dpaa_sec_eventq_detach(cdev, i);
+		if (ret) {
+			DPAA_EVENTDEV_ERR(
+				"dpaa_sec_eventq_detach failed:ret %d\n", ret);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+static int
+dpaa_eventdev_crypto_queue_del(const struct rte_eventdev *dev,
+			     const struct rte_cryptodev *cryptodev,
+			     int32_t rx_queue_id)
+{
+	int ret;
+
+	EVENTDEV_INIT_FUNC_TRACE();
+
+	if (rx_queue_id == -1)
+		return dpaa_eventdev_crypto_queue_del_all(dev, cryptodev);
+
+	ret = dpaa_sec_eventq_detach(cryptodev, rx_queue_id);
+	if (ret) {
+		DPAA_EVENTDEV_ERR(
+			"dpaa_sec_eventq_detach failed: ret: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int
+dpaa_eventdev_crypto_start(const struct rte_eventdev *dev,
+			   const struct rte_cryptodev *cryptodev)
+{
+	EVENTDEV_INIT_FUNC_TRACE();
+
+	RTE_SET_USED(dev);
+	RTE_SET_USED(cryptodev);
+
+	return 0;
+}
+
+static int
+dpaa_eventdev_crypto_stop(const struct rte_eventdev *dev,
+			  const struct rte_cryptodev *cryptodev)
+{
+	EVENTDEV_INIT_FUNC_TRACE();
+
+	RTE_SET_USED(dev);
+	RTE_SET_USED(cryptodev);
+
+	return 0;
+}
+
 static struct rte_eventdev_ops dpaa_eventdev_ops = {
 	.dev_infos_get    = dpaa_event_dev_info_get,
 	.dev_configure    = dpaa_event_dev_configure,
@@ -738,6 +883,11 @@ static struct rte_eventdev_ops dpaa_eventdev_ops = {
 	.eth_rx_adapter_queue_del = dpaa_event_eth_rx_adapter_queue_del,
 	.eth_rx_adapter_start = dpaa_event_eth_rx_adapter_start,
 	.eth_rx_adapter_stop = dpaa_event_eth_rx_adapter_stop,
+	.crypto_adapter_caps_get	= dpaa_eventdev_crypto_caps_get,
+	.crypto_adapter_queue_pair_add	= dpaa_eventdev_crypto_queue_add,
+	.crypto_adapter_queue_pair_del	= dpaa_eventdev_crypto_queue_del,
+	.crypto_adapter_start		= dpaa_eventdev_crypto_start,
+	.crypto_adapter_stop		= dpaa_eventdev_crypto_stop,
 };
 
 static int flag_check_handler(__rte_unused const char *key,
@@ -806,6 +956,8 @@ dpaa_event_dev_create(const char *name, const char *params)
 		eventdev->dequeue_burst = dpaa_event_dequeue_burst_intr;
 	}
 
+	RTE_LOG(INFO, PMD, "%s eventdev added", name);
+
 	/* For secondary processes, the primary has done all the work */
 	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 		return 0;
diff --git a/drivers/event/dpaa/dpaa_eventdev.h b/drivers/event/dpaa/dpaa_eventdev.h
index 8134e6ba9..b8f247c61 100644
--- a/drivers/event/dpaa/dpaa_eventdev.h
+++ b/drivers/event/dpaa/dpaa_eventdev.h
@@ -40,6 +40,11 @@ do {						\
 		RTE_EVENT_ETH_RX_ADAPTER_CAP_MULTI_EVENTQ | \
 		RTE_EVENT_ETH_RX_ADAPTER_CAP_OVERRIDE_FLOW_ID)
 
+#define RTE_EVENT_CRYPTO_ADAPTER_DPAA_CAP \
+		(RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_NEW | \
+		RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_QP_EV_BIND | \
+		RTE_EVENT_CRYPTO_ADAPTER_CAP_SESSION_PRIVATE_DATA)
+
 struct dpaa_eventq {
 	/* Channel Id */
 	uint16_t ch_id;
diff --git a/drivers/event/dpaa/meson.build b/drivers/event/dpaa/meson.build
index c1e725475..b74f3bf32 100644
--- a/drivers/event/dpaa/meson.build
+++ b/drivers/event/dpaa/meson.build
@@ -5,7 +5,8 @@ if not is_linux
 	build = false
 	reason = 'only supported on linux'
 endif
-deps += ['pmd_dpaa']
+deps += ['pmd_dpaa', 'pmd_dpaa_sec']
 sources = files('dpaa_eventdev.c')
 
 allow_experimental_apis = true
+includes += include_directories('../../crypto/dpaa_sec/')
-- 
2.17.1

[dpdk-dev] [PATCH v3 0/2] dpaa_sec: support event crypto adapter

[Akhil Goyal]

changes in v3:
retire queues while doing detach queue

changes in v2:
fix meson build

Akhil Goyal (2):
  crypto/dpaa_sec: support event crypto adapter
  event/dpaa: support event crypto adapter

 drivers/bus/dpaa/base/qbman/qman.c            |   9 +-
 drivers/bus/dpaa/include/fsl_qman.h           |   2 +-
 drivers/crypto/dpaa_sec/Makefile              |   1 +
 drivers/crypto/dpaa_sec/dpaa_sec.c            | 202 +++++++++++++++++-
 drivers/crypto/dpaa_sec/dpaa_sec_event.h      |  19 ++
 .../dpaa_sec/rte_pmd_dpaa_sec_version.map     |   8 +
 drivers/event/dpaa/Makefile                   |   3 +
 drivers/event/dpaa/dpaa_eventdev.c            | 154 ++++++++++++-
 drivers/event/dpaa/dpaa_eventdev.h            |   5 +
 drivers/event/dpaa/meson.build                |   3 +-
 10 files changed, 396 insertions(+), 10 deletions(-)
 create mode 100644 drivers/crypto/dpaa_sec/dpaa_sec_event.h

-- 
2.17.1

[dpdk-dev] [PATCH v3 1/2] crypto/dpaa_sec: support event crypto adapter

[Akhil Goyal]

dpaa_sec hw queues can be attached to a hw dpaa event
device and the application can configure the event
crypto adapter to access the dpaa_sec packets using
hardware events.
This patch defines APIs which can be used by the
dpaa event device to attach/detach dpaa_sec queues.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
---
 drivers/bus/dpaa/base/qbman/qman.c            |   9 +-
 drivers/bus/dpaa/include/fsl_qman.h           |   2 +-
 drivers/crypto/dpaa_sec/Makefile              |   1 +
 drivers/crypto/dpaa_sec/dpaa_sec.c            | 202 +++++++++++++++++-
 drivers/crypto/dpaa_sec/dpaa_sec_event.h      |  19 ++
 .../dpaa_sec/rte_pmd_dpaa_sec_version.map     |   8 +
 6 files changed, 233 insertions(+), 8 deletions(-)
 create mode 100644 drivers/crypto/dpaa_sec/dpaa_sec_event.h

diff --git a/drivers/bus/dpaa/base/qbman/qman.c b/drivers/bus/dpaa/base/qbman/qman.c
index c6f7d7bb3..e43fc65ef 100644
--- a/drivers/bus/dpaa/base/qbman/qman.c
+++ b/drivers/bus/dpaa/base/qbman/qman.c
@@ -2286,7 +2286,7 @@ int qman_enqueue_multi(struct qman_fq *fq,
 
 int
 qman_enqueue_multi_fq(struct qman_fq *fq[], const struct qm_fd *fd,
-		      int frames_to_send)
+		      u32 *flags, int frames_to_send)
 {
 	struct qman_portal *p = get_affine_portal();
 	struct qm_portal *portal = &p->p;
@@ -2294,7 +2294,7 @@ qman_enqueue_multi_fq(struct qman_fq *fq[], const struct qm_fd *fd,
 	register struct qm_eqcr *eqcr = &portal->eqcr;
 	struct qm_eqcr_entry *eq = eqcr->cursor, *prev_eq;
 
-	u8 i, diff, old_ci, sent = 0;
+	u8 i = 0, diff, old_ci, sent = 0;
 
 	/* Update the available entries if no entry is free */
 	if (!eqcr->available) {
@@ -2313,6 +2313,11 @@ qman_enqueue_multi_fq(struct qman_fq *fq[], const struct qm_fd *fd,
 		eq->fd.addr = cpu_to_be40(fd->addr);
 		eq->fd.status = cpu_to_be32(fd->status);
 		eq->fd.opaque = cpu_to_be32(fd->opaque);
+		if (flags && (flags[i] & QMAN_ENQUEUE_FLAG_DCA)) {
+			eq->dca = QM_EQCR_DCA_ENABLE |
+				((flags[i] >> 8) & QM_EQCR_DCA_IDXMASK);
+		}
+		i++;
 
 		eq = (void *)((unsigned long)(eq + 1) &
 			(~(unsigned long)(QM_EQCR_SIZE << 6)));
diff --git a/drivers/bus/dpaa/include/fsl_qman.h b/drivers/bus/dpaa/include/fsl_qman.h
index e5cccbbea..29fb2eb9d 100644
--- a/drivers/bus/dpaa/include/fsl_qman.h
+++ b/drivers/bus/dpaa/include/fsl_qman.h
@@ -1773,7 +1773,7 @@ int qman_enqueue_multi(struct qman_fq *fq, const struct qm_fd *fd, u32 *flags,
  */
 int
 qman_enqueue_multi_fq(struct qman_fq *fq[], const struct qm_fd *fd,
-		      int frames_to_send);
+		      u32 *flags, int frames_to_send);
 
 typedef int (*qman_cb_precommit) (void *arg);
 
diff --git a/drivers/crypto/dpaa_sec/Makefile b/drivers/crypto/dpaa_sec/Makefile
index 1d8b7bec1..353c2549f 100644
--- a/drivers/crypto/dpaa_sec/Makefile
+++ b/drivers/crypto/dpaa_sec/Makefile
@@ -16,6 +16,7 @@ CFLAGS += $(WERROR_FLAGS)
 
 CFLAGS += -I$(RTE_SDK)/drivers/bus/dpaa
 CFLAGS += -I$(RTE_SDK)/drivers/bus/dpaa/include
+CFLAGS += -I$(RTE_SDK)/drivers/bus/dpaa/base/qbman
 CFLAGS += -I$(RTE_SDK)/drivers/crypto/dpaa_sec/
 #sharing the hw flib headers from dpaa2_sec pmd
 CFLAGS += -I$(RTE_SDK)/drivers/crypto/dpaa2_sec/
diff --git a/drivers/crypto/dpaa_sec/dpaa_sec.c b/drivers/crypto/dpaa_sec/dpaa_sec.c
index ea0b2054a..38cfdd378 100644
--- a/drivers/crypto/dpaa_sec/dpaa_sec.c
+++ b/drivers/crypto/dpaa_sec/dpaa_sec.c
@@ -37,6 +37,7 @@
 
 #include <rte_dpaa_bus.h>
 #include <dpaa_sec.h>
+#include <dpaa_sec_event.h>
 #include <dpaa_sec_log.h>
 #include <dpaax_iova_table.h>
 
@@ -61,9 +62,6 @@ dpaa_sec_op_ending(struct dpaa_sec_op_ctx *ctx)
 		DPAA_SEC_DP_WARN("SEC return err: 0x%x", ctx->fd_status);
 		ctx->op->status = RTE_CRYPTO_OP_STATUS_ERROR;
 	}
-
-	/* report op status to sym->op and then free the ctx memory  */
-	rte_mempool_put(ctx->ctx_pool, (void *)ctx);
 }
 
 static inline struct dpaa_sec_op_ctx *
@@ -1756,7 +1754,7 @@ dpaa_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
 	struct rte_crypto_op *op;
 	struct dpaa_sec_job *cf;
 	dpaa_sec_session *ses;
-	uint32_t auth_only_len;
+	uint32_t auth_only_len, index, flags[DPAA_SEC_BURST] = {0};
 	struct qman_fq *inq[DPAA_SEC_BURST];
 
 	while (nb_ops) {
@@ -1764,6 +1762,18 @@ dpaa_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
 				DPAA_SEC_BURST : nb_ops;
 		for (loop = 0; loop < frames_to_send; loop++) {
 			op = *(ops++);
+			if (op->sym->m_src->seqn != 0) {
+				index = op->sym->m_src->seqn - 1;
+				if (DPAA_PER_LCORE_DQRR_HELD & (1 << index)) {
+					/* QM_EQCR_DCA_IDXMASK = 0x0f */
+					flags[loop] = ((index & 0x0f) << 8);
+					flags[loop] |= QMAN_ENQUEUE_FLAG_DCA;
+					DPAA_PER_LCORE_DQRR_SIZE--;
+					DPAA_PER_LCORE_DQRR_HELD &=
+								~(1 << index);
+				}
+			}
+
 			switch (op->sess_type) {
 			case RTE_CRYPTO_OP_WITH_SESSION:
 				ses = (dpaa_sec_session *)
@@ -1882,7 +1892,7 @@ dpaa_sec_enqueue_burst(void *qp, struct rte_crypto_op **ops,
 		loop = 0;
 		while (loop < frames_to_send) {
 			loop += qman_enqueue_multi_fq(&inq[loop], &fds[loop],
-					frames_to_send - loop);
+					&flags[loop], frames_to_send - loop);
 		}
 		nb_ops -= frames_to_send;
 		num_tx += frames_to_send;
@@ -2679,6 +2689,188 @@ dpaa_sec_dev_infos_get(struct rte_cryptodev *dev,
 	}
 }
 
+static enum qman_cb_dqrr_result
+dpaa_sec_process_parallel_event(void *event,
+			struct qman_portal *qm __always_unused,
+			struct qman_fq *outq,
+			const struct qm_dqrr_entry *dqrr,
+			void **bufs)
+{
+	const struct qm_fd *fd;
+	struct dpaa_sec_job *job;
+	struct dpaa_sec_op_ctx *ctx;
+	struct rte_event *ev = (struct rte_event *)event;
+
+	fd = &dqrr->fd;
+
+	/* sg is embedded in an op ctx,
+	 * sg[0] is for output
+	 * sg[1] for input
+	 */
+	job = dpaa_mem_ptov(qm_fd_addr_get64(fd));
+
+	ctx = container_of(job, struct dpaa_sec_op_ctx, job);
+	ctx->fd_status = fd->status;
+	if (ctx->op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
+		struct qm_sg_entry *sg_out;
+		uint32_t len;
+
+		sg_out = &job->sg[0];
+		hw_sg_to_cpu(sg_out);
+		len = sg_out->length;
+		ctx->op->sym->m_src->pkt_len = len;
+		ctx->op->sym->m_src->data_len = len;
+	}
+	if (!ctx->fd_status) {
+		ctx->op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
+	} else {
+		DPAA_SEC_DP_WARN("SEC return err: 0x%x", ctx->fd_status);
+		ctx->op->status = RTE_CRYPTO_OP_STATUS_ERROR;
+	}
+	ev->event_ptr = (void *)ctx->op;
+
+	ev->flow_id = outq->ev.flow_id;
+	ev->sub_event_type = outq->ev.sub_event_type;
+	ev->event_type = RTE_EVENT_TYPE_CRYPTODEV;
+	ev->op = RTE_EVENT_OP_NEW;
+	ev->sched_type = outq->ev.sched_type;
+	ev->queue_id = outq->ev.queue_id;
+	ev->priority = outq->ev.priority;
+	*bufs = (void *)ctx->op;
+
+	rte_mempool_put(ctx->ctx_pool, (void *)ctx);
+
+	return qman_cb_dqrr_consume;
+}
+
+static enum qman_cb_dqrr_result
+dpaa_sec_process_atomic_event(void *event,
+			struct qman_portal *qm __rte_unused,
+			struct qman_fq *outq,
+			const struct qm_dqrr_entry *dqrr,
+			void **bufs)
+{
+	u8 index;
+	const struct qm_fd *fd;
+	struct dpaa_sec_job *job;
+	struct dpaa_sec_op_ctx *ctx;
+	struct rte_event *ev = (struct rte_event *)event;
+
+	fd = &dqrr->fd;
+
+	/* sg is embedded in an op ctx,
+	 * sg[0] is for output
+	 * sg[1] for input
+	 */
+	job = dpaa_mem_ptov(qm_fd_addr_get64(fd));
+
+	ctx = container_of(job, struct dpaa_sec_op_ctx, job);
+	ctx->fd_status = fd->status;
+	if (ctx->op->sess_type == RTE_CRYPTO_OP_SECURITY_SESSION) {
+		struct qm_sg_entry *sg_out;
+		uint32_t len;
+
+		sg_out = &job->sg[0];
+		hw_sg_to_cpu(sg_out);
+		len = sg_out->length;
+		ctx->op->sym->m_src->pkt_len = len;
+		ctx->op->sym->m_src->data_len = len;
+	}
+	if (!ctx->fd_status) {
+		ctx->op->status = RTE_CRYPTO_OP_STATUS_SUCCESS;
+	} else {
+		DPAA_SEC_DP_WARN("SEC return err: 0x%x", ctx->fd_status);
+		ctx->op->status = RTE_CRYPTO_OP_STATUS_ERROR;
+	}
+	ev->event_ptr = (void *)ctx->op;
+	ev->flow_id = outq->ev.flow_id;
+	ev->sub_event_type = outq->ev.sub_event_type;
+	ev->event_type = RTE_EVENT_TYPE_CRYPTODEV;
+	ev->op = RTE_EVENT_OP_NEW;
+	ev->sched_type = outq->ev.sched_type;
+	ev->queue_id = outq->ev.queue_id;
+	ev->priority = outq->ev.priority;
+
+	/* Save active dqrr entries */
+	index = ((uintptr_t)dqrr >> 6) & (16/*QM_DQRR_SIZE*/ - 1);
+	DPAA_PER_LCORE_DQRR_SIZE++;
+	DPAA_PER_LCORE_DQRR_HELD |= 1 << index;
+	DPAA_PER_LCORE_DQRR_MBUF(index) = ctx->op->sym->m_src;
+	ev->impl_opaque = index + 1;
+	ctx->op->sym->m_src->seqn = (uint32_t)index + 1;
+	*bufs = (void *)ctx->op;
+
+	rte_mempool_put(ctx->ctx_pool, (void *)ctx);
+
+	return qman_cb_dqrr_defer;
+}
+
+int
+dpaa_sec_eventq_attach(const struct rte_cryptodev *dev,
+		int qp_id,
+		uint16_t ch_id,
+		const struct rte_event *event)
+{
+	struct dpaa_sec_qp *qp = dev->data->queue_pairs[qp_id];
+	struct qm_mcc_initfq opts = {0};
+
+	int ret;
+
+	opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL |
+		       QM_INITFQ_WE_CONTEXTA | QM_INITFQ_WE_CONTEXTB;
+	opts.fqd.dest.channel = ch_id;
+
+	switch (event->sched_type) {
+	case RTE_SCHED_TYPE_ATOMIC:
+		opts.fqd.fq_ctrl |= QM_FQCTRL_HOLDACTIVE;
+		/* Reset FQCTRL_AVOIDBLOCK bit as it is unnecessary
+		 * configuration with HOLD_ACTIVE setting
+		 */
+		opts.fqd.fq_ctrl &= (~QM_FQCTRL_AVOIDBLOCK);
+		qp->outq.cb.dqrr_dpdk_cb = dpaa_sec_process_atomic_event;
+		break;
+	case RTE_SCHED_TYPE_ORDERED:
+		DPAA_SEC_ERR("Ordered queue schedule type is not supported\n");
+		return -1;
+	default:
+		opts.fqd.fq_ctrl |= QM_FQCTRL_AVOIDBLOCK;
+		qp->outq.cb.dqrr_dpdk_cb = dpaa_sec_process_parallel_event;
+		break;
+	}
+
+	ret = qman_init_fq(&qp->outq, QMAN_INITFQ_FLAG_SCHED, &opts);
+	if (unlikely(ret)) {
+		DPAA_SEC_ERR("unable to init caam source fq!");
+		return ret;
+	}
+
+	memcpy(&qp->outq.ev, event, sizeof(struct rte_event));
+
+	return 0;
+}
+
+int
+dpaa_sec_eventq_detach(const struct rte_cryptodev *dev,
+			int qp_id)
+{
+	struct qm_mcc_initfq opts = {0};
+	int ret;
+	struct dpaa_sec_qp *qp = dev->data->queue_pairs[qp_id];
+
+	opts.we_mask = QM_INITFQ_WE_DESTWQ | QM_INITFQ_WE_FQCTRL |
+		       QM_INITFQ_WE_CONTEXTA | QM_INITFQ_WE_CONTEXTB;
+	qp->outq.cb.dqrr = dqrr_out_fq_cb_rx;
+	qp->outq.cb.ern  = ern_sec_fq_handler;
+	qman_retire_fq(&qp->outq, NULL);
+	qman_oos_fq(&qp->outq);
+	ret = qman_init_fq(&qp->outq, 0, &opts);
+	if (ret)
+		RTE_LOG(ERR, PMD, "Error in qman_init_fq: ret: %d\n", ret);
+	qp->outq.cb.dqrr = NULL;
+
+	return ret;
+}
+
 static struct rte_cryptodev_ops crypto_ops = {
 	.dev_configure	      = dpaa_sec_dev_configure,
 	.dev_start	      = dpaa_sec_dev_start,
diff --git a/drivers/crypto/dpaa_sec/dpaa_sec_event.h b/drivers/crypto/dpaa_sec/dpaa_sec_event.h
new file mode 100644
index 000000000..8d1a01809
--- /dev/null
+++ b/drivers/crypto/dpaa_sec/dpaa_sec_event.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: BSD-3-Clause
+ * Copyright 2019 NXP
+ *
+ */
+
+#ifndef _DPAA_SEC_EVENT_H_
+#define _DPAA_SEC_EVENT_H_
+
+int
+dpaa_sec_eventq_attach(const struct rte_cryptodev *dev,
+		int qp_id,
+		uint16_t ch_id,
+		const struct rte_event *event);
+
+int
+dpaa_sec_eventq_detach(const struct rte_cryptodev *dev,
+		int qp_id);
+
+#endif /* _DPAA_SEC_EVENT_H_ */
diff --git a/drivers/crypto/dpaa_sec/rte_pmd_dpaa_sec_version.map b/drivers/crypto/dpaa_sec/rte_pmd_dpaa_sec_version.map
index a70bd197b..cc7f2162e 100644
--- a/drivers/crypto/dpaa_sec/rte_pmd_dpaa_sec_version.map
+++ b/drivers/crypto/dpaa_sec/rte_pmd_dpaa_sec_version.map
@@ -2,3 +2,11 @@ DPDK_17.11 {
 
 	local: *;
 };
+
+DPDK_19.11 {
+	global:
+
+	dpaa_sec_eventq_attach;
+	dpaa_sec_eventq_detach;
+
+} DPDK_17.11;
-- 
2.17.1

[dpdk-dev] [PATCH v3 2/2] event/dpaa: support event crypto adapter

[Akhil Goyal]

event dpaa device support both ethernet as well as
crypto queues to be attached to it. eth_rx_adapter
provide infrastructure to attach ethernet queues and
crypto_adapter provide support for crypto queues.

This patch add support for dpaa_eventdev to attach
dpaa_sec queues.

Signed-off-by: Akhil Goyal <akhil.goyal@nxp.com>
---
 drivers/event/dpaa/Makefile        |   3 +
 drivers/event/dpaa/dpaa_eventdev.c | 154 ++++++++++++++++++++++++++++-
 drivers/event/dpaa/dpaa_eventdev.h |   5 +
 drivers/event/dpaa/meson.build     |   3 +-
 4 files changed, 163 insertions(+), 2 deletions(-)

diff --git a/drivers/event/dpaa/Makefile b/drivers/event/dpaa/Makefile
index cf9626495..1856fa468 100644
--- a/drivers/event/dpaa/Makefile
+++ b/drivers/event/dpaa/Makefile
@@ -21,6 +21,9 @@ CFLAGS += -I$(RTE_SDK)/drivers/bus/dpaa/include/
 CFLAGS += -I$(RTE_SDK)/drivers/mempool/dpaa
 CFLAGS += -I$(RTE_SDK)/lib/librte_eal/common/include
 
+LDLIBS += -lrte_pmd_dpaa_sec
+CFLAGS += -I$(RTE_SDK)/drivers/crypto/dpaa_sec
+
 EXPORT_MAP := rte_pmd_dpaa_event_version.map
 
 LIBABIVER := 1
diff --git a/drivers/event/dpaa/dpaa_eventdev.c b/drivers/event/dpaa/dpaa_eventdev.c
index 1e247e4f4..d02b8694e 100644
--- a/drivers/event/dpaa/dpaa_eventdev.c
+++ b/drivers/event/dpaa/dpaa_eventdev.c
@@ -27,12 +27,14 @@
 #include <rte_eventdev_pmd_vdev.h>
 #include <rte_ethdev.h>
 #include <rte_event_eth_rx_adapter.h>
+#include <rte_cryptodev.h>
 #include <rte_dpaa_bus.h>
 #include <rte_dpaa_logs.h>
 #include <rte_cycles.h>
 #include <rte_kvargs.h>
 
 #include <dpaa_ethdev.h>
+#include <dpaa_sec_event.h>
 #include "dpaa_eventdev.h"
 #include <dpaa_mempool.h>
 
@@ -322,7 +324,7 @@ dpaa_event_dev_info_get(struct rte_eventdev *dev,
 	EVENTDEV_INIT_FUNC_TRACE();
 
 	RTE_SET_USED(dev);
-	dev_info->driver_name = "event_dpaa";
+	dev_info->driver_name = "event_dpaa1";
 	dev_info->min_dequeue_timeout_ns =
 		DPAA_EVENT_MIN_DEQUEUE_TIMEOUT;
 	dev_info->max_dequeue_timeout_ns =
@@ -718,6 +720,149 @@ dpaa_event_eth_rx_adapter_stop(const struct rte_eventdev *dev,
 	return 0;
 }
 
+static int
+dpaa_eventdev_crypto_caps_get(const struct rte_eventdev *dev,
+			    const struct rte_cryptodev *cdev,
+			    uint32_t *caps)
+{
+	const char *name = cdev->data->name;
+
+	EVENTDEV_INIT_FUNC_TRACE();
+
+	RTE_SET_USED(dev);
+
+	if (!strncmp(name, "dpaa_sec-", 9))
+		*caps = RTE_EVENT_CRYPTO_ADAPTER_DPAA_CAP;
+	else
+		return -1;
+
+	return 0;
+}
+
+static int
+dpaa_eventdev_crypto_queue_add_all(const struct rte_eventdev *dev,
+		const struct rte_cryptodev *cryptodev,
+		const struct rte_event *ev)
+{
+	struct dpaa_eventdev *priv = dev->data->dev_private;
+	uint8_t ev_qid = ev->queue_id;
+	u16 ch_id = priv->evq_info[ev_qid].ch_id;
+	int i, ret;
+
+	EVENTDEV_INIT_FUNC_TRACE();
+
+	for (i = 0; i < cryptodev->data->nb_queue_pairs; i++) {
+		ret = dpaa_sec_eventq_attach(cryptodev, i,
+				ch_id, ev);
+		if (ret) {
+			DPAA_EVENTDEV_ERR("dpaa_sec_eventq_attach failed: ret %d\n",
+				    ret);
+			goto fail;
+		}
+	}
+	return 0;
+fail:
+	for (i = (i - 1); i >= 0 ; i--)
+		dpaa_sec_eventq_detach(cryptodev, i);
+
+	return ret;
+}
+
+static int
+dpaa_eventdev_crypto_queue_add(const struct rte_eventdev *dev,
+		const struct rte_cryptodev *cryptodev,
+		int32_t rx_queue_id,
+		const struct rte_event *ev)
+{
+	struct dpaa_eventdev *priv = dev->data->dev_private;
+	uint8_t ev_qid = ev->queue_id;
+	u16 ch_id = priv->evq_info[ev_qid].ch_id;
+	int ret;
+
+	EVENTDEV_INIT_FUNC_TRACE();
+
+	if (rx_queue_id == -1)
+		return dpaa_eventdev_crypto_queue_add_all(dev,
+				cryptodev, ev);
+
+	ret = dpaa_sec_eventq_attach(cryptodev, rx_queue_id,
+			ch_id, ev);
+	if (ret) {
+		DPAA_EVENTDEV_ERR(
+			"dpaa_sec_eventq_attach failed: ret: %d\n", ret);
+		return ret;
+	}
+	return 0;
+}
+
+static int
+dpaa_eventdev_crypto_queue_del_all(const struct rte_eventdev *dev,
+			     const struct rte_cryptodev *cdev)
+{
+	int i, ret;
+
+	EVENTDEV_INIT_FUNC_TRACE();
+
+	RTE_SET_USED(dev);
+
+	for (i = 0; i < cdev->data->nb_queue_pairs; i++) {
+		ret = dpaa_sec_eventq_detach(cdev, i);
+		if (ret) {
+			DPAA_EVENTDEV_ERR(
+				"dpaa_sec_eventq_detach failed:ret %d\n", ret);
+			return ret;
+		}
+	}
+
+	return 0;
+}
+
+static int
+dpaa_eventdev_crypto_queue_del(const struct rte_eventdev *dev,
+			     const struct rte_cryptodev *cryptodev,
+			     int32_t rx_queue_id)
+{
+	int ret;
+
+	EVENTDEV_INIT_FUNC_TRACE();
+
+	if (rx_queue_id == -1)
+		return dpaa_eventdev_crypto_queue_del_all(dev, cryptodev);
+
+	ret = dpaa_sec_eventq_detach(cryptodev, rx_queue_id);
+	if (ret) {
+		DPAA_EVENTDEV_ERR(
+			"dpaa_sec_eventq_detach failed: ret: %d\n", ret);
+		return ret;
+	}
+
+	return 0;
+}
+
+static int
+dpaa_eventdev_crypto_start(const struct rte_eventdev *dev,
+			   const struct rte_cryptodev *cryptodev)
+{
+	EVENTDEV_INIT_FUNC_TRACE();
+
+	RTE_SET_USED(dev);
+	RTE_SET_USED(cryptodev);
+
+	return 0;
+}
+
+static int
+dpaa_eventdev_crypto_stop(const struct rte_eventdev *dev,
+			  const struct rte_cryptodev *cryptodev)
+{
+	EVENTDEV_INIT_FUNC_TRACE();
+
+	RTE_SET_USED(dev);
+	RTE_SET_USED(cryptodev);
+
+	return 0;
+}
+
 static struct rte_eventdev_ops dpaa_eventdev_ops = {
 	.dev_infos_get    = dpaa_event_dev_info_get,
 	.dev_configure    = dpaa_event_dev_configure,
@@ -738,6 +883,11 @@ static struct rte_eventdev_ops dpaa_eventdev_ops = {
 	.eth_rx_adapter_queue_del = dpaa_event_eth_rx_adapter_queue_del,
 	.eth_rx_adapter_start = dpaa_event_eth_rx_adapter_start,
 	.eth_rx_adapter_stop = dpaa_event_eth_rx_adapter_stop,
+	.crypto_adapter_caps_get	= dpaa_eventdev_crypto_caps_get,
+	.crypto_adapter_queue_pair_add	= dpaa_eventdev_crypto_queue_add,
+	.crypto_adapter_queue_pair_del	= dpaa_eventdev_crypto_queue_del,
+	.crypto_adapter_start		= dpaa_eventdev_crypto_start,
+	.crypto_adapter_stop		= dpaa_eventdev_crypto_stop,
 };
 
 static int flag_check_handler(__rte_unused const char *key,
@@ -806,6 +956,8 @@ dpaa_event_dev_create(const char *name, const char *params)
 		eventdev->dequeue_burst = dpaa_event_dequeue_burst_intr;
 	}
 
+	RTE_LOG(INFO, PMD, "%s eventdev added", name);
+
 	/* For secondary processes, the primary has done all the work */
 	if (rte_eal_process_type() != RTE_PROC_PRIMARY)
 		return 0;
diff --git a/drivers/event/dpaa/dpaa_eventdev.h b/drivers/event/dpaa/dpaa_eventdev.h
index 8134e6ba9..b8f247c61 100644
--- a/drivers/event/dpaa/dpaa_eventdev.h
+++ b/drivers/event/dpaa/dpaa_eventdev.h
@@ -40,6 +40,11 @@ do {						\
 		RTE_EVENT_ETH_RX_ADAPTER_CAP_MULTI_EVENTQ | \
 		RTE_EVENT_ETH_RX_ADAPTER_CAP_OVERRIDE_FLOW_ID)
 
+#define RTE_EVENT_CRYPTO_ADAPTER_DPAA_CAP \
+		(RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_OP_NEW | \
+		RTE_EVENT_CRYPTO_ADAPTER_CAP_INTERNAL_PORT_QP_EV_BIND | \
+		RTE_EVENT_CRYPTO_ADAPTER_CAP_SESSION_PRIVATE_DATA)
+
 struct dpaa_eventq {
 	/* Channel Id */
 	uint16_t ch_id;
diff --git a/drivers/event/dpaa/meson.build b/drivers/event/dpaa/meson.build
index c1e725475..b74f3bf32 100644
--- a/drivers/event/dpaa/meson.build
+++ b/drivers/event/dpaa/meson.build
@@ -5,7 +5,8 @@ if not is_linux
 	build = false
 	reason = 'only supported on linux'
 endif
-deps += ['pmd_dpaa']
+deps += ['pmd_dpaa', 'pmd_dpaa_sec']
 sources = files('dpaa_eventdev.c')
 
 allow_experimental_apis = true
+includes += include_directories('../../crypto/dpaa_sec/')
-- 
2.17.1

Re: [dpdk-dev] [PATCH v3 0/2] dpaa_sec: support event crypto adapter

[Akhil Goyal]

> 
> changes in v3:
> retire queues while doing detach queue
> 
> changes in v2:
> fix meson build
> 
> Akhil Goyal (2):
>   crypto/dpaa_sec: support event crypto adapter
>   event/dpaa: support event crypto adapter
> 
>  drivers/bus/dpaa/base/qbman/qman.c            |   9 +-
>  drivers/bus/dpaa/include/fsl_qman.h           |   2 +-
>  drivers/crypto/dpaa_sec/Makefile              |   1 +
>  drivers/crypto/dpaa_sec/dpaa_sec.c            | 202 +++++++++++++++++-
>  drivers/crypto/dpaa_sec/dpaa_sec_event.h      |  19 ++
>  .../dpaa_sec/rte_pmd_dpaa_sec_version.map     |   8 +
>  drivers/event/dpaa/Makefile                   |   3 +
>  drivers/event/dpaa/dpaa_eventdev.c            | 154 ++++++++++++-
>  drivers/event/dpaa/dpaa_eventdev.h            |   5 +
>  drivers/event/dpaa/meson.build                |   3 +-
>  10 files changed, 396 insertions(+), 10 deletions(-)
>  create mode 100644 drivers/crypto/dpaa_sec/dpaa_sec_event.h
> 
> --
> 2.17.1
Series
Applied to dpdk-next-crypto