From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 1BA1FA2EFC for ; Tue, 15 Oct 2019 09:57:36 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id E80BB1D455; Tue, 15 Oct 2019 09:57:27 +0200 (CEST) Received: from mga04.intel.com (mga04.intel.com [192.55.52.120]) by dpdk.org (Postfix) with ESMTP id 24FE51D44C for ; Tue, 15 Oct 2019 09:57:23 +0200 (CEST) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by fmsmga104.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 15 Oct 2019 00:57:23 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.67,298,1566889200"; d="scan'208";a="199653271" Received: from npg-dpdk-haiyue-1.sh.intel.com ([10.67.119.153]) by orsmga006.jf.intel.com with ESMTP; 15 Oct 2019 00:57:21 -0700 From: Haiyue Wang To: dev@dpdk.org, ferruh.yigit@intel.com, xiaolong.ye@intel.com Cc: ray.kinsella@intel.com, bernard.iremonger@intel.com, chenmin.sun@intel.com, Haiyue Wang Date: Tue, 15 Oct 2019 15:51:31 +0800 Message-Id: <20191015075133.38560-3-haiyue.wang@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191015075133.38560-1-haiyue.wang@intel.com> References: <20191015075133.38560-1-haiyue.wang@intel.com> Subject: [dpdk-dev] [PATCH v4 2/4] net/i40e: add Rx/Tx burst mode get callbacks X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Retrieve burst mode options according to the selected Rx/Tx burst function name. Signed-off-by: Haiyue Wang Reviewed-by: Xiaolong Ye --- doc/guides/nics/features/i40e.ini | 1 + drivers/net/i40e/i40e_ethdev.c | 2 + drivers/net/i40e/i40e_ethdev.h | 4 ++ drivers/net/i40e/i40e_rxtx.c | 76 +++++++++++++++++++++++++++++++ 4 files changed, 83 insertions(+) diff --git a/doc/guides/nics/features/i40e.ini b/doc/guides/nics/features/i40e.ini index 980bcc5b2..e5ae6ded0 100644 --- a/doc/guides/nics/features/i40e.ini +++ b/doc/guides/nics/features/i40e.ini @@ -11,6 +11,7 @@ Rx interrupt = Y Queue start/stop = Y Runtime Rx queue setup = Y Runtime Tx queue setup = Y +Burst mode info = Y Jumbo frame = Y Scattered Rx = Y TSO = Y diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 2ca14da3b..77a46832c 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -502,6 +502,8 @@ static const struct eth_dev_ops i40e_eth_dev_ops = { .filter_ctrl = i40e_dev_filter_ctrl, .rxq_info_get = i40e_rxq_info_get, .txq_info_get = i40e_txq_info_get, + .rx_burst_mode_get = i40e_rx_burst_mode_get, + .tx_burst_mode_get = i40e_tx_burst_mode_get, .mirror_rule_set = i40e_mirror_rule_set, .mirror_rule_reset = i40e_mirror_rule_reset, .timesync_enable = i40e_timesync_enable, diff --git a/drivers/net/i40e/i40e_ethdev.h b/drivers/net/i40e/i40e_ethdev.h index 261954b9a..2ddaffbeb 100644 --- a/drivers/net/i40e/i40e_ethdev.h +++ b/drivers/net/i40e/i40e_ethdev.h @@ -1209,6 +1209,10 @@ void i40e_rxq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, struct rte_eth_rxq_info *qinfo); void i40e_txq_info_get(struct rte_eth_dev *dev, uint16_t queue_id, struct rte_eth_txq_info *qinfo); +int i40e_rx_burst_mode_get(struct rte_eth_dev *dev, uint16_t queue_id, + struct rte_eth_burst_mode *mode); +int i40e_tx_burst_mode_get(struct rte_eth_dev *dev, uint16_t queue_id, + struct rte_eth_burst_mode *mode); struct i40e_ethertype_filter * i40e_sw_ethertype_filter_lookup(struct i40e_ethertype_rule *ethertype_rule, const struct i40e_ethertype_filter_input *input); diff --git a/drivers/net/i40e/i40e_rxtx.c b/drivers/net/i40e/i40e_rxtx.c index bfe161f2c..09c01f67c 100644 --- a/drivers/net/i40e/i40e_rxtx.c +++ b/drivers/net/i40e/i40e_rxtx.c @@ -3022,6 +3022,51 @@ i40e_set_rx_function(struct rte_eth_dev *dev) } } +int +i40e_rx_burst_mode_get(struct rte_eth_dev *dev, __rte_unused uint16_t queue_id, + struct rte_eth_burst_mode *mode) +{ + eth_rx_burst_t pkt_burst = dev->rx_pkt_burst; + uint64_t options; + + if (pkt_burst == i40e_recv_scattered_pkts) + options = RTE_ETH_BURST_SCALAR | RTE_ETH_BURST_SCATTERED; + else if (pkt_burst == i40e_recv_pkts_bulk_alloc) + options = RTE_ETH_BURST_SCALAR | RTE_ETH_BURST_BULK_ALLOC; + else if (pkt_burst == i40e_recv_pkts) + options = RTE_ETH_BURST_SCALAR; +#ifdef RTE_ARCH_X86 + else if (pkt_burst == i40e_recv_scattered_pkts_vec_avx2) + options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_AVX2 | + RTE_ETH_BURST_SCATTERED; + else if (pkt_burst == i40e_recv_pkts_vec_avx2) + options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_AVX2; + else if (pkt_burst == i40e_recv_scattered_pkts_vec) + options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_SSE | + RTE_ETH_BURST_SCATTERED; + else if (pkt_burst == i40e_recv_pkts_vec) + options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_SSE; +#elif defined(RTE_ARCH_ARM64) + else if (pkt_burst == i40e_recv_scattered_pkts_vec) + options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_NEON | + RTE_ETH_BURST_SCATTERED; + else if (pkt_burst == i40e_recv_pkts_vec) + options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_NEON; +#elif defined(RTE_ARCH_PPC_64) + else if (pkt_burst == i40e_recv_scattered_pkts_vec) + options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_ALTIVEC | + RTE_ETH_BURST_SCATTERED; + else if (pkt_burst == i40e_recv_pkts_vec) + options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_ALTIVEC; +#endif + else + options = 0; + + mode->options = options; + + return options != 0 ? 0 : -EINVAL; +} + void __attribute__((cold)) i40e_set_tx_function_flag(struct rte_eth_dev *dev, struct i40e_tx_queue *txq) { @@ -3115,6 +3160,37 @@ i40e_set_tx_function(struct rte_eth_dev *dev) } } +int +i40e_tx_burst_mode_get(struct rte_eth_dev *dev, __rte_unused uint16_t queue_id, + struct rte_eth_burst_mode *mode) +{ + eth_tx_burst_t pkt_burst = dev->tx_pkt_burst; + uint64_t options; + + if (pkt_burst == i40e_xmit_pkts_simple) + options = RTE_ETH_BURST_SCALAR | RTE_ETH_BURST_SIMPLE; + else if (pkt_burst == i40e_xmit_pkts) + options = RTE_ETH_BURST_SCALAR; +#ifdef RTE_ARCH_X86 + else if (pkt_burst == i40e_xmit_pkts_vec_avx2) + options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_AVX2; + else if (pkt_burst == i40e_xmit_pkts_vec) + options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_SSE; +#elif defined(RTE_ARCH_ARM64) + else if (pkt_burst == i40e_xmit_pkts_vec) + options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_NEON; +#elif defined(RTE_ARCH_PPC_64) + else if (pkt_burst == i40e_xmit_pkts_vec) + options = RTE_ETH_BURST_VECTOR | RTE_ETH_BURST_ALTIVEC; +#endif + else + options = 0; + + mode->options = options; + + return options != 0 ? 0 : -EINVAL; +} + void __attribute__((cold)) i40e_set_default_ptype_table(struct rte_eth_dev *dev) { -- 2.17.1