From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id D9F88A329E for ; Wed, 23 Oct 2019 18:12:55 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 541701C1D5; Wed, 23 Oct 2019 18:12:55 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 4F0E61C1D3 for ; Wed, 23 Oct 2019 18:12:53 +0200 (CEST) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x9NG5DQh031231; Wed, 23 Oct 2019 09:12:49 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-transfer-encoding : content-type; s=pfpt0818; bh=Y6kjaJZWaJPLwPQFJKC7HqIYGo1a7wgvXc5IBQ4NH0E=; b=lx970v68G0FKclk2Eo9u1NlBoO68QdZAm7l3uZEqfOC+b4s599yR4bIwSZ+QcyaFIQRg sS1ONEm0pC6dSlEeFrtffPCy8EM7Do0oYFmITCVDYpT42AYZINMm3bc2KdGDMhY4VHL8 /tlOYzmyFhUbB2rOLhCu47aMpc/1NFq4WN+vDoE7OtAhwOb9mrdTPSx5SssT90apvtcZ dG9wfDjbyxqoCJhutAlekONVTrylJFJuqCQ+Q74NCnghoPD01PKTl/dgkXsD2poBhmUm kS6HQgz0kzKaeDpE5Oz0KFtdookSn7TPHTEQaT6Ep2bK/1HyW9cWg/tx3beaGiHfFtMH cA== Received: from sc-exch01.marvell.com ([199.233.58.181]) by mx0a-0016f401.pphosted.com with ESMTP id 2vt9u5kk63-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Wed, 23 Oct 2019 09:12:49 -0700 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Wed, 23 Oct 2019 09:12:47 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Wed, 23 Oct 2019 09:12:47 -0700 Received: from BG-LT7430.marvell.com (unknown [10.28.17.75]) by maili.marvell.com (Postfix) with ESMTP id DF00E3F703F; Wed, 23 Oct 2019 09:12:45 -0700 (PDT) From: To: , , Pavan Nikhilesh CC: Date: Wed, 23 Oct 2019 21:42:43 +0530 Message-ID: <20191023161244.3284-1-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,1.0.8 definitions=2019-10-23_04:2019-10-23,2019-10-23 signatures=0 Subject: [dpdk-dev] [PATCH] event/octeontx2: use wfe while waiting for head X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Pavan Nikhilesh Use wfe to save power while waiting for tag to become head. SSO signals EVENTI to allow cores to exit from wfe when they are waiting for specific operations in which one of them is setting HEAD bit in GWS_TAG. Signed-off-by: Pavan Nikhilesh --- drivers/event/octeontx2/otx2_worker.h | 30 ++++++++++++++++++++++++--- 1 file changed, 27 insertions(+), 3 deletions(-) diff --git a/drivers/event/octeontx2/otx2_worker.h b/drivers/event/octeontx2/otx2_worker.h index 4e971f27c..7a55caca5 100644 --- a/drivers/event/octeontx2/otx2_worker.h +++ b/drivers/event/octeontx2/otx2_worker.h @@ -226,10 +226,34 @@ otx2_ssogws_swtag_wait(struct otx2_ssogws *ws) } static __rte_always_inline void -otx2_ssogws_head_wait(struct otx2_ssogws *ws, const uint8_t wait_flag) +otx2_ssogws_head_wait(struct otx2_ssogws *ws) { - while (wait_flag && !(otx2_read64(ws->tag_op) & BIT_ULL(35))) +#ifdef RTE_ARCH_ARM64 + uint64_t tag; + + asm volatile ( + " ldr %[tag], [%[tag_op]] \n" + " tbnz %[tag], 35, done%= \n" + " sevl \n" + "rty%=: wfe \n" + " ldr %[tag], [%[tag_op]] \n" + " tbz %[tag], 35, rty%= \n" + "done%=: \n" + : [tag] "=&r" (tag) + : [tag_op] "r" (ws->tag_op) + ); +#else + /* Wait for the HEAD to be set */ + while (!(otx2_read64(ws->tag_op) & BIT_ULL(35))) ; +#endif +} + +static __rte_always_inline void +otx2_ssogws_order(struct otx2_ssogws *ws, const uint8_t wait_flag) +{ + if (wait_flag) + otx2_ssogws_head_wait(ws); rte_cio_wmb(); } @@ -258,7 +282,7 @@ otx2_ssogws_event_tx(struct otx2_ssogws *ws, struct rte_event ev[], /* Perform header writes before barrier for TSO */ otx2_nix_xmit_prepare_tso(m, flags); - otx2_ssogws_head_wait(ws, !ev->sched_type); + otx2_ssogws_order(ws, !ev->sched_type); otx2_ssogws_prepare_pkt(txq, m, cmd, flags); if (flags & NIX_TX_MULTI_SEG_F) { -- 2.17.1