From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id EE775A32A4 for ; Fri, 25 Oct 2019 17:21:59 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 8AC6A1C2EA; Fri, 25 Oct 2019 17:21:59 +0200 (CEST) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 950181C2E9 for ; Fri, 25 Oct 2019 17:21:57 +0200 (CEST) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x9PFBCVN024029; Fri, 25 Oct 2019 08:21:56 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0818; bh=37hrMaMFZWYAqCfQtD2fkjUzpkWVhidIxBQTgbGYvOw=; b=W9evI4i1xX/Luxy8IlrJseCttEhLyAUSxz/RdyluYvtF0Rewkpt4xZzhCSvfDCngLfkE q3PpCLYjVz1QnhJN+2ZlX+hm6NeMtNIR/beMJ+PxvP3vFtIxsTiyvs9G/JiAUDYyJkbh Ym962+Vy4/Ii/MrUGKV5Su4NVLuMOFSBweAuv48yOq9wyc8iucOe9fmYuM9X+T7LwvlS yX36n9n+lHxrxmxBCyXZLp87cG5tsrGonWKuQ4X+F9vciQ+YXCweDfj+MD0NPlTCQYut S2W+yYPs37IehoboeuZ6T7TnhYZCElwDksLExU4sZkawNC8OzumwBqzEW3hmYyf87R8G KQ== Received: from sc-exch01.marvell.com ([199.233.58.181]) by mx0b-0016f401.pphosted.com with ESMTP id 2vt9ujvbj6-2 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT); Fri, 25 Oct 2019 08:21:55 -0700 Received: from SC-EXCH03.marvell.com (10.93.176.83) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Fri, 25 Oct 2019 08:21:54 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH03.marvell.com (10.93.176.83) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Fri, 25 Oct 2019 08:21:54 -0700 Received: from BG-LT7430.marvell.com (unknown [10.28.17.85]) by maili.marvell.com (Postfix) with ESMTP id 5A1ED3F703F; Fri, 25 Oct 2019 08:21:48 -0700 (PDT) From: To: , , , Ajit Khaparde , "Somnath Kotur" , John Daley , "Hyong Youb Kim" , Beilei Xing , Qi Zhang , Jingjing Wu , Wenzhuo Lu , Qiming Yang , "Konstantin Ananyev" , Matan Azrad , Shahaf Shuler , Viacheslav Ovsiienko , Nithin Dabilpuram , Kiran Kumar K CC: , Pavan Nikhilesh Date: Fri, 25 Oct 2019 20:51:41 +0530 Message-ID: <20191025152142.12887-2-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191025152142.12887-1-pbhagavatula@marvell.com> References: <20191025152142.12887-1-pbhagavatula@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,1.0.8 definitions=2019-10-25_08:2019-10-25,2019-10-25 signatures=0 Subject: [dpdk-dev] [PATCH 2/2] drivers/net: update Rx flow flag and mark capabilities X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Pavan Nikhilesh Add DEV_RX_OFFLOAD_FLOW_MARK flag for all PMDs that support flow action flag and mark. Signed-off-by: Pavan Nikhilesh Reviewed-by: Andrew Rybchenko Acked-by: Jerin Jacob --- drivers/net/bnxt/bnxt_ethdev.c | 3 ++- drivers/net/enic/enic_res.c | 3 ++- drivers/net/i40e/i40e_ethdev.c | 3 ++- drivers/net/iavf/iavf_ethdev.c | 3 ++- drivers/net/ice/ice_ethdev.c | 3 ++- drivers/net/ixgbe/ixgbe_rxtx.c | 3 ++- drivers/net/mlx5/mlx5_rxq.c | 3 ++- drivers/net/octeontx2/otx2_ethdev.h | 11 ++++++----- drivers/net/octeontx2/otx2_flow.c | 9 ++------- drivers/net/octeontx2/otx2_flow.h | 1 - drivers/net/octeontx2/otx2_flow_parse.c | 5 +---- drivers/net/sfc/sfc_ef10_essb_rx.c | 2 +- 12 files changed, 24 insertions(+), 25 deletions(-) diff --git a/drivers/net/bnxt/bnxt_ethdev.c b/drivers/net/bnxt/bnxt_ethdev.c index 7d9459f0a..c6de6ae91 100644 --- a/drivers/net/bnxt/bnxt_ethdev.c +++ b/drivers/net/bnxt/bnxt_ethdev.c @@ -123,7 +123,8 @@ static const struct rte_pci_id bnxt_pci_id_map[] = { DEV_RX_OFFLOAD_KEEP_CRC | \ DEV_RX_OFFLOAD_VLAN_EXTEND | \ DEV_RX_OFFLOAD_TCP_LRO | \ - DEV_RX_OFFLOAD_SCATTER) + DEV_RX_OFFLOAD_SCATTER | \ + DEV_RX_OFFLOAD_FLOW_MARK) static int bnxt_vlan_offload_set_op(struct rte_eth_dev *dev, int mask); static void bnxt_print_link_info(struct rte_eth_dev *eth_dev); diff --git a/drivers/net/enic/enic_res.c b/drivers/net/enic/enic_res.c index f403a0b66..1d15c58bc 100644 --- a/drivers/net/enic/enic_res.c +++ b/drivers/net/enic/enic_res.c @@ -205,7 +205,8 @@ int enic_get_vnic_config(struct enic *enic) DEV_RX_OFFLOAD_VLAN_STRIP | DEV_RX_OFFLOAD_IPV4_CKSUM | DEV_RX_OFFLOAD_UDP_CKSUM | - DEV_RX_OFFLOAD_TCP_CKSUM; + DEV_RX_OFFLOAD_TCP_CKSUM | + DEV_RX_OFFLOAD_FLOW_MARK; enic->tx_offload_mask = PKT_TX_IPV6 | PKT_TX_IPV4 | diff --git a/drivers/net/i40e/i40e_ethdev.c b/drivers/net/i40e/i40e_ethdev.c index 77a46832c..df8da5c21 100644 --- a/drivers/net/i40e/i40e_ethdev.c +++ b/drivers/net/i40e/i40e_ethdev.c @@ -3613,7 +3613,8 @@ i40e_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) DEV_RX_OFFLOAD_SCATTER | DEV_RX_OFFLOAD_VLAN_EXTEND | DEV_RX_OFFLOAD_VLAN_FILTER | - DEV_RX_OFFLOAD_JUMBO_FRAME; + DEV_RX_OFFLOAD_JUMBO_FRAME | + DEV_RX_OFFLOAD_FLOW_MARK; dev_info->tx_queue_offload_capa = DEV_TX_OFFLOAD_MBUF_FAST_FREE; dev_info->tx_offload_capa = diff --git a/drivers/net/iavf/iavf_ethdev.c b/drivers/net/iavf/iavf_ethdev.c index eebc49ade..f1491da20 100644 --- a/drivers/net/iavf/iavf_ethdev.c +++ b/drivers/net/iavf/iavf_ethdev.c @@ -522,7 +522,8 @@ iavf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | DEV_RX_OFFLOAD_SCATTER | DEV_RX_OFFLOAD_JUMBO_FRAME | - DEV_RX_OFFLOAD_VLAN_FILTER; + DEV_RX_OFFLOAD_VLAN_FILTER | + DEV_RX_OFFLOAD_FLOW_MARK; dev_info->tx_offload_capa = DEV_TX_OFFLOAD_VLAN_INSERT | DEV_TX_OFFLOAD_QINQ_INSERT | diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c index d74675842..b5b2c865c 100644 --- a/drivers/net/ice/ice_ethdev.c +++ b/drivers/net/ice/ice_ethdev.c @@ -2800,7 +2800,8 @@ ice_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) DEV_RX_OFFLOAD_TCP_CKSUM | DEV_RX_OFFLOAD_QINQ_STRIP | DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | - DEV_RX_OFFLOAD_VLAN_EXTEND; + DEV_RX_OFFLOAD_VLAN_EXTEND | + DEV_RX_OFFLOAD_FLOW_MARK; dev_info->tx_offload_capa |= DEV_TX_OFFLOAD_QINQ_INSERT | DEV_TX_OFFLOAD_IPV4_CKSUM | diff --git a/drivers/net/ixgbe/ixgbe_rxtx.c b/drivers/net/ixgbe/ixgbe_rxtx.c index edcfa60ce..a86c93cea 100644 --- a/drivers/net/ixgbe/ixgbe_rxtx.c +++ b/drivers/net/ixgbe/ixgbe_rxtx.c @@ -2872,7 +2872,8 @@ ixgbe_get_rx_port_offloads(struct rte_eth_dev *dev) DEV_RX_OFFLOAD_KEEP_CRC | DEV_RX_OFFLOAD_JUMBO_FRAME | DEV_RX_OFFLOAD_VLAN_FILTER | - DEV_RX_OFFLOAD_SCATTER; + DEV_RX_OFFLOAD_SCATTER | + DEV_RX_OFFLOAD_FLOW_MARK; if (hw->mac.type == ixgbe_mac_82598EB) offloads |= DEV_RX_OFFLOAD_VLAN_STRIP; diff --git a/drivers/net/mlx5/mlx5_rxq.c b/drivers/net/mlx5/mlx5_rxq.c index f0ab8438d..f8f2e2b22 100644 --- a/drivers/net/mlx5/mlx5_rxq.c +++ b/drivers/net/mlx5/mlx5_rxq.c @@ -368,7 +368,8 @@ mlx5_get_rx_queue_offloads(struct rte_eth_dev *dev) struct mlx5_dev_config *config = &priv->config; uint64_t offloads = (DEV_RX_OFFLOAD_SCATTER | DEV_RX_OFFLOAD_TIMESTAMP | - DEV_RX_OFFLOAD_JUMBO_FRAME); + DEV_RX_OFFLOAD_JUMBO_FRAME | + DEV_RX_OFFLOAD_FLOW_MARK); if (config->hw_fcs_strip) offloads |= DEV_RX_OFFLOAD_KEEP_CRC; diff --git a/drivers/net/octeontx2/otx2_ethdev.h b/drivers/net/octeontx2/otx2_ethdev.h index 4d9ed4870..ed293e2cd 100644 --- a/drivers/net/octeontx2/otx2_ethdev.h +++ b/drivers/net/octeontx2/otx2_ethdev.h @@ -140,11 +140,12 @@ DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | \ DEV_RX_OFFLOAD_SCATTER | \ DEV_RX_OFFLOAD_JUMBO_FRAME | \ - DEV_RX_OFFLOAD_OUTER_UDP_CKSUM | \ - DEV_RX_OFFLOAD_VLAN_STRIP | \ - DEV_RX_OFFLOAD_VLAN_FILTER | \ - DEV_RX_OFFLOAD_QINQ_STRIP | \ - DEV_RX_OFFLOAD_TIMESTAMP) + DEV_RX_OFFLOAD_OUTER_UDP_CKSUM | \ + DEV_RX_OFFLOAD_VLAN_STRIP | \ + DEV_RX_OFFLOAD_VLAN_FILTER | \ + DEV_RX_OFFLOAD_QINQ_STRIP | \ + DEV_RX_OFFLOAD_TIMESTAMP | \ + DEV_RX_OFFLOAD_FLOW_MARK) #define NIX_DEFAULT_RSS_CTX_GROUP 0 #define NIX_DEFAULT_RSS_MCAM_IDX -1 diff --git a/drivers/net/octeontx2/otx2_flow.c b/drivers/net/octeontx2/otx2_flow.c index bdbf123a9..ea4e380b1 100644 --- a/drivers/net/octeontx2/otx2_flow.c +++ b/drivers/net/octeontx2/otx2_flow.c @@ -524,11 +524,8 @@ otx2_flow_destroy(struct rte_eth_dev *dev, NIX_RX_ACT_MATCH_MASK; if (match_id && match_id < OTX2_FLOW_ACTION_FLAG_DEFAULT) { - if (rte_atomic32_read(&npc->mark_actions) == 0) - return -EINVAL; - - /* Clear mark offload flag if there are no more mark actions */ - if (rte_atomic32_sub_return(&npc->mark_actions, 1) == 0) { + /* Clear mark offload flag if there is no more mark action */ + if (hw->rx_offloads & DEV_RX_OFFLOAD_FLOW_MARK) { hw->rx_offload_flags &= ~NIX_RX_OFFLOAD_MARK_UPDATE_F; otx2_eth_set_rx_function(dev); } @@ -821,8 +818,6 @@ otx2_flow_init(struct otx2_eth_dev *hw) return rc; } - rte_atomic32_init(&npc->mark_actions); - npc->mcam_entries = NPC_MCAM_TOT_ENTRIES >> npc->keyw[NPC_MCAM_RX]; /* Free, free_rev, live and live_rev entries */ bmap_sz = rte_bitmap_get_memory_footprint(npc->mcam_entries); diff --git a/drivers/net/octeontx2/otx2_flow.h b/drivers/net/octeontx2/otx2_flow.h index ab068b088..85129cc9d 100644 --- a/drivers/net/octeontx2/otx2_flow.h +++ b/drivers/net/octeontx2/otx2_flow.h @@ -160,7 +160,6 @@ TAILQ_HEAD(otx2_flow_list, rte_flow); /* Accessed from ethdev private - otx2_eth_dev */ struct otx2_npc_flow_info { - rte_atomic32_t mark_actions; uint32_t keyx_supp_nmask[NPC_MAX_INTF];/* nibble mask */ uint32_t keyx_len[NPC_MAX_INTF]; /* per intf key len in bits */ uint32_t datax_len[NPC_MAX_INTF]; /* per intf data len in bits */ diff --git a/drivers/net/octeontx2/otx2_flow_parse.c b/drivers/net/octeontx2/otx2_flow_parse.c index 2cba0a447..44f1b0cac 100644 --- a/drivers/net/octeontx2/otx2_flow_parse.c +++ b/drivers/net/octeontx2/otx2_flow_parse.c @@ -761,7 +761,6 @@ otx2_flow_parse_actions(struct rte_eth_dev *dev, struct rte_flow *flow) { struct otx2_eth_dev *hw = dev->data->dev_private; - struct otx2_npc_flow_info *npc = &hw->npc_flow; const struct rte_flow_action_count *act_count; const struct rte_flow_action_mark *act_mark; const struct rte_flow_action_queue *act_q; @@ -795,13 +794,11 @@ otx2_flow_parse_actions(struct rte_eth_dev *dev, } mark = act_mark->id + 1; req_act |= OTX2_FLOW_ACT_MARK; - rte_atomic32_inc(&npc->mark_actions); break; case RTE_FLOW_ACTION_TYPE_FLAG: mark = OTX2_FLOW_FLAG_VAL; req_act |= OTX2_FLOW_ACT_FLAG; - rte_atomic32_inc(&npc->mark_actions); break; case RTE_FLOW_ACTION_TYPE_COUNT: @@ -979,7 +976,7 @@ otx2_flow_parse_actions(struct rte_eth_dev *dev, if (mark) flow->npc_action |= (uint64_t)mark << 40; - if (rte_atomic32_read(&npc->mark_actions) == 1) { + if (hw->rx_offloads & DEV_RX_OFFLOAD_FLOW_MARK) { hw->rx_offload_flags |= NIX_RX_OFFLOAD_MARK_UPDATE_F; otx2_eth_set_rx_function(dev); diff --git a/drivers/net/sfc/sfc_ef10_essb_rx.c b/drivers/net/sfc/sfc_ef10_essb_rx.c index 63da807ea..8c69fd8dd 100644 --- a/drivers/net/sfc/sfc_ef10_essb_rx.c +++ b/drivers/net/sfc/sfc_ef10_essb_rx.c @@ -716,7 +716,7 @@ struct sfc_dp_rx sfc_ef10_essb_rx = { .features = SFC_DP_RX_FEAT_FLOW_FLAG | SFC_DP_RX_FEAT_FLOW_MARK, .dev_offload_capa = DEV_RX_OFFLOAD_CHECKSUM, - .queue_offload_capa = 0, + .queue_offload_capa = DEV_RX_OFFLOAD_FLOW_MARK, .get_dev_info = sfc_ef10_essb_rx_get_dev_info, .pool_ops_supported = sfc_ef10_essb_rx_pool_ops_supported, .qsize_up_rings = sfc_ef10_essb_rx_qsize_up_rings, -- 2.17.1