From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id BD5A9A00B8; Mon, 28 Oct 2019 07:43:40 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id DB4B91BEC2; Mon, 28 Oct 2019 07:43:39 +0100 (CET) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id 960E61BEB4; Mon, 28 Oct 2019 07:43:38 +0100 (CET) X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga104.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 27 Oct 2019 23:43:37 -0700 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.68,239,1569308400"; d="scan'208";a="193168407" Received: from yexl-server.sh.intel.com (HELO localhost) ([10.67.117.17]) by orsmga008.jf.intel.com with ESMTP; 27 Oct 2019 23:43:36 -0700 Date: Mon, 28 Oct 2019 14:40:10 +0800 From: Ye Xiaolong To: Shweta Choudaha Cc: dev@dpdk.org, wenzhuo.lu@intel.com, shweta.choudaha@att.com, stable@dpdk.org Message-ID: <20191028064010.GF33024@intel.com> References: <20190516214535.90650-2-shweta.choudaha@gmail.com> <20190516220331.91984-1-shweta.choudaha@gmail.com> <20190516220331.91984-2-shweta.choudaha@gmail.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <20190516220331.91984-2-shweta.choudaha@gmail.com> User-Agent: Mutt/1.9.4 (2018-02-28) Subject: Re: [dpdk-dev] [PATCH v2 1/1] net/e1000: set/clear GO_LINKD bit only if PHY reset is not blocked X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 05/16, Shweta Choudaha wrote: >From: Shweta Choudaha > >When PHY reset is blocked as is the case when BMC is connected via NC-SI >do not set GO_LINKD bit in PHY power management register in dev_stop as >this will disconnect the PHY. Also, in dev_close clear the GO_LINKD >bit only if PHY reset is not blocked > >Fixes: 3af34dec0b41 ("igb: force phy power up/down") >CC: stable@dpdk.org > >Signed-off-by: Shweta Choudaha >--- > drivers/net/e1000/igb_ethdev.c | 10 ++++++---- > 1 file changed, 6 insertions(+), 4 deletions(-) > >diff --git a/drivers/net/e1000/igb_ethdev.c b/drivers/net/e1000/igb_ethdev.c >index d3a8f5bf4..4d4065d05 100644 >--- a/drivers/net/e1000/igb_ethdev.c >+++ b/drivers/net/e1000/igb_ethdev.c >@@ -1515,8 +1515,9 @@ eth_igb_stop(struct rte_eth_dev *dev) > igb_pf_reset_hw(hw); > E1000_WRITE_REG(hw, E1000_WUC, 0); > >- /* Set bit for Go Link disconnect */ >- if (hw->mac.type >= e1000_82580) { >+ /* Set bit for Go Link disconnect if PHY reset is not blocked */ >+ if (hw->mac.type >= e1000_82580 && >+ (e1000_check_reset_block(hw) != E1000_BLK_PHY_RESET)) { > uint32_t phpm_reg; > > phpm_reg = E1000_READ_REG(hw, E1000_82580_PHY_POWER_MGMT); >@@ -1590,8 +1591,9 @@ eth_igb_close(struct rte_eth_dev *dev) > igb_release_manageability(hw); > igb_hw_control_release(hw); > >- /* Clear bit for Go Link disconnect */ >- if (hw->mac.type >= e1000_82580) { >+ /* Clear bit for Go Link disconnect if PHY reset is not blocked */ >+ if (hw->mac.type >= e1000_82580 && >+ (e1000_check_reset_block(hw) != E1000_BLK_PHY_RESET)) { > uint32_t phpm_reg; > > phpm_reg = E1000_READ_REG(hw, E1000_82580_PHY_POWER_MGMT); >-- >2.11.0 > Reviewed-by: Xiaolong Ye Applied to dpdk-next-net-intel. Thanks.