From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id A94DBA00BE; Wed, 30 Oct 2019 06:54:24 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 227E41BEB8; Wed, 30 Oct 2019 06:54:23 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 6C8E61BEB5 for ; Wed, 30 Oct 2019 06:54:21 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id x9U5eigf004477 for ; Tue, 29 Oct 2019 22:54:20 -0700 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0818; bh=DX263cw2y8TXTYI+H9r01xdeEzdmgvwCrgOomFh1wFo=; b=jSgCo6/JVQ4lVjrR4aLMmNeAMdMf0IVVqwP7pGgQt1+FHfCC2Rth4n+81E366BKUH71C Gh8BlnGSBHQn4VH04J368q/3a+A6tZ7dH8JPU4iMEQdHZ/EQfNeS6b0zzgtdAuK8/GDy /Kgu6le8F1NHC1pdcOaDcFORSHU/YZrWuSZPFZmmOubzwIp5yJnnXnQ+W7roPavBj0kX cWg/2gq0xfYbfOREaPJEzjFvEiqfnvZgrH6IZAWou0FdQYbGQpa6nh2U4P9fx/3wozGr dlx+PN2dnUUFFYpZ/QVOXbE+c0HPUQQ9HTdqeG3fdQ1ypQinYwoYRMFoEkZ4RRpsr6Ai fw== Received: from sc-exch01.marvell.com ([199.233.58.181]) by mx0b-0016f401.pphosted.com with ESMTP id 2vxwjq99qm-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Tue, 29 Oct 2019 22:54:20 -0700 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Tue, 29 Oct 2019 22:54:18 -0700 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Tue, 29 Oct 2019 22:54:18 -0700 Received: from hyd1vattunuru-dt.caveonetworks.com (unknown [10.29.52.72]) by maili.marvell.com (Postfix) with ESMTP id 090993F703F; Tue, 29 Oct 2019 22:54:16 -0700 (PDT) From: To: CC: , , Vamsi Attunuru Date: Wed, 30 Oct 2019 11:24:10 +0530 Message-ID: <20191030055410.28395-1-vattunuru@marvell.com> X-Mailer: git-send-email 2.8.4 In-Reply-To: <20191029180357.16986-1-vattunuru@marvell.com> References: <20191029180357.16986-1-vattunuru@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,1.0.8 definitions=2019-10-30_02:2019-10-28,2019-10-30 signatures=0 Subject: [dpdk-dev] [PATCH v2 1/1] net/octeontx2: skip flow control on lbk ports X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Vamsi Attunuru LBK interface does not support any flow control related HW configurations. Skip flow control set requests on LBK bound ethports. Signed-off-by: Harman Kalra Signed-off-by: Vamsi Attunuru --- V2 change: * Updated log type. drivers/net/octeontx2/otx2_flow_ctrl.c | 13 +++++++++++++ 1 file changed, 13 insertions(+) diff --git a/drivers/net/octeontx2/otx2_flow_ctrl.c b/drivers/net/octeontx2/otx2_flow_ctrl.c index 1d00e46..1b84998 100644 --- a/drivers/net/octeontx2/otx2_flow_ctrl.c +++ b/drivers/net/octeontx2/otx2_flow_ctrl.c @@ -50,6 +50,11 @@ otx2_nix_flow_ctrl_get(struct rte_eth_dev *eth_dev, struct otx2_mbox *mbox = dev->mbox; int rc; + if (otx2_dev_is_lbk(dev)) { + fc_conf->mode = RTE_FC_NONE; + return 0; + } + req = otx2_mbox_alloc_msg_cgx_cfg_pause_frm(mbox); req->set = 0; @@ -137,6 +142,11 @@ otx2_nix_flow_ctrl_set(struct rte_eth_dev *eth_dev, uint8_t tx_pause, rx_pause; int rc = 0; + if (otx2_dev_is_lbk(dev)) { + otx2_info("No flow control support for LBK bound ethports"); + return -ENOTSUP; + } + if (fc_conf->high_water || fc_conf->low_water || fc_conf->pause_time || fc_conf->mac_ctrl_frame_fwd || fc_conf->autoneg) { otx2_info("Flowctrl parameter is not supported"); @@ -189,6 +199,9 @@ otx2_nix_update_flow_ctrl_mode(struct rte_eth_dev *eth_dev) struct otx2_eth_dev *dev = otx2_eth_pmd_priv(eth_dev); struct rte_eth_fc_conf fc_conf; + if (otx2_dev_is_lbk(dev)) + return 0; + memset(&fc_conf, 0, sizeof(struct rte_eth_fc_conf)); /* Both Rx & Tx flow ctrl get enabled(RTE_FC_FULL) in HW * by AF driver, update those info in PMD structure. -- 2.8.4