From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 8C6EAA04C1; Thu, 21 Nov 2019 08:13:57 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id CE6A62E8F; Thu, 21 Nov 2019 08:13:34 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id C36672BF5 for ; Thu, 21 Nov 2019 08:13:31 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id xAL7AHPw006195 for ; Wed, 20 Nov 2019 23:13:31 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-transfer-encoding : content-type; s=pfpt0818; bh=nI1gFLpIKcb2jRSKdUsEqTUsMO6GKDs7dVjGarl/xhQ=; b=k/RNxPXHF9r07z2FnDBsQbWiXRmsCQlpjr/zrVhELQ5CK8gIEK8xWwtvn7FMl2tOMXbj 9VgY2W+yWsMSMYHV6uaD5J5kx8mJie0pto/PXk/Fgq4dZvUyty0XemtGitFSEVQ90ybP z5xNuO1cVPlva8h7JgpD31MWLK+NaRkKm5maW5F52avWvPlk7/Ae1epN17ZGoTk7iVaL ppujBbBYTHoGeff/cMaV5yeFSiLFbiqG0R2+v2r8bEKVHNzBy2tl+rJipcJDdCGRDaxe Mmr+MVePt8dAuHe9gACpOA1vcAn/UM1wTI2Ar6wLZYCGrQkf0MgWOIlFbwZlfD8S96IE Lg== Received: from sc-exch02.marvell.com ([199.233.58.182]) by mx0a-0016f401.pphosted.com with ESMTP id 2wc842by7d-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Wed, 20 Nov 2019 23:13:30 -0800 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH02.marvell.com (10.93.176.82) with Microsoft SMTP Server (TLS) id 15.0.1367.3; Wed, 20 Nov 2019 23:13:29 -0800 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1367.3 via Frontend Transport; Wed, 20 Nov 2019 23:13:29 -0800 Received: from BG-LT7430.marvell.com (unknown [10.28.17.72]) by maili.marvell.com (Postfix) with ESMTP id 713593F7040; Wed, 20 Nov 2019 23:13:28 -0800 (PST) From: To: , Pavan Nikhilesh CC: Date: Thu, 21 Nov 2019 12:43:17 +0530 Message-ID: <20191121071319.1901-4-pbhagavatula@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20191121071319.1901-1-pbhagavatula@marvell.com> References: <20191120045626.10886-1-pbhagavatula@marvell.com> <20191121071319.1901-1-pbhagavatula@marvell.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,18.0.572 definitions=2019-11-20_08:2019-11-20,2019-11-20 signatures=0 Subject: [dpdk-dev] [PATCH v2 4/5] event/octeontx2: update SSO buffers based on timer count X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Pavan Nikhilesh Update SSO internal XAQ buffers based on number of timers in event timer adapter. Signed-off-by: Pavan Nikhilesh --- drivers/event/octeontx2/otx2_evdev.h | 6 +- drivers/event/octeontx2/otx2_evdev_adptr.c | 84 +++++++++++++++++----- drivers/event/octeontx2/otx2_tim_evdev.c | 7 +- drivers/event/octeontx2/otx2_tim_evdev.h | 1 + 4 files changed, 74 insertions(+), 24 deletions(-) diff --git a/drivers/event/octeontx2/otx2_evdev.h b/drivers/event/octeontx2/otx2_evdev.h index 530060f81..231a12a52 100644 --- a/drivers/event/octeontx2/otx2_evdev.h +++ b/drivers/event/octeontx2/otx2_evdev.h @@ -14,6 +14,7 @@ #include "otx2_dev.h" #include "otx2_ethdev.h" #include "otx2_mempool.h" +#include "otx2_tim_evdev.h" #define EVENTDEV_NAME_OCTEONTX2_PMD otx2_eventdev @@ -137,9 +138,12 @@ struct otx2_sso_evdev { struct rte_mempool *xaq_pool; uint64_t rx_offloads; uint64_t tx_offloads; + uint64_t adptr_xae_cnt; uint16_t rx_adptr_pool_cnt; - uint32_t adptr_xae_cnt; uint64_t *rx_adptr_pools; + uint16_t tim_adptr_ring_cnt; + uint16_t *timer_adptr_rings; + uint64_t *timer_adptr_sz; /* Dev args */ uint8_t dual_ws; uint8_t selftest; diff --git a/drivers/event/octeontx2/otx2_evdev_adptr.c b/drivers/event/octeontx2/otx2_evdev_adptr.c index d8a06a593..233cba2aa 100644 --- a/drivers/event/octeontx2/otx2_evdev_adptr.c +++ b/drivers/event/octeontx2/otx2_evdev_adptr.c @@ -199,41 +199,87 @@ sso_rxq_disable(struct otx2_eth_dev *dev, uint16_t qid) void sso_updt_xae_cnt(struct otx2_sso_evdev *dev, void *data, uint32_t event_type) { + int i; + switch (event_type) { case RTE_EVENT_TYPE_ETHDEV: { struct otx2_eth_rxq *rxq = data; - int i, match = false; uint64_t *old_ptr; for (i = 0; i < dev->rx_adptr_pool_cnt; i++) { if ((uint64_t)rxq->pool == dev->rx_adptr_pools[i]) - match = true; - } - - if (!match) { - dev->rx_adptr_pool_cnt++; - old_ptr = dev->rx_adptr_pools; - dev->rx_adptr_pools = rte_realloc(dev->rx_adptr_pools, - sizeof(uint64_t) * - dev->rx_adptr_pool_cnt - , 0); - if (dev->rx_adptr_pools == NULL) { - dev->adptr_xae_cnt += rxq->pool->size; - dev->rx_adptr_pools = old_ptr; - dev->rx_adptr_pool_cnt--; return; - } - dev->rx_adptr_pools[dev->rx_adptr_pool_cnt - 1] = - (uint64_t)rxq->pool; + } + dev->rx_adptr_pool_cnt++; + old_ptr = dev->rx_adptr_pools; + dev->rx_adptr_pools = rte_realloc(dev->rx_adptr_pools, + sizeof(uint64_t) * + dev->rx_adptr_pool_cnt, 0); + if (dev->rx_adptr_pools == NULL) { dev->adptr_xae_cnt += rxq->pool->size; + dev->rx_adptr_pools = old_ptr; + dev->rx_adptr_pool_cnt--; + return; } + dev->rx_adptr_pools[dev->rx_adptr_pool_cnt - 1] = + (uint64_t)rxq->pool; + + dev->adptr_xae_cnt += rxq->pool->size; break; } case RTE_EVENT_TYPE_TIMER: { - dev->adptr_xae_cnt += (*(uint64_t *)data); + struct otx2_tim_ring *timr = data; + uint16_t *old_ring_ptr; + uint64_t *old_sz_ptr; + + for (i = 0; i < dev->tim_adptr_ring_cnt; i++) { + if (timr->ring_id != dev->timer_adptr_rings[i]) + continue; + if (timr->nb_timers == dev->timer_adptr_sz[i]) + return; + dev->adptr_xae_cnt -= dev->timer_adptr_sz[i]; + dev->adptr_xae_cnt += timr->nb_timers; + dev->timer_adptr_sz[i] = timr->nb_timers; + + return; + } + + dev->tim_adptr_ring_cnt++; + old_ring_ptr = dev->timer_adptr_rings; + old_sz_ptr = dev->timer_adptr_sz; + + dev->timer_adptr_rings = rte_realloc(dev->timer_adptr_rings, + sizeof(uint16_t) * + dev->tim_adptr_ring_cnt, + 0); + if (dev->timer_adptr_rings == NULL) { + dev->adptr_xae_cnt += timr->nb_timers; + dev->timer_adptr_rings = old_ring_ptr; + dev->tim_adptr_ring_cnt--; + return; + } + + dev->timer_adptr_sz = rte_realloc(dev->timer_adptr_sz, + sizeof(uint64_t) * + dev->tim_adptr_ring_cnt, + 0); + + if (dev->timer_adptr_sz == NULL) { + dev->adptr_xae_cnt += timr->nb_timers; + dev->timer_adptr_sz = old_sz_ptr; + dev->tim_adptr_ring_cnt--; + return; + } + + dev->timer_adptr_rings[dev->tim_adptr_ring_cnt - 1] = + timr->ring_id; + dev->timer_adptr_sz[dev->tim_adptr_ring_cnt - 1] = + timr->nb_timers; + + dev->adptr_xae_cnt += timr->nb_timers; break; } default: diff --git a/drivers/event/octeontx2/otx2_tim_evdev.c b/drivers/event/octeontx2/otx2_tim_evdev.c index 206ed4331..5f0233f44 100644 --- a/drivers/event/octeontx2/otx2_tim_evdev.c +++ b/drivers/event/octeontx2/otx2_tim_evdev.c @@ -254,7 +254,6 @@ otx2_tim_ring_create(struct rte_event_timer_adapter *adptr) struct tim_ring_req *free_req; struct tim_lf_alloc_req *req; struct tim_lf_alloc_rsp *rsp; - uint64_t nb_timers; int i, rc; if (dev == NULL) @@ -300,7 +299,7 @@ otx2_tim_ring_create(struct rte_event_timer_adapter *adptr) tim_ring->max_tout = rcfg->max_tmo_ns; tim_ring->nb_bkts = (tim_ring->max_tout / tim_ring->tck_nsec); tim_ring->chunk_sz = dev->chunk_sz; - nb_timers = rcfg->nb_timers; + tim_ring->nb_timers = rcfg->nb_timers; tim_ring->disable_npa = dev->disable_npa; tim_ring->enable_stats = dev->enable_stats; @@ -316,7 +315,7 @@ otx2_tim_ring_create(struct rte_event_timer_adapter *adptr) } } - tim_ring->nb_chunks = nb_timers / OTX2_TIM_NB_CHUNK_SLOTS( + tim_ring->nb_chunks = tim_ring->nb_timers / OTX2_TIM_NB_CHUNK_SLOTS( tim_ring->chunk_sz); tim_ring->nb_chunk_slots = OTX2_TIM_NB_CHUNK_SLOTS(tim_ring->chunk_sz); @@ -373,7 +372,7 @@ otx2_tim_ring_create(struct rte_event_timer_adapter *adptr) tim_set_fp_ops(tim_ring); /* Update SSO xae count. */ - sso_updt_xae_cnt(sso_pmd_priv(dev->event_dev), (void *)&nb_timers, + sso_updt_xae_cnt(sso_pmd_priv(dev->event_dev), (void *)tim_ring, RTE_EVENT_TYPE_TIMER); sso_xae_reconfigure(dev->event_dev); diff --git a/drivers/event/octeontx2/otx2_tim_evdev.h b/drivers/event/octeontx2/otx2_tim_evdev.h index eec0189c1..f3fe9697a 100644 --- a/drivers/event/octeontx2/otx2_tim_evdev.h +++ b/drivers/event/octeontx2/otx2_tim_evdev.h @@ -154,6 +154,7 @@ struct otx2_tim_ring { uint8_t ena_dfb; uint16_t ring_id; uint32_t aura; + uint64_t nb_timers; uint64_t tck_nsec; uint64_t max_tout; uint64_t nb_chunks; -- 2.17.1