From: Stephen Hemminger <email@example.com> To: Ranran <firstname.lastname@example.org> Cc: email@example.com Subject: Re: [dpdk-dev] Interrupt is catched in kernel, but not handled Date: Fri, 6 Dec 2019 08:55:50 -0800 Message-ID: <firstname.lastname@example.org> (raw) In-Reply-To: <CAJ2oMh+SYG=n7V9=ruBQKMueHY3pAPEBipwztaq-BfL-wu5fiQ@mail.gmail.com> On Sun, 1 Dec 2019 20:16:59 +0200 Ranran <email@example.com> wrote: > בתאריך יום א׳, 1 בדצמ׳ 2019, 19:07, מאת Stephen Hemminger < > firstname.lastname@example.org>: > > > On Sat, 30 Nov 2019 19:49:16 +0200 > > Ranran <email@example.com> wrote: > > > > > > > > > > > > I also verified that there are no additional irq numbered 23 except > > > > > for our device. > > > > > > > > > > How can it be that irq is catched, but not delivered to userspace ? > > > > > Any suggestion is much appreciated, > > > > > > > > > > ran > > > > > > > > UIO PCI generic does not support interrupts. > > > > You need to use VFIO (preferred) or igb_uio > > > > > > > > Actually UIO PCI generic does support interrupts but only legacy INTx, > > it does not support MSI or MSI-x modes. > > > > Right. > The device I work with is FPGA xilinx which should support INTx. Yet, even > though irqhandler is called, it does not pass pci_check_and_mask_intx, and > therefore irq is not handled, as I written in the original post. Your problem may be that the FPGA is not correctly implementing the PCI spec. I saw this before with VMWare. The kernel expects to be able to read the PCI_COMMAND register to see if IRQ is pending and then write back INTX_DISABLE bit.
prev parent reply index Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top 2019-11-30 8:40 Ranran 2019-11-30 16:51 ` Stephen Hemminger 2019-11-30 17:49 ` Ranran 2019-12-01 17:07 ` Stephen Hemminger 2019-12-01 18:16 ` Ranran 2019-12-06 16:55 ` Stephen Hemminger [this message]
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