From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 52B2CA04F8; Fri, 20 Dec 2019 14:03:44 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 6DB381F1C; Fri, 20 Dec 2019 14:03:43 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0b-0016f401.pphosted.com [67.231.156.173]) by dpdk.org (Postfix) with ESMTP id 2934E1F5 for ; Fri, 20 Dec 2019 14:03:42 +0100 (CET) Received: from pps.filterd (m0045851.ppops.net [127.0.0.1]) by mx0b-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id xBKD0Po5020765 for ; Fri, 20 Dec 2019 05:03:41 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=pfpt0818; bh=3gXWnAf4DBbFw9dV67HpUI69LM+WfcqNzIBrnKZrZm0=; b=qhVcFooC4M1O3Gb1ongTccHMvkCl49ctyrKkwa/MBRIDb6/gOFR+JpjT9NGi9WzZ4L5U OqNH8POROXMC5b/tQ5yqCiZmRXaiO4lQfrlfU6K28PO7B5UZKzZJIOD9Q7vkvkI03yhT 0YBw4D8eJ+03suU9bQr+H6cxhE8DnHl0AnaLLt0GW4uOJI1T7EKtYcj52z4VF1k6JTfu ea4gfddU/EEr+qabzoXEPio7jGzE3EYtHv5UmZHfBnMqYYsd1ai0He01ijAxkeAjEc+I oJ9WZtiDBFVEAaS73GIuUGbY93gZwx3Mg7qSewG7nNclqwkOVRW24EIIomLSsr4xGbh4 iA== Received: from sc-exch01.marvell.com ([199.233.58.181]) by mx0b-0016f401.pphosted.com with ESMTP id 2x0sfy0wh8-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Fri, 20 Dec 2019 05:03:37 -0800 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Fri, 20 Dec 2019 05:03:04 -0800 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Fri, 20 Dec 2019 05:03:04 -0800 Received: from hyd1vattunuru-dt.caveonetworks.com (unknown [10.29.52.72]) by maili.marvell.com (Postfix) with ESMTP id F31603F7040; Fri, 20 Dec 2019 05:03:02 -0800 (PST) From: To: CC: , , Vamsi Attunuru Date: Fri, 20 Dec 2019 18:32:52 +0530 Message-ID: <20191220130252.21974-1-vattunuru@marvell.com> X-Mailer: git-send-email 2.8.4 MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.95,18.0.572 definitions=2019-12-20_02:2019-12-17,2019-12-20 signatures=0 Subject: [dpdk-dev] [PATCH v1 1/1] net/octeontx2: allow vec to process pkts not multiple of 4 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Vamsi Attunuru Current vector mode implementation floor-aligns pkt count with NIX_DESCS_PER_LOOP and process that many packets. Patch addresses the case where pkt count modulo NIX_DESCS_PER_LOOP is non-zero, after the vector mode processing, scalar routine is used to process if there are any leftover packets. Scalar routine is also used when descriptor head is about to wrap and turn out to be unaligned. Signed-off-by: Vamsi Attunuru Signed-off-by: Nithin Dabilpuram --- drivers/net/octeontx2/otx2_rx.c | 18 ++++++++++++++---- drivers/net/octeontx2/otx2_tx.c | 18 +++++++++++++----- 2 files changed, 27 insertions(+), 9 deletions(-) diff --git a/drivers/net/octeontx2/otx2_rx.c b/drivers/net/octeontx2/otx2_rx.c index 48565db..8e6452a 100644 --- a/drivers/net/octeontx2/otx2_rx.c +++ b/drivers/net/octeontx2/otx2_rx.c @@ -130,16 +130,22 @@ nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts, const uintptr_t desc = rxq->desc; uint8x16_t f0, f1, f2, f3; uint32_t head = rxq->head; + uint16_t pkts_left; pkts = nix_rx_nb_pkts(rxq, wdata, pkts, qmask); + pkts_left = pkts & (NIX_DESCS_PER_LOOP - 1); + /* Packets has to be floor-aligned to NIX_DESCS_PER_LOOP */ pkts = RTE_ALIGN_FLOOR(pkts, NIX_DESCS_PER_LOOP); while (packets < pkts) { - /* Get the CQ pointers, since the ring size is multiple of - * 4, We can avoid checking the wrap around of head - * value after the each access unlike scalar version. - */ + /* Exit loop if head is about to wrap and become unaligned */ + if (((head + NIX_DESCS_PER_LOOP - 1) & qmask) < + NIX_DESCS_PER_LOOP) { + pkts_left += (pkts - packets); + break; + } + const uintptr_t cq0 = desc + CQE_SZ(head); /* Prefetch N desc ahead */ @@ -301,6 +307,10 @@ nix_recv_pkts_vector(void *rx_queue, struct rte_mbuf **rx_pkts, /* Free all the CQs that we've processed */ otx2_write64((rxq->wdata | packets), rxq->cq_door); + if (unlikely(pkts_left)) + packets += nix_recv_pkts(rx_queue, &rx_pkts[packets], + pkts_left, flags); + return packets; } diff --git a/drivers/net/octeontx2/otx2_tx.c b/drivers/net/octeontx2/otx2_tx.c index fa53300..96be92a 100644 --- a/drivers/net/octeontx2/otx2_tx.c +++ b/drivers/net/octeontx2/otx2_tx.c @@ -97,7 +97,7 @@ nix_xmit_pkts_mseg(void *tx_queue, struct rte_mbuf **tx_pkts, #define NIX_DESCS_PER_LOOP 4 static __rte_always_inline uint16_t nix_xmit_pkts_vector(void *tx_queue, struct rte_mbuf **tx_pkts, - uint16_t pkts, const uint16_t flags) + uint16_t pkts, uint64_t *cmd, const uint16_t flags) { uint64x2_t dataoff_iova0, dataoff_iova1, dataoff_iova2, dataoff_iova3; uint64x2_t len_olflags0, len_olflags1, len_olflags2, len_olflags3; @@ -118,11 +118,13 @@ nix_xmit_pkts_vector(void *tx_queue, struct rte_mbuf **tx_pkts, uint64x2_t cmd20, cmd21; uint64x2_t cmd30, cmd31; uint64_t lmt_status, i; - - pkts = RTE_ALIGN_FLOOR(pkts, NIX_DESCS_PER_LOOP); + uint16_t pkts_left; NIX_XMIT_FC_OR_RETURN(txq, pkts); + pkts_left = pkts & (NIX_DESCS_PER_LOOP - 1); + pkts = RTE_ALIGN_FLOOR(pkts, NIX_DESCS_PER_LOOP); + /* Reduce the cached count */ txq->fc_cache_pkts -= pkts; @@ -929,17 +931,21 @@ nix_xmit_pkts_vector(void *tx_queue, struct rte_mbuf **tx_pkts, } while (lmt_status == 0); } + if (unlikely(pkts_left)) + pkts += nix_xmit_pkts(tx_queue, tx_pkts, pkts_left, cmd, flags); + return pkts; } #else static __rte_always_inline uint16_t nix_xmit_pkts_vector(void *tx_queue, struct rte_mbuf **tx_pkts, - uint16_t pkts, const uint16_t flags) + uint16_t pkts, uint64_t *cmd, const uint16_t flags) { RTE_SET_USED(tx_queue); RTE_SET_USED(tx_pkts); RTE_SET_USED(pkts); + RTE_SET_USED(cmd); RTE_SET_USED(flags); return 0; } @@ -985,12 +991,14 @@ static uint16_t __rte_noinline __hot \ otx2_nix_xmit_pkts_vec_ ## name(void *tx_queue, \ struct rte_mbuf **tx_pkts, uint16_t pkts) \ { \ + uint64_t cmd[sz]; \ + \ /* VLAN, TSTMP, TSO is not supported by vec */ \ if ((flags) & NIX_TX_OFFLOAD_VLAN_QINQ_F || \ (flags) & NIX_TX_OFFLOAD_TSTAMP_F || \ (flags) & NIX_TX_OFFLOAD_TSO_F) \ return 0; \ - return nix_xmit_pkts_vector(tx_queue, tx_pkts, pkts, (flags)); \ + return nix_xmit_pkts_vector(tx_queue, tx_pkts, pkts, cmd, (flags)); \ } NIX_TX_FASTPATH_MODES -- 2.8.4