From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id D30D2A04F0; Mon, 13 Jan 2020 05:25:25 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 43B7D1D514; Mon, 13 Jan 2020 05:25:25 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 951EE1D510 for ; Mon, 13 Jan 2020 05:25:23 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 00D4K86K018584 for ; Sun, 12 Jan 2020 20:25:22 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : mime-version : content-type; s=pfpt0818; bh=wtO2R634Eox7M2cYHsxkmgrqP8GxStDtR1rQ7UCgYm0=; b=pBteZdPBCmayVqL7OaMuv1YmMBnFqvwfuAU2VBziZ2q8CxVnW9nFMl+N7yOCRtrZndSa IA3nAZYKDQqJosEO50pqn0k+jYoYTPJPHJwOk6UZamzRgxRthlw6PMENq5EtskR67bOW lhwnka6sEDU69rGoV3xLqgeRgNpcdcfU12E65CvtEMEuK72DujO277gpRCvXl15mcy0T deZa8Ihwd7HYBCmAWfYpgxI4SFE4SobTF3Orr/gG1iIy3zKKw3d5lMQdsNCutjd1ceDL Xvpk0EpAzPjtk7wkPsRAYbqh63r108xnFp7oGNANNjYVWm8LT1pB7Yh3KP+vRfvtIAfN Rg== Received: from sc-exch04.marvell.com ([199.233.58.184]) by mx0a-0016f401.pphosted.com with ESMTP id 2xfckumnbs-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Sun, 12 Jan 2020 20:25:22 -0800 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Sun, 12 Jan 2020 20:25:21 -0800 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Sun, 12 Jan 2020 20:25:21 -0800 Received: from localhost.localdomain (unknown [10.28.34.15]) by maili.marvell.com (Postfix) with ESMTP id 2A6BD3F703F; Sun, 12 Jan 2020 20:25:19 -0800 (PST) From: To: Jerin Jacob , Nithin Dabilpuram , Kiran Kumar K CC: Date: Mon, 13 Jan 2020 09:54:52 +0530 Message-ID: <20200113042452.29013-1-kirankumark@marvell.com> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.572 definitions=2020-01-12_11:2020-01-10, 2020-01-12 signatures=0 Subject: [dpdk-dev] [PATCH] net/octeontx2: add check for PTP and HIGIG2 X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Kiran Kumar K For octeontx2 we won't support both PTP and HIGIG2 together. Added a check to verify this. Signed-off-by: Kiran Kumar K --- drivers/net/octeontx2/otx2_ethdev.c | 9 ++++++++- drivers/net/octeontx2/otx2_ptp.c | 5 +++++ 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c index ed329273d..b4c68191d 100644 --- a/drivers/net/octeontx2/otx2_ethdev.c +++ b/drivers/net/octeontx2/otx2_ethdev.c @@ -18,7 +18,8 @@ nix_get_rx_offload_capa(struct otx2_eth_dev *dev) { uint64_t capa = NIX_RX_OFFLOAD_CAPA; - if (otx2_dev_is_vf(dev)) + if (otx2_dev_is_vf(dev) || + dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) capa &= ~DEV_RX_OFFLOAD_TIMESTAMP; return capa; @@ -1641,6 +1642,12 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev) goto fail_offloads; } + if (dev->ptp_en && + dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) { + otx2_err(" Both PTP and switch header enabled"); + goto free_nix_lf; + } + rc = nix_lf_switch_header_type_enable(dev); if (rc) { otx2_err("Failed to enable switch type nix_lf rc=%d", rc); diff --git a/drivers/net/octeontx2/otx2_ptp.c b/drivers/net/octeontx2/otx2_ptp.c index f34b9339c..74cb007a0 100644 --- a/drivers/net/octeontx2/otx2_ptp.c +++ b/drivers/net/octeontx2/otx2_ptp.c @@ -221,6 +221,11 @@ otx2_nix_timesync_enable(struct rte_eth_dev *eth_dev) return -EINVAL; } + if (dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) { + otx2_err("PTP mode not supported in HIGIG mode"); + return -EINVAL; + } + /* Allocating a iova address for tx tstamp */ const struct rte_memzone *ts; ts = rte_eth_dma_zone_reserve(eth_dev, "otx2_ts", -- 2.17.1