* [dpdk-dev] [PATCH] net/octeontx2: add check for PTP and HIGIG2
@ 2020-01-13 4:24 kirankumark
2020-01-14 6:49 ` Jerin Jacob
2020-01-14 8:28 ` [dpdk-dev] [PATCH v2] " kirankumark
0 siblings, 2 replies; 5+ messages in thread
From: kirankumark @ 2020-01-13 4:24 UTC (permalink / raw)
To: Jerin Jacob, Nithin Dabilpuram, Kiran Kumar K; +Cc: dev
From: Kiran Kumar K <kirankumark@marvell.com>
For octeontx2 we won't support both PTP and HIGIG2 together.
Added a check to verify this.
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
---
drivers/net/octeontx2/otx2_ethdev.c | 9 ++++++++-
drivers/net/octeontx2/otx2_ptp.c | 5 +++++
2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c
index ed329273d..b4c68191d 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -18,7 +18,8 @@ nix_get_rx_offload_capa(struct otx2_eth_dev *dev)
{
uint64_t capa = NIX_RX_OFFLOAD_CAPA;
- if (otx2_dev_is_vf(dev))
+ if (otx2_dev_is_vf(dev) ||
+ dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG)
capa &= ~DEV_RX_OFFLOAD_TIMESTAMP;
return capa;
@@ -1641,6 +1642,12 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
goto fail_offloads;
}
+ if (dev->ptp_en &&
+ dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) {
+ otx2_err(" Both PTP and switch header enabled");
+ goto free_nix_lf;
+ }
+
rc = nix_lf_switch_header_type_enable(dev);
if (rc) {
otx2_err("Failed to enable switch type nix_lf rc=%d", rc);
diff --git a/drivers/net/octeontx2/otx2_ptp.c b/drivers/net/octeontx2/otx2_ptp.c
index f34b9339c..74cb007a0 100644
--- a/drivers/net/octeontx2/otx2_ptp.c
+++ b/drivers/net/octeontx2/otx2_ptp.c
@@ -221,6 +221,11 @@ otx2_nix_timesync_enable(struct rte_eth_dev *eth_dev)
return -EINVAL;
}
+ if (dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) {
+ otx2_err("PTP mode not supported in HIGIG mode");
+ return -EINVAL;
+ }
+
/* Allocating a iova address for tx tstamp */
const struct rte_memzone *ts;
ts = rte_eth_dma_zone_reserve(eth_dev, "otx2_ts",
--
2.17.1
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [dpdk-dev] [PATCH] net/octeontx2: add check for PTP and HIGIG2
2020-01-13 4:24 [dpdk-dev] [PATCH] net/octeontx2: add check for PTP and HIGIG2 kirankumark
@ 2020-01-14 6:49 ` Jerin Jacob
2020-01-14 8:28 ` [dpdk-dev] [PATCH v2] " kirankumark
1 sibling, 0 replies; 5+ messages in thread
From: Jerin Jacob @ 2020-01-14 6:49 UTC (permalink / raw)
To: Kiran Kumar K; +Cc: Jerin Jacob, Nithin Dabilpuram, dpdk-dev
On Mon, Jan 13, 2020 at 9:55 AM <kirankumark@marvell.com> wrote:
>
> From: Kiran Kumar K <kirankumark@marvell.com>
>
> For octeontx2 we won't support both PTP and HIGIG2 together.
> Added a check to verify this.
Since it is a bug fix, Could change to the following or similar and send v2:
net/octeontx2: fix PTP and HIGIG2 coexistence.
octeontx2 PMD does not support both PTP and HIGIG2 together.
added a check to enforce this and updated the Rx offload capabilities when
Higig2 mode enabled.
Fixes: ..
Cc: stable@dpdk.org
>
> Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
> ---
> drivers/net/octeontx2/otx2_ethdev.c | 9 ++++++++-
> drivers/net/octeontx2/otx2_ptp.c | 5 +++++
> 2 files changed, 13 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c
> index ed329273d..b4c68191d 100644
> --- a/drivers/net/octeontx2/otx2_ethdev.c
> +++ b/drivers/net/octeontx2/otx2_ethdev.c
> @@ -18,7 +18,8 @@ nix_get_rx_offload_capa(struct otx2_eth_dev *dev)
> {
> uint64_t capa = NIX_RX_OFFLOAD_CAPA;
>
> - if (otx2_dev_is_vf(dev))
> + if (otx2_dev_is_vf(dev) ||
> + dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG)
> capa &= ~DEV_RX_OFFLOAD_TIMESTAMP;
>
> return capa;
> @@ -1641,6 +1642,12 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
> goto fail_offloads;
> }
>
> + if (dev->ptp_en &&
> + dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) {
> + otx2_err(" Both PTP and switch header enabled");
Please remove the space before "Both.."
I think, we can use the below error message also here.
> + goto free_nix_lf;
> + }
> +
> rc = nix_lf_switch_header_type_enable(dev);
> if (rc) {
> otx2_err("Failed to enable switch type nix_lf rc=%d", rc);
> diff --git a/drivers/net/octeontx2/otx2_ptp.c b/drivers/net/octeontx2/otx2_ptp.c
> index f34b9339c..74cb007a0 100644
> --- a/drivers/net/octeontx2/otx2_ptp.c
> +++ b/drivers/net/octeontx2/otx2_ptp.c
> @@ -221,6 +221,11 @@ otx2_nix_timesync_enable(struct rte_eth_dev *eth_dev)
> return -EINVAL;
> }
>
> + if (dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) {
> + otx2_err("PTP mode not supported in HIGIG mode");
See above.
> + return -EINVAL;
> + }
> +
> /* Allocating a iova address for tx tstamp */
> const struct rte_memzone *ts;
> ts = rte_eth_dma_zone_reserve(eth_dev, "otx2_ts",
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 5+ messages in thread* [dpdk-dev] [PATCH v2] net/octeontx2: add check for PTP and HIGIG2
2020-01-13 4:24 [dpdk-dev] [PATCH] net/octeontx2: add check for PTP and HIGIG2 kirankumark
2020-01-14 6:49 ` Jerin Jacob
@ 2020-01-14 8:28 ` kirankumark
2020-01-14 9:26 ` [dpdk-dev] [PATCH v3] net/octeontx2: fix PTP and HIGIG2 coexistence kirankumark
1 sibling, 1 reply; 5+ messages in thread
From: kirankumark @ 2020-01-14 8:28 UTC (permalink / raw)
To: Jerin Jacob, Nithin Dabilpuram, Kiran Kumar K; +Cc: dev
From: Kiran Kumar K <kirankumark@marvell.com>
For octeontx2 we won't support both PTP and HIGIG2 together.
Added a check to verify this.
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
---
V2 Changes:
*Changed error message
drivers/net/octeontx2/otx2_ethdev.c | 9 ++++++++-
drivers/net/octeontx2/otx2_ptp.c | 5 +++++
2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c
index ed329273d..2e91a5ab7 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -18,7 +18,8 @@ nix_get_rx_offload_capa(struct otx2_eth_dev *dev)
{
uint64_t capa = NIX_RX_OFFLOAD_CAPA;
- if (otx2_dev_is_vf(dev))
+ if (otx2_dev_is_vf(dev) ||
+ dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG)
capa &= ~DEV_RX_OFFLOAD_TIMESTAMP;
return capa;
@@ -1641,6 +1642,12 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
goto fail_offloads;
}
+ if (dev->ptp_en &&
+ dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) {
+ otx2_err("Both PTP and switch header enabled");
+ goto free_nix_lf;
+ }
+
rc = nix_lf_switch_header_type_enable(dev);
if (rc) {
otx2_err("Failed to enable switch type nix_lf rc=%d", rc);
diff --git a/drivers/net/octeontx2/otx2_ptp.c b/drivers/net/octeontx2/otx2_ptp.c
index f34b9339c..ae5a2b7cd 100644
--- a/drivers/net/octeontx2/otx2_ptp.c
+++ b/drivers/net/octeontx2/otx2_ptp.c
@@ -221,6 +221,11 @@ otx2_nix_timesync_enable(struct rte_eth_dev *eth_dev)
return -EINVAL;
}
+ if (dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) {
+ otx2_err("Both PTP and switch header enabled");
+ return -EINVAL;
+ }
+
/* Allocating a iova address for tx tstamp */
const struct rte_memzone *ts;
ts = rte_eth_dma_zone_reserve(eth_dev, "otx2_ts",
--
2.17.1
^ permalink raw reply [flat|nested] 5+ messages in thread* [dpdk-dev] [PATCH v3] net/octeontx2: fix PTP and HIGIG2 coexistence
2020-01-14 8:28 ` [dpdk-dev] [PATCH v2] " kirankumark
@ 2020-01-14 9:26 ` kirankumark
2020-01-14 14:07 ` Jerin Jacob
0 siblings, 1 reply; 5+ messages in thread
From: kirankumark @ 2020-01-14 9:26 UTC (permalink / raw)
To: Jerin Jacob, Nithin Dabilpuram, Kiran Kumar K; +Cc: dev, stable
From: Kiran Kumar K <kirankumark@marvell.com>
octeontx2 PMD does not support both PTP and HIGIG2 together.
added a check to enforce this and updated the Rx offload capabilities when
Higig2 mode enabled
fixes: 602009ee2dfb (net/octeontx2: support HIGIG2)
Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
---
V3 Changes:
* Fixed commit log
V2 Chanhes:
* Fixed error message
drivers/net/octeontx2/otx2_ethdev.c | 9 ++++++++-
drivers/net/octeontx2/otx2_ptp.c | 5 +++++
2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c
index ed329273d..2e91a5ab7 100644
--- a/drivers/net/octeontx2/otx2_ethdev.c
+++ b/drivers/net/octeontx2/otx2_ethdev.c
@@ -18,7 +18,8 @@ nix_get_rx_offload_capa(struct otx2_eth_dev *dev)
{
uint64_t capa = NIX_RX_OFFLOAD_CAPA;
- if (otx2_dev_is_vf(dev))
+ if (otx2_dev_is_vf(dev) ||
+ dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG)
capa &= ~DEV_RX_OFFLOAD_TIMESTAMP;
return capa;
@@ -1641,6 +1642,12 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
goto fail_offloads;
}
+ if (dev->ptp_en &&
+ dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) {
+ otx2_err("Both PTP and switch header enabled");
+ goto free_nix_lf;
+ }
+
rc = nix_lf_switch_header_type_enable(dev);
if (rc) {
otx2_err("Failed to enable switch type nix_lf rc=%d", rc);
diff --git a/drivers/net/octeontx2/otx2_ptp.c b/drivers/net/octeontx2/otx2_ptp.c
index f34b9339c..ae5a2b7cd 100644
--- a/drivers/net/octeontx2/otx2_ptp.c
+++ b/drivers/net/octeontx2/otx2_ptp.c
@@ -221,6 +221,11 @@ otx2_nix_timesync_enable(struct rte_eth_dev *eth_dev)
return -EINVAL;
}
+ if (dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) {
+ otx2_err("Both PTP and switch header enabled");
+ return -EINVAL;
+ }
+
/* Allocating a iova address for tx tstamp */
const struct rte_memzone *ts;
ts = rte_eth_dma_zone_reserve(eth_dev, "otx2_ts",
--
2.17.1
^ permalink raw reply [flat|nested] 5+ messages in thread* Re: [dpdk-dev] [PATCH v3] net/octeontx2: fix PTP and HIGIG2 coexistence
2020-01-14 9:26 ` [dpdk-dev] [PATCH v3] net/octeontx2: fix PTP and HIGIG2 coexistence kirankumark
@ 2020-01-14 14:07 ` Jerin Jacob
0 siblings, 0 replies; 5+ messages in thread
From: Jerin Jacob @ 2020-01-14 14:07 UTC (permalink / raw)
To: Kiran Kumar K, Ferruh Yigit
Cc: Jerin Jacob, Nithin Dabilpuram, dpdk-dev, dpdk stable
On Tue, Jan 14, 2020 at 2:57 PM <kirankumark@marvell.com> wrote:
>
> From: Kiran Kumar K <kirankumark@marvell.com>
>
> octeontx2 PMD does not support both PTP and HIGIG2 together.
> added a check to enforce this and updated the Rx offload capabilities when
> Higig2 mode enabled
>
> fixes: 602009ee2dfb (net/octeontx2: support HIGIG2)
>
> Signed-off-by: Kiran Kumar K <kirankumark@marvell.com>
Acked-by: Jerin Jacob <jerinj@marvell.com>
Fixed the ./devtools/check-git-log.sh issues.
Applied to dpdk-next-net-mrvl/master. Thanks
> ---
> V3 Changes:
> * Fixed commit log
>
> V2 Chanhes:
> * Fixed error message
>
> drivers/net/octeontx2/otx2_ethdev.c | 9 ++++++++-
> drivers/net/octeontx2/otx2_ptp.c | 5 +++++
> 2 files changed, 13 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/net/octeontx2/otx2_ethdev.c b/drivers/net/octeontx2/otx2_ethdev.c
> index ed329273d..2e91a5ab7 100644
> --- a/drivers/net/octeontx2/otx2_ethdev.c
> +++ b/drivers/net/octeontx2/otx2_ethdev.c
> @@ -18,7 +18,8 @@ nix_get_rx_offload_capa(struct otx2_eth_dev *dev)
> {
> uint64_t capa = NIX_RX_OFFLOAD_CAPA;
>
> - if (otx2_dev_is_vf(dev))
> + if (otx2_dev_is_vf(dev) ||
> + dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG)
> capa &= ~DEV_RX_OFFLOAD_TIMESTAMP;
>
> return capa;
> @@ -1641,6 +1642,12 @@ otx2_nix_configure(struct rte_eth_dev *eth_dev)
> goto fail_offloads;
> }
>
> + if (dev->ptp_en &&
> + dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) {
> + otx2_err("Both PTP and switch header enabled");
> + goto free_nix_lf;
> + }
> +
> rc = nix_lf_switch_header_type_enable(dev);
> if (rc) {
> otx2_err("Failed to enable switch type nix_lf rc=%d", rc);
> diff --git a/drivers/net/octeontx2/otx2_ptp.c b/drivers/net/octeontx2/otx2_ptp.c
> index f34b9339c..ae5a2b7cd 100644
> --- a/drivers/net/octeontx2/otx2_ptp.c
> +++ b/drivers/net/octeontx2/otx2_ptp.c
> @@ -221,6 +221,11 @@ otx2_nix_timesync_enable(struct rte_eth_dev *eth_dev)
> return -EINVAL;
> }
>
> + if (dev->npc_flow.switch_header_type == OTX2_PRIV_FLAGS_HIGIG) {
> + otx2_err("Both PTP and switch header enabled");
> + return -EINVAL;
> + }
> +
> /* Allocating a iova address for tx tstamp */
> const struct rte_memzone *ts;
> ts = rte_eth_dma_zone_reserve(eth_dev, "otx2_ts",
> --
> 2.17.1
>
^ permalink raw reply [flat|nested] 5+ messages in thread
end of thread, other threads:[~2020-01-14 14:07 UTC | newest]
Thread overview: 5+ messages (download: mbox.gz / follow: Atom feed)
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2020-01-13 4:24 [dpdk-dev] [PATCH] net/octeontx2: add check for PTP and HIGIG2 kirankumark
2020-01-14 6:49 ` Jerin Jacob
2020-01-14 8:28 ` [dpdk-dev] [PATCH v2] " kirankumark
2020-01-14 9:26 ` [dpdk-dev] [PATCH v3] net/octeontx2: fix PTP and HIGIG2 coexistence kirankumark
2020-01-14 14:07 ` Jerin Jacob
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