From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 51FA7A04B3; Tue, 28 Jan 2020 04:19:27 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 6D2261BFF3; Tue, 28 Jan 2020 04:19:26 +0100 (CET) Received: from mga01.intel.com (mga01.intel.com [192.55.52.88]) by dpdk.org (Postfix) with ESMTP id 846ED1BFEE for ; Tue, 28 Jan 2020 04:19:25 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga001.fm.intel.com ([10.253.24.23]) by fmsmga101.fm.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 27 Jan 2020 19:19:24 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,372,1574150400"; d="scan'208";a="307808619" Received: from msmoczyx-mobl.ger.corp.intel.com ([10.104.121.42]) by fmsmga001.fm.intel.com with ESMTP; 27 Jan 2020 19:19:21 -0800 From: Marcin Smoczynski To: akhil.goyal@nxp.com, konstantin.ananyev@intel.com, roy.fan.zhang@intel.com, declan.doherty@intel.com, radu.nicolau@intel.com, pablo.de.lara.guarch@intel.com Cc: dev@dpdk.org, Marcin Smoczynski Date: Tue, 28 Jan 2020 04:16:34 +0100 Message-Id: <20200128031642.15256-1-marcinx.smoczynski@intel.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20200115182832.17012-1-marcinx.smoczynski@intel.com> References: <20200115182832.17012-1-marcinx.smoczynski@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v4 0/8] Introduce CPU crypto mode X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Originally both SW and HW crypto PMDs use rte_crypot_op based API to process the crypto workload asynchronously. This way provides uniformity to both PMD types, but also introduce unnecessary performance penalty to SW PMDs that have to "simulate" HW async behavior (crypto-ops enqueue/dequeue, HW addresses computations, storing/dereferencing user provided data (mbuf) for each crypto-op, etc). The aim is to introduce a new optional API for SW crypto-devices to perform crypto processing in a synchronous manner. v3 to v4 changes: - add feature discovery in the ipsec example application when using cpu-crypto - add gmac in aesni-gcm - add tests for aesni-gcm/cpu crypto mode - add documentation: pg and rel notes - remove xform flags as no longer needed - add some extra API comments - remove compilation error from v3 Marcin Smoczynski (8): cryptodev: introduce cpu crypto support API crypto/aesni_gcm: cpu crypto support test/crypto: add CPU crypto tests security: add cpu crypto action type ipsec: introduce support for cpu crypto mode examples/ipsec-secgw: cpu crypto support examples/ipsec-secgw: cpu crypto testing doc: add cpu crypto related documentation app/test/Makefile | 1 + app/test/cpu_crypto_all_gcm_perf_test_cases.h | 11 + app/test/cpu_crypto_all_gcm_unit_test_cases.h | 49 + .../cpu_crypto_all_gmac_unit_test_cases.h | 7 + app/test/meson.build | 1 + app/test/test_cryptodev_cpu_crypto.c | 930 ++++++++++++++++++ doc/guides/cryptodevs/aesni_gcm.rst | 5 + doc/guides/prog_guide/cryptodev_lib.rst | 31 + doc/guides/prog_guide/ipsec_lib.rst | 8 + doc/guides/prog_guide/rte_security.rst | 15 +- doc/guides/rel_notes/release_20_02.rst | 8 + drivers/crypto/aesni_gcm/aesni_gcm_ops.h | 9 + drivers/crypto/aesni_gcm/aesni_gcm_pmd.c | 220 ++++- drivers/crypto/aesni_gcm/aesni_gcm_pmd_ops.c | 3 + .../crypto/aesni_gcm/aesni_gcm_pmd_private.h | 11 +- examples/ipsec-secgw/ipsec.c | 23 +- examples/ipsec-secgw/ipsec_process.c | 134 ++- examples/ipsec-secgw/sa.c | 28 +- examples/ipsec-secgw/test/common_defs.sh | 21 + examples/ipsec-secgw/test/linux_test4.sh | 11 +- examples/ipsec-secgw/test/linux_test6.sh | 11 +- .../test/trs_3descbc_sha1_common_defs.sh | 8 +- .../test/trs_aescbc_sha1_common_defs.sh | 8 +- .../test/trs_aesctr_sha1_common_defs.sh | 8 +- .../test/tun_3descbc_sha1_common_defs.sh | 8 +- .../test/tun_aescbc_sha1_common_defs.sh | 8 +- .../test/tun_aesctr_sha1_common_defs.sh | 8 +- lib/librte_cryptodev/rte_crypto_sym.h | 61 ++ lib/librte_cryptodev/rte_cryptodev.c | 33 + lib/librte_cryptodev/rte_cryptodev.h | 20 + lib/librte_cryptodev/rte_cryptodev_pmd.h | 19 + .../rte_cryptodev_version.map | 1 + lib/librte_ipsec/esp_inb.c | 154 ++- lib/librte_ipsec/esp_outb.c | 134 ++- lib/librte_ipsec/misc.h | 118 +++ lib/librte_ipsec/rte_ipsec.h | 18 +- lib/librte_ipsec/sa.c | 112 ++- lib/librte_ipsec/sa.h | 17 + lib/librte_ipsec/ses.c | 3 +- lib/librte_security/rte_security.h | 6 +- 40 files changed, 2119 insertions(+), 162 deletions(-) create mode 100644 app/test/cpu_crypto_all_gcm_perf_test_cases.h create mode 100644 app/test/cpu_crypto_all_gcm_unit_test_cases.h create mode 100644 app/test/cpu_crypto_all_gmac_unit_test_cases.h create mode 100644 app/test/test_cryptodev_cpu_crypto.c -- 2.17.1