From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id EB39EA0524; Thu, 30 Jan 2020 17:23:56 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 4FC8F1C026; Thu, 30 Jan 2020 17:23:56 +0100 (CET) Received: from mx0b-0016f401.pphosted.com (mx0a-0016f401.pphosted.com [67.231.148.174]) by dpdk.org (Postfix) with ESMTP id 0B2E91BFE6 for ; Thu, 30 Jan 2020 17:23:54 +0100 (CET) Received: from pps.filterd (m0045849.ppops.net [127.0.0.1]) by mx0a-0016f401.pphosted.com (8.16.0.42/8.16.0.42) with SMTP id 00UGJu1W008476 for ; Thu, 30 Jan 2020 08:23:54 -0800 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=marvell.com; h=from : to : cc : subject : date : message-id : in-reply-to : references : mime-version : content-type; s=pfpt0818; bh=9OhubTRRB5XE478LfKQW+cu1UUHmAzyZ/hPDoeb+WWE=; b=uFC0XEvyJgftK/JkPi1r8RXaNRcNjk0AhVi8GuvXxvY4Sh5oeQM6PV3bnFTM4uz4Xqng oDF62jVkpkEPp36p3mahpRbDQz1aSKU97sw6AVinLMVnzdzVNCvchoy6rxkRarIL8pZy c4LGlnVIH6lsSZ7ONBwV2Ccr1OtjoNTEgaaEXjlbBEFP7SPoCimGGe6o3IB37HF1vQLR TWPlQKMv5BRCbe8TqFH1x7Y3y+k4K5k64F7JM7eRv8L+zmGniPsVSMd6O+P/ftCU91bk Sp95GsJGns+p7vZrOk0f3DzpJohYTv9fbikGu0KXHG3jHQt7XURmIcJ0YZTHpBNj9BQZ tw== Received: from sc-exch04.marvell.com ([199.233.58.184]) by mx0a-0016f401.pphosted.com with ESMTP id 2xupkhtvd9-1 (version=TLSv1.2 cipher=ECDHE-RSA-AES256-SHA384 bits=256 verify=NOT) for ; Thu, 30 Jan 2020 08:23:54 -0800 Received: from SC-EXCH01.marvell.com (10.93.176.81) by SC-EXCH04.marvell.com (10.93.176.84) with Microsoft SMTP Server (TLS) id 15.0.1497.2; Thu, 30 Jan 2020 08:23:52 -0800 Received: from maili.marvell.com (10.93.176.43) by SC-EXCH01.marvell.com (10.93.176.81) with Microsoft SMTP Server id 15.0.1497.2 via Frontend Transport; Thu, 30 Jan 2020 08:23:52 -0800 Received: from localhost.localdomain (unknown [10.28.34.15]) by maili.marvell.com (Postfix) with ESMTP id AA9EB3F7044; Thu, 30 Jan 2020 08:23:51 -0800 (PST) From: To: Jerin Jacob , Nithin Dabilpuram , Kiran Kumar K CC: Date: Thu, 30 Jan 2020 21:53:24 +0530 Message-ID: <20200130162324.22183-1-kirankumark@marvell.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200130160151.18000-1-kirankumark@marvell.com> References: <20200130160151.18000-1-kirankumark@marvell.com> MIME-Version: 1.0 Content-Type: text/plain X-Proofpoint-Virus-Version: vendor=fsecure engine=2.50.10434:6.0.138, 18.0.572 definitions=2020-01-30_05:2020-01-28, 2020-01-30 signatures=0 Subject: [dpdk-dev] [PATCH v2] net/octeontx2: enable full flow control for HIGIG X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Kiran Kumar K When HIGIG flow control enabled with CGX, We are disabling Tx flow control. Added check to enable the full flow control in HIGIG mode. Signed-off-by: Kiran Kumar K --- V2 changes: * Updated commit log drivers/net/octeontx2/otx2_flow_ctrl.c | 1 + 1 file changed, 1 insertion(+) diff --git a/drivers/net/octeontx2/otx2_flow_ctrl.c b/drivers/net/octeontx2/otx2_flow_ctrl.c index c6d7b1971..1c6929e76 100644 --- a/drivers/net/octeontx2/otx2_flow_ctrl.c +++ b/drivers/net/octeontx2/otx2_flow_ctrl.c @@ -213,6 +213,7 @@ otx2_nix_update_flow_ctrl_mode(struct rte_eth_dev *eth_dev) /* To avoid Link credit deadlock on Ax, disable Tx FC if it's enabled */ if (otx2_dev_is_Ax(dev) && + (dev->npc_flow.switch_header_type != OTX2_PRIV_FLAGS_HIGIG) && (fc_conf.mode == RTE_FC_FULL || fc_conf.mode == RTE_FC_RX_PAUSE)) { fc_conf.mode = (fc_conf.mode == RTE_FC_FULL || -- 2.17.1