From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id C7CC0A0534; Tue, 4 Feb 2020 14:13:07 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id EAE711C12D; Tue, 4 Feb 2020 14:13:06 +0100 (CET) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id 3D563397D for ; Tue, 4 Feb 2020 14:13:05 +0100 (CET) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 04 Feb 2020 05:13:04 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,401,1574150400"; d="scan'208";a="429800365" Received: from msmoczyx-mobl.ger.corp.intel.com ([10.103.102.190]) by fmsmga005.fm.intel.com with ESMTP; 04 Feb 2020 05:13:02 -0800 From: Marcin Smoczynski To: akhil.goyal@nxp.com, konstantin.ananyev@intel.com, roy.fan.zhang@intel.com, declan.doherty@intel.com, radu.nicolau@intel.com, pablo.de.lara.guarch@intel.com Cc: dev@dpdk.org, Marcin Smoczynski Date: Tue, 4 Feb 2020 14:12:50 +0100 Message-Id: <20200204131258.17632-1-marcinx.smoczynski@intel.com> X-Mailer: git-send-email 2.21.0.windows.1 In-Reply-To: <20200128142220.16644-1-marcinx.smoczynski@intel.com> References: <20200128142220.16644-1-marcinx.smoczynski@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v6 0/8] Introduce CPU crypto mode X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Originally both SW and HW crypto PMDs use rte_crypot_op based API to process the crypto workload asynchronously. This way provides uniformity to both PMD types, but also introduce unnecessary performance penalty to SW PMDs that have to "simulate" HW async behavior (crypto-ops enqueue/dequeue, HW addresses computations, storing/dereferencing user provided data (mbuf) for each crypto-op, etc). The aim is to introduce a new optional API for SW crypto-devices to perform crypto processing in a synchronous manner. v3 to v4 changes: - add feature discovery in the ipsec example application when using cpu-crypto - add gmac in aesni-gcm - add tests for aesni-gcm/cpu crypto mode - add documentation: pg and rel notes - remove xform flags as no longer needed - add some extra API comments - remove compilation error from v3 v4 to v5 changes: - fixed build error for arm64 (missing header include) - update licensing information v5 to v6 changes: - unit tests integrated in the current test application for cryptodev - iova fix - moved mbuf to sgl helper function to crypo sym header Marcin Smoczynski (8): cryptodev: introduce cpu crypto support API crypto/aesni_gcm: cpu crypto support security: add cpu crypto action type test/crypto: add cpu crypto mode to tests ipsec: introduce support for cpu crypto mode examples/ipsec-secgw: cpu crypto support examples/ipsec-secgw: cpu crypto testing doc: add release notes for cpu crypto app/test/test_cryptodev.c | 161 ++++++++++++- doc/guides/cryptodevs/aesni_gcm.rst | 7 +- doc/guides/cryptodevs/features/aesni_gcm.ini | 1 + doc/guides/cryptodevs/features/default.ini | 1 + doc/guides/prog_guide/cryptodev_lib.rst | 33 ++- doc/guides/prog_guide/ipsec_lib.rst | 10 +- doc/guides/prog_guide/rte_security.rst | 15 +- doc/guides/rel_notes/release_20_02.rst | 7 + drivers/crypto/aesni_gcm/aesni_gcm_ops.h | 11 +- drivers/crypto/aesni_gcm/aesni_gcm_pmd.c | 222 +++++++++++++++++- drivers/crypto/aesni_gcm/aesni_gcm_pmd_ops.c | 4 +- .../crypto/aesni_gcm/aesni_gcm_pmd_private.h | 13 +- examples/ipsec-secgw/ipsec.c | 25 +- examples/ipsec-secgw/ipsec_process.c | 136 +++++++---- examples/ipsec-secgw/sa.c | 30 ++- examples/ipsec-secgw/test/common_defs.sh | 21 ++ examples/ipsec-secgw/test/linux_test4.sh | 11 +- examples/ipsec-secgw/test/linux_test6.sh | 11 +- .../test/trs_3descbc_sha1_common_defs.sh | 8 +- .../test/trs_aescbc_sha1_common_defs.sh | 8 +- .../test/trs_aesctr_sha1_common_defs.sh | 8 +- .../test/tun_3descbc_sha1_common_defs.sh | 8 +- .../test/tun_aescbc_sha1_common_defs.sh | 8 +- .../test/tun_aesctr_sha1_common_defs.sh | 8 +- lib/librte_cryptodev/rte_crypto_sym.h | 128 +++++++++- lib/librte_cryptodev/rte_cryptodev.c | 35 ++- lib/librte_cryptodev/rte_cryptodev.h | 22 +- lib/librte_cryptodev/rte_cryptodev_pmd.h | 21 +- .../rte_cryptodev_version.map | 1 + lib/librte_ipsec/esp_inb.c | 156 ++++++++++-- lib/librte_ipsec/esp_outb.c | 136 ++++++++++- lib/librte_ipsec/misc.h | 73 +++++- lib/librte_ipsec/rte_ipsec.h | 20 +- lib/librte_ipsec/sa.c | 114 +++++++-- lib/librte_ipsec/sa.h | 19 +- lib/librte_ipsec/ses.c | 5 +- lib/librte_security/rte_security.h | 8 +- 37 files changed, 1311 insertions(+), 194 deletions(-) -- 2.17.1