From: taox.zhu@intel.com
To: qiming.yang@intel.com, wenzhuo.lu@intel.com
Cc: dev@dpdk.org, beilei.xing@intel.com, qi.z.zhang@intel.com,
xiaolong.ye@intel.com, Zhu Tao <taox.zhu@intel.com>,
stable@dpdk.org
Subject: [dpdk-dev] [PATCH] net/ice: fix queue bind MSI-X interrupt error
Date: Wed, 19 Feb 2020 18:17:12 +0800 [thread overview]
Message-ID: <20200219101712.9525-1-taox.zhu@intel.com> (raw)
From: Zhu Tao <taox.zhu@intel.com>
To bind a queue to an MSI-X interrupt, need to set some register.
The register consists of many parts, each of which has several
bits; therefore, the shift operator '<<' was used; so the operator
'<' in the code should be '<<'.
Old code adds 1 on even MSI-X interrupt vector index used by queue,
resulting in interrupt mapping error.
Fixes: 65dfc889d8 ("net/ice: support Rx queue interruption")
Cc: stable@dpdk.org
Signed-off-by: Zhu Tao <taox.zhu@intel.com>
---
drivers/net/ice/ice_ethdev.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/net/ice/ice_ethdev.c b/drivers/net/ice/ice_ethdev.c
index 8e9369e0a..85ef83e92 100644
--- a/drivers/net/ice/ice_ethdev.c
+++ b/drivers/net/ice/ice_ethdev.c
@@ -2605,9 +2605,9 @@ __vsi_queues_bind_intr(struct ice_vsi *vsi, uint16_t msix_vect,
for (i = 0; i < nb_queue; i++) {
/*do actual bind*/
val = (msix_vect & QINT_RQCTL_MSIX_INDX_M) |
- (0 < QINT_RQCTL_ITR_INDX_S) | QINT_RQCTL_CAUSE_ENA_M;
+ (0 << QINT_RQCTL_ITR_INDX_S) | QINT_RQCTL_CAUSE_ENA_M;
val_tx = (msix_vect & QINT_TQCTL_MSIX_INDX_M) |
- (0 < QINT_TQCTL_ITR_INDX_S) | QINT_TQCTL_CAUSE_ENA_M;
+ (0 << QINT_TQCTL_ITR_INDX_S) | QINT_TQCTL_CAUSE_ENA_M;
PMD_DRV_LOG(INFO, "queue %d is binding to vect %d",
base_queue + i, msix_vect);
--
2.17.1
next reply other threads:[~2020-02-19 10:31 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-19 10:17 taox.zhu [this message]
2020-02-20 6:11 ` Ye Xiaolong
2020-02-20 9:20 ` Ferruh Yigit
2020-02-20 9:43 ` Zhu, TaoX
2020-02-20 10:45 ` Ferruh Yigit
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