From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9A84FA0555; Wed, 19 Feb 2020 16:29:33 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 515911B951; Wed, 19 Feb 2020 16:29:33 +0100 (CET) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id D30FDB62; Wed, 19 Feb 2020 16:29:31 +0100 (CET) X-Amp-Result: UNKNOWN X-Amp-Original-Verdict: FILE UNKNOWN X-Amp-File-Uploaded: False Received: from orsmga008.jf.intel.com ([10.7.209.65]) by orsmga105.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 19 Feb 2020 07:29:30 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,459,1574150400"; d="scan'208";a="229141456" Received: from yexl-server.sh.intel.com (HELO localhost) ([10.67.117.17]) by orsmga008.jf.intel.com with ESMTP; 19 Feb 2020 07:29:28 -0800 Date: Wed, 19 Feb 2020 23:27:50 +0800 From: Ye Xiaolong To: "Konieczny, TomaszX" Cc: "Sun, GuinanX" , "dev@dpdk.org" , "Lu, Wenzhuo" , "Yang, Qiming" , "Zhang, Qi Z" , "stable@dpdk.org" Message-ID: <20200219152750.GB36983@intel.com> References: <20191219044356.30762-1-guinanx.sun@intel.com> <20200218033931.81821-1-guinanx.sun@intel.com> <20200219070615.GA36983@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.4 (2018-02-28) Subject: Re: [dpdk-dev] [PATCH v4] net/ixgbe: fix flow ctrl mode setting X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On 02/19, Konieczny, TomaszX wrote: >>-----Original Message----- >>From: dev On Behalf Of Ye Xiaolong >>Sent: 19 February 2020 08:06 >>To: Sun, GuinanX >>Cc: dev@dpdk.org; Lu, Wenzhuo ; Yang, Qiming >>; Zhang, Qi Z ; stable@dpdk.org >>Subject: Re: [dpdk-dev] [PATCH v4] net/ixgbe: fix flow ctrl mode setting >> >>On 02/18, Guinan Sun wrote: >>>When the port starts, the hw register is reset first, and then the >>>required parameters are set again. >>>If the parameters to be used are not set after resetting the register, >>>a read register error will occur. This patch is used to fix the problem. >>> >>>Fixes: af75078fece3 ("first public release") >>>Cc: stable@dpdk.org >>> >>>Signed-off-by: Guinan Sun >>> >> >>Reviewed-by: Xiaolong Ye >> >>Applied to dpdk-next-net-intel, Thanks. > >This should be backported to 19.11 and 18.11 Sure, this patch has added "Cc: stable@dpdk.org", so the LTS maintainer would backport them to 19.11 and 18.11. Thanks, Xiaolong > >Regards >Tomasz Konieczny >--------------------------------------------------------------------- >Intel Corporation (UK) Ltd. >Co. Reg. #1134945 >Pipers Way, Swindon SN3 1RJ >