From: Nagadheeraj Rottela <rnagadheeraj@marvell.com>
To: <thomas@monjalon.net>, <akhil.goyal@nxp.com>
Cc: <dev@dpdk.org>, <jsrikanth@marvell.com>,
Nagadheeraj Rottela <rnagadheeraj@marvell.com>
Subject: [dpdk-dev] [PATCH v2 1/2] crypto/nitrox: fix invalid CSR register address generation
Date: Tue, 25 Feb 2020 15:16:41 +0530 [thread overview]
Message-ID: <20200225094642.29239-1-rnagadheeraj@marvell.com> (raw)
In-Reply-To: <20200220110431.30074-1-rnagadheeraj@marvell.com>
If the NPS_PKT ring/port is greater than 8191 the NPS_PKT*() macros will
evaluate to incorrect values due to unintended sign extension from int
to unsigned long. To fix this, add UL suffix to the constants in these
macros.
Coverity issue: 349899, 349905, 349911, 349921, 349923
Fixes: 32e4930d5a3b ("crypto/nitrox: add hardware queue management")
Signed-off-by: Nagadheeraj Rottela <rnagadheeraj@marvell.com>
---
drivers/crypto/nitrox/nitrox_csr.h | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/drivers/crypto/nitrox/nitrox_csr.h b/drivers/crypto/nitrox/nitrox_csr.h
index 8cd92e38b..b4c969b26 100644
--- a/drivers/crypto/nitrox/nitrox_csr.h
+++ b/drivers/crypto/nitrox/nitrox_csr.h
@@ -12,15 +12,15 @@
#define NITROX_CSR_ADDR(bar_addr, offset) (bar_addr + (offset))
/* NPS packet registers */
-#define NPS_PKT_IN_INSTR_CTLX(_i) (0x10060 + ((_i) * 0x40000))
-#define NPS_PKT_IN_INSTR_BADDRX(_i) (0x10068 + ((_i) * 0x40000))
-#define NPS_PKT_IN_INSTR_RSIZEX(_i) (0x10070 + ((_i) * 0x40000))
-#define NPS_PKT_IN_DONE_CNTSX(_i) (0x10080 + ((_i) * 0x40000))
-#define NPS_PKT_IN_INSTR_BAOFF_DBELLX(_i) (0x10078 + ((_i) * 0x40000))
-#define NPS_PKT_IN_INT_LEVELSX(_i) (0x10088 + ((_i) * 0x40000))
-#define NPS_PKT_SLC_CTLX(_i) (0x10000 + ((_i) * 0x40000))
-#define NPS_PKT_SLC_CNTSX(_i) (0x10008 + ((_i) * 0x40000))
-#define NPS_PKT_SLC_INT_LEVELSX(_i) (0x10010 + ((_i) * 0x40000))
+#define NPS_PKT_IN_INSTR_CTLX(_i) (0x10060UL + ((_i) * 0x40000UL))
+#define NPS_PKT_IN_INSTR_BADDRX(_i) (0x10068UL + ((_i) * 0x40000UL))
+#define NPS_PKT_IN_INSTR_RSIZEX(_i) (0x10070UL + ((_i) * 0x40000UL))
+#define NPS_PKT_IN_DONE_CNTSX(_i) (0x10080UL + ((_i) * 0x40000UL))
+#define NPS_PKT_IN_INSTR_BAOFF_DBELLX(_i) (0x10078UL + ((_i) * 0x40000UL))
+#define NPS_PKT_IN_INT_LEVELSX(_i) (0x10088UL + ((_i) * 0x40000UL))
+#define NPS_PKT_SLC_CTLX(_i) (0x10000UL + ((_i) * 0x40000UL))
+#define NPS_PKT_SLC_CNTSX(_i) (0x10008UL + ((_i) * 0x40000UL))
+#define NPS_PKT_SLC_INT_LEVELSX(_i) (0x10010UL + ((_i) * 0x40000UL))
/* AQM Virtual Function Registers */
#define AQMQ_QSZX(_i) (0x20008 + ((_i)*0x40000))
--
2.13.6
next prev parent reply other threads:[~2020-02-25 9:46 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-02-20 11:04 [dpdk-dev] [PATCH] crypto/nitrox: fix coverity defects Nagadheeraj Rottela
2020-02-20 11:07 ` Akhil Goyal
2020-02-20 11:51 ` Thomas Monjalon
2020-02-25 9:46 ` Nagadheeraj Rottela [this message]
2020-02-25 9:46 ` [dpdk-dev] [PATCH v2 2/2] crypto/nitrox: fix array out of bounds access Nagadheeraj Rottela
2020-03-25 9:10 ` [dpdk-dev] [PATCH v2 1/2] crypto/nitrox: fix invalid CSR register address generation Akhil Goyal
2020-03-27 13:42 ` [dpdk-dev] [PATCH v3 " Nagadheeraj Rottela
2020-03-27 13:42 ` [dpdk-dev] [PATCH v3 2/2] crypto/nitrox: fix array out of bounds access Nagadheeraj Rottela
2020-04-05 16:55 ` Akhil Goyal
2020-04-05 16:54 ` [dpdk-dev] [PATCH v3 1/2] crypto/nitrox: fix invalid CSR register address generation Akhil Goyal
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