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X-Microsoft-Antispam-Message-Info: vBw14WTDSsuQNwCupk8UhjEa76s1n42/hhzbgiCFknyocGbx8UaBPvwv3ROpdi9mmt8PjZajzSna7Bwq0qJiWrXbYOySPuvSRtGViv/IM2mZ8db41vMnCpxU1F0Z/i5uo2ypjwDir1/H+aPCzRF2ApQeuvxLMSBbgKmzyHTmeoZkPszPeaNG0O86DexPLzpZp3v+RGDMrkhk38xR0uy27vuAw1Lbz7rpw2ooUFTmjzgRt3GXl/h4sg2hO4uX3+luo7HfYax6l7s06k/xPS2c6f4Ly5qmhxQFpRcbRMFMXKGgCjB0hqQbbloK98QipS/Qlox+IrjKFguR9A7QYWwxKIykiXD9iIddVssA5uXFtM8fcQQZlHiO+6LqZOmXE/YMIyiVWLKW0fsVPAphmC10jWTEocngnpE0ZEVEQ3RWVkqspfpr5SSzTIQII2Yh4iL9 X-MS-Exchange-AntiSpam-MessageData: /8yHS0Z3GP8o+iZJjtLJQqJjkYxw2eyUfssqAkd4OiMDcSGdkSIWLTEIQeqwK+bqWhNTFX5WTsphWl6VbG2ffy8h13th0AkSg0HQvKdDdGeCDSfi9i1bYW0QEWo+LM83IGdo5w4t1DK5KPH3Ui5/0A== X-OriginatorOrg: amd.com X-MS-Exchange-CrossTenant-Network-Message-Id: 5a6ec156-ab65-4633-2357-08d7bc3b68f7 X-MS-Exchange-CrossTenant-OriginalArrivalTime: 28 Feb 2020 10:46:04.8462 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: 3dd8961f-e488-4e60-8e11-a82d994e183d X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: 8fvWi6XO8iEi/glIXIhvvzHCToduPeJNhz0/YV4b0oIt+gxHu1VmakrTmq7FPwub5nn2HYDn3y5r6H0F6P4xmQ== X-MS-Exchange-Transport-CrossTenantHeadersStamped: CY4PR1201MB0040 Subject: [dpdk-dev] [PATCH v1 3/3] net/axgbe: support for rxq and txq descriptor status API X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Amaranath Somalapuram Adding API axgbe_dev_rx_descriptor_status, axgbe_dev_tx_descriptor_status Signed-off-by: Amaranath Somalapuram --- drivers/net/axgbe/axgbe_ethdev.c | 2 ++ drivers/net/axgbe/axgbe_rxtx.c | 46 ++++++++++++++++++++++++++++++++ drivers/net/axgbe/axgbe_rxtx.h | 2 ++ 3 files changed, 50 insertions(+) diff --git a/drivers/net/axgbe/axgbe_ethdev.c b/drivers/net/axgbe/axgbe_ethdev.c index 70b198f79..58facee6a 100644 --- a/drivers/net/axgbe/axgbe_ethdev.c +++ b/drivers/net/axgbe/axgbe_ethdev.c @@ -178,6 +178,8 @@ static const struct eth_dev_ops axgbe_eth_dev_ops = { .rxq_info_get = axgbe_rxq_info_get, .txq_info_get = axgbe_txq_info_get, .dev_supported_ptypes_get = axgbe_dev_supported_ptypes_get, + .rx_descriptor_status = axgbe_dev_rx_descriptor_status, + .tx_descriptor_status = axgbe_dev_tx_descriptor_status, }; static int axgbe_phy_reset(struct axgbe_port *pdata) diff --git a/drivers/net/axgbe/axgbe_rxtx.c b/drivers/net/axgbe/axgbe_rxtx.c index 96055c25b..cd02bc044 100644 --- a/drivers/net/axgbe/axgbe_rxtx.c +++ b/drivers/net/axgbe/axgbe_rxtx.c @@ -673,3 +673,49 @@ void axgbe_dev_clear_queues(struct rte_eth_dev *dev) } } } + +int +axgbe_dev_rx_descriptor_status(void *rx_queue, uint16_t offset) +{ + struct axgbe_rx_queue *rxq = rx_queue; + volatile union axgbe_rx_desc *desc; + uint16_t idx; + + + if (unlikely(offset >= rxq->nb_desc)) + return -EINVAL; + + if (offset >= rxq->nb_desc - rxq->dirty) + return RTE_ETH_RX_DESC_UNAVAIL; + + idx = AXGBE_GET_DESC_IDX(rxq, rxq->cur); + desc = &rxq->desc[idx + offset]; + + if (!AXGMAC_GET_BITS_LE(desc->write.desc3, RX_NORMAL_DESC3, OWN)) + return RTE_ETH_RX_DESC_DONE; + + return RTE_ETH_RX_DESC_AVAIL; +} + +int +axgbe_dev_tx_descriptor_status(void *tx_queue, uint16_t offset) +{ + struct axgbe_tx_queue *txq = tx_queue; + volatile struct axgbe_tx_desc *desc; + uint16_t idx; + + + if (unlikely(offset >= txq->nb_desc)) + return -EINVAL; + + if (offset >= txq->nb_desc - txq->dirty) + return RTE_ETH_TX_DESC_UNAVAIL; + + idx = AXGBE_GET_DESC_IDX(txq, txq->dirty + txq->free_batch_cnt - 1); + desc = &txq->desc[idx + offset]; + + if (!AXGMAC_GET_BITS_LE(desc->desc3, TX_NORMAL_DESC3, OWN)) + return RTE_ETH_TX_DESC_DONE; + + return RTE_ETH_TX_DESC_FULL; +} diff --git a/drivers/net/axgbe/axgbe_rxtx.h b/drivers/net/axgbe/axgbe_rxtx.h index a21537df9..933312078 100644 --- a/drivers/net/axgbe/axgbe_rxtx.h +++ b/drivers/net/axgbe/axgbe_rxtx.h @@ -183,5 +183,7 @@ uint16_t axgbe_recv_pkts_threshold_refresh(void *rx_queue, struct rte_mbuf **rx_pkts, uint16_t nb_pkts); void axgbe_dev_clear_queues(struct rte_eth_dev *dev); +int axgbe_dev_rx_descriptor_status(void *rx_queue, uint16_t offset); +int axgbe_dev_tx_descriptor_status(void *tx_queue, uint16_t offset); #endif /* _AXGBE_RXTX_H_ */ -- 2.17.1