From: Ferruh Yigit <ferruh.yigit@intel.com>
To: Thomas Monjalon <thomas@monjalon.net>
Cc: dev@dpdk.org, Ferruh Yigit <ferruh.yigit@intel.com>,
David Marchand <david.marchand@redhat.com>
Subject: [dpdk-dev] [PATCH] devtools: add more headline case rules
Date: Thu, 5 Mar 2020 14:55:33 +0000 [thread overview]
Message-ID: <20200305145533.1363013-1-ferruh.yigit@intel.com> (raw)
BAR -> Base Address Register
FDIR -> Flow Director
GENEVE -> Generic Network Virtualization Encapsulation
IO -> Input/Output
MPLS -> Multiprotocol Label Switching
NEON
null
NVGRE -> Network Virtualization using Generic Routing Encapsulation
OOB -> Out Of Bounds
RDMA -> Remote Direct Memory Access
TC -> Traffic Class
VFIO -> Virtual Function I/O
VXLAN -> Virtual Extensible LAN
XDP -> eXpress Data Path
Signed-off-by: Ferruh Yigit <ferruh.yigit@intel.com>
---
devtools/words-case.txt | 14 ++++++++++++++
1 file changed, 14 insertions(+)
diff --git a/devtools/words-case.txt b/devtools/words-case.txt
index 6bfb81985..126f2c86a 100644
--- a/devtools/words-case.txt
+++ b/devtools/words-case.txt
@@ -4,13 +4,17 @@ API
Arm
armv7
armv8
+BAR
CRC
DCB
DMA
EEPROM
+FDIR
FreeBSD
FW
+GENEVE
HW
+IO
IOVA
L2
L3
@@ -20,20 +24,27 @@ Linux
LRO
LSC
MAC
+MPLS
MSS
MTU
+NEON
NIC
NUMA
+null
+NVGRE
NVM
+OOB
PCI
PF
PHY
PMD
+RDMA
RETA
RSS
Rx
SCTP
SW
+TC
TOS
TPID
TSO
@@ -42,6 +53,9 @@ Tx
UDP
vDPA
VF
+VFIO
VLAN
VMDq
VSI
+VXLAN
+XDP
--
2.24.1
next reply other threads:[~2020-03-05 14:55 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-05 14:55 Ferruh Yigit [this message]
2020-03-05 15:08 ` Andrew Rybchenko
2020-03-05 15:39 ` Ferruh Yigit
2020-03-05 15:42 ` Andrew Rybchenko
2020-03-05 15:11 ` Thomas Monjalon
2020-03-05 16:06 ` Ferruh Yigit
2020-03-05 16:35 ` Thomas Monjalon
2020-03-05 17:43 ` Ferruh Yigit
2020-03-06 14:32 ` [dpdk-dev] [PATCH v2] " Ferruh Yigit
2020-03-06 18:44 ` Thomas Monjalon
2020-05-20 10:25 [dpdk-dev] [PATCH] " Ferruh Yigit
2020-05-24 21:01 ` Thomas Monjalon
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