From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 42AA3A052E; Mon, 9 Mar 2020 10:55:14 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 658A41C0D9; Mon, 9 Mar 2020 10:54:54 +0100 (CET) Received: from foss.arm.com (foss.arm.com [217.140.110.172]) by dpdk.org (Postfix) with ESMTP id 588FE1C0D9 for ; Mon, 9 Mar 2020 10:54:53 +0100 (CET) Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.121.207.14]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id C4D257FA; Mon, 9 Mar 2020 02:54:52 -0700 (PDT) Received: from net-arm-thunderx2-03.shanghai.arm.com (net-arm-thunderx2-03.shanghai.arm.com [10.169.41.185]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 943673F67D; Mon, 9 Mar 2020 02:54:47 -0700 (PDT) From: Joyce Kong To: thomas@monjalon.net, stephen@networkplumber.org, david.marchand@redhat.com, mb@smartsharesystems.com, jerinj@marvell.com, bruce.richardson@intel.com, ravi1.kumar@amd.com, rmody@marvell.com, shshaikh@marvell.com, xuanziyang2@huawei.com, cloud.wangxiaoyun@huawei.com, zhouguoyang@huawei.com, honnappa.nagarahalli@arm.com, phil.yang@arm.com, gavin.hu@arm.com Cc: nd@arm.com, dev@dpdk.org Date: Mon, 9 Mar 2020 17:54:08 +0800 Message-Id: <20200309095410.28983-5-joyce.kong@arm.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200309095410.28983-1-joyce.kong@arm.com> References: <20200309095410.28983-1-joyce.kong@arm.com> In-Reply-To: <1571125801-45773-1-git-send-email-joyce.kong@arm.com> References: <1571125801-45773-1-git-send-email-joyce.kong@arm.com> Subject: [dpdk-dev] [PATCH v7 4/6] net/bnx2x: use common rte bit operation APIs instead X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Remove its own bit operation APIs and use the common one, this can reduce the code duplication largely. Signed-off-by: Joyce Kong Reviewed-by: Gavin Hu --- drivers/net/bnx2x/bnx2x.c | 253 +++++++++++++++++------------------ drivers/net/bnx2x/bnx2x.h | 10 +- drivers/net/bnx2x/ecore_sp.h | 48 +++---- 3 files changed, 150 insertions(+), 161 deletions(-) diff --git a/drivers/net/bnx2x/bnx2x.c b/drivers/net/bnx2x/bnx2x.c index 0b4030e2b..2ea23b2eb 100644 --- a/drivers/net/bnx2x/bnx2x.c +++ b/drivers/net/bnx2x/bnx2x.c @@ -25,6 +25,7 @@ #include #include #include +#include #include #define BNX2X_PMD_VER_PREFIX "BNX2X PMD" @@ -129,32 +130,6 @@ static void bnx2x_ack_sb(struct bnx2x_softc *sc, uint8_t igu_sb_id, uint8_t storm, uint16_t index, uint8_t op, uint8_t update); -int bnx2x_test_bit(int nr, volatile unsigned long *addr) -{ - int res; - - mb(); - res = ((*addr) & (1UL << nr)) != 0; - mb(); - return res; -} - -void bnx2x_set_bit(unsigned int nr, volatile unsigned long *addr) -{ - __sync_fetch_and_or(addr, (1UL << nr)); -} - -void bnx2x_clear_bit(int nr, volatile unsigned long *addr) -{ - __sync_fetch_and_and(addr, ~(1UL << nr)); -} - -int bnx2x_test_and_clear_bit(int nr, volatile unsigned long *addr) -{ - unsigned long mask = (1UL << nr); - return __sync_fetch_and_and(addr, ~mask) & mask; -} - int bnx2x_cmpxchg(volatile int *addr, int old, int new) { return __sync_val_compare_and_swap(addr, old, new); @@ -1434,16 +1409,16 @@ static int bnx2x_del_all_macs(struct bnx2x_softc *sc, struct ecore_vlan_mac_obj *mac_obj, int mac_type, uint8_t wait_for_comp) { - unsigned long ramrod_flags = 0, vlan_mac_flags = 0; + uint32_t ramrod_flags = 0, vlan_mac_flags = 0; int rc; /* wait for completion of requested */ if (wait_for_comp) { - bnx2x_set_bit(RAMROD_COMP_WAIT, &ramrod_flags); + rte_set_bit32_relaxed(RAMROD_COMP_WAIT, &ramrod_flags); } /* Set the mac type of addresses we want to clear */ - bnx2x_set_bit(mac_type, &vlan_mac_flags); + rte_set_bit32_relaxed(mac_type, &vlan_mac_flags); rc = mac_obj->delete_all(sc, mac_obj, &vlan_mac_flags, &ramrod_flags); if (rc < 0) @@ -1454,8 +1429,7 @@ bnx2x_del_all_macs(struct bnx2x_softc *sc, struct ecore_vlan_mac_obj *mac_obj, static int bnx2x_fill_accept_flags(struct bnx2x_softc *sc, uint32_t rx_mode, - unsigned long *rx_accept_flags, - unsigned long *tx_accept_flags) + uint32_t *rx_accept_flags, uint32_t *tx_accept_flags) { /* Clear the flags first */ *rx_accept_flags = 0; @@ -1470,26 +1444,28 @@ bnx2x_fill_accept_flags(struct bnx2x_softc *sc, uint32_t rx_mode, break; case BNX2X_RX_MODE_NORMAL: - bnx2x_set_bit(ECORE_ACCEPT_UNICAST, rx_accept_flags); - bnx2x_set_bit(ECORE_ACCEPT_MULTICAST, rx_accept_flags); - bnx2x_set_bit(ECORE_ACCEPT_BROADCAST, rx_accept_flags); + rte_set_bit32_relaxed(ECORE_ACCEPT_UNICAST, rx_accept_flags); + rte_set_bit32_relaxed(ECORE_ACCEPT_MULTICAST, rx_accept_flags); + rte_set_bit32_relaxed(ECORE_ACCEPT_BROADCAST, rx_accept_flags); /* internal switching mode */ - bnx2x_set_bit(ECORE_ACCEPT_UNICAST, tx_accept_flags); - bnx2x_set_bit(ECORE_ACCEPT_MULTICAST, tx_accept_flags); - bnx2x_set_bit(ECORE_ACCEPT_BROADCAST, tx_accept_flags); + rte_set_bit32_relaxed(ECORE_ACCEPT_UNICAST, tx_accept_flags); + rte_set_bit32_relaxed(ECORE_ACCEPT_MULTICAST, tx_accept_flags); + rte_set_bit32_relaxed(ECORE_ACCEPT_BROADCAST, tx_accept_flags); break; case BNX2X_RX_MODE_ALLMULTI: - bnx2x_set_bit(ECORE_ACCEPT_UNICAST, rx_accept_flags); - bnx2x_set_bit(ECORE_ACCEPT_ALL_MULTICAST, rx_accept_flags); - bnx2x_set_bit(ECORE_ACCEPT_BROADCAST, rx_accept_flags); + rte_set_bit32_relaxed(ECORE_ACCEPT_UNICAST, rx_accept_flags); + rte_set_bit32_relaxed(ECORE_ACCEPT_ALL_MULTICAST, + rx_accept_flags); + rte_set_bit32_relaxed(ECORE_ACCEPT_BROADCAST, rx_accept_flags); /* internal switching mode */ - bnx2x_set_bit(ECORE_ACCEPT_UNICAST, tx_accept_flags); - bnx2x_set_bit(ECORE_ACCEPT_ALL_MULTICAST, tx_accept_flags); - bnx2x_set_bit(ECORE_ACCEPT_BROADCAST, tx_accept_flags); + rte_set_bit32_relaxed(ECORE_ACCEPT_UNICAST, tx_accept_flags); + rte_set_bit32_relaxed(ECORE_ACCEPT_ALL_MULTICAST, + tx_accept_flags); + rte_set_bit32_relaxed(ECORE_ACCEPT_BROADCAST, tx_accept_flags); break; @@ -1500,19 +1476,23 @@ bnx2x_fill_accept_flags(struct bnx2x_softc *sc, uint32_t rx_mode, * should receive matched and unmatched (in resolution of port) * unicast packets. */ - bnx2x_set_bit(ECORE_ACCEPT_UNMATCHED, rx_accept_flags); - bnx2x_set_bit(ECORE_ACCEPT_UNICAST, rx_accept_flags); - bnx2x_set_bit(ECORE_ACCEPT_ALL_MULTICAST, rx_accept_flags); - bnx2x_set_bit(ECORE_ACCEPT_BROADCAST, rx_accept_flags); + rte_set_bit32_relaxed(ECORE_ACCEPT_UNMATCHED, rx_accept_flags); + rte_set_bit32_relaxed(ECORE_ACCEPT_UNICAST, rx_accept_flags); + rte_set_bit32_relaxed(ECORE_ACCEPT_ALL_MULTICAST, + rx_accept_flags); + rte_set_bit32_relaxed(ECORE_ACCEPT_BROADCAST, rx_accept_flags); /* internal switching mode */ - bnx2x_set_bit(ECORE_ACCEPT_ALL_MULTICAST, tx_accept_flags); - bnx2x_set_bit(ECORE_ACCEPT_BROADCAST, tx_accept_flags); + rte_set_bit32_relaxed(ECORE_ACCEPT_ALL_MULTICAST, + tx_accept_flags); + rte_set_bit32_relaxed(ECORE_ACCEPT_BROADCAST, tx_accept_flags); if (IS_MF_SI(sc)) { - bnx2x_set_bit(ECORE_ACCEPT_ALL_UNICAST, tx_accept_flags); + rte_set_bit32_relaxed(ECORE_ACCEPT_ALL_UNICAST, + tx_accept_flags); } else { - bnx2x_set_bit(ECORE_ACCEPT_UNICAST, tx_accept_flags); + rte_set_bit32_relaxed(ECORE_ACCEPT_UNICAST, + tx_accept_flags); } break; @@ -1524,8 +1504,8 @@ bnx2x_fill_accept_flags(struct bnx2x_softc *sc, uint32_t rx_mode, /* Set ACCEPT_ANY_VLAN as we do not enable filtering by VLAN */ if (rx_mode != BNX2X_RX_MODE_NONE) { - bnx2x_set_bit(ECORE_ACCEPT_ANY_VLAN, rx_accept_flags); - bnx2x_set_bit(ECORE_ACCEPT_ANY_VLAN, tx_accept_flags); + rte_set_bit32_relaxed(ECORE_ACCEPT_ANY_VLAN, rx_accept_flags); + rte_set_bit32_relaxed(ECORE_ACCEPT_ANY_VLAN, tx_accept_flags); } return 0; @@ -1554,7 +1534,7 @@ bnx2x_set_q_rx_mode(struct bnx2x_softc *sc, uint8_t cl_id, ramrod_param.rdata = BNX2X_SP(sc, rx_mode_rdata); ramrod_param.rdata_mapping = (rte_iova_t)BNX2X_SP_MAPPING(sc, rx_mode_rdata), - bnx2x_set_bit(ECORE_FILTER_RX_MODE_PENDING, &sc->sp_state); + rte_set_bit32_relaxed(ECORE_FILTER_RX_MODE_PENDING, &sc->sp_state); ramrod_param.ramrod_flags = ramrod_flags; ramrod_param.rx_mode_flags = rx_mode_flags; @@ -1573,8 +1553,8 @@ bnx2x_set_q_rx_mode(struct bnx2x_softc *sc, uint8_t cl_id, int bnx2x_set_storm_rx_mode(struct bnx2x_softc *sc) { - unsigned long rx_mode_flags = 0, ramrod_flags = 0; - unsigned long rx_accept_flags = 0, tx_accept_flags = 0; + uint32_t rx_mode_flags = 0, ramrod_flags = 0; + uint32_t rx_accept_flags = 0, tx_accept_flags = 0; int rc; rc = bnx2x_fill_accept_flags(sc, sc->rx_mode, &rx_accept_flags, @@ -1583,9 +1563,9 @@ int bnx2x_set_storm_rx_mode(struct bnx2x_softc *sc) return rc; } - bnx2x_set_bit(RAMROD_RX, &ramrod_flags); - bnx2x_set_bit(RAMROD_TX, &ramrod_flags); - bnx2x_set_bit(RAMROD_COMP_WAIT, &ramrod_flags); + rte_set_bit32_relaxed(RAMROD_RX, &ramrod_flags); + rte_set_bit32_relaxed(RAMROD_TX, &ramrod_flags); + rte_set_bit32_relaxed(RAMROD_COMP_WAIT, &ramrod_flags); return bnx2x_set_q_rx_mode(sc, sc->fp[0].cl_id, rx_mode_flags, rx_accept_flags, tx_accept_flags, @@ -1710,7 +1690,8 @@ static int bnx2x_func_wait_started(struct bnx2x_softc *sc) "Forcing STARTED-->TX_STOPPED-->STARTED"); func_params.f_obj = &sc->func_obj; - bnx2x_set_bit(RAMROD_DRV_CLR_ONLY, &func_params.ramrod_flags); + rte_set_bit32_relaxed(RAMROD_DRV_CLR_ONLY, + &func_params.ramrod_flags); /* STARTED-->TX_STOPPED */ func_params.cmd = ECORE_F_CMD_TX_STOP; @@ -1734,7 +1715,7 @@ static int bnx2x_stop_queue(struct bnx2x_softc *sc, int index) q_params.q_obj = &sc->sp_objs[fp->index].q_obj; /* We want to wait for completion in this context */ - bnx2x_set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags); + rte_set_bit32_relaxed(RAMROD_COMP_WAIT, &q_params.ramrod_flags); /* Stop the primary connection: */ @@ -1795,7 +1776,7 @@ static int bnx2x_func_stop(struct bnx2x_softc *sc) int rc; /* prepare parameters for function state transitions */ - bnx2x_set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags); + rte_set_bit32_relaxed(RAMROD_COMP_WAIT, &func_params.ramrod_flags); func_params.f_obj = &sc->func_obj; func_params.cmd = ECORE_F_CMD_STOP; @@ -1809,7 +1790,8 @@ static int bnx2x_func_stop(struct bnx2x_softc *sc) if (rc) { PMD_DRV_LOG(NOTICE, sc, "FUNC_STOP ramrod failed. " "Running a dry transaction"); - bnx2x_set_bit(RAMROD_DRV_CLR_ONLY, &func_params.ramrod_flags); + rte_set_bit32_relaxed(RAMROD_DRV_CLR_ONLY, + &func_params.ramrod_flags); return ecore_func_state_change(sc, &func_params); } @@ -1821,7 +1803,7 @@ static int bnx2x_reset_hw(struct bnx2x_softc *sc, uint32_t load_code) struct ecore_func_state_params func_params = { NULL }; /* Prepare parameters for function state transitions */ - bnx2x_set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags); + rte_set_bit32_relaxed(RAMROD_COMP_WAIT, &func_params.ramrod_flags); func_params.f_obj = &sc->func_obj; func_params.cmd = ECORE_F_CMD_HW_RESET; @@ -1878,11 +1860,12 @@ bnx2x_chip_cleanup(struct bnx2x_softc *sc, uint32_t unload_mode, uint8_t keep_li * a race between the completion code and this code. */ - if (bnx2x_test_bit(ECORE_FILTER_RX_MODE_PENDING, &sc->sp_state)) { - bnx2x_set_bit(ECORE_FILTER_RX_MODE_SCHED, &sc->sp_state); - } else { + if (rte_get_bit32_relaxed(ECORE_FILTER_RX_MODE_PENDING, + &sc->sp_state)) + rte_set_bit32_relaxed(ECORE_FILTER_RX_MODE_SCHED, + &sc->sp_state); + else bnx2x_set_storm_rx_mode(sc); - } /* Clean up multicast configuration */ rparam.mcast_obj = &sc->mcast_obj; @@ -1964,7 +1947,7 @@ static void bnx2x_disable_close_the_gate(struct bnx2x_softc *sc) */ static void bnx2x_squeeze_objects(struct bnx2x_softc *sc) { - unsigned long ramrod_flags = 0, vlan_mac_flags = 0; + uint32_t ramrod_flags = 0, vlan_mac_flags = 0; struct ecore_mcast_ramrod_params rparam = { NULL }; struct ecore_vlan_mac_obj *mac_obj = &sc->sp_objs->mac_obj; int rc; @@ -1972,12 +1955,12 @@ static void bnx2x_squeeze_objects(struct bnx2x_softc *sc) /* Cleanup MACs' object first... */ /* Wait for completion of requested */ - bnx2x_set_bit(RAMROD_COMP_WAIT, &ramrod_flags); + rte_set_bit32_relaxed(RAMROD_COMP_WAIT, &ramrod_flags); /* Perform a dry cleanup */ - bnx2x_set_bit(RAMROD_DRV_CLR_ONLY, &ramrod_flags); + rte_set_bit32_relaxed(RAMROD_DRV_CLR_ONLY, &ramrod_flags); /* Clean ETH primary MAC */ - bnx2x_set_bit(ECORE_ETH_MAC, &vlan_mac_flags); + rte_set_bit32_relaxed(ECORE_ETH_MAC, &vlan_mac_flags); rc = mac_obj->delete_all(sc, &sc->sp_objs->mac_obj, &vlan_mac_flags, &ramrod_flags); if (rc != 0) { @@ -1986,7 +1969,7 @@ static void bnx2x_squeeze_objects(struct bnx2x_softc *sc) /* Cleanup UC list */ vlan_mac_flags = 0; - bnx2x_set_bit(ECORE_UC_LIST_MAC, &vlan_mac_flags); + rte_set_bit32_relaxed(ECORE_UC_LIST_MAC, &vlan_mac_flags); rc = mac_obj->delete_all(sc, mac_obj, &vlan_mac_flags, &ramrod_flags); if (rc != 0) { PMD_DRV_LOG(NOTICE, sc, @@ -1996,7 +1979,7 @@ static void bnx2x_squeeze_objects(struct bnx2x_softc *sc) /* Now clean mcast object... */ rparam.mcast_obj = &sc->mcast_obj; - bnx2x_set_bit(RAMROD_DRV_CLR_ONLY, &rparam.ramrod_flags); + rte_set_bit32_relaxed(RAMROD_DRV_CLR_ONLY, &rparam.ramrod_flags); /* Add a DEL command... */ rc = ecore_config_mcast(sc, &rparam, ECORE_MCAST_CMD_DEL); @@ -4294,13 +4277,13 @@ static void bnx2x_handle_mcast_eqe(struct bnx2x_softc *sc) static void bnx2x_handle_classification_eqe(struct bnx2x_softc *sc, union event_ring_elem *elem) { - unsigned long ramrod_flags = 0; + uint32_t ramrod_flags = 0; int rc = 0; uint32_t cid = elem->message.data.eth_event.echo & BNX2X_SWCID_MASK; struct ecore_vlan_mac_obj *vlan_mac_obj; /* always push next commands out, don't wait here */ - bnx2x_set_bit(RAMROD_CONT, &ramrod_flags); + rte_set_bit32_relaxed(RAMROD_CONT, &ramrod_flags); switch (le32toh(elem->message.data.eth_event.echo) >> BNX2X_SWCID_SHIFT) { case ECORE_FILTER_MAC_PENDING: @@ -4331,12 +4314,12 @@ bnx2x_handle_classification_eqe(struct bnx2x_softc *sc, union event_ring_elem *e static void bnx2x_handle_rx_mode_eqe(struct bnx2x_softc *sc) { - bnx2x_clear_bit(ECORE_FILTER_RX_MODE_PENDING, &sc->sp_state); + rte_clear_bit32_relaxed(ECORE_FILTER_RX_MODE_PENDING, &sc->sp_state); /* send rx_mode command again if was requested */ - if (bnx2x_test_and_clear_bit(ECORE_FILTER_RX_MODE_SCHED, &sc->sp_state)) { + if (rte_test_and_clear_bit32_relaxed(ECORE_FILTER_RX_MODE_SCHED, + &sc->sp_state)) bnx2x_set_storm_rx_mode(sc); - } } static void bnx2x_update_eq_prod(struct bnx2x_softc *sc, uint16_t prod) @@ -4705,7 +4688,7 @@ static int bnx2x_init_hw(struct bnx2x_softc *sc, uint32_t load_code) PMD_INIT_FUNC_TRACE(sc); /* prepare the parameters for function state transitions */ - bnx2x_set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags); + rte_set_bit32_relaxed(RAMROD_COMP_WAIT, &func_params.ramrod_flags); func_params.f_obj = &sc->func_obj; func_params.cmd = ECORE_F_CMD_HW_INIT; @@ -4953,7 +4936,7 @@ static void bnx2x_init_eth_fp(struct bnx2x_softc *sc, int idx) { struct bnx2x_fastpath *fp = &sc->fp[idx]; uint32_t cids[ECORE_MULTI_TX_COS] = { 0 }; - unsigned long q_type = 0; + uint32_t q_type = 0; int cos; fp->sc = sc; @@ -5000,8 +4983,8 @@ static void bnx2x_init_eth_fp(struct bnx2x_softc *sc, int idx) bnx2x_update_fp_sb_idx(fp); /* Configure Queue State object */ - bnx2x_set_bit(ECORE_Q_TYPE_HAS_RX, &q_type); - bnx2x_set_bit(ECORE_Q_TYPE_HAS_TX, &q_type); + rte_set_bit32_relaxed(ECORE_Q_TYPE_HAS_RX, &q_type); + rte_set_bit32_relaxed(ECORE_Q_TYPE_HAS_TX, &q_type); ecore_init_queue_obj(sc, &sc->sp_objs[idx].q_obj, @@ -5815,7 +5798,7 @@ static int bnx2x_func_start(struct bnx2x_softc *sc) &func_params.params.start; /* Prepare parameters for function state transitions */ - bnx2x_set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags); + rte_set_bit32_relaxed(RAMROD_COMP_WAIT, &func_params.ramrod_flags); func_params.f_obj = &sc->func_obj; func_params.cmd = ECORE_F_CMD_START; @@ -6391,11 +6374,11 @@ bnx2x_pf_q_prep_init(struct bnx2x_softc *sc, struct bnx2x_fastpath *fp, uint8_t cos; int cxt_index, cxt_offset; - bnx2x_set_bit(ECORE_Q_FLG_HC, &init_params->rx.flags); - bnx2x_set_bit(ECORE_Q_FLG_HC, &init_params->tx.flags); + rte_set_bit32_relaxed(ECORE_Q_FLG_HC, &init_params->rx.flags); + rte_set_bit32_relaxed(ECORE_Q_FLG_HC, &init_params->tx.flags); - bnx2x_set_bit(ECORE_Q_FLG_HC_EN, &init_params->rx.flags); - bnx2x_set_bit(ECORE_Q_FLG_HC_EN, &init_params->tx.flags); + rte_set_bit32_relaxed(ECORE_Q_FLG_HC_EN, &init_params->rx.flags); + rte_set_bit32_relaxed(ECORE_Q_FLG_HC_EN, &init_params->tx.flags); /* HC rate */ init_params->rx.hc_rate = @@ -6426,10 +6409,10 @@ bnx2x_pf_q_prep_init(struct bnx2x_softc *sc, struct bnx2x_fastpath *fp, static unsigned long bnx2x_get_common_flags(struct bnx2x_softc *sc, uint8_t zero_stats) { - unsigned long flags = 0; + uint32_t flags = 0; /* PF driver will always initialize the Queue to an ACTIVE state */ - bnx2x_set_bit(ECORE_Q_FLG_ACTIVE, &flags); + rte_set_bit32_relaxed(ECORE_Q_FLG_ACTIVE, &flags); /* * tx only connections collect statistics (on the same index as the @@ -6437,9 +6420,9 @@ bnx2x_get_common_flags(struct bnx2x_softc *sc, uint8_t zero_stats) * connection is initialized. */ - bnx2x_set_bit(ECORE_Q_FLG_STATS, &flags); + rte_set_bit32_relaxed(ECORE_Q_FLG_STATS, &flags); if (zero_stats) { - bnx2x_set_bit(ECORE_Q_FLG_ZERO_STATS, &flags); + rte_set_bit32_relaxed(ECORE_Q_FLG_ZERO_STATS, &flags); } /* @@ -6447,28 +6430,28 @@ bnx2x_get_common_flags(struct bnx2x_softc *sc, uint8_t zero_stats) * CoS-ness doesn't survive the loopback */ if (sc->flags & BNX2X_TX_SWITCHING) { - bnx2x_set_bit(ECORE_Q_FLG_TX_SWITCH, &flags); + rte_set_bit32_relaxed(ECORE_Q_FLG_TX_SWITCH, &flags); } - bnx2x_set_bit(ECORE_Q_FLG_PCSUM_ON_PKT, &flags); + rte_set_bit32_relaxed(ECORE_Q_FLG_PCSUM_ON_PKT, &flags); return flags; } static unsigned long bnx2x_get_q_flags(struct bnx2x_softc *sc, uint8_t leading) { - unsigned long flags = 0; + uint32_t flags = 0; if (IS_MF_SD(sc)) { - bnx2x_set_bit(ECORE_Q_FLG_OV, &flags); + rte_set_bit32_relaxed(ECORE_Q_FLG_OV, &flags); } if (leading) { - bnx2x_set_bit(ECORE_Q_FLG_LEADING_RSS, &flags); - bnx2x_set_bit(ECORE_Q_FLG_MCAST, &flags); + rte_set_bit32_relaxed(ECORE_Q_FLG_LEADING_RSS, &flags); + rte_set_bit32_relaxed(ECORE_Q_FLG_MCAST, &flags); } - bnx2x_set_bit(ECORE_Q_FLG_VLAN, &flags); + rte_set_bit32_relaxed(ECORE_Q_FLG_VLAN, &flags); /* merge with common flags */ return flags | bnx2x_get_common_flags(sc, TRUE); @@ -6589,7 +6572,7 @@ bnx2x_setup_queue(struct bnx2x_softc *sc, struct bnx2x_fastpath *fp, uint8_t lea q_params.q_obj = &BNX2X_SP_OBJ(sc, fp).q_obj; /* we want to wait for completion in this context */ - bnx2x_set_bit(RAMROD_COMP_WAIT, &q_params.ramrod_flags); + rte_set_bit32_relaxed(RAMROD_COMP_WAIT, &q_params.ramrod_flags); /* prepare the INIT parameters */ bnx2x_pf_q_prep_init(sc, fp, &q_params.params.init); @@ -6657,20 +6640,20 @@ bnx2x_config_rss_pf(struct bnx2x_softc *sc, struct ecore_rss_config_obj *rss_obj params.rss_obj = rss_obj; - bnx2x_set_bit(RAMROD_COMP_WAIT, ¶ms.ramrod_flags); + rte_set_bit32_relaxed(RAMROD_COMP_WAIT, ¶ms.ramrod_flags); - bnx2x_set_bit(ECORE_RSS_MODE_REGULAR, ¶ms.rss_flags); + rte_set_bit32_relaxed(ECORE_RSS_MODE_REGULAR, ¶ms.rss_flags); /* RSS configuration */ - bnx2x_set_bit(ECORE_RSS_IPV4, ¶ms.rss_flags); - bnx2x_set_bit(ECORE_RSS_IPV4_TCP, ¶ms.rss_flags); - bnx2x_set_bit(ECORE_RSS_IPV6, ¶ms.rss_flags); - bnx2x_set_bit(ECORE_RSS_IPV6_TCP, ¶ms.rss_flags); + rte_set_bit32_relaxed(ECORE_RSS_IPV4, ¶ms.rss_flags); + rte_set_bit32_relaxed(ECORE_RSS_IPV4_TCP, ¶ms.rss_flags); + rte_set_bit32_relaxed(ECORE_RSS_IPV6, ¶ms.rss_flags); + rte_set_bit32_relaxed(ECORE_RSS_IPV6_TCP, ¶ms.rss_flags); if (rss_obj->udp_rss_v4) { - bnx2x_set_bit(ECORE_RSS_IPV4_UDP, ¶ms.rss_flags); + rte_set_bit32_relaxed(ECORE_RSS_IPV4_UDP, ¶ms.rss_flags); } if (rss_obj->udp_rss_v6) { - bnx2x_set_bit(ECORE_RSS_IPV6_UDP, ¶ms.rss_flags); + rte_set_bit32_relaxed(ECORE_RSS_IPV6_UDP, ¶ms.rss_flags); } /* Hash bits */ @@ -6685,7 +6668,7 @@ bnx2x_config_rss_pf(struct bnx2x_softc *sc, struct ecore_rss_config_obj *rss_obj params.rss_key[i] = (uint32_t) rte_rand(); } - bnx2x_set_bit(ECORE_RSS_SET_SRCH, ¶ms.rss_flags); + rte_set_bit32_relaxed(ECORE_RSS_SET_SRCH, ¶ms.rss_flags); } if (IS_PF(sc)) @@ -6730,7 +6713,7 @@ static int bnx2x_init_rss_pf(struct bnx2x_softc *sc) static int bnx2x_set_mac_one(struct bnx2x_softc *sc, uint8_t * mac, struct ecore_vlan_mac_obj *obj, uint8_t set, int mac_type, - unsigned long *ramrod_flags) + uint32_t *ramrod_flags) { struct ecore_vlan_mac_ramrod_params ramrod_param; int rc; @@ -6742,11 +6725,12 @@ bnx2x_set_mac_one(struct bnx2x_softc *sc, uint8_t * mac, ramrod_param.ramrod_flags = *ramrod_flags; /* fill a user request section if needed */ - if (!bnx2x_test_bit(RAMROD_CONT, ramrod_flags)) { + if (!rte_get_bit32_relaxed(RAMROD_CONT, ramrod_flags)) { rte_memcpy(ramrod_param.user_req.u.mac.mac, mac, ETH_ALEN); - bnx2x_set_bit(mac_type, &ramrod_param.user_req.vlan_mac_flags); + rte_set_bit32_relaxed(mac_type, + &ramrod_param.user_req.vlan_mac_flags); /* Set the command: ADD or DEL */ ramrod_param.user_req.cmd = (set) ? ECORE_VLAN_MAC_ADD : @@ -6769,11 +6753,11 @@ bnx2x_set_mac_one(struct bnx2x_softc *sc, uint8_t * mac, static int bnx2x_set_eth_mac(struct bnx2x_softc *sc, uint8_t set) { - unsigned long ramrod_flags = 0; + uint32_t ramrod_flags = 0; PMD_DRV_LOG(DEBUG, sc, "Adding Ethernet MAC"); - bnx2x_set_bit(RAMROD_COMP_WAIT, &ramrod_flags); + rte_set_bit32_relaxed(RAMROD_COMP_WAIT, &ramrod_flags); /* Eth MAC is set on RSS leading client (fp[0]) */ return bnx2x_set_mac_one(sc, sc->link_params.mac_addr, @@ -6905,24 +6889,26 @@ bnx2x_fill_report_data(struct bnx2x_softc *sc, struct bnx2x_link_report_data *da /* Link is down */ if (!sc->link_vars.link_up || (sc->flags & BNX2X_MF_FUNC_DIS)) { - bnx2x_set_bit(BNX2X_LINK_REPORT_LINK_DOWN, + rte_set_bit32_relaxed(BNX2X_LINK_REPORT_LINK_DOWN, &data->link_report_flags); } /* Full DUPLEX */ if (sc->link_vars.duplex == DUPLEX_FULL) { - bnx2x_set_bit(BNX2X_LINK_REPORT_FULL_DUPLEX, + rte_set_bit32_relaxed(BNX2X_LINK_REPORT_FULL_DUPLEX, &data->link_report_flags); } /* Rx Flow Control is ON */ if (sc->link_vars.flow_ctrl & ELINK_FLOW_CTRL_RX) { - bnx2x_set_bit(BNX2X_LINK_REPORT_RX_FC_ON, &data->link_report_flags); + rte_set_bit32_relaxed(BNX2X_LINK_REPORT_RX_FC_ON, + &data->link_report_flags); } /* Tx Flow Control is ON */ if (sc->link_vars.flow_ctrl & ELINK_FLOW_CTRL_TX) { - bnx2x_set_bit(BNX2X_LINK_REPORT_TX_FC_ON, &data->link_report_flags); + rte_set_bit32_relaxed(BNX2X_LINK_REPORT_TX_FC_ON, + &data->link_report_flags); } } @@ -6941,9 +6927,9 @@ static void bnx2x_link_report_locked(struct bnx2x_softc *sc) /* Don't report link down or exactly the same link status twice */ if (!memcmp(&cur_data, &sc->last_reported_link, sizeof(cur_data)) || - (bnx2x_test_bit(BNX2X_LINK_REPORT_LINK_DOWN, + (rte_get_bit32_relaxed(BNX2X_LINK_REPORT_LINK_DOWN, &sc->last_reported_link.link_report_flags) && - bnx2x_test_bit(BNX2X_LINK_REPORT_LINK_DOWN, + rte_get_bit32_relaxed(BNX2X_LINK_REPORT_LINK_DOWN, &cur_data.link_report_flags))) { return; } @@ -6958,15 +6944,16 @@ static void bnx2x_link_report_locked(struct bnx2x_softc *sc) /* report new link params and remember the state for the next time */ rte_memcpy(&sc->last_reported_link, &cur_data, sizeof(cur_data)); - if (bnx2x_test_bit(BNX2X_LINK_REPORT_LINK_DOWN, + if (rte_get_bit32_relaxed(BNX2X_LINK_REPORT_LINK_DOWN, &cur_data.link_report_flags)) { ELINK_DEBUG_P0(sc, "NIC Link is Down"); } else { __rte_unused const char *duplex; __rte_unused const char *flow; - if (bnx2x_test_and_clear_bit(BNX2X_LINK_REPORT_FULL_DUPLEX, - &cur_data.link_report_flags)) { + if (rte_test_and_clear_bit32_relaxed + (BNX2X_LINK_REPORT_FULL_DUPLEX, + &cur_data.link_report_flags)) { duplex = "full"; ELINK_DEBUG_P0(sc, "link set to full duplex"); } else { @@ -6980,20 +6967,24 @@ static void bnx2x_link_report_locked(struct bnx2x_softc *sc) * enabled. */ if (cur_data.link_report_flags) { - if (bnx2x_test_bit(BNX2X_LINK_REPORT_RX_FC_ON, + if (rte_get_bit32_relaxed(BNX2X_LINK_REPORT_RX_FC_ON, &cur_data.link_report_flags) && - bnx2x_test_bit(BNX2X_LINK_REPORT_TX_FC_ON, + rte_get_bit32_relaxed(BNX2X_LINK_REPORT_TX_FC_ON, &cur_data.link_report_flags)) { flow = "ON - receive & transmit"; - } else if (bnx2x_test_bit(BNX2X_LINK_REPORT_RX_FC_ON, - &cur_data.link_report_flags) && - !bnx2x_test_bit(BNX2X_LINK_REPORT_TX_FC_ON, + } else if (rte_get_bit32_relaxed + (BNX2X_LINK_REPORT_RX_FC_ON, + &cur_data.link_report_flags) && + !rte_get_bit32_relaxed + (BNX2X_LINK_REPORT_TX_FC_ON, &cur_data.link_report_flags)) { flow = "ON - receive"; - } else if (!bnx2x_test_bit(BNX2X_LINK_REPORT_RX_FC_ON, + } else if (!rte_get_bit32_relaxed + (BNX2X_LINK_REPORT_RX_FC_ON, &cur_data.link_report_flags) && - bnx2x_test_bit(BNX2X_LINK_REPORT_TX_FC_ON, - &cur_data.link_report_flags)) { + rte_get_bit32_relaxed + (BNX2X_LINK_REPORT_TX_FC_ON, + &cur_data.link_report_flags)) { flow = "ON - transmit"; } else { flow = "none"; /* possible? */ diff --git a/drivers/net/bnx2x/bnx2x.h b/drivers/net/bnx2x/bnx2x.h index 1dbc98197..63be72a5b 100644 --- a/drivers/net/bnx2x/bnx2x.h +++ b/drivers/net/bnx2x/bnx2x.h @@ -1000,8 +1000,8 @@ struct bnx2x_sp_objs { * link parameters twice. */ struct bnx2x_link_report_data { - uint16_t line_speed; /* Effective line speed */ - unsigned long link_report_flags; /* BNX2X_LINK_REPORT_XXX flags */ + uint16_t line_speed; /* Effective line speed */ + uint32_t link_report_flags; /* BNX2X_LINK_REPORT_XXX flags */ }; enum { @@ -1232,7 +1232,7 @@ struct bnx2x_softc { /* slow path */ struct bnx2x_dma sp_dma; struct bnx2x_slowpath *sp; - unsigned long sp_state; + uint32_t sp_state; /* slow path queue */ struct bnx2x_dma spq_dma; @@ -1812,10 +1812,6 @@ static const uint32_t dmae_reg_go_c[] = { #define PCI_PM_D0 1 #define PCI_PM_D3hot 2 -int bnx2x_test_bit(int nr, volatile unsigned long * addr); -void bnx2x_set_bit(unsigned int nr, volatile unsigned long * addr); -void bnx2x_clear_bit(int nr, volatile unsigned long * addr); -int bnx2x_test_and_clear_bit(int nr, volatile unsigned long * addr); int bnx2x_cmpxchg(volatile int *addr, int old, int new); int bnx2x_dma_alloc(struct bnx2x_softc *sc, size_t size, diff --git a/drivers/net/bnx2x/ecore_sp.h b/drivers/net/bnx2x/ecore_sp.h index cc1db377a..d3f1dac36 100644 --- a/drivers/net/bnx2x/ecore_sp.h +++ b/drivers/net/bnx2x/ecore_sp.h @@ -15,6 +15,7 @@ #define ECORE_SP_H #include +#include #if RTE_BYTE_ORDER == RTE_LITTLE_ENDIAN #ifndef __LITTLE_ENDIAN @@ -73,10 +74,11 @@ typedef rte_spinlock_t ECORE_MUTEX_SPIN; #define ECORE_SET_BIT_NA(bit, var) (*var |= (1 << bit)) #define ECORE_CLEAR_BIT_NA(bit, var) (*var &= ~(1 << bit)) -#define ECORE_TEST_BIT(bit, var) bnx2x_test_bit(bit, var) -#define ECORE_SET_BIT(bit, var) bnx2x_set_bit(bit, var) -#define ECORE_CLEAR_BIT(bit, var) bnx2x_clear_bit(bit, var) -#define ECORE_TEST_AND_CLEAR_BIT(bit, var) bnx2x_test_and_clear_bit(bit, var) +#define ECORE_TEST_BIT(bit, var) rte_get_bit32_relaxed(bit, var) +#define ECORE_SET_BIT(bit, var) rte_set_bit32_relaxed(bit, var) +#define ECORE_CLEAR_BIT(bit, var) rte_clear_bit32_relaxed(bit, var) +#define ECORE_TEST_AND_CLEAR_BIT(bit, var) \ + rte_test_and_clear_bit32_relaxed(bit, var) #define atomic_load_acq_int (int)* #define atomic_store_rel_int(a, v) (*a = v) @@ -538,7 +540,7 @@ struct ecore_vlan_mac_data { /* used to contain the data related vlan_mac_flags bits from * ramrod parameters. */ - unsigned long vlan_mac_flags; + uint32_t vlan_mac_flags; /* Needed for MOVE command */ struct ecore_vlan_mac_obj *target_obj; @@ -688,7 +690,7 @@ struct ecore_vlan_mac_ramrod_params { struct ecore_vlan_mac_obj *vlan_mac_obj; /* General command flags: COMP_WAIT, etc. */ - unsigned long ramrod_flags; + uint32_t ramrod_flags; /* Command specific configuration request */ struct ecore_vlan_mac_data user_req; @@ -928,7 +930,7 @@ struct ecore_mcast_ramrod_params { struct ecore_mcast_obj *mcast_obj; /* Relevant options are RAMROD_COMP_WAIT and RAMROD_DRV_CLR_ONLY */ - unsigned long ramrod_flags; + uint32_t ramrod_flags; ecore_list_t mcast_list; /* list of struct ecore_mcast_list_elem */ /** TODO: @@ -1144,22 +1146,22 @@ struct ecore_config_rss_params { struct ecore_rss_config_obj *rss_obj; /* may have RAMROD_COMP_WAIT set only */ - unsigned long ramrod_flags; + uint32_t ramrod_flags; /* ECORE_RSS_X bits */ - unsigned long rss_flags; + uint32_t rss_flags; /* Number hash bits to take into an account */ - uint8_t rss_result_mask; + uint8_t rss_result_mask; /* Indirection table */ - uint8_t ind_table[T_ETH_INDIRECTION_TABLE_SIZE]; + uint8_t ind_table[T_ETH_INDIRECTION_TABLE_SIZE]; /* RSS hash values */ - uint32_t rss_key[10]; + uint32_t rss_key[10]; /* valid only if ECORE_RSS_UPDATE_TOE is set */ - uint16_t toe_rss_bitmap; + uint16_t toe_rss_bitmap; }; struct ecore_rss_config_obj { @@ -1290,17 +1292,17 @@ enum ecore_q_type { struct ecore_queue_init_params { struct { - unsigned long flags; - uint16_t hc_rate; - uint8_t fw_sb_id; - uint8_t sb_cq_index; + uint32_t flags; + uint16_t hc_rate; + uint8_t fw_sb_id; + uint8_t sb_cq_index; } tx; struct { - unsigned long flags; - uint16_t hc_rate; - uint8_t fw_sb_id; - uint8_t sb_cq_index; + uint32_t flags; + uint16_t hc_rate; + uint8_t fw_sb_id; + uint8_t sb_cq_index; } rx; /* CID context in the host memory */ @@ -1440,7 +1442,7 @@ struct ecore_queue_state_params { enum ecore_queue_cmd cmd; /* may have RAMROD_COMP_WAIT set only */ - unsigned long ramrod_flags; + uint32_t ramrod_flags; /* Params according to the current command */ union { @@ -1704,7 +1706,7 @@ struct ecore_func_state_params { enum ecore_func_cmd cmd; /* may have RAMROD_COMP_WAIT set only */ - unsigned long ramrod_flags; + uint32_t ramrod_flags; /* Params according to the current command */ union { -- 2.17.1