From: Qi Zhang <qi.z.zhang@intel.com>
To: qiming.yang@intel.com, beilei.xing@intel.com
Cc: xiaolong.ye@intel.com, dev@dpdk.org,
Qi Zhang <qi.z.zhang@intel.com>,
Dan Nowlin <dan.nowlin@intel.com>,
Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Subject: [dpdk-dev] [PATCH 12/28] net/ice/base: support GTPU uplink and downlink
Date: Mon, 9 Mar 2020 19:43:41 +0800 [thread overview]
Message-ID: <20200309114357.31800-13-qi.z.zhang@intel.com> (raw)
In-Reply-To: <20200309114357.31800-1-qi.z.zhang@intel.com>
Enable GTPU uplink and downlink flag usage.
TCAM with different GTPU extend header flag can be saperated.
Signed-off-by: Dan Nowlin <dan.nowlin@intel.com>
Signed-off-by: Paul M Stillwell Jr <paul.m.stillwell.jr@intel.com>
Signed-off-by: Qi Zhang <qi.z.zhang@intel.com>
---
drivers/net/ice/base/ice_flex_pipe.c | 68 +++++++++++++++++++++++++++-------
drivers/net/ice/base/ice_flow.c | 71 ++++++++++++++++++++++++++++++++++--
2 files changed, 122 insertions(+), 17 deletions(-)
diff --git a/drivers/net/ice/base/ice_flex_pipe.c b/drivers/net/ice/base/ice_flex_pipe.c
index 21b7c2efd..8a27637f8 100644
--- a/drivers/net/ice/base/ice_flex_pipe.c
+++ b/drivers/net/ice/base/ice_flex_pipe.c
@@ -1435,8 +1435,8 @@ static struct ice_buf_build *ice_pkg_buf_alloc(struct ice_hw *hw)
return NULL;
buf = (struct ice_buf_hdr *)bld;
- buf->data_end = CPU_TO_LE16(sizeof(*buf) -
- sizeof(buf->section_entry[0]));
+ buf->data_end = CPU_TO_LE16(offsetof(struct ice_buf_hdr,
+ section_entry));
return bld;
}
@@ -3832,7 +3832,7 @@ ice_prof_gen_key(struct ice_hw *hw, enum ice_block blk, u8 ptg, u16 vsig,
default:
ice_debug(hw, ICE_DBG_PKG, "Error in profile config\n");
break;
- };
+ }
return ice_set_key(key, ICE_TCAM_KEY_SZ, (u8 *)&inkey, vl_msk, dc_msk,
nm_msk, 0, ICE_TCAM_KEY_SZ / 2);
@@ -4861,8 +4861,6 @@ enum ice_status ice_rem_prof(struct ice_hw *hw, enum ice_block blk, u64 id)
LIST_DEL(&pmap->list);
ice_free(hw, pmap);
- status = ICE_SUCCESS;
-
err_ice_rem_prof:
ice_release_lock(&hw->blk[blk].es.prof_map_lock);
return status;
@@ -5144,6 +5142,32 @@ ice_prof_tcam_ena_dis(struct ice_hw *hw, enum ice_block blk, bool enable,
}
/**
+ * ice_ptg_attr_in_use - determine if PTG and attribute pair is in use
+ * @ptg_attr: pointer to the PTG and attribute pair to check
+ * @ptgs_used: bitmap that denotes which PTGs are in use
+ * @attr_used: array of PTG and attributes pairs already used
+ * @attr_cnt: count of entries in the attr_used array
+ */
+static bool
+ice_ptg_attr_in_use(struct ice_tcam_inf *ptg_attr, ice_bitmap_t *ptgs_used,
+ struct ice_tcam_inf *attr_used[], u16 attr_cnt)
+{
+ u16 i;
+
+ if (!ice_is_bit_set(ptgs_used, ptg_attr->ptg))
+ return false;
+
+ /* the PTG is used, so now look for correct attributes */
+ for (i = 0; i < attr_cnt; i++)
+ if (attr_used[i]->ptg == ptg_attr->ptg &&
+ attr_used[i]->attr.flags == ptg_attr->attr.flags &&
+ attr_used[i]->attr.mask == ptg_attr->attr.mask)
+ return true;
+
+ return false;
+}
+
+/**
* ice_adj_prof_priorities - adjust profile based on priorities
* @hw: pointer to the HW struct
* @blk: hardware block
@@ -5155,10 +5179,18 @@ ice_adj_prof_priorities(struct ice_hw *hw, enum ice_block blk, u16 vsig,
struct LIST_HEAD_TYPE *chg)
{
ice_declare_bitmap(ptgs_used, ICE_XLT1_CNT);
+ struct ice_tcam_inf **attr_used;
+ enum ice_status status = ICE_SUCCESS;
struct ice_vsig_prof *t;
- enum ice_status status;
+ u16 attr_used_cnt = 0;
u16 idx;
+#define ICE_MAX_PTG_ATTRS 1024
+ attr_used = (struct ice_tcam_inf **)ice_calloc(hw, ICE_MAX_PTG_ATTRS,
+ sizeof(*attr_used));
+ if (!attr_used)
+ return ICE_ERR_NO_MEMORY;
+
ice_zero_bitmap(ptgs_used, ICE_XLT1_CNT);
idx = vsig & ICE_VSIG_IDX_M;
@@ -5176,11 +5208,15 @@ ice_adj_prof_priorities(struct ice_hw *hw, enum ice_block blk, u16 vsig,
u16 i;
for (i = 0; i < t->tcam_count; i++) {
+ bool used;
+
/* Scan the priorities from newest to oldest.
* Make sure that the newest profiles take priority.
*/
- if (ice_is_bit_set(ptgs_used, t->tcam[i].ptg) &&
- t->tcam[i].in_use) {
+ used = ice_ptg_attr_in_use(&t->tcam[i], ptgs_used,
+ attr_used, attr_used_cnt);
+
+ if (used && t->tcam[i].in_use) {
/* need to mark this PTG as never match, as it
* was already in use and therefore duplicate
* (and lower priority)
@@ -5190,9 +5226,8 @@ ice_adj_prof_priorities(struct ice_hw *hw, enum ice_block blk, u16 vsig,
&t->tcam[i],
chg);
if (status)
- return status;
- } else if (!ice_is_bit_set(ptgs_used, t->tcam[i].ptg) &&
- !t->tcam[i].in_use) {
+ goto err_ice_adj_prof_priorities;
+ } else if (!used && !t->tcam[i].in_use) {
/* need to enable this PTG, as it in not in use
* and not enabled (highest priority)
*/
@@ -5201,15 +5236,22 @@ ice_adj_prof_priorities(struct ice_hw *hw, enum ice_block blk, u16 vsig,
&t->tcam[i],
chg);
if (status)
- return status;
+ goto err_ice_adj_prof_priorities;
}
/* keep track of used ptgs */
ice_set_bit(t->tcam[i].ptg, ptgs_used);
+ if (attr_used_cnt < ICE_MAX_PTG_ATTRS)
+ attr_used[attr_used_cnt++] = &t->tcam[i];
+ else
+ ice_debug(hw, ICE_DBG_INIT,
+ "Warn: ICE_MAX_PTG_ATTRS exceeded\n");
}
}
- return ICE_SUCCESS;
+err_ice_adj_prof_priorities:
+ ice_free(hw, attr_used);
+ return status;
}
/**
diff --git a/drivers/net/ice/base/ice_flow.c b/drivers/net/ice/base/ice_flow.c
index 0838b3bd2..17fd2423e 100644
--- a/drivers/net/ice/base/ice_flow.c
+++ b/drivers/net/ice/base/ice_flow.c
@@ -152,7 +152,7 @@ struct ice_flow_field_info ice_flds_info[ICE_FLOW_FIELD_IDX_MAX] = {
static const u32 ice_ptypes_mac_ofos[] = {
0xFDC00846, 0xBFBF7F7E, 0xF70001DF, 0xFEFDFDFB,
0x0000077E, 0x00000000, 0x00000000, 0x00000000,
- 0x00000000, 0x00003000, 0x00000000, 0x00000000,
+ 0x00000000, 0x03FFF000, 0x7FFFFFE0, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -366,6 +366,52 @@ static const struct ice_ptype_attributes ice_attr_gtpu_eh[] = {
{ ICE_MAC_IPV6_GTPU_IPV6_ICMPV6, ICE_PTYPE_ATTR_GTP_PDU_EH },
};
+static const struct ice_ptype_attributes ice_attr_gtpu_down[] = {
+ { ICE_MAC_IPV4_GTPU_IPV4_FRAG, ICE_PTYPE_ATTR_GTP_DOWNLINK },
+ { ICE_MAC_IPV4_GTPU_IPV4_PAY, ICE_PTYPE_ATTR_GTP_DOWNLINK },
+ { ICE_MAC_IPV4_GTPU_IPV4_UDP_PAY, ICE_PTYPE_ATTR_GTP_DOWNLINK },
+ { ICE_MAC_IPV4_GTPU_IPV4_TCP, ICE_PTYPE_ATTR_GTP_DOWNLINK },
+ { ICE_MAC_IPV4_GTPU_IPV4_ICMP, ICE_PTYPE_ATTR_GTP_DOWNLINK },
+ { ICE_MAC_IPV6_GTPU_IPV4_FRAG, ICE_PTYPE_ATTR_GTP_DOWNLINK },
+ { ICE_MAC_IPV6_GTPU_IPV4_PAY, ICE_PTYPE_ATTR_GTP_DOWNLINK },
+ { ICE_MAC_IPV6_GTPU_IPV4_UDP_PAY, ICE_PTYPE_ATTR_GTP_DOWNLINK },
+ { ICE_MAC_IPV6_GTPU_IPV4_TCP, ICE_PTYPE_ATTR_GTP_DOWNLINK },
+ { ICE_MAC_IPV6_GTPU_IPV4_ICMP, ICE_PTYPE_ATTR_GTP_DOWNLINK },
+ { ICE_MAC_IPV4_GTPU_IPV6_FRAG, ICE_PTYPE_ATTR_GTP_DOWNLINK },
+ { ICE_MAC_IPV4_GTPU_IPV6_PAY, ICE_PTYPE_ATTR_GTP_DOWNLINK },
+ { ICE_MAC_IPV4_GTPU_IPV6_UDP_PAY, ICE_PTYPE_ATTR_GTP_DOWNLINK },
+ { ICE_MAC_IPV4_GTPU_IPV6_TCP, ICE_PTYPE_ATTR_GTP_DOWNLINK },
+ { ICE_MAC_IPV4_GTPU_IPV6_ICMPV6, ICE_PTYPE_ATTR_GTP_DOWNLINK },
+ { ICE_MAC_IPV6_GTPU_IPV6_FRAG, ICE_PTYPE_ATTR_GTP_DOWNLINK },
+ { ICE_MAC_IPV6_GTPU_IPV6_PAY, ICE_PTYPE_ATTR_GTP_DOWNLINK },
+ { ICE_MAC_IPV6_GTPU_IPV6_UDP_PAY, ICE_PTYPE_ATTR_GTP_DOWNLINK },
+ { ICE_MAC_IPV6_GTPU_IPV6_TCP, ICE_PTYPE_ATTR_GTP_DOWNLINK },
+ { ICE_MAC_IPV6_GTPU_IPV6_ICMPV6, ICE_PTYPE_ATTR_GTP_DOWNLINK },
+};
+
+static const struct ice_ptype_attributes ice_attr_gtpu_up[] = {
+ { ICE_MAC_IPV4_GTPU_IPV4_FRAG, ICE_PTYPE_ATTR_GTP_UPLINK },
+ { ICE_MAC_IPV4_GTPU_IPV4_PAY, ICE_PTYPE_ATTR_GTP_UPLINK },
+ { ICE_MAC_IPV4_GTPU_IPV4_UDP_PAY, ICE_PTYPE_ATTR_GTP_UPLINK },
+ { ICE_MAC_IPV4_GTPU_IPV4_TCP, ICE_PTYPE_ATTR_GTP_UPLINK },
+ { ICE_MAC_IPV4_GTPU_IPV4_ICMP, ICE_PTYPE_ATTR_GTP_UPLINK },
+ { ICE_MAC_IPV6_GTPU_IPV4_FRAG, ICE_PTYPE_ATTR_GTP_UPLINK },
+ { ICE_MAC_IPV6_GTPU_IPV4_PAY, ICE_PTYPE_ATTR_GTP_UPLINK },
+ { ICE_MAC_IPV6_GTPU_IPV4_UDP_PAY, ICE_PTYPE_ATTR_GTP_UPLINK },
+ { ICE_MAC_IPV6_GTPU_IPV4_TCP, ICE_PTYPE_ATTR_GTP_UPLINK },
+ { ICE_MAC_IPV6_GTPU_IPV4_ICMP, ICE_PTYPE_ATTR_GTP_UPLINK },
+ { ICE_MAC_IPV4_GTPU_IPV6_FRAG, ICE_PTYPE_ATTR_GTP_UPLINK },
+ { ICE_MAC_IPV4_GTPU_IPV6_PAY, ICE_PTYPE_ATTR_GTP_UPLINK },
+ { ICE_MAC_IPV4_GTPU_IPV6_UDP_PAY, ICE_PTYPE_ATTR_GTP_UPLINK },
+ { ICE_MAC_IPV4_GTPU_IPV6_TCP, ICE_PTYPE_ATTR_GTP_UPLINK },
+ { ICE_MAC_IPV4_GTPU_IPV6_ICMPV6, ICE_PTYPE_ATTR_GTP_UPLINK },
+ { ICE_MAC_IPV6_GTPU_IPV6_FRAG, ICE_PTYPE_ATTR_GTP_UPLINK },
+ { ICE_MAC_IPV6_GTPU_IPV6_PAY, ICE_PTYPE_ATTR_GTP_UPLINK },
+ { ICE_MAC_IPV6_GTPU_IPV6_UDP_PAY, ICE_PTYPE_ATTR_GTP_UPLINK },
+ { ICE_MAC_IPV6_GTPU_IPV6_TCP, ICE_PTYPE_ATTR_GTP_UPLINK },
+ { ICE_MAC_IPV6_GTPU_IPV6_ICMPV6, ICE_PTYPE_ATTR_GTP_UPLINK },
+};
+
static const u32 ice_ptypes_gtpu[] = {
0x00000000, 0x00000000, 0x00000000, 0x00000000,
0x00000000, 0x00000000, 0x00000000, 0x00000000,
@@ -586,6 +632,22 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)
src = (const ice_bitmap_t *)ice_ptypes_gtpc_tid;
ice_and_bitmap(params->ptypes, params->ptypes,
src, ICE_FLOW_PTYPE_MAX);
+ } else if (hdrs & ICE_FLOW_SEG_HDR_GTPU_DWN) {
+ src = (const ice_bitmap_t *)ice_ptypes_gtpu;
+ ice_and_bitmap(params->ptypes, params->ptypes,
+ src, ICE_FLOW_PTYPE_MAX);
+
+ /* Attributes for GTP packet with downlink */
+ params->attr = ice_attr_gtpu_down;
+ params->attr_cnt = ARRAY_SIZE(ice_attr_gtpu_down);
+ } else if (hdrs & ICE_FLOW_SEG_HDR_GTPU_UP) {
+ src = (const ice_bitmap_t *)ice_ptypes_gtpu;
+ ice_and_bitmap(params->ptypes, params->ptypes,
+ src, ICE_FLOW_PTYPE_MAX);
+
+ /* Attributes for GTP packet with uplink */
+ params->attr = ice_attr_gtpu_up;
+ params->attr_cnt = ARRAY_SIZE(ice_attr_gtpu_up);
} else if (hdrs & ICE_FLOW_SEG_HDR_GTPU_EH) {
src = (const ice_bitmap_t *)ice_ptypes_gtpu;
ice_and_bitmap(params->ptypes, params->ptypes,
@@ -594,7 +656,8 @@ ice_flow_proc_seg_hdrs(struct ice_flow_prof_params *params)
/* Attributes for GTP packet with Extension Header */
params->attr = ice_attr_gtpu_eh;
params->attr_cnt = ARRAY_SIZE(ice_attr_gtpu_eh);
- } else if (hdrs & ICE_FLOW_SEG_HDR_GTPU_IP) {
+ } else if ((hdrs & ICE_FLOW_SEG_HDR_GTPU) ==
+ ICE_FLOW_SEG_HDR_GTPU) {
src = (const ice_bitmap_t *)ice_ptypes_gtpu;
ice_and_bitmap(params->ptypes, params->ptypes,
src, ICE_FLOW_PTYPE_MAX);
@@ -1238,7 +1301,7 @@ static enum ice_status
ice_flow_rem_prof_sync(struct ice_hw *hw, enum ice_block blk,
struct ice_flow_prof *prof)
{
- enum ice_status status = ICE_SUCCESS;
+ enum ice_status status;
/* Remove all remaining flow entries before removing the flow profile */
if (!LIST_EMPTY(&prof->entries)) {
@@ -2080,7 +2143,7 @@ ice_add_rss_cfg_sync(struct ice_hw *hw, u16 vsi_handle, u64 hashed_flds,
const enum ice_block blk = ICE_BLK_RSS;
struct ice_flow_prof *prof = NULL;
struct ice_flow_seg_info *segs;
- enum ice_status status = ICE_SUCCESS;
+ enum ice_status status;
if (!segs_cnt || segs_cnt > ICE_FLOW_SEG_MAX)
return ICE_ERR_PARAM;
--
2.13.6
next prev parent reply other threads:[~2020-03-09 11:42 UTC|newest]
Thread overview: 71+ messages / expand[flat|nested] mbox.gz Atom feed top
2020-03-09 11:43 [dpdk-dev] [PATCH 00/28] update ice base code Qi Zhang
2020-03-09 11:43 ` [dpdk-dev] [PATCH 01/28] net/ice/base: fix uninitialized stack variables Qi Zhang
2020-03-09 11:43 ` [dpdk-dev] [PATCH 02/28] net/ice/base: add and update E822 device IDs Qi Zhang
2020-03-09 11:43 ` [dpdk-dev] [PATCH 03/28] net/ice/base: fix removing MAC rule Qi Zhang
2020-03-09 11:43 ` [dpdk-dev] [PATCH 04/28] net/ice/base: read PSM clock frequency from register Qi Zhang
2020-03-09 15:45 ` Kevin Traynor
2020-03-20 7:14 ` Zhang, Qi Z
2020-03-20 10:44 ` Kevin Traynor
2020-03-09 11:43 ` [dpdk-dev] [PATCH 05/28] net/ice/base: allow VLAN and ethertype filter for port Qi Zhang
2020-03-09 11:43 ` [dpdk-dev] [PATCH 06/28] net/ice/base: replace u16 with enum Qi Zhang
2020-03-09 11:43 ` [dpdk-dev] [PATCH 07/28] net/ice/base: use struct size helper Qi Zhang
2020-03-09 11:43 ` [dpdk-dev] [PATCH 08/28] net/ice/base: use descriptive vairiable name than type Qi Zhang
2020-03-09 11:43 ` [dpdk-dev] [PATCH 09/28] net/ice/base: refactor a function Qi Zhang
2020-03-09 11:43 ` [dpdk-dev] [PATCH 10/28] net/ice/base: add NVM netlist macros Qi Zhang
2020-03-09 11:43 ` [dpdk-dev] [PATCH 11/28] net/ice/base: minor fixes Qi Zhang
2020-03-09 11:43 ` Qi Zhang [this message]
2020-03-09 11:43 ` [dpdk-dev] [PATCH 13/28] net/ice/base: add link default override support Qi Zhang
2020-03-09 11:43 ` [dpdk-dev] [PATCH 14/28] net/ice/base: add dedicate MAC type for E810 Qi Zhang
2020-03-09 11:43 ` [dpdk-dev] [PATCH 15/28] net/ice/base: capitalize abbreviations Qi Zhang
2020-03-09 11:43 ` [dpdk-dev] [PATCH 16/28] net/ice/base: add PHY number definition values Qi Zhang
2020-03-09 11:43 ` [dpdk-dev] [PATCH 17/28] net/ice/base: add shared driver parameter command Qi Zhang
2020-03-09 11:43 ` [dpdk-dev] [PATCH 18/28] net/ice/bse: add AN masks to Get PHY Caps Qi Zhang
2020-03-09 11:43 ` [dpdk-dev] [PATCH 19/28] net/ice/base: xtract logic of flat NVM read to function Qi Zhang
2020-03-09 11:43 ` [dpdk-dev] [PATCH 20/28] net/ice/base: add macro specifying max NVM offset Qi Zhang
2020-03-09 11:43 ` [dpdk-dev] [PATCH 21/28] net/ice/base: implement new sr read functions Qi Zhang
2020-03-09 11:43 ` [dpdk-dev] [PATCH 22/28] net/ice/base: couple casting issue fixes Qi Zhang
2020-03-09 11:43 ` [dpdk-dev] [PATCH 23/28] net/ice/base: support PHY persistent feature Qi Zhang
2020-03-09 11:43 ` [dpdk-dev] [PATCH 24/28] net/ice/base: store NVM version info in extracted format Qi Zhang
2020-03-09 11:43 ` [dpdk-dev] [PATCH 25/28] net/ice/base: add ACL module Qi Zhang
2020-03-09 11:43 ` [dpdk-dev] [PATCH 26/28] net/ice/base: update copyright date Qi Zhang
2020-03-09 11:43 ` [dpdk-dev] [PATCH 27/28] net/ice/base: add the hook to send AdminQ command Qi Zhang
2020-03-09 11:43 ` [dpdk-dev] [PATCH 28/28] net/ice/base: don't access some hardware registers in DCF Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 00/36] update ice base code Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 01/36] net/ice/base: fix uninitialized stack variables Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 02/36] net/ice/base: add and update E822 device IDs Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 03/36] net/ice/base: fix removing MAC rule Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 04/36] net/ice/base: read PSM clock frequency from register Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 05/36] net/ice/base: allow VLAN and ethertype filter for port Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 06/36] net/ice/base: replace u16 with enum Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 07/36] net/ice/base: use struct size helper Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 08/36] net/ice/base: use descriptive vairiable name than type Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 09/36] net/ice/base: refactor a function Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 10/36] net/ice/base: add NVM netlist macros Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 11/36] net/ice/base: minor fixes Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 12/36] net/ice/base: support GTPU uplink and downlink Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 13/36] net/ice/base: add link default override support Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 14/36] net/ice/base: add dedicate MAC type for E810 Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 15/36] net/ice/base: capitalize abbreviations Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 16/36] net/ice/base: add PHY number definition values Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 17/36] net/ice/base: add shared driver parameter command Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 18/36] net/ice/base: add AN masks to Get PHY Caps Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 19/36] net/ice/base: xtract logic of flat NVM read to function Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 20/36] net/ice/base: add macro specifying max NVM offset Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 21/36] net/ice/base: implement new sr read functions Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 22/36] net/ice/base: couple casting issue fixes Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 23/36] net/ice/base: support PHY persistent feature Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 24/36] net/ice/base: store NVM version info in extracted format Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 25/36] net/ice/base: add ACL module Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 26/36] net/ice/base: update copyright date Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 27/36] net/ice/base: add the hook to send AdminQ command Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 28/36] net/ice/base: don't access some hardware registers in DCF Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 29/36] net/ice/base: move functions from common to NVM module Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 30/36] net/ice/base: discover and store size of available flash Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 31/36] net/ice/base: check DDP package compatibility Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 32/36] net/ice/base: fix MAC write command Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 33/36] net/ice/base: misc cleanups for Flow Director Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 34/36] net/ice/base: add check to ipv4 next protocol Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 35/36] net/ice/base: add reference count to tunnels Qi Zhang
2020-03-23 7:17 ` [dpdk-dev] [PATCH v2 36/36] net/ice/base: add pppoe ipv6 dummy packet Qi Zhang
2020-03-24 3:11 ` [dpdk-dev] [PATCH v2 00/36] update ice base code Yang, Qiming
2020-03-24 6:39 ` Ye Xiaolong
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