From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 68D7EA057B; Tue, 24 Mar 2020 12:51:14 +0100 (CET) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 169D91C1A0; Tue, 24 Mar 2020 12:49:47 +0100 (CET) Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by dpdk.org (Postfix) with ESMTP id F111F1C133 for ; Tue, 24 Mar 2020 12:49:39 +0100 (CET) IronPort-SDR: fU+7YfPekGv8qcxBagvRKaZxREu/393Kfbw73QvioHJw5+NCspKW86O8PiFljw3X0o04Mie/cY /jveKLOG0GWQ== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by fmsmga102.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 24 Mar 2020 04:49:39 -0700 IronPort-SDR: WftQ4Mqo9pEQt9W5/NoB5z8qCI2YUSVks0C2oIrgxtOFYwx6aYDVJNhLrIvTrsBQXE54ruf4Ny Oj29R/vPdAsg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,300,1580803200"; d="scan'208";a="270356347" Received: from silpixa00399838.ir.intel.com (HELO silpixa00399838.ger.corp.intel.com) ([10.237.222.98]) by fmsmga004.fm.intel.com with ESMTP; 24 Mar 2020 04:49:38 -0700 From: Kevin Laatz To: dev@dpdk.org Cc: bruce.richardson@intel.com, harry.van.haaren@intel.com, Kevin Laatz Date: Tue, 24 Mar 2020 11:49:16 +0000 Message-Id: <20200324114921.7184-13-kevin.laatz@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200324114921.7184-1-kevin.laatz@intel.com> References: <20200324114921.7184-1-kevin.laatz@intel.com> Subject: [dpdk-dev] [PATCH 12/17] eal/cpuflags: add avx512 bit algorithms X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add the CPU flag AVX-512 for bit algorithm instructions. Signed-off-by: Kevin Laatz --- lib/librte_eal/common/arch/x86/rte_cpuflags.c | 1 + lib/librte_eal/common/include/arch/x86/rte_cpuflags.h | 1 + 2 files changed, 2 insertions(+) diff --git a/lib/librte_eal/common/arch/x86/rte_cpuflags.c b/lib/librte_eal/common/arch/x86/rte_cpuflags.c index f82d45647..472becfed 100644 --- a/lib/librte_eal/common/arch/x86/rte_cpuflags.c +++ b/lib/librte_eal/common/arch/x86/rte_cpuflags.c @@ -132,6 +132,7 @@ const struct feature_entry rte_cpu_feature_table[] = { FEAT_DEF(VAES, 0x00000007, 0, RTE_REG_ECX, 9) FEAT_DEF(VPCLMULQDQ, 0x00000007, 0, RTE_REG_ECX, 10) FEAT_DEF(AVX512VNNI, 0x00000007, 0, RTE_REG_ECX, 11) + FEAT_DEF(AVX512BITALG, 0x00000007, 0, RTE_REG_ECX, 12) }; int diff --git a/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h b/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h index caf92b9f3..fe4144fc0 100644 --- a/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h +++ b/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h @@ -124,6 +124,7 @@ enum rte_cpu_flag_t { RTE_CPUFLAG_VAES, /**< Vector AES */ RTE_CPUFLAG_VPCLMULQDQ, /**< Vector Carry-less Multiply */ RTE_CPUFLAG_AVX512VNNI, /**< AVX512 Vector Neural Network Instructions */ + RTE_CPUFLAG_AVX512BITALG, /**< AVX512 Bit Algorithms */ /* The last item */ RTE_CPUFLAG_NUMFLAGS, /**< This should always be the last! */ -- 2.17.1