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From: Neil Horman <nhorman@tuxdriver.com>
To: David Marchand <david.marchand@redhat.com>
Cc: Kevin Laatz <kevin.laatz@intel.com>, dev <dev@dpdk.org>,
	Bruce Richardson <bruce.richardson@intel.com>,
	Van Haaren Harry <harry.van.haaren@intel.com>,
	Thomas Monjalon <thomas@monjalon.net>,
	Honnappa Nagarahalli <Honnappa.Nagarahalli@arm.com>,
	Dodji Seketeli <dodji@redhat.com>
Subject: Re: [dpdk-dev] [PATCH v2] eal/cpuflags: add x86 based cpu flags
Date: Fri, 27 Mar 2020 09:44:41 -0400	[thread overview]
Message-ID: <20200327134441.GA3540715@hmswarspite.think-freely.org> (raw)
In-Reply-To: <CAJFAV8yaPq0Cjgu=gbcq3qBp7eyq4Qv8-m24NxS9KoMhUh6JkA@mail.gmail.com>

On Fri, Mar 27, 2020 at 01:24:12PM +0100, David Marchand wrote:
> On Wed, Mar 25, 2020 at 12:11 PM Kevin Laatz <kevin.laatz@intel.com> wrote:
> >
> > This patch adds CPU flags which will enable the detection of ISA
> > features available on more recent x86 based CPUs.
> >
> > The CPUID leaf information can be found in Section 1.7 of this
> > document:
> > https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
> >
> > The following CPU flags are added in this patch:
> >     - AVX-512 doubleword and quadword instructions.
> >     - AVX-512 integer fused multiply-add instructions.
> >     - AVX-512 conflict detection instructions.
> >     - AVX-512 byte and word instructions.
> >     - AVX-512 vector length instructions.
> >     - AVX-512 vector bit manipulation instructions.
> >     - AVX-512 vector bit manipulation 2 instructions.
> >     - Galois field new instructions.
> >     - Vector AES instructions.
> >     - Vector carry-less multiply instructions.
> >     - AVX-512 vector neural network instructions.
> >     - AVX-512 for bit algorithm instructions.
> >     - AVX-512 vector popcount instructions.
> >     - Cache line demote instructions.
> >     - Direct store instructions.
> >     - Direct store 64B instructions.
> >     - AVX-512 two register intersection instructions.
> >
> > Signed-off-by: Kevin Laatz <kevin.laatz@intel.com>
> > ---
> >  lib/librte_eal/common/arch/x86/rte_cpuflags.c  | 18 ++++++++++++++++++
> >  .../common/include/arch/x86/rte_cpuflags.h     | 18 ++++++++++++++++++
> >  2 files changed, 36 insertions(+)
> >
> > diff --git a/lib/librte_eal/common/arch/x86/rte_cpuflags.c b/lib/librte_eal/common/arch/x86/rte_cpuflags.c
> > index 6492df556..30439e795 100644
> > --- a/lib/librte_eal/common/arch/x86/rte_cpuflags.c
> > +++ b/lib/librte_eal/common/arch/x86/rte_cpuflags.c
> > @@ -120,6 +120,24 @@ const struct feature_entry rte_cpu_feature_table[] = {
> >         FEAT_DEF(EM64T, 0x80000001, 0, RTE_REG_EDX, 29)
> >
> >         FEAT_DEF(INVTSC, 0x80000007, 0, RTE_REG_EDX,  8)
> > +
> > +       FEAT_DEF(AVX512DQ, 0x00000007, 0, RTE_REG_EBX, 17)
> > +       FEAT_DEF(AVX512IFMA, 0x00000007, 0, RTE_REG_EBX, 21)
> > +       FEAT_DEF(AVX512CD, 0x00000007, 0, RTE_REG_EBX, 28)
> > +       FEAT_DEF(AVX512BW, 0x00000007, 0, RTE_REG_EBX, 30)
> > +       FEAT_DEF(AVX512VL, 0x00000007, 0, RTE_REG_EBX, 31)
> > +       FEAT_DEF(AVX512VBMI, 0x00000007, 0, RTE_REG_ECX, 1)
> > +       FEAT_DEF(AVX512VBMI2, 0x00000007, 0, RTE_REG_ECX, 6)
> > +       FEAT_DEF(GFNI, 0x00000007, 0, RTE_REG_ECX, 8)
> > +       FEAT_DEF(VAES, 0x00000007, 0, RTE_REG_ECX, 9)
> > +       FEAT_DEF(VPCLMULQDQ, 0x00000007, 0, RTE_REG_ECX, 10)
> > +       FEAT_DEF(AVX512VNNI, 0x00000007, 0, RTE_REG_ECX, 11)
> > +       FEAT_DEF(AVX512BITALG, 0x00000007, 0, RTE_REG_ECX, 12)
> > +       FEAT_DEF(AVX512VPOPCNTDQ, 0x00000007, 0, RTE_REG_ECX,  14)
> > +       FEAT_DEF(CLDEMOTE, 0x00000007, 0, RTE_REG_ECX, 25)
> > +       FEAT_DEF(MOVDIRI, 0x00000007, 0, RTE_REG_ECX, 27)
> > +       FEAT_DEF(MOVDIR64B, 0x00000007, 0, RTE_REG_ECX, 28)
> > +       FEAT_DEF(AVX512VP2INTERSECT, 0x00000007, 0, RTE_REG_EDX, 8)
> >  };
> >
> >  int
> > diff --git a/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h b/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h
> > index 25ba47b96..f8f73b19f 100644
> > --- a/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h
> > +++ b/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h
> > @@ -113,6 +113,24 @@ enum rte_cpu_flag_t {
> >         /* (EAX 80000007h) EDX features */
> >         RTE_CPUFLAG_INVTSC,                 /**< INVTSC */
> >
> > +       RTE_CPUFLAG_AVX512DQ,               /**< AVX512 Doubleword and Quadword */
> > +       RTE_CPUFLAG_AVX512IFMA,             /**< AVX512 Integer Fused Multiply-Add */
> > +       RTE_CPUFLAG_AVX512CD,               /**< AVX512 Conflict Detection*/
> > +       RTE_CPUFLAG_AVX512BW,               /**< AVX512 Byte and Word */
> > +       RTE_CPUFLAG_AVX512VL,               /**< AVX512 Vector Length */
> > +       RTE_CPUFLAG_AVX512VBMI,             /**< AVX512 Vector Bit Manipulation */
> > +       RTE_CPUFLAG_AVX512VBMI2,            /**< AVX512 Vector Bit Manipulation 2 */
> > +       RTE_CPUFLAG_GFNI,                   /**< Galois Field New Instructions */
> > +       RTE_CPUFLAG_VAES,                   /**< Vector AES */
> > +       RTE_CPUFLAG_VPCLMULQDQ,             /**< Vector Carry-less Multiply */
> > +       RTE_CPUFLAG_AVX512VNNI,             /**< AVX512 Vector Neural Network Instructions */
> > +       RTE_CPUFLAG_AVX512BITALG,           /**< AVX512 Bit Algorithms */
> > +       RTE_CPUFLAG_AVX512VPOPCNTDQ,        /**< AVX512 Vector Popcount */
> > +       RTE_CPUFLAG_CLDEMOTE,               /**< Cache Line Demote */
> > +       RTE_CPUFLAG_MOVDIRI,                /**< Direct Store Instructions */
> > +       RTE_CPUFLAG_MOVDIR64B,              /**< Direct Store Instructions 64B */
> > +       RTE_CPUFLAG_AVX512VP2INTERSECT,     /**< AVX512 Two Register Intersection */
> > +
> >         /* The last item */
> >         RTE_CPUFLAG_NUMFLAGS,               /**< This should always be the last! */
> 
> This is seen as an ABI break because of the change on _NUMFLAGS:
> https://travis-ci.com/github/ovsrobot/dpdk/jobs/302524264#L2351
> 
It shouldn't be, as the only API calls we expose that use rte_cpu_flag_t accept
it as an integer parameter to see if the flag is enabled.  Theres no use of the
enum in a public array or any struct that is sized based on the number of flags,
so you should be good to go
Neil

> 
> -- 
> David Marchand
> 
> 

  parent reply	other threads:[~2020-03-27 13:44 UTC|newest]

Thread overview: 49+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-03-24 11:49 [dpdk-dev] [PATCH 00/17] Add CPU flags Kevin Laatz
2020-03-24 11:49 ` [dpdk-dev] [PATCH 01/17] eal/cpuflags: add avx512 doubleword and quadword Kevin Laatz
2020-03-24 11:49 ` [dpdk-dev] [PATCH 02/17] eal/cpuflags: add avx512 integer fused multiply-add Kevin Laatz
2020-03-24 11:49 ` [dpdk-dev] [PATCH 03/17] eal/cpuflags: add avx512 conflict detection Kevin Laatz
2020-03-24 11:49 ` [dpdk-dev] [PATCH 04/17] eal/cpuflags: add avx512 byte and word Kevin Laatz
2020-03-24 11:49 ` [dpdk-dev] [PATCH 05/17] eal/cpuflags: add avx512 vector length Kevin Laatz
2020-03-24 11:49 ` [dpdk-dev] [PATCH 06/17] eal/cpuflags: add avx512 vector bit manipulation Kevin Laatz
2020-03-24 11:49 ` [dpdk-dev] [PATCH 07/17] eal/cpuflags: add avx512 vector bit manipulation 2 Kevin Laatz
2020-03-24 11:49 ` [dpdk-dev] [PATCH 08/17] eal/cpuflags: add galois field new instructions Kevin Laatz
2020-03-24 11:49 ` [dpdk-dev] [PATCH 09/17] eal/cpuflags: add vector AES Kevin Laatz
2020-03-24 11:49 ` [dpdk-dev] [PATCH 10/17] eal/cpuflags: add vector carry-less multiply Kevin Laatz
2020-03-24 11:49 ` [dpdk-dev] [PATCH 11/17] eal/cpuflags: add avx512 vector neural network instructions Kevin Laatz
2020-03-24 11:49 ` [dpdk-dev] [PATCH 12/17] eal/cpuflags: add avx512 bit algorithms Kevin Laatz
2020-03-24 11:49 ` [dpdk-dev] [PATCH 13/17] eal/cpuflags: add avx512 vector popcount Kevin Laatz
2020-03-24 11:49 ` [dpdk-dev] [PATCH 14/17] eal/cpuflags: add cache line demote Kevin Laatz
2020-03-24 11:49 ` [dpdk-dev] [PATCH 15/17] eal/cpuflags: add direct store instructions Kevin Laatz
2020-03-24 11:49 ` [dpdk-dev] [PATCH 16/17] eal/cpuflags: add direct store instructions 64B Kevin Laatz
2020-03-24 11:49 ` [dpdk-dev] [PATCH 17/17] eal/cpuflags: add avx512 two register intersection Kevin Laatz
2020-03-25  8:36 ` [dpdk-dev] [PATCH 00/17] Add CPU flags David Marchand
2020-03-25 11:10 ` [dpdk-dev] [PATCH v2] eal/cpuflags: add x86 based cpu flags Kevin Laatz
2020-03-27 12:24   ` David Marchand
2020-03-27 13:18     ` Van Haaren, Harry
2020-03-27 15:04       ` David Marchand
2020-03-27 13:44     ` Neil Horman [this message]
2020-03-27 14:15       ` Thomas Monjalon
2020-03-27 14:32         ` Van Haaren, Harry
2020-03-27 14:36           ` Ray Kinsella
2020-03-27 15:19             ` Thomas Monjalon
2020-03-30 12:15   ` [dpdk-dev] [PATCH v3] " Kevin Laatz
2020-04-16 10:08     ` Van Haaren, Harry
2020-04-16 11:00     ` [dpdk-dev] [PATCH v4] " Kevin Laatz
2020-04-25 16:04       ` Thomas Monjalon
2020-04-27  9:22         ` Kinsella, Ray
2020-04-27  9:27         ` Ray Kinsella
2020-04-27  9:31           ` Laatz, Kevin
2020-04-27  9:35             ` Ray Kinsella
2020-04-27 10:08               ` Laatz, Kevin
2020-04-27 12:31           ` Thomas Monjalon
2020-04-27 13:58             ` Ray Kinsella
2020-04-29 11:22               ` Neil Horman
2020-04-30  7:59                 ` Ray Kinsella
2020-04-28 12:40       ` [dpdk-dev] [PATCH v5] " Kevin Laatz
2020-04-28 16:39         ` Ray Kinsella
2020-04-28 18:11           ` Laatz, Kevin
2020-04-28 19:55             ` Thomas Monjalon
2020-04-28 19:58           ` Stephen Hemminger
2020-04-29 11:39           ` David Marchand
2020-04-30 10:02             ` Ray Kinsella
2020-05-07 13:00               ` Thomas Monjalon

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