From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 83377A0563; Wed, 15 Apr 2020 11:14:33 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 123C91D67E; Wed, 15 Apr 2020 11:13:35 +0200 (CEST) Received: from mga09.intel.com (mga09.intel.com [134.134.136.24]) by dpdk.org (Postfix) with ESMTP id EAB8D1D668 for ; Wed, 15 Apr 2020 11:13:29 +0200 (CEST) IronPort-SDR: XFg8J2kY/nD3oCVpVhwQwQOUSuNS7sBnTrFOXrhHvgeDv5NkTX6aBEQDgwO/vfDqQKdLidBzi4 J9IdZROsD7ww== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga004.jf.intel.com ([10.7.209.38]) by orsmga102.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 15 Apr 2020 02:13:29 -0700 IronPort-SDR: 1jm7ma+0ser4p2Gp6k9/Gfw8lpOLLUTRe8BrsoEzsSTAh+E6DrK+VEGB21yIaV1NMaNM0bd+UN 4Hs6EGD8lNvg== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.72,386,1580803200"; d="scan'208";a="400250874" Received: from npg-dpdk-virtual-marvin-dev.sh.intel.com ([10.67.119.58]) by orsmga004.jf.intel.com with ESMTP; 15 Apr 2020 02:13:28 -0700 From: Marvin Liu To: maxime.coquelin@redhat.com, xiaolong.ye@intel.com, zhihong.wang@intel.com Cc: harry.van.haaren@intel.com, dev@dpdk.org, Marvin Liu Date: Thu, 16 Apr 2020 00:47:31 +0800 Message-Id: <20200415164733.75416-7-yong.liu@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200415164733.75416-1-yong.liu@intel.com> References: <20200313174230.74661-1-yong.liu@intel.com> <20200415164733.75416-1-yong.liu@intel.com> Subject: [dpdk-dev] [PATCH v4 6/8] eal/x86: identify AVX512 extensions flag X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Read CPUID to check if AVX512 extensions are supported. Signed-off-by: Marvin Liu diff --git a/lib/librte_eal/common/arch/x86/rte_cpuflags.c b/lib/librte_eal/common/arch/x86/rte_cpuflags.c index 6492df556..54e9f6185 100644 --- a/lib/librte_eal/common/arch/x86/rte_cpuflags.c +++ b/lib/librte_eal/common/arch/x86/rte_cpuflags.c @@ -109,6 +109,9 @@ const struct feature_entry rte_cpu_feature_table[] = { FEAT_DEF(RTM, 0x00000007, 0, RTE_REG_EBX, 11) FEAT_DEF(AVX512F, 0x00000007, 0, RTE_REG_EBX, 16) FEAT_DEF(RDSEED, 0x00000007, 0, RTE_REG_EBX, 18) + FEAT_DEF(AVX512CD, 0x00000007, 0, RTE_REG_EBX, 28) + FEAT_DEF(AVX512BW, 0x00000007, 0, RTE_REG_EBX, 30) + FEAT_DEF(AVX512VL, 0x00000007, 0, RTE_REG_EBX, 31) FEAT_DEF(LAHF_SAHF, 0x80000001, 0, RTE_REG_ECX, 0) FEAT_DEF(LZCNT, 0x80000001, 0, RTE_REG_ECX, 4) diff --git a/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h b/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h index 25ba47b96..5bf99e05f 100644 --- a/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h +++ b/lib/librte_eal/common/include/arch/x86/rte_cpuflags.h @@ -98,6 +98,9 @@ enum rte_cpu_flag_t { RTE_CPUFLAG_RTM, /**< Transactional memory */ RTE_CPUFLAG_AVX512F, /**< AVX512F */ RTE_CPUFLAG_RDSEED, /**< RDSEED instruction */ + RTE_CPUFLAG_AVX512CD, /**< AVX512CD */ + RTE_CPUFLAG_AVX512BW, /**< AVX512BW */ + RTE_CPUFLAG_AVX512VL, /**< AVX512VL */ /* (EAX 80000001h) ECX features */ RTE_CPUFLAG_LAHF_SAHF, /**< LAHF_SAHF */ -- 2.17.1