From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id C6558A0352; Thu, 14 May 2020 14:40:44 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 9CBAE1D916; Thu, 14 May 2020 14:40:44 +0200 (CEST) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id 8B1D31D914 for ; Thu, 14 May 2020 14:40:43 +0200 (CEST) IronPort-SDR: CVBT+G1M9Xr8Ge/W5ZYTBgJE0qpq336VwvY+C0i17jMgz0ESu0xA22Sz8/M3nkO3mBWe96sNtH oBsZEpl5mUgw== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga006.jf.intel.com ([10.7.209.51]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 May 2020 05:40:42 -0700 IronPort-SDR: KtzZ32R8mW/QA3SQsDZ2uWFcz8wBQWqhP8oZuR+3HWKFumbe3mhLY71AElMq3UMUgpsG6GX5Pw rAa2RE75lBxw== X-IronPort-AV: E=Sophos;i="5.73,391,1583222400"; d="scan'208";a="266228906" Received: from bricha3-mobl.ger.corp.intel.com ([10.209.99.115]) by orsmga006-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-SHA; 14 May 2020 05:40:41 -0700 Date: Thu, 14 May 2020 13:40:38 +0100 From: Bruce Richardson To: Vladimir Medvedkin Cc: dev@dpdk.org, konstantin.ananyev@intel.com Message-ID: <20200514124038.GA375@bricha3-MOBL.ger.corp.intel.com> References: <1583757826-375246-1-git-send-email-vladimir.medvedkin@intel.com> <83e42337892459bdbd629d89b6352366f477f486.1589458934.git.vladimir.medvedkin@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <83e42337892459bdbd629d89b6352366f477f486.1589458934.git.vladimir.medvedkin@intel.com> Subject: Re: [dpdk-dev] [PATCH v2 3/6] fib: introduce AVX512 lookup X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" On Thu, May 14, 2020 at 01:28:27PM +0100, Vladimir Medvedkin wrote: > Add new lookup implementation for DIR24_8 algorithm using > AVX512 instruction set > > Signed-off-by: Vladimir Medvedkin > --- > diff --git a/lib/librte_fib/meson.build b/lib/librte_fib/meson.build > index 771828f..86b1d4a 100644 > --- a/lib/librte_fib/meson.build > +++ b/lib/librte_fib/meson.build > @@ -5,3 +5,13 @@ > sources = files('rte_fib.c', 'rte_fib6.c', 'dir24_8.c', 'trie.c') > headers = files('rte_fib.h', 'rte_fib6.h') > deps += ['rib'] > + > +if dpdk_conf.has('RTE_ARCH_X86') > + if cc.has_argument('-mavx512f') > + cflags += '-DCC_AVX512_SUPPORT' > + cflags += '-mavx512f' > + endif > + if cc.has_argument('-mavx512dq') > + cflags += '-mavx512dq' > + endif > +endif This will likely break the FIB library for systems which don't have AVX-512 support, since you are enabling AVX-512 for the whole library, meaning that the compiler can put AVX-512 instructions anywhere it wants in the library. You need to separate out the AVX-512 code into a separate file, and compile that file - and only that file - for AVX-512. An example of how this should be done, can be seen in the AVX support in the i40e net driver. Regards, /Bruce