From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 79F8FA00C4; Thu, 4 Jun 2020 17:33:19 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id E6CB41D5FD; Thu, 4 Jun 2020 17:33:08 +0200 (CEST) Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by dpdk.org (Postfix) with ESMTP id C7C6B1D5FD for ; Thu, 4 Jun 2020 17:33:06 +0200 (CEST) IronPort-SDR: VzD/Re2ukDG9X9aq15Vl+k42ZxLQjwhn0DG6Rh7TmAL1bZS0fpWxtdbmSJbR/s0bnRQk9Fb2bm C1CqcqyILP2A== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from orsmga005.jf.intel.com ([10.7.209.41]) by fmsmga105.fm.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 04 Jun 2020 08:33:04 -0700 IronPort-SDR: y+gUdyvrgjT7u+eT7jP4Y0n+LsJYYxtLQ6dYBwQFoIUJgnKmuHE0/eVetZpnVkXkV39BbP/o3b okmrUxpmXc4Q== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,472,1583222400"; d="scan'208";a="445542716" Received: from silpixa00399912.ir.intel.com (HELO silpixa00399912.ger.corp.intel.com) ([10.237.223.64]) by orsmga005.jf.intel.com with ESMTP; 04 Jun 2020 08:32:58 -0700 From: David Coyle To: akhil.goyal@nxp.com, declan.doherty@intel.com, pablo.de.lara.guarch@intel.com, fiona.trahe@intel.com, roy.fan.zhang@intel.com Cc: dev@dpdk.org, thomas@monjalon.net, ferruh.yigit@intel.com, brendan.ryan@intel.com, hemant.agrawal@nxp.com, anoobj@marvell.com, ruifeng.wang@arm.com, lironh@marvell.com, rnagadheeraj@marvell.com, jsrikanth@marvell.com, G.Singh@nxp.com, jianjay.zhou@huawei.com, ravi1.kumar@amd.com, bruce.richardson@intel.com, olivier.matz@6wind.com, honnappa.nagarahalli@arm.com, stephen@networkplumber.org, alexr@mellanox.com, jerinj@marvell.com, David Coyle , Mairtin o Loingsigh Date: Thu, 4 Jun 2020 16:13:23 +0100 Message-Id: <20200604151324.50704-3-david.coyle@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200604151324.50704-1-david.coyle@intel.com> References: <20200410142757.31508-1-david.coyle@intel.com> <20200604151324.50704-1-david.coyle@intel.com> Subject: [dpdk-dev] [PATCH 2/3] cryptodev: add security operation to crypto operation X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Add a new security operation structure to the crypto operation to allow protocol specific parameters defined in rte_security be defined for a crypto operation. Please note this is API changes only. Implementation will follow in next version. Signed-off-by: David Coyle Signed-off-by: Mairtin o Loingsigh --- lib/librte_cryptodev/rte_crypto.h | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/lib/librte_cryptodev/rte_crypto.h b/lib/librte_cryptodev/rte_crypto.h index fd5ef3a87..fbc1df791 100644 --- a/lib/librte_cryptodev/rte_crypto.h +++ b/lib/librte_cryptodev/rte_crypto.h @@ -31,8 +31,10 @@ enum rte_crypto_op_type { /**< Undefined operation type */ RTE_CRYPTO_OP_TYPE_SYMMETRIC, /**< Symmetric operation */ - RTE_CRYPTO_OP_TYPE_ASYMMETRIC + RTE_CRYPTO_OP_TYPE_ASYMMETRIC, /**< Asymmetric operation */ + RTE_CRYPTO_OP_TYPE_SECURITY + /**< Security operation */ }; /** Status of crypto operation */ @@ -121,6 +123,13 @@ struct rte_crypto_op { struct rte_crypto_asym_op asym[0]; /**< Asymmetric operation parameters */ +#ifdef RTE_LIBRTE_SECURITY + uint8_t security[0]; + /**< Security operation parameters + * - Must be accessed through a rte_security_op pointer + */ +#endif + }; /**< operation specific parameters */ }; -- 2.17.1