From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id DBD3BA0516; Tue, 9 Jun 2020 14:02:35 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 1C7671BFC1; Tue, 9 Jun 2020 13:57:22 +0200 (CEST) Received: from mga18.intel.com (mga18.intel.com [134.134.136.126]) by dpdk.org (Postfix) with ESMTP id 196031BF81; Tue, 9 Jun 2020 13:57:15 +0200 (CEST) IronPort-SDR: SYDAbF2C3VxmO5q725bigaIa8c96DOOjMUEeVyHciH9xwi31RkcN/MUfcZzGy/eEhmNcyJjp6L MTuCCYwcRrdQ== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga106.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 09 Jun 2020 04:57:15 -0700 IronPort-SDR: Eixm9PbifBOSLNK+ryDgry9oKhnl21dv1+ZAaKSUsYqwVVAo9uxhWxdNkAfqqC+oWcRJ6Sm/UQ gC2WgTLhNBwA== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,492,1583222400"; d="scan'208";a="473044220" Received: from dpdk51.sh.intel.com ([10.67.111.82]) by fmsmga005.fm.intel.com with ESMTP; 09 Jun 2020 04:57:13 -0700 From: Qi Zhang To: qiming.yang@intel.com Cc: xiaolong.ye@intel.com, dev@dpdk.org, Qi Zhang , stable@dpdk.org, Surabhi Boob , "Paul M . Stillwell Jr" Date: Tue, 9 Jun 2020 19:59:46 +0800 Message-Id: <20200609120001.35110-38-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20200609120001.35110-1-qi.z.zhang@intel.com> References: <20200603024016.30636-1-qi.z.zhang@intel.com> <20200609120001.35110-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH v2 37/52] net/ice/base: fix for memory leak X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" Handles memory leaks during control queue initialization and buffer allocation failures. The MACRO - ICE_FREE_CQ_BUFS is modified to re-use for this fix. Fixes: 6c1f26be50a2 ("net/ice/base: add control queue information") Cc: stable@dpdk.org Signed-off-by: Surabhi Boob Signed-off-by: Paul M. Stillwell Jr Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_controlq.c | 39 +++++++++++++++++++++++-------------- 1 file changed, 24 insertions(+), 15 deletions(-) diff --git a/drivers/net/ice/base/ice_controlq.c b/drivers/net/ice/base/ice_controlq.c index 3ef86fa03..f278ef636 100644 --- a/drivers/net/ice/base/ice_controlq.c +++ b/drivers/net/ice/base/ice_controlq.c @@ -182,7 +182,9 @@ ice_alloc_rq_bufs(struct ice_hw *hw, struct ice_ctl_q_info *cq) i--; for (; i >= 0; i--) ice_free_dma_mem(hw, &cq->rq.r.rq_bi[i]); + cq->rq.r.rq_bi = NULL; ice_free(hw, cq->rq.dma_head); + cq->rq.dma_head = NULL; return ICE_ERR_NO_MEMORY; } @@ -220,7 +222,9 @@ ice_alloc_sq_bufs(struct ice_hw *hw, struct ice_ctl_q_info *cq) i--; for (; i >= 0; i--) ice_free_dma_mem(hw, &cq->sq.r.sq_bi[i]); + cq->sq.r.sq_bi = NULL; ice_free(hw, cq->sq.dma_head); + cq->sq.dma_head = NULL; return ICE_ERR_NO_MEMORY; } @@ -279,6 +283,24 @@ ice_cfg_rq_regs(struct ice_hw *hw, struct ice_ctl_q_info *cq) return ICE_SUCCESS; } +#define ICE_FREE_CQ_BUFS(hw, qi, ring) \ +do { \ + /* free descriptors */ \ + if ((qi)->ring.r.ring##_bi) { \ + int i; \ + \ + for (i = 0; i < (qi)->num_##ring##_entries; i++) \ + if ((qi)->ring.r.ring##_bi[i].pa) \ + ice_free_dma_mem((hw), \ + &(qi)->ring.r.ring##_bi[i]); \ + } \ + /* free the buffer info list */ \ + if ((qi)->ring.cmd_buf) \ + ice_free(hw, (qi)->ring.cmd_buf); \ + /* free DMA head */ \ + ice_free(hw, (qi)->ring.dma_head); \ +} while (0) + /** * ice_init_sq - main initialization routine for Control ATQ * @hw: pointer to the hardware structure @@ -334,6 +356,7 @@ static enum ice_status ice_init_sq(struct ice_hw *hw, struct ice_ctl_q_info *cq) goto init_ctrlq_exit; init_ctrlq_free_rings: + ICE_FREE_CQ_BUFS(hw, cq, sq); ice_free_cq_ring(hw, &cq->sq); init_ctrlq_exit: @@ -395,27 +418,13 @@ static enum ice_status ice_init_rq(struct ice_hw *hw, struct ice_ctl_q_info *cq) goto init_ctrlq_exit; init_ctrlq_free_rings: + ICE_FREE_CQ_BUFS(hw, cq, rq); ice_free_cq_ring(hw, &cq->rq); init_ctrlq_exit: return ret_code; } -#define ICE_FREE_CQ_BUFS(hw, qi, ring) \ -do { \ - int i; \ - /* free descriptors */ \ - for (i = 0; i < (qi)->num_##ring##_entries; i++) \ - if ((qi)->ring.r.ring##_bi[i].pa) \ - ice_free_dma_mem((hw), \ - &(qi)->ring.r.ring##_bi[i]); \ - /* free the buffer info list */ \ - if ((qi)->ring.cmd_buf) \ - ice_free(hw, (qi)->ring.cmd_buf); \ - /* free DMA head */ \ - ice_free(hw, (qi)->ring.dma_head); \ -} while (0) - /** * ice_shutdown_sq - shutdown the Control ATQ * @hw: pointer to the hardware structure -- 2.13.6