From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id A6F5BA00C5; Thu, 11 Jun 2020 11:09:37 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id DE1BB1BE88; Thu, 11 Jun 2020 11:09:24 +0200 (CEST) Received: from mga07.intel.com (mga07.intel.com [134.134.136.100]) by dpdk.org (Postfix) with ESMTP id A222D1BDF8 for ; Thu, 11 Jun 2020 11:09:23 +0200 (CEST) IronPort-SDR: KEbzTM7wSDSX+qAyyqn1EBdS0r4h5CVU7tzNYGsiccAS94z4xDEVXYv2wr2CP7NceYJZ/vL0Q5 +CpChHVdkVyg== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga005.fm.intel.com ([10.253.24.32]) by orsmga105.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 11 Jun 2020 02:09:23 -0700 IronPort-SDR: xA6h2U7DJyRmJEnHUOPffajRjmNkBgQ7UckyGr8jm4Qw7rjg8fprnBB+hxiomp71vzM5GFIU+A 4fwIMItUXaOQ== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,499,1583222400"; d="scan'208";a="473737173" Received: from dpdk-xuting-main.sh.intel.com ([10.67.117.84]) by fmsmga005.fm.intel.com with ESMTP; 11 Jun 2020 02:09:21 -0700 From: Ting Xu To: dev@dpdk.org Cc: xiaolong.ye@intel.com, qi.z.zhang@intel.com, qiming.yang@intel.com, john.mcnamara@intel.com, marko.kovacevic@intel.com Date: Thu, 11 Jun 2020 17:08:29 +0000 Message-Id: <20200611170839.9206-3-ting.xu@intel.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200611170839.9206-1-ting.xu@intel.com> References: <20200605201737.33766-1-ting.xu@intel.com> <20200611170839.9206-1-ting.xu@intel.com> Subject: [dpdk-dev] [PATCH v2 02/12] net/ice: complete device info get in DCF X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" From: Qi Zhang Add support to get complete device information for DCF, including Rx/Tx offload capabilities and default configuration. Signed-off-by: Qi Zhang Signed-off-by: Ting Xu --- drivers/net/ice/ice_dcf_ethdev.c | 72 ++++++++++++++++++++++++++++++-- 1 file changed, 69 insertions(+), 3 deletions(-) diff --git a/drivers/net/ice/ice_dcf_ethdev.c b/drivers/net/ice/ice_dcf_ethdev.c index e5ba1a61f..7f24ef81a 100644 --- a/drivers/net/ice/ice_dcf_ethdev.c +++ b/drivers/net/ice/ice_dcf_ethdev.c @@ -24,6 +24,7 @@ #include "ice_generic_flow.h" #include "ice_dcf_ethdev.h" +#include "ice_rxtx.h" static uint16_t ice_dcf_recv_pkts(__rte_unused void *rx_queue, @@ -66,11 +67,76 @@ ice_dcf_dev_info_get(struct rte_eth_dev *dev, struct rte_eth_dev_info *dev_info) { struct ice_dcf_adapter *adapter = dev->data->dev_private; + struct ice_dcf_hw *hw = &adapter->real_hw; dev_info->max_mac_addrs = 1; - dev_info->max_rx_pktlen = (uint32_t)-1; - dev_info->max_rx_queues = RTE_DIM(adapter->rxqs); - dev_info->max_tx_queues = RTE_DIM(adapter->txqs); + dev_info->max_rx_queues = hw->vsi_res->num_queue_pairs; + dev_info->max_tx_queues = hw->vsi_res->num_queue_pairs; + dev_info->min_rx_bufsize = ICE_BUF_SIZE_MIN; + dev_info->max_rx_pktlen = ICE_FRAME_SIZE_MAX; + dev_info->hash_key_size = hw->vf_res->rss_key_size; + dev_info->reta_size = hw->vf_res->rss_lut_size; + dev_info->flow_type_rss_offloads = ICE_RSS_OFFLOAD_ALL; + + dev_info->rx_offload_capa = + DEV_RX_OFFLOAD_VLAN_STRIP | + DEV_RX_OFFLOAD_QINQ_STRIP | + DEV_RX_OFFLOAD_IPV4_CKSUM | + DEV_RX_OFFLOAD_UDP_CKSUM | + DEV_RX_OFFLOAD_TCP_CKSUM | + DEV_RX_OFFLOAD_OUTER_IPV4_CKSUM | + DEV_RX_OFFLOAD_SCATTER | + DEV_RX_OFFLOAD_JUMBO_FRAME | + DEV_RX_OFFLOAD_VLAN_FILTER | + DEV_RX_OFFLOAD_RSS_HASH; + dev_info->tx_offload_capa = + DEV_TX_OFFLOAD_VLAN_INSERT | + DEV_TX_OFFLOAD_QINQ_INSERT | + DEV_TX_OFFLOAD_IPV4_CKSUM | + DEV_TX_OFFLOAD_UDP_CKSUM | + DEV_TX_OFFLOAD_TCP_CKSUM | + DEV_TX_OFFLOAD_SCTP_CKSUM | + DEV_TX_OFFLOAD_OUTER_IPV4_CKSUM | + DEV_TX_OFFLOAD_TCP_TSO | + DEV_TX_OFFLOAD_VXLAN_TNL_TSO | + DEV_TX_OFFLOAD_GRE_TNL_TSO | + DEV_TX_OFFLOAD_IPIP_TNL_TSO | + DEV_TX_OFFLOAD_GENEVE_TNL_TSO | + DEV_TX_OFFLOAD_MULTI_SEGS; + + dev_info->default_rxconf = (struct rte_eth_rxconf) { + .rx_thresh = { + .pthresh = ICE_DEFAULT_RX_PTHRESH, + .hthresh = ICE_DEFAULT_RX_HTHRESH, + .wthresh = ICE_DEFAULT_RX_WTHRESH, + }, + .rx_free_thresh = ICE_DEFAULT_RX_FREE_THRESH, + .rx_drop_en = 0, + .offloads = 0, + }; + + dev_info->default_txconf = (struct rte_eth_txconf) { + .tx_thresh = { + .pthresh = ICE_DEFAULT_TX_PTHRESH, + .hthresh = ICE_DEFAULT_TX_HTHRESH, + .wthresh = ICE_DEFAULT_TX_WTHRESH, + }, + .tx_free_thresh = ICE_DEFAULT_TX_FREE_THRESH, + .tx_rs_thresh = ICE_DEFAULT_TX_RSBIT_THRESH, + .offloads = 0, + }; + + dev_info->rx_desc_lim = (struct rte_eth_desc_lim) { + .nb_max = ICE_MAX_RING_DESC, + .nb_min = ICE_MIN_RING_DESC, + .nb_align = ICE_ALIGN_RING_DESC, + }; + + dev_info->tx_desc_lim = (struct rte_eth_desc_lim) { + .nb_max = ICE_MAX_RING_DESC, + .nb_min = ICE_MIN_RING_DESC, + .nb_align = ICE_ALIGN_RING_DESC, + }; return 0; } -- 2.17.1