From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 9ACEAA0093; Mon, 15 Jun 2020 04:05:10 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id E0D681BF92; Mon, 15 Jun 2020 04:02:14 +0200 (CEST) Received: from mga06.intel.com (mga06.intel.com [134.134.136.31]) by dpdk.org (Postfix) with ESMTP id 902D21BF57 for ; Mon, 15 Jun 2020 04:02:05 +0200 (CEST) IronPort-SDR: oCiFdDkMVMUK8kZDbOVcYHVdGMDRfQ4kBm0ahsH8aJ25lIxCo90uyqRPQzgGx7KblukopKDyIZ EpskKd7ZvOTg== X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga004.fm.intel.com ([10.253.24.48]) by orsmga104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 14 Jun 2020 19:02:05 -0700 IronPort-SDR: 1re4TmDhZrNuck76kJEpYiuJ4QSapVAnwINCckJnmZj+K8CuGgO58dwOFQ98ZcmCNOPxAW+JPM 2+CUwwVvJxCw== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.73,513,1583222400"; d="scan'208";a="298319031" Received: from dpdk51.sh.intel.com ([10.67.111.82]) by fmsmga004.fm.intel.com with ESMTP; 14 Jun 2020 19:02:03 -0700 From: Qi Zhang To: ferruh.yigit@intel.com Cc: xiaolong.ye@intel.com, qiming.yang@intel.com, dev@dpdk.org, Qi Zhang , Dan Nowlin , "Paul M . Stillwell Jr" Date: Mon, 15 Jun 2020 10:04:44 +0800 Message-Id: <20200615020515.1359-23-qi.z.zhang@intel.com> X-Mailer: git-send-email 2.13.6 In-Reply-To: <20200615020515.1359-1-qi.z.zhang@intel.com> References: <20200603024016.30636-1-qi.z.zhang@intel.com> <20200615020515.1359-1-qi.z.zhang@intel.com> Subject: [dpdk-dev] [PATCH v3 22/53] net/ice/base: increase timeout after PF Reset X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" To allow for resets during package download, increase the timeout period after performing a PF Reset. The time waited is the global config lock timeout plus the normal PFSWR timeout. Signed-off-by: Dan Nowlin Signed-off-by: Paul M. Stillwell Jr Signed-off-by: Qi Zhang --- drivers/net/ice/base/ice_common.c | 7 ++++++- 1 file changed, 6 insertions(+), 1 deletion(-) diff --git a/drivers/net/ice/base/ice_common.c b/drivers/net/ice/base/ice_common.c index 8ba603242..a617643b6 100644 --- a/drivers/net/ice/base/ice_common.c +++ b/drivers/net/ice/base/ice_common.c @@ -912,7 +912,12 @@ static enum ice_status ice_pf_reset(struct ice_hw *hw) wr32(hw, PFGEN_CTRL, (reg | PFGEN_CTRL_PFSWR_M)); - for (cnt = 0; cnt < ICE_PF_RESET_WAIT_COUNT; cnt++) { + /* Wait for the PFR to complete. The wait time is the global config lock + * timeout plus the PFR timeout which will account for a possible reset + * that is occurring during a download package operation. + */ + for (cnt = 0; cnt < ICE_GLOBAL_CFG_LOCK_TIMEOUT + + ICE_PF_RESET_WAIT_COUNT; cnt++) { reg = rd32(hw, PFGEN_CTRL); if (!(reg & PFGEN_CTRL_PFSWR_M)) break; -- 2.13.6