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SFV:NSPM; H:AM0PR05MB4866.eurprd05.prod.outlook.com; PTR:; CAT:NONE; SFTY:; SFS:(4636009)(376002)(366004)(39860400002)(396003)(346002)(136003)(36756003)(66556008)(66476007)(6506007)(4326008)(5660300002)(6486002)(66946007)(26005)(186003)(107886003)(16526019)(316002)(86362001)(6512007)(1076003)(478600001)(2616005)(6666004)(8676002)(83380400001)(956004)(52116002)(2906002)(8936002); DIR:OUT; SFP:1101; X-MS-Exchange-AntiSpam-MessageData: /FKjC13NoF4bgpuS7a6/MsSP4Z7ebKnsJYnTHaVfhJ4Z4/naPCi+YrygKI1BU62ovzXCFL36oQVB3FjlOj7BEgAhSFwdAiPTktLuyqMIQTkiB3KCfRtLpm07RRM0yvx45/VrYt2De3JpA9CU5+RdyWE+NRF7hW+Nm2wrLLtONrNTtfxlk1t2OFZDH/+uqA5fEIbZQPy1JoOppktuuKa/tIM+R3DW0pVed4CZCt67P8f9QeGjVEfFgPdcIVvV7yRWIQ8nDqNjL86Oz0Firo2/jL+PUT0EmB3OmL4Czj6vmn50pbKzALe9IzRcQfrzsCt+dTFYHYd4MFHNjsIi0nerzZZG6ua6GgTIUGdUApxzVYtiv/vEIaEfDxgmYsMM4etRYozZFxkiui0z0OBykkEZpNdKoxw3HKvSp69TJJDiDVRL2gNroZl9wjFB1lXBzQRrE6c2ijtUExRTONG1qN5P9Qf0oZnLThDyiyRo7FuDWM9jpXcGr+vtqHzWzI/mvxjh X-OriginatorOrg: Mellanox.com X-MS-Exchange-CrossTenant-Network-Message-Id: b9881d33-0f3d-41dd-2520-08d8161703da X-MS-Exchange-CrossTenant-OriginalArrivalTime: 21 Jun 2020 19:12:17.9261 (UTC) X-MS-Exchange-CrossTenant-FromEntityHeader: Hosted X-MS-Exchange-CrossTenant-Id: a652971c-7d2e-4d9b-a6a4-d149256f461b X-MS-Exchange-CrossTenant-MailboxType: HOSTED X-MS-Exchange-CrossTenant-UserPrincipalName: tVQvf/zr/BACk/yiOVFWQNj8uyid9wXhpQSmxbQtSX8744REIuv2rV5Ddqe/fhMKFyM341waHMALy9kk5GciTA== X-MS-Exchange-Transport-CrossTenantHeadersStamped: AM0PR05MB6307 Subject: [dpdk-dev] [PATCH v2 0/6] Improve mlx5 PMD common driver framework for multiple classes X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This commit introduces mlx5 bus to support multiple class of devices for a single PCI device. Motivation and example ---------------------- mlx5 PCI device supports multiple class of devices such as net, vdpa and regex devices. Currently only one pmd (either net or vdpa) can bind to this device. This design limits use of PCI device only for single device class. To support multiple classes simultaneously for a mlx5 PCI device, a new mlx5 PCI bus is created. This bus allows binding multiple class drivers (such as net, vdpa, regex(future)) to bind to the mlx5 PCI bus driver. Change description ------------------ Patch-1 prepares the code to have RTE_BIT() macro defined in a common header. Patch-2 Changes class value to a bit field Patch-3 Exposes mlx5_pci class driver registration APIs PAtch-4 Implements mlx5 PCI bus Patch-5 Migrates mlx5 net and vdpa driver to use mlx5 PCI bus API instead of rte PCI bus API Patch-6 Removed class check code as its already part of the bus now Design overview --------------- ----------- ------------ ------------- | mlx5 | | mlx5 | | mlx5 | | net pmd | | vdpa pmd | | regex pmd | ----------- ------------ ------------- \ | / \ | / \ ------------- / \______| mlx5 |_____ / | pci bus | ------------- | ----------- | mlx5 | | pci dev | ----------- - mlx5 pci bus driver binds to mlx5 PCI devices defined by PCI ID table of all related mlx5 PCI devices. - mlx5 class driver such as net, vdpa, regex PMD defines its specific PCI ID table and mlx5 bus driver probes matching class drivers. - mlx5 pci bus driver is cental place that validates supported class combinations. - In future as code evolves, more device setup/cleanup and resource creation code moves to mlx5 PCI bus driver. Alternatives considered ----------------------- 1. Instead of creating mlx5 pci bus, a common driver is implemented which exposes class registration API. However, bus model fits better with existing DPDK design similar to ifpga driver. Class registration API need to create a new callbacks and ID signature; instead it is better to utilize current well defined methods. 2. Enhance pci core to allow multiple driver binding to single rte PCI device. This approach is not taken, because peer drivers using one PCI device won't be aware of other's presence. This requires cross-driver syncronization of who initializes common resources (such as irq, eq and more). This also requires refcounting common objects etc among peer drivers. Instead of layered approach delivers and allows putting common resource sharing, setup code in common bus driver. It also eliminates peer blind zone problem as bottom pci bus layer provides necessary setup without any reference counting. 3. In future mlx5 prefers to use RDMA MR cache of the mbuf used between net and regex pmd so that same mbuf use across multiple device can be possible. Examples: -------- A user who wish to use a specific class(es) provides list of classes at command line such as, ./testpmd -w ,class=net:vdpa ./testpmd -w ,class=vdpa In future, ./testpmd -w ,class=net:regex Changelog: v1->v2: - Addressed most comments from Thomas and Gaetan. - Symbols starting with prefix rte_bus_pci_mlx5 may be confusing as it may appear as it belong to rte_bus_pci module. Hence it is kept as rte_bus_mlx5_pci which matches with other modules as mlx5_vdpa, mlx5_net. - Dropped 2nd patch and replace with new 6th patch. - Avoided new file, added macro to rte_bitops.h - Inheriting ret_pci_driver instead of rte_driver - Added design and description of the mlx5_pci bus - Enhanced driver to honor RTE_PCI_DRV_PROBE_AGAIN drv_flag - Use anonymous structure for class search and code changes around it - Define static for class comination array - Use RTE_DIM to find array size - Added OOM check for strdup() - Renamed copy variable to nstr_orig - Returning negagive error code - Returning directly if match entry found - Use compat condition check - Avoided cutting error message string - USe uint32_t datatype instead of enum mlx5_class - Changed logic to parse device arguments only once during probe() - Added check to fail driver probe if multiple classes register with DMA ops - Renamed function to parse_class_options - Migreate API from rte_driver to rte_pci_driver Parav Pandit (6): eal: introduce macros for getting value for bit common/mlx5: change mlx5 class enum values as bits bus/mlx5_pci: add mlx5 PCI bus bus/mlx5_pci: register a PCI driver bus/mlx5_pci: enable net and vDPA to use mlx5 PCI bus driver common/mlx5: Remove class checks from individual driver config/common_base | 6 + config/defconfig_arm64-bluefield-linuxapp-gcc | 6 + drivers/bus/Makefile | 3 + drivers/bus/meson.build | 2 +- drivers/bus/mlx5_pci/Makefile | 49 +++ drivers/bus/mlx5_pci/meson.build | 6 + drivers/bus/mlx5_pci/mlx5_pci_bus.c | 364 ++++++++++++++++++ drivers/bus/mlx5_pci/rte_bus_mlx5_pci.h | 85 ++++ .../bus/mlx5_pci/rte_bus_mlx5_pci_version.map | 5 + drivers/common/mlx5/mlx5_common.c | 37 -- drivers/common/mlx5/mlx5_common.h | 7 +- .../common/mlx5/rte_common_mlx5_version.map | 2 - drivers/net/mlx5/Makefile | 3 +- drivers/net/mlx5/linux/mlx5_os.c | 6 - drivers/net/mlx5/linux/mlx5_os.h | 1 + drivers/net/mlx5/meson.build | 2 +- drivers/net/mlx5/mlx5.c | 24 +- drivers/net/mlx5/mlx5.h | 1 - drivers/vdpa/mlx5/Makefile | 3 +- drivers/vdpa/mlx5/meson.build | 2 +- drivers/vdpa/mlx5/mlx5_vdpa.c | 28 +- lib/librte_eal/include/rte_bitops.h | 2 + mk/rte.app.mk | 1 + 23 files changed, 565 insertions(+), 80 deletions(-) create mode 100644 drivers/bus/mlx5_pci/Makefile create mode 100644 drivers/bus/mlx5_pci/meson.build create mode 100644 drivers/bus/mlx5_pci/mlx5_pci_bus.c create mode 100644 drivers/bus/mlx5_pci/rte_bus_mlx5_pci.h create mode 100644 drivers/bus/mlx5_pci/rte_bus_mlx5_pci_version.map -- 2.25.4