From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from dpdk.org (dpdk.org [92.243.14.124]) by inbox.dpdk.org (Postfix) with ESMTP id 6E39FA0546; Thu, 16 Jul 2020 13:48:11 +0200 (CEST) Received: from [92.243.14.124] (localhost [127.0.0.1]) by dpdk.org (Postfix) with ESMTP id 232E21BFB1; Thu, 16 Jul 2020 13:47:55 +0200 (CEST) Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by dpdk.org (Postfix) with ESMTP id 7DEED1BFA3 for ; Thu, 16 Jul 2020 13:47:49 +0200 (CEST) IronPort-SDR: GSQKbdVqIsGLFH42Y1Pckj03RgvsRT4K9++y/h9o0r96XCN7IotjQEcVoZGL+Oqrzp8SQ0QXsB 7D504iEV0OXA== X-IronPort-AV: E=McAfee;i="6000,8403,9683"; a="149352017" X-IronPort-AV: E=Sophos;i="5.75,359,1589266800"; d="scan'208";a="149352017" X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga002.fm.intel.com ([10.253.24.26]) by orsmga103.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384; 16 Jul 2020 04:47:48 -0700 IronPort-SDR: jdbpFH/weVLPeqP+Rq1ChK4ud/oDbTGaFpIAe4G2YmCEd73iABn8rVF+HVRhCJ8/t+a5mSG15o b58cM0LuUhig== X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.75,359,1589266800"; d="scan'208";a="318396563" Received: from adamdybx-mobl.ger.corp.intel.com ([10.104.121.51]) by fmsmga002.fm.intel.com with ESMTP; 16 Jul 2020 04:47:47 -0700 From: Adam Dybkowski To: dev@dpdk.org, fiona.trahe@intel.com, akhil.goyal@nxp.com Cc: Adam Dybkowski Date: Thu, 16 Jul 2020 13:47:22 +0200 Message-Id: <20200716114723.965-2-adamx.dybkowski@intel.com> X-Mailer: git-send-email 2.25.1 In-Reply-To: <20200716114723.965-1-adamx.dybkowski@intel.com> References: <20200713110953.3575-1-adamx.dybkowski@intel.com> <20200716114723.965-1-adamx.dybkowski@intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 8bit Subject: [dpdk-dev] [PATCH v3 1/2] common/qat: support GEN2 QAT device 200xx X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: DPDK patches and discussions List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dev-bounces@dpdk.org Sender: "dev" This adds pci detection and documentation for Intel GEN2 QuickAssist device 200xx (PF Did 0x18ee, VF Did 0x18ef). Signed-off-by: Adam Dybkowski --- doc/guides/cryptodevs/qat.rst | 7 +++++-- doc/guides/rel_notes/release_20_08.rst | 2 ++ drivers/common/qat/qat_device.c | 6 +++++- 3 files changed, 12 insertions(+), 3 deletions(-) diff --git a/doc/guides/cryptodevs/qat.rst b/doc/guides/cryptodevs/qat.rst index 931a18f9a..b681180af 100644 --- a/doc/guides/cryptodevs/qat.rst +++ b/doc/guides/cryptodevs/qat.rst @@ -22,6 +22,7 @@ poll mode crypto driver support for the following hardware accelerator devices: * ``Intel QuickAssist Technology DH895xCC`` * ``Intel QuickAssist Technology C62x`` * ``Intel QuickAssist Technology C3xxx`` +* ``Intel QuickAssist Technology 200xx`` * ``Intel QuickAssist Technology D15xx`` * ``Intel QuickAssist Technology C4xxx`` @@ -391,6 +392,8 @@ to see the full table) +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ | Yes | Yes | Yes | " | " | 01.org/4.2.0+ | " | " | " | " | " | " | +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ + | Yes | No | No | 2 | 200xx | p | qat_200xx | 200xx | 18ee | 1 | 18ef | 16 | + +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ | Yes | No | No | 2 | D15xx | p | qat_d15xx | d15xx | 6f54 | 1 | 6f55 | 16 | +-----+-----+-----+-----+----------+---------------+---------------+------------+--------+------+--------+--------+ | Yes | No | No | 3 | C4xxx | p | qat_c4xxx | c4xxx | 18a0 | 1 | 18a1 | 128 | @@ -617,8 +620,8 @@ adjust the unbind command below:: done; \ done -For Intel(R) QuickAssist Technology C3xxx or D15xx device -^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ +For Intel(R) QuickAssist Technology C3xxx or 200xx or D15xx device +^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ The unbind command below assumes ``BDFs`` of ``01:01.00-01:02.07``, if your VFs are different adjust the unbind command below:: diff --git a/doc/guides/rel_notes/release_20_08.rst b/doc/guides/rel_notes/release_20_08.rst index f19b74872..e598d4882 100644 --- a/doc/guides/rel_notes/release_20_08.rst +++ b/doc/guides/rel_notes/release_20_08.rst @@ -191,6 +191,8 @@ New Features ``rte_security`` API. * Added Chacha20-Poly1305 AEAD algorithm. * Improved handling of multi process in QAT crypto and compression PMDs. + * Added support for Intel GEN2 QuickAssist device 200xx + (PF Did 0x18ee, VF Did 0x18ef). * **Updated the OCTEON TX2 crypto PMD.** diff --git a/drivers/common/qat/qat_device.c b/drivers/common/qat/qat_device.c index a6ab29f95..b050ce20e 100644 --- a/drivers/common/qat/qat_device.c +++ b/drivers/common/qat/qat_device.c @@ -1,5 +1,5 @@ /* SPDX-License-Identifier: BSD-3-Clause - * Copyright(c) 2018 Intel Corporation + * Copyright(c) 2018-2020 Intel Corporation */ #include @@ -53,6 +53,9 @@ static const struct rte_pci_id pci_id_qat_map[] = { { RTE_PCI_DEVICE(0x8086, 0x6f55), }, + { + RTE_PCI_DEVICE(0x8086, 0x18ef), + }, { RTE_PCI_DEVICE(0x8086, 0x18a1), }, @@ -223,6 +226,7 @@ qat_pci_device_allocate(struct rte_pci_device *pci_dev, case 0x37c9: case 0x19e3: case 0x6f55: + case 0x18ef: qat_dev->qat_dev_gen = QAT_GEN2; break; case 0x18a1: -- 2.25.1