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From: Manish Chopra <manishc@marvell.com>
To: <jerinjacobk@gmail.com>, <jerinj@marvell.com>,
	<ferruh.yigit@intel.com>, <grive@u256.net>
Cc: <dev@dpdk.org>, <irusskikh@marvell.com>, <rmody@marvell.com>,
	<GR-Everest-DPDK-Dev@marvell.com>, <rosen.xu@intel.com>,
	<tianfei.zhang@intel.com>, <heinrich.kuhn@netronome.com>,
	<qiming.yang@intel.com>, <qi.z.zhang@intel.com>
Subject: [dpdk-dev] [PATCH v5 6/6] net/qede: add VF FLR support
Date: Thu, 30 Jul 2020 07:42:21 -0700
Message-ID: <20200730144221.29051-7-manishc@marvell.com> (raw)
In-Reply-To: <20200730144221.29051-1-manishc@marvell.com>

This patch adds required bit to handle VF FLR
indication from Management FW (MFW) of the device

With that VFs were able to load in VM (VF attached as PCI
passthrough to the guest VM) followed by FLR successfully

Updated the docs/guides with the feature support

Signed-off-by: Manish Chopra <manishc@marvell.com>
Signed-off-by: Igor Russkikh <irusskikh@marvell.com>
Signed-off-by: Rasesh Mody <rmody@marvell.com>
---
 doc/guides/nics/features/qede.ini |  1 +
 doc/guides/nics/qede.rst          |  7 +------
 drivers/net/qede/base/bcm_osal.c  |  5 +++++
 drivers/net/qede/base/bcm_osal.h  |  4 +++-
 drivers/net/qede/qede_sriov.c     | 18 ++++++++++++++++++
 5 files changed, 28 insertions(+), 7 deletions(-)

diff --git a/doc/guides/nics/features/qede.ini b/doc/guides/nics/features/qede.ini
index f8716523e..46fba8e6c 100644
--- a/doc/guides/nics/features/qede.ini
+++ b/doc/guides/nics/features/qede.ini
@@ -32,6 +32,7 @@ Basic stats          = Y
 Extended stats       = Y
 Stats per queue      = Y
 Registers dump       = Y
+SR-IOV               = Y
 Multiprocess aware   = Y
 Linux UIO            = Y
 Linux VFIO           = Y
diff --git a/doc/guides/nics/qede.rst b/doc/guides/nics/qede.rst
index 5b2f86895..e874915c2 100644
--- a/doc/guides/nics/qede.rst
+++ b/doc/guides/nics/qede.rst
@@ -34,18 +34,13 @@ Supported Features
 - VLAN offload - Filtering and stripping
 - N-tuple filter and flow director (limited support)
 - NPAR (NIC Partitioning)
-- SR-IOV VF
+- SR-IOV PF and VF
 - GRE Tunneling offload
 - GENEVE Tunneling offload
 - VXLAN Tunneling offload
 - MPLSoUDP Tx Tunneling offload
 - Generic flow API
 
-Non-supported Features
-----------------------
-
-- SR-IOV PF
-
 Co-existence considerations
 ---------------------------
 
diff --git a/drivers/net/qede/base/bcm_osal.c b/drivers/net/qede/base/bcm_osal.c
index ef47339df..44a8692f5 100644
--- a/drivers/net/qede/base/bcm_osal.c
+++ b/drivers/net/qede/base/bcm_osal.c
@@ -29,6 +29,11 @@ int osal_pf_vf_msg(struct ecore_hwfn *p_hwfn)
 	return rc;
 }
 
+void osal_vf_flr_update(struct ecore_hwfn *p_hwfn)
+{
+	qed_schedule_iov(p_hwfn, QED_IOV_WQ_FLR_FLAG);
+}
+
 void osal_poll_mode_dpc(osal_int_ptr_t hwfn_cookie)
 {
 	struct ecore_hwfn *p_hwfn = (struct ecore_hwfn *)hwfn_cookie;
diff --git a/drivers/net/qede/base/bcm_osal.h b/drivers/net/qede/base/bcm_osal.h
index cf58db8bf..c137004ba 100644
--- a/drivers/net/qede/base/bcm_osal.h
+++ b/drivers/net/qede/base/bcm_osal.h
@@ -349,7 +349,9 @@ u32 qede_find_first_zero_bit(u32 *bitmap, u32 length);
 /* SR-IOV channel */
 
 int osal_pf_vf_msg(struct ecore_hwfn *p_hwfn);
-#define OSAL_VF_FLR_UPDATE(hwfn) nothing
+void osal_vf_flr_update(struct ecore_hwfn *p_hwfn);
+#define OSAL_VF_FLR_UPDATE(hwfn) \
+	osal_vf_flr_update(hwfn)
 #define OSAL_VF_SEND_MSG2PF(dev, done, msg, reply_addr, msg_size, reply_size) 0
 #define OSAL_VF_CQE_COMPLETION(_dev_p, _cqe, _protocol)	(0)
 #define OSAL_PF_VF_MSG(hwfn, vfid) \
diff --git a/drivers/net/qede/qede_sriov.c b/drivers/net/qede/qede_sriov.c
index 93f7a2a55..0b99a8d6f 100644
--- a/drivers/net/qede/qede_sriov.c
+++ b/drivers/net/qede/qede_sriov.c
@@ -151,6 +151,7 @@ static void qed_handle_bulletin_post(struct ecore_hwfn *hwfn)
 void qed_iov_pf_task(void *arg)
 {
 	struct ecore_hwfn *p_hwfn = arg;
+	int rc;
 
 	if (OSAL_GET_BIT(QED_IOV_WQ_MSG_FLAG, &p_hwfn->iov_task_flags)) {
 		OSAL_CLEAR_BIT(QED_IOV_WQ_MSG_FLAG, &p_hwfn->iov_task_flags);
@@ -163,6 +164,23 @@ void qed_iov_pf_task(void *arg)
 			       &p_hwfn->iov_task_flags);
 		qed_handle_bulletin_post(p_hwfn);
 	}
+
+	if (OSAL_GET_BIT(QED_IOV_WQ_FLR_FLAG, &p_hwfn->iov_task_flags)) {
+		struct ecore_ptt *p_ptt = ecore_ptt_acquire(p_hwfn);
+
+		OSAL_CLEAR_BIT(QED_IOV_WQ_FLR_FLAG, &p_hwfn->iov_task_flags);
+
+		if (!p_ptt) {
+			qed_schedule_iov(p_hwfn, QED_IOV_WQ_FLR_FLAG);
+			return;
+		}
+
+		rc = ecore_iov_vf_flr_cleanup(p_hwfn, p_ptt);
+		if (rc)
+			qed_schedule_iov(p_hwfn, QED_IOV_WQ_FLR_FLAG);
+
+		ecore_ptt_release(p_hwfn, p_ptt);
+	}
 }
 
 int qed_schedule_iov(struct ecore_hwfn *p_hwfn, enum qed_iov_wq_flag flag)
-- 
2.17.1


      parent reply index

Thread overview: 8+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2020-07-30 14:42 [dpdk-dev] [PATCH v5 0/6] qede: SR-IOV PF driver support Manish Chopra
2020-07-30 14:42 ` [dpdk-dev] [PATCH v5 1/6] drivers: add generic API to find PCI extended cap Manish Chopra
2020-08-07 17:46   ` Nithin Dabilpuram
2020-07-30 14:42 ` [dpdk-dev] [PATCH v5 2/6] net/qede: define PCI config space specific osals Manish Chopra
2020-07-30 14:42 ` [dpdk-dev] [PATCH v5 3/6] net/qede: configure VFs on hardware Manish Chopra
2020-07-30 14:42 ` [dpdk-dev] [PATCH v5 4/6] net/qede: add infrastructure support for VF load Manish Chopra
2020-07-30 14:42 ` [dpdk-dev] [PATCH v5 5/6] net/qede: initialize VF MAC and link Manish Chopra
2020-07-30 14:42 ` Manish Chopra [this message]

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