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From: Thomas Monjalon <thomas.monjalon@6wind.com>
To: "Ananyev, Konstantin" <konstantin.ananyev@intel.com>,
	Eric Kinzie <ehkinzie@gmail.com>,
	WangDong <dong.wang.pro@hotmail.com>
Cc: dev@dpdk.org
Subject: Re: [dpdk-dev] [PATCH 2/2] ixgbe: add memory barriers in vector rx/tx
Date: Mon, 03 Aug 2015 17:08:55 +0200	[thread overview]
Message-ID: <2020076.2eyxpzhXZx@xps13> (raw)
In-Reply-To: <2601191342CEEE43887BDE71AB97725836A1F275@irsmsx105.ger.corp.intel.com>

2015-06-29 11:28, Ananyev, Konstantin:
> Hi Eric,
> 
> > -----Original Message-----
> > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Eric Kinzie
> > Sent: Thursday, June 25, 2015 7:26 PM
> > To: dev@dpdk.org
> > Subject: [dpdk-dev] [PATCH 2/2] ixgbe: add memory barriers in vector rx/tx
> > 
> > Add write memory barrier before writing tail pointer.
> > 
> > Fixes c95584dc2b18 ("ixgbe: new vectorized functions for Rx/Tx")
> > 
> > Signed-off-by: Eric Kinzie <ehkinzie@gmail.com>
> > ---
> >  drivers/net/ixgbe/ixgbe_rxtx_vec.c |    3 +++
> >  1 file changed, 3 insertions(+)
> > 
> > diff --git a/drivers/net/ixgbe/ixgbe_rxtx_vec.c b/drivers/net/ixgbe/ixgbe_rxtx_vec.c
> > index abd10f6..b601de8 100644
> > --- a/drivers/net/ixgbe/ixgbe_rxtx_vec.c
> > +++ b/drivers/net/ixgbe/ixgbe_rxtx_vec.c
> > @@ -123,6 +123,7 @@ ixgbe_rxq_rearm(struct ixgbe_rx_queue *rxq)
> >  			     (rxq->nb_rx_desc - 1) : (rxq->rxrearm_start - 1));
> > 
> >  	/* Update the tail pointer on the NIC */
> > +	rte_wmb();
> >  	IXGBE_PCI_REG_WRITE(rxq->rdt_reg_addr, rx_id);
> >  }
> > 
> > @@ -645,6 +646,8 @@ ixgbe_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts,
> > 
> >  	txq->tx_tail = tx_id;
> > 
> > +	/* update tail pointer */
> > +	rte_wmb();
> >  	IXGBE_PCI_REG_WRITE(txq->tdt_reg_addr, txq->tx_tail);
> > 
> >  	return nb_pkts;
> 
> 
> There were several discussions about that subject already:
> why fence is not necessary here for IA and why we don't want to put it here:
> That I suppose was the last one:
> http://dpdk.org/ml/archives/dev/2015-April/016463.html
> As I can see, Dong already submitted patches for  that:
> http://dpdk.org/dev/patchwork/patch/5884/ 
> Though I didn't look at it closely yet.

It will be a good idea to re-open the topic of the cross-arch memory barriers
at the beginning of the 2.2 cycle.
Thanks

  reply	other threads:[~2015-08-03 15:10 UTC|newest]

Thread overview: 7+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2015-06-25 18:25 [dpdk-dev] [PATCH 0/2] ixgbe vector rx/tx changes Eric Kinzie
2015-06-25 18:25 ` [dpdk-dev] [PATCH 1/2] ixgbe: vector rx rearm after queue reset Eric Kinzie
2015-08-03 15:07   ` Thomas Monjalon
2015-06-25 18:25 ` [dpdk-dev] [PATCH 2/2] ixgbe: add memory barriers in vector rx/tx Eric Kinzie
2015-06-29 11:28   ` Ananyev, Konstantin
2015-08-03 15:08     ` Thomas Monjalon [this message]
2015-10-21 15:36       ` Thomas Monjalon

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