From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail-wi0-f175.google.com (mail-wi0-f175.google.com [209.85.212.175]) by dpdk.org (Postfix) with ESMTP id B35FDC3DC for ; Mon, 3 Aug 2015 17:10:10 +0200 (CEST) Received: by wibxm9 with SMTP id xm9so126044856wib.0 for ; Mon, 03 Aug 2015 08:10:10 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20130820; h=x-gm-message-state:from:to:cc:subject:date:message-id:organization :user-agent:in-reply-to:references:mime-version :content-transfer-encoding:content-type; bh=URcPChCqtzFGGRGbE+Ccl/8zNsPg8+iZrA9ICgD498s=; b=U8oiDRb/9JH1cL3rw0649zn2HC1x5I6r22oqugWClth7Apm7vA57mo4H1mXGP+6IYA jt+JVbUQbdZ66CeI9l6nbuwuk05Io8pQhZHLOvbN6KpKf1mbGciMwhFJlt7esrV/6LzY zk+vfwZfENTry2WsRSADRJOFxvYSz3eaFhCYDj+zgB4wBXhSM1KBtz6vBuT0zqXDaW0g pvKgjEWDcw1kowFF1HAnCGk7ZF6zY32QCYReJOntzWe/xw0wvnjFm5mtI/S/6kl4xa0l cnQaoz6lFj4+0WNolfoNmHYNTuRVMM7MyrV/Q0UKcTlUitxtHjvyTfIUun5Xug/Mytcj fSXA== X-Gm-Message-State: ALoCoQlnuhzZP/2VTQjMZ2ju4NSsUKOjF9Ytz1v6jRHbw8d6SAuMJNz9hY74xTzOYQ+bHskJpv04 X-Received: by 10.180.77.115 with SMTP id r19mr35751661wiw.9.1438614610554; Mon, 03 Aug 2015 08:10:10 -0700 (PDT) Received: from xps13.localnet (136-92-190-109.dsl.ovh.fr. [109.190.92.136]) by smtp.gmail.com with ESMTPSA id uo6sm23375536wjc.1.2015.08.03.08.10.08 (version=TLSv1.2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 03 Aug 2015 08:10:09 -0700 (PDT) From: Thomas Monjalon To: "Ananyev, Konstantin" , Eric Kinzie , WangDong Date: Mon, 03 Aug 2015 17:08:55 +0200 Message-ID: <2020076.2eyxpzhXZx@xps13> Organization: 6WIND User-Agent: KMail/4.14.8 (Linux/4.0.4-2-ARCH; KDE/4.14.8; x86_64; ; ) In-Reply-To: <2601191342CEEE43887BDE71AB97725836A1F275@irsmsx105.ger.corp.intel.com> References: <1435256741-25489-1-git-send-email-ehkinzie@gmail.com> <1435256741-25489-3-git-send-email-ehkinzie@gmail.com> <2601191342CEEE43887BDE71AB97725836A1F275@irsmsx105.ger.corp.intel.com> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" Cc: dev@dpdk.org Subject: Re: [dpdk-dev] [PATCH 2/2] ixgbe: add memory barriers in vector rx/tx X-BeenThere: dev@dpdk.org X-Mailman-Version: 2.1.15 Precedence: list List-Id: patches and discussions about DPDK List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 03 Aug 2015 15:10:11 -0000 2015-06-29 11:28, Ananyev, Konstantin: > Hi Eric, > > > -----Original Message----- > > From: dev [mailto:dev-bounces@dpdk.org] On Behalf Of Eric Kinzie > > Sent: Thursday, June 25, 2015 7:26 PM > > To: dev@dpdk.org > > Subject: [dpdk-dev] [PATCH 2/2] ixgbe: add memory barriers in vector rx/tx > > > > Add write memory barrier before writing tail pointer. > > > > Fixes c95584dc2b18 ("ixgbe: new vectorized functions for Rx/Tx") > > > > Signed-off-by: Eric Kinzie > > --- > > drivers/net/ixgbe/ixgbe_rxtx_vec.c | 3 +++ > > 1 file changed, 3 insertions(+) > > > > diff --git a/drivers/net/ixgbe/ixgbe_rxtx_vec.c b/drivers/net/ixgbe/ixgbe_rxtx_vec.c > > index abd10f6..b601de8 100644 > > --- a/drivers/net/ixgbe/ixgbe_rxtx_vec.c > > +++ b/drivers/net/ixgbe/ixgbe_rxtx_vec.c > > @@ -123,6 +123,7 @@ ixgbe_rxq_rearm(struct ixgbe_rx_queue *rxq) > > (rxq->nb_rx_desc - 1) : (rxq->rxrearm_start - 1)); > > > > /* Update the tail pointer on the NIC */ > > + rte_wmb(); > > IXGBE_PCI_REG_WRITE(rxq->rdt_reg_addr, rx_id); > > } > > > > @@ -645,6 +646,8 @@ ixgbe_xmit_pkts_vec(void *tx_queue, struct rte_mbuf **tx_pkts, > > > > txq->tx_tail = tx_id; > > > > + /* update tail pointer */ > > + rte_wmb(); > > IXGBE_PCI_REG_WRITE(txq->tdt_reg_addr, txq->tx_tail); > > > > return nb_pkts; > > > There were several discussions about that subject already: > why fence is not necessary here for IA and why we don't want to put it here: > That I suppose was the last one: > http://dpdk.org/ml/archives/dev/2015-April/016463.html > As I can see, Dong already submitted patches for that: > http://dpdk.org/dev/patchwork/patch/5884/ > Though I didn't look at it closely yet. It will be a good idea to re-open the topic of the cross-arch memory barriers at the beginning of the 2.2 cycle. Thanks