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From: Ciara Power <ciara.power@intel.com>
To: dev@dpdk.org
Cc: bruce.richardson@intel.com, thomas@monjalon.net,
Ciara Power <ciara.power@intel.com>
Date: Fri, 7 Aug 2020 13:29:55 +0100
Message-Id: <20200807123009.21266-6-ciara.power@intel.com>
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Subject: [dpdk-dev] [PATCH 20.11 05/19] doc: remove references to make in
bbdev guides
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Make is no longer supported for compiling DPDK, references are now
removed in the documentation.
Signed-off-by: Ciara Power <ciara.power@intel.com>
---
doc/guides/bbdevs/fpga_5gnr_fec.rst | 5 +----
doc/guides/bbdevs/fpga_lte_fec.rst | 5 +----
doc/guides/bbdevs/turbo_sw.rst | 15 ---------------
3 files changed, 2 insertions(+), 23 deletions(-)
diff --git a/doc/guides/bbdevs/fpga_5gnr_fec.rst b/doc/guides/bbdevs/fpga_5gnr_fec.rst
index 6760391e8c..76ac12cdc3 100644
--- a/doc/guides/bbdevs/fpga_5gnr_fec.rst
+++ b/doc/guides/bbdevs/fpga_5gnr_fec.rst
@@ -51,10 +51,7 @@ FPGA 5GNR FEC does not support the following:
Installation
------------
-Section 3 of the DPDK manual provides instructions on installing and compiling DPDK. The
-default set of bbdev compile flags may be found in config/common_base, where for example
-the flag to build the FPGA 5GNR FEC device, ``CONFIG_RTE_LIBRTE_PMD_BBDEV_FPGA_5GNR_FEC``,
-is already set.
+Section 3 of the DPDK manual provides instructions on installing and compiling DPDK.
DPDK requires hugepages to be configured as detailed in section 2 of the DPDK manual.
The bbdev test application has been tested with a configuration 40 x 1GB hugepages. The
diff --git a/doc/guides/bbdevs/fpga_lte_fec.rst b/doc/guides/bbdevs/fpga_lte_fec.rst
index fdc8a76981..340ce4ff37 100644
--- a/doc/guides/bbdevs/fpga_lte_fec.rst
+++ b/doc/guides/bbdevs/fpga_lte_fec.rst
@@ -50,10 +50,7 @@ FPGA LTE FEC does not support the following:
Installation
--------------
-Section 3 of the DPDK manual provides instructions on installing and compiling DPDK. The
-default set of bbdev compile flags may be found in config/common_base, where for example
-the flag to build the FPGA LTE FEC device, ``CONFIG_RTE_LIBRTE_PMD_BBDEV_FPGA_LTE_FEC``, is already
-set.
+Section 3 of the DPDK manual provides instructions on installing and compiling DPDK.
DPDK requires hugepages to be configured as detailed in section 2 of the DPDK manual.
The bbdev test application has been tested with a configuration 40 x 1GB hugepages. The
diff --git a/doc/guides/bbdevs/turbo_sw.rst b/doc/guides/bbdevs/turbo_sw.rst
index 20620c2e20..3b93157890 100644
--- a/doc/guides/bbdevs/turbo_sw.rst
+++ b/doc/guides/bbdevs/turbo_sw.rst
@@ -12,14 +12,6 @@ Note that the driver can also be built without any dependency with reduced
functionality for maintenance purpose.
To enable linking to the SDK libraries see detailed installation section below.
-Two flags can be enabled depending on whether the target machine can support
-AVX2 and AVX512 instructions sets and the related SDK libraries for vectorized
-signal processing functions are installed :
-- CONFIG_RTE_BBDEV_SDK_AVX2
-- CONFIG_RTE_BBDEV_SDK_AVX512
-By default these 2 flags are disabled by default. For AVX2 machine and SDK
-library installed then the first flag can be enabled. For AVX512 machine and
-SDK library installed then both flags can be enabled for full real time capability.
This PMD supports the functions: FEC, Rate Matching and CRC functions detailed
in the Features section.
@@ -151,13 +143,6 @@ Example:
export FLEXRAN_SDK=<path-to-workspace>/FlexRAN-FEC-SDK-19-04/sdk/build-avx2-icc/install
export DIR_WIRELESS_SDK=<path-to-workspace>/FlexRAN-FEC-SDK-19-04/sdk/build-avx2-icc/
-* Set ``CONFIG_RTE_BBDEV_SDK_AVX2=y`` and ``CONFIG_RTE_BBDEV_SDK_AVX512=y``
- in DPDK common configuration file ``config/common_base`` to be able to use
- the SDK libraries as mentioned above.
- For AVX2 machine it is possible to only enable CONFIG_RTE_BBDEV_SDK_AVX2
- for limited 4G functionality.
- If no flag are set the PMD driver will still build but its capabilities
- will be limited accordingly.
To use the PMD in an application, user must:
--
2.17.1